2 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
3 * FireStream 50 (MB86695) device driver
6 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
8 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
27 system and in the file COPYING in the Linux kernel source.
31 #include <linux/module.h>
32 #include <linux/sched.h>
33 #include <linux/kernel.h>
35 #include <linux/pci.h>
36 #include <linux/errno.h>
37 #include <linux/atm.h>
38 #include <linux/atmdev.h>
39 #include <linux/sonet.h>
40 #include <linux/skbuff.h>
41 #include <linux/netdevice.h>
42 #include <linux/delay.h>
43 #include <linux/ioport.h> /* for request_region */
44 #include <linux/uio.h>
45 #include <linux/init.h>
46 #include <linux/capability.h>
47 #include <linux/bitops.h>
48 #include <asm/byteorder.h>
49 #include <asm/system.h>
50 #include <asm/string.h>
52 #include <asm/atomic.h>
53 #include <asm/uaccess.h>
54 #include <linux/wait.h>
56 #include "firestream.h"
58 static int loopback
= 0;
61 /* According to measurements (but they look suspicious to me!) done in
62 * '97, 37% of the packets are one cell in size. So it pays to have
63 * buffers allocated at that size. A large jump in percentage of
64 * packets occurs at packets around 536 bytes in length. So it also
65 * pays to have those pre-allocated. Unfortunately, we can't fully
66 * take advantage of this as the majority of the packets is likely to
67 * be TCP/IP (As where obviously the measurement comes from) There the
68 * link would be opened with say a 1500 byte MTU, and we can't handle
69 * smaller buffers more efficiently than the larger ones. -- REW
72 /* Due to the way Linux memory management works, specifying "576" as
73 * an allocation size here isn't going to help. They are allocated
74 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
75 * large), it doesn't pay to allocate the smallest size (64) -- REW */
77 /* This is all guesswork. Hard numbers to back this up or disprove this,
78 * are appreciated. -- REW */
80 /* The last entry should be about 64k. However, the "buffer size" is
81 * passed to the chip in a 16 bit field. I don't know how "65536"
82 * would be interpreted. -- REW */
84 #define NP FS_NR_FREE_POOLS
85 static int rx_buf_sizes
[NP
] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
86 /* log2: 7 8 9 10 11 12 14 16 */
89 static int rx_pool_sizes
[NP
] = {1024, 1024, 512, 256, 128, 64, 32, 32};
92 static int rx_pool_sizes
[NP
] = {128, 128, 128, 64, 64, 64, 32, 32};
94 /* log2: 10 10 9 8 7 6 5 5 */
95 /* sumlog2: 17 18 18 18 18 18 19 21 */
96 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
97 /* tot mem: almost 4M */
99 /* NP is shorter, so that it fits on a single line. */
103 /* Small hardware gotcha:
105 The FS50 CAM (VP/VC match registers) always take the lowest channel
106 number that matches. This is not a problem.
108 However, they also ignore whether the channel is enabled or
109 not. This means that if you allocate channel 0 to 1.2 and then
110 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
111 match channel for channel 0 will "steal" the traffic from channel
112 1, even if you correctly disable channel 0.
116 - When disabling channels, write an invalid VP/VC value to the
117 match register. (We use 0xffffffff, which in the worst case
118 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
119 anything as some "when not in use, program to 0" bits are now
122 - Don't initialize the match registers to 0, as 0.0 is a valid
127 /* Optimization hints and tips.
129 The FireStream chips are very capable of reducing the amount of
130 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
131 action. You could try to minimize this a bit.
133 Besides that, the userspace->kernel copy and the PCI bus are the
134 performance limiting issues for this driver.
136 You could queue up a bunch of outgoing packets without telling the
137 FireStream. I'm not sure that's going to win you much though. The
138 Linux layer won't tell us in advance when it's not going to give us
139 any more packets in a while. So this is tricky to implement right without
140 introducing extra delays.
148 /* The strings that define what the RX queue entry is all about. */
149 /* Fujitsu: Please tell me which ones can have a pointer to a
150 freepool descriptor! */
151 static char *res_strings
[] = {
152 "RX OK: streaming not EOP",
153 "RX OK: streaming EOP",
154 "RX OK: Single buffer packet",
155 "RX OK: packet mode",
156 "RX OK: F4 OAM (end to end)",
157 "RX OK: F4 OAM (Segment)",
158 "RX OK: F5 OAM (end to end)",
159 "RX OK: F5 OAM (Segment)",
161 "RX OK: TRANSP cell",
162 "RX OK: TRANSPC cell",
169 "reassemby abort: AAL5 abort",
171 "packet ageing timeout",
172 "channel ageing timeout",
173 "calculated lenght error",
174 "programmed lenght limit error",
176 "oam transp or transpc crc10 error",
183 "reassembly abort: no buffers",
184 "receive buffer overflow",
186 "receive buffer full",
187 "low priority discard - no receive descriptor",
188 "low priority discard - missing end of packet",
214 static char *irq_bitname
[] = {
246 #define PHY_CLEARALL -2
248 struct reginit_item
{
253 static struct reginit_item PHY_NTC_INIT
[] __devinitdata
= {
254 { PHY_CLEARALL
, 0x40 },
260 { 0x39, 0x0006 }, /* changed here to make loopback */
264 { PHY_EOF
, 0}, /* -1 signals end of list */
268 /* Safetyfeature: If the card interrupts more than this number of times
269 in a jiffy (1/100th of a second) then we just disable the interrupt and
270 print a message. This prevents the system from hanging.
272 150000 packets per second is close to the limit a PC is going to have
273 anyway. We therefore have to disable this for production. -- REW */
274 #undef IRQ_RATE_LIMIT // 100
276 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
277 that great without interrupts. -- REW */
278 #undef FS_POLL_FREQ // 100
281 This driver can spew a whole lot of debugging output at you. If you
282 need maximum performance, you should disable the DEBUG define. To
283 aid in debugging in the field, I'm leaving the compile-time debug
284 features enabled, and disable them "runtime". That allows me to
285 instruct people with problems to enable debugging without requiring
286 them to recompile... -- REW
291 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
293 #define fs_dprintk(f, str...) /* nothing */
297 static int fs_keystream
= 0;
300 /* I didn't forget to set this to zero before shipping. Hit me with a stick
301 if you get this with the debug default not set to zero again. -- REW */
302 static int fs_debug
= 0;
309 module_param(fs_debug
, int, 0644);
311 module_param(loopback
, int, 0);
312 module_param(num
, int, 0);
313 module_param(fs_keystream
, int, 0);
314 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
318 #define FS_DEBUG_FLOW 0x00000001
319 #define FS_DEBUG_OPEN 0x00000002
320 #define FS_DEBUG_QUEUE 0x00000004
321 #define FS_DEBUG_IRQ 0x00000008
322 #define FS_DEBUG_INIT 0x00000010
323 #define FS_DEBUG_SEND 0x00000020
324 #define FS_DEBUG_PHY 0x00000040
325 #define FS_DEBUG_CLEANUP 0x00000080
326 #define FS_DEBUG_QOS 0x00000100
327 #define FS_DEBUG_TXQ 0x00000200
328 #define FS_DEBUG_ALLOC 0x00000400
329 #define FS_DEBUG_TXMEM 0x00000800
330 #define FS_DEBUG_QSIZE 0x00001000
333 #define func_enter() fs_dprintk (FS_DEBUG_FLOW, "fs: enter %s\n", __FUNCTION__)
334 #define func_exit() fs_dprintk (FS_DEBUG_FLOW, "fs: exit %s\n", __FUNCTION__)
337 static struct fs_dev
*fs_boards
= NULL
;
341 static void my_hd (void *addr
, int len
)
344 unsigned char *ptr
= addr
;
348 for (j
=0;j
< ((len
< 16)?len
:16);j
++) {
349 printk ("%02x %s", ptr
[j
], (j
==7)?" ":"");
352 printk (" %s", (j
==7)?" ":"");
354 for (j
=0;j
< ((len
< 16)?len
:16);j
++) {
356 printk ("%c", (ch
< 0x20)?'.':((ch
> 0x7f)?'.':ch
));
364 static void my_hd (void *addr
, int len
){}
367 /********** free an skb (as per ATM device driver documentation) **********/
369 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
370 * I copied it over from the ambassador driver. -- REW */
372 static inline void fs_kfree_skb (struct sk_buff
* skb
)
374 if (ATM_SKB(skb
)->vcc
->pop
)
375 ATM_SKB(skb
)->vcc
->pop (ATM_SKB(skb
)->vcc
, skb
);
377 dev_kfree_skb_any (skb
);
383 /* It seems the ATM forum recommends this horribly complicated 16bit
384 * floating point format. Turns out the Ambassador uses the exact same
385 * encoding. I just copied it over. If Mitch agrees, I'll move it over
386 * to the atm_misc file or something like that. (and remove it from
387 * here and the ambassador driver) -- REW
390 /* The good thing about this format is that it is monotonic. So,
391 a conversion routine need not be very complicated. To be able to
392 round "nearest" we need to take along a few extra bits. Lets
393 put these after 16 bits, so that we can just return the top 16
394 bits of the 32bit number as the result:
396 int mr (unsigned int rate, int r)
399 static int round[4]={0, 0, 0xffff, 0x8000};
401 while (rate & 0xfc000000) {
405 while (! (rate & 0xfe000000)) {
410 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
412 // Next add in the exponent
414 // And perform the rounding:
415 return (rate + round[r]) >> 16;
418 14 lines-of-code. Compare that with the 120 that the Ambassador
419 guys needed. (would be 8 lines shorter if I'd try to really reduce
422 int mr (unsigned int rate, int r)
425 static int round[4]={0, 0, 0xffff, 0x8000};
427 for (; rate & 0xfc000000 ;rate >>= 1, e++);
428 for (;!(rate & 0xfe000000);rate <<= 1, e--);
429 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
432 Exercise for the reader: Remove one more line-of-code, without
433 cheating. (Just joining two lines is cheating). (I know it's
434 possible, don't think you've beat me if you found it... If you
435 manage to lose two lines or more, keep me updated! ;-)
442 #define ROUND_NEAREST 3
443 /********** make rate (not quite as much fun as Horizon) **********/
445 static unsigned int make_rate (unsigned int rate
, int r
,
446 u16
* bits
, unsigned int * actual
)
448 unsigned char exp
= -1; /* hush gcc */
449 unsigned int man
= -1; /* hush gcc */
451 fs_dprintk (FS_DEBUG_QOS
, "make_rate %u", rate
);
453 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
454 given 5-bit e and 9-bit m:
455 rate = EITHER (1+m/2^9)*2^e OR 0
456 bits = EITHER 1<<14 | e<<9 | m OR 0
457 (bit 15 is "reserved", bit 14 "non-zero")
458 smallest rate is 0 (special representation)
459 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
460 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
462 find position of top bit, this gives e
463 remove top bit and shift (rounding if feeling clever) by 9-e
465 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
466 representable. // This should move into the ambassador driver
467 when properly merged. -- REW */
469 if (rate
> 0xffc00000U
) {
470 /* larger than largest representable rate */
480 /* representable rate */
485 /* invariant: rate = man*2^(exp-31) */
486 while (!(man
& (1<<31))) {
491 /* man has top bit set
492 rate = (2^31+(man-2^31))*2^(exp-31)
493 rate = (1+(man-2^31)/2^31)*2^exp
496 man
&= 0xffffffffU
; /* a nop on 32-bit systems */
497 /* rate = (1+man/2^32)*2^exp
499 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
500 time to lose significance... we want m in the range 0 to 2^9-1
501 rounding presents a minor problem... we first decide which way
502 we are rounding (based on given rounding direction and possibly
503 the bits of the mantissa that are to be discarded).
513 /* check all bits that we are discarding */
514 if (man
& (~0U>>9)) {
515 man
= (man
>>(32-9)) + 1;
517 /* no need to check for round up outside of range */
526 case ROUND_NEAREST
: {
527 /* check msb that we are discarding */
528 if (man
& (1<<(32-9-1))) {
529 man
= (man
>>(32-9)) + 1;
531 /* no need to check for round up outside of range */
543 /* zero rate - not representable */
545 if (r
== ROUND_DOWN
) {
553 fs_dprintk (FS_DEBUG_QOS
, "rate: man=%u, exp=%hu", man
, exp
);
556 *bits
= /* (1<<14) | */ (exp
<<9) | man
;
560 ? (1 << exp
) + (man
<< (exp
-9))
561 : (1 << exp
) + ((man
+ (1<<(9-exp
-1))) >> (9-exp
));
569 /* FireStream access routines */
570 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
571 certain registers or to just log all accesses. */
573 static inline void write_fs (struct fs_dev
*dev
, int offset
, u32 val
)
575 writel (val
, dev
->base
+ offset
);
579 static inline u32
read_fs (struct fs_dev
*dev
, int offset
)
581 return readl (dev
->base
+ offset
);
586 static inline struct FS_QENTRY
*get_qentry (struct fs_dev
*dev
, struct queue
*q
)
588 return bus_to_virt (read_fs (dev
, Q_WP(q
->offset
)) & Q_ADDR_MASK
);
592 static void submit_qentry (struct fs_dev
*dev
, struct queue
*q
, struct FS_QENTRY
*qe
)
595 struct FS_QENTRY
*cqe
;
597 /* XXX Sanity check: the write pointer can be checked to be
598 still the same as the value passed as qe... -- REW */
600 while ((wp
= read_fs (dev
, Q_WP (q
->offset
))) & Q_FULL
) {
601 fs_dprintk (FS_DEBUG_TXQ
, "Found queue at %x full. Waiting.\n",
607 cqe
= bus_to_virt (wp
);
609 fs_dprintk (FS_DEBUG_TXQ
, "q mismatch! %p %p\n", qe
, cqe
);
612 write_fs (dev
, Q_WP(q
->offset
), Q_INCWRAP
);
619 rp
= read_fs (dev
, Q_RP(q
->offset
));
620 wp
= read_fs (dev
, Q_WP(q
->offset
));
621 fs_dprintk (FS_DEBUG_TXQ
, "q at %d: %x-%x: %x entries.\n",
622 q
->offset
, rp
, wp
, wp
-rp
);
628 static struct FS_QENTRY pq
[60];
631 static struct FS_BPENTRY dq
[60];
636 static void submit_queue (struct fs_dev
*dev
, struct queue
*q
,
637 u32 cmd
, u32 p1
, u32 p2
, u32 p3
)
639 struct FS_QENTRY
*qe
;
641 qe
= get_qentry (dev
, q
);
646 submit_qentry (dev
, q
, qe
);
654 if (qp
>= 60) qp
= 0;
658 /* Test the "other" way one day... -- REW */
660 #define submit_command submit_queue
663 static void submit_command (struct fs_dev
*dev
, struct queue
*q
,
664 u32 cmd
, u32 p1
, u32 p2
, u32 p3
)
666 write_fs (dev
, CMDR0
, cmd
);
667 write_fs (dev
, CMDR1
, p1
);
668 write_fs (dev
, CMDR2
, p2
);
669 write_fs (dev
, CMDR3
, p3
);
675 static void process_return_queue (struct fs_dev
*dev
, struct queue
*q
)
678 struct FS_QENTRY
*qe
;
681 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
682 fs_dprintk (FS_DEBUG_QUEUE
, "reaping return queue entry at %lx\n", rq
);
683 qe
= bus_to_virt (rq
);
685 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x. (%d)\n",
686 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
688 switch (STATUS_CODE (qe
)) {
690 tc
= bus_to_virt (qe
->p0
);
691 fs_dprintk (FS_DEBUG_ALLOC
, "Free tc: %p\n", tc
);
696 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
701 static void process_txdone_queue (struct fs_dev
*dev
, struct queue
*q
)
705 struct FS_QENTRY
*qe
;
707 struct FS_BPENTRY
*td
;
709 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
710 fs_dprintk (FS_DEBUG_QUEUE
, "reaping txdone entry at %lx\n", rq
);
711 qe
= bus_to_virt (rq
);
713 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x: %d\n",
714 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
716 if (STATUS_CODE (qe
) != 2)
717 fs_dprintk (FS_DEBUG_TXMEM
, "queue entry: %08x %08x %08x %08x: %d\n",
718 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
721 switch (STATUS_CODE (qe
)) {
722 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
725 /* Process a real txdone entry. */
728 printk (KERN_WARNING
"td not aligned: %ld\n", tmp
);
730 td
= bus_to_virt (tmp
);
732 fs_dprintk (FS_DEBUG_QUEUE
, "Pool entry: %08x %08x %08x %08x %p.\n",
733 td
->flags
, td
->next
, td
->bsa
, td
->aal_bufsize
, td
->skb
);
736 if (skb
== FS_VCC (ATM_SKB(skb
)->vcc
)->last_skb
) {
737 wake_up_interruptible (& FS_VCC (ATM_SKB(skb
)->vcc
)->close_wait
);
738 FS_VCC (ATM_SKB(skb
)->vcc
)->last_skb
= NULL
;
746 fs_dprintk (FS_DEBUG_QSIZE
, "[%d]", td
->dev
->ntxpckts
);
750 atomic_inc(&ATM_SKB(skb
)->vcc
->stats
->tx
);
752 fs_dprintk (FS_DEBUG_TXMEM
, "i");
753 fs_dprintk (FS_DEBUG_ALLOC
, "Free t-skb: %p\n", skb
);
756 fs_dprintk (FS_DEBUG_ALLOC
, "Free trans-d: %p\n", td
);
757 memset (td
, 0x12, sizeof (struct FS_BPENTRY
));
761 /* Here we get the tx purge inhibit command ... */
762 /* Action, I believe, is "don't do anything". -- REW */
766 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
771 static void process_incoming (struct fs_dev
*dev
, struct queue
*q
)
774 struct FS_QENTRY
*qe
;
775 struct FS_BPENTRY
*pe
;
778 struct atm_vcc
*atm_vcc
;
780 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
781 fs_dprintk (FS_DEBUG_QUEUE
, "reaping incoming queue entry at %lx\n", rq
);
782 qe
= bus_to_virt (rq
);
784 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x. ",
785 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
);
787 fs_dprintk (FS_DEBUG_QUEUE
, "-> %x: %s\n",
789 res_strings
[STATUS_CODE(qe
)]);
791 pe
= bus_to_virt (qe
->p0
);
792 fs_dprintk (FS_DEBUG_QUEUE
, "Pool entry: %08x %08x %08x %08x %p %p.\n",
793 pe
->flags
, pe
->next
, pe
->bsa
, pe
->aal_bufsize
,
796 channo
= qe
->cmd
& 0xffff;
798 if (channo
< dev
->nchannels
)
799 atm_vcc
= dev
->atm_vccs
[channo
];
803 /* Single buffer packet */
804 switch (STATUS_CODE (qe
)) {
806 /* Fall through for streaming mode */
807 case 0x2:/* Packet received OK.... */
812 fs_dprintk (FS_DEBUG_QUEUE
, "Got skb: %p\n", skb
);
813 if (FS_DEBUG_QUEUE
& fs_debug
) my_hd (bus_to_virt (pe
->bsa
), 0x20);
815 skb_put (skb
, qe
->p1
& 0xffff);
816 ATM_SKB(skb
)->vcc
= atm_vcc
;
817 atomic_inc(&atm_vcc
->stats
->rx
);
818 __net_timestamp(skb
);
819 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p (pushed)\n", skb
);
820 atm_vcc
->push (atm_vcc
, skb
);
821 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", pe
);
824 printk (KERN_ERR
"Got a receive on a non-open channel %d.\n", channo
);
827 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
828 has been consumed and needs to be processed. -- REW */
829 if (qe
->p1
& 0xffff) {
830 pe
= bus_to_virt (qe
->p0
);
832 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", pe
->skb
);
833 dev_kfree_skb_any (pe
->skb
);
834 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", pe
);
838 atomic_inc(&atm_vcc
->stats
->rx_drop
);
840 case 0x1f: /* Reassembly abort: no buffers. */
841 /* Silently increment error counter. */
843 atomic_inc(&atm_vcc
->stats
->rx_drop
);
845 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
846 printk (KERN_WARNING
"Don't know what to do with RX status %x: %s.\n",
847 STATUS_CODE(qe
), res_strings
[STATUS_CODE (qe
)]);
849 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
855 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
857 static int fs_open(struct atm_vcc
*atm_vcc
)
861 struct fs_transmit_config
*tc
;
862 struct atm_trafprm
* txtp
;
863 struct atm_trafprm
* rxtp
;
864 /* struct fs_receive_config *rc;*/
865 /* struct FS_QENTRY *qe; */
870 short vpi
= atm_vcc
->vpi
;
871 int vci
= atm_vcc
->vci
;
875 dev
= FS_DEV(atm_vcc
->dev
);
876 fs_dprintk (FS_DEBUG_OPEN
, "fs: open on dev: %p, vcc at %p\n",
879 if (vci
!= ATM_VPI_UNSPEC
&& vpi
!= ATM_VCI_UNSPEC
)
880 set_bit(ATM_VF_ADDR
, &atm_vcc
->flags
);
882 if ((atm_vcc
->qos
.aal
!= ATM_AAL5
) &&
883 (atm_vcc
->qos
.aal
!= ATM_AAL2
))
884 return -EINVAL
; /* XXX AAL0 */
886 fs_dprintk (FS_DEBUG_OPEN
, "fs: (itf %d): open %d.%d\n",
887 atm_vcc
->dev
->number
, atm_vcc
->vpi
, atm_vcc
->vci
);
889 /* XXX handle qos parameters (rate limiting) ? */
891 vcc
= kmalloc(sizeof(struct fs_vcc
), GFP_KERNEL
);
892 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc VCC: %p(%Zd)\n", vcc
, sizeof(struct fs_vcc
));
894 clear_bit(ATM_VF_ADDR
, &atm_vcc
->flags
);
898 atm_vcc
->dev_data
= vcc
;
899 vcc
->last_skb
= NULL
;
901 init_waitqueue_head (&vcc
->close_wait
);
903 txtp
= &atm_vcc
->qos
.txtp
;
904 rxtp
= &atm_vcc
->qos
.rxtp
;
906 if (!test_bit(ATM_VF_PARTIAL
, &atm_vcc
->flags
)) {
908 /* Increment the channel numer: take a free one next time. */
909 for (to
=33;to
;to
--, dev
->channo
++) {
910 /* We only have 32 channels */
911 if (dev
->channo
>= 32)
913 /* If we need to do RX, AND the RX is inuse, try the next */
914 if (DO_DIRECTION(rxtp
) && dev
->atm_vccs
[dev
->channo
])
916 /* If we need to do TX, AND the TX is inuse, try the next */
917 if (DO_DIRECTION(txtp
) && test_bit (dev
->channo
, dev
->tx_inuse
))
919 /* Ok, both are free! (or not needed) */
923 printk ("No more free channels for FS50..\n");
926 vcc
->channo
= dev
->channo
;
927 dev
->channo
&= dev
->channel_mask
;
930 vcc
->channo
= (vpi
<< FS155_VCI_BITS
) | (vci
);
931 if (((DO_DIRECTION(rxtp
) && dev
->atm_vccs
[vcc
->channo
])) ||
932 ( DO_DIRECTION(txtp
) && test_bit (vcc
->channo
, dev
->tx_inuse
))) {
933 printk ("Channel is in use for FS155.\n");
937 fs_dprintk (FS_DEBUG_OPEN
, "OK. Allocated channel %x(%d).\n",
938 vcc
->channo
, vcc
->channo
);
941 if (DO_DIRECTION (txtp
)) {
942 tc
= kmalloc (sizeof (struct fs_transmit_config
), GFP_KERNEL
);
943 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc tc: %p(%Zd)\n",
944 tc
, sizeof (struct fs_transmit_config
));
946 fs_dprintk (FS_DEBUG_OPEN
, "fs: can't alloc transmit_config.\n");
950 /* Allocate the "open" entry from the high priority txq. This makes
951 it most likely that the chip will notice it. It also prevents us
952 from having to wait for completion. On the other hand, we may
953 need to wait for completion anyway, to see if it completed
956 switch (atm_vcc
->qos
.aal
) {
960 | TC_FLAGS_TRANSPARENT_PAYLOAD
963 | TC_FLAGS_TYPE_UBR
/* XXX Change to VBR -- PVDL */
969 | TC_FLAGS_PACKET
/* ??? */
974 printk ("Unknown aal: %d\n", atm_vcc
->qos
.aal
);
977 /* Docs are vague about this atm_hdr field. By the way, the FS
978 * chip makes odd errors if lower bits are set.... -- REW */
979 tc
->atm_hdr
= (vpi
<< 20) | (vci
<< 4);
981 int pcr
= atm_pcr_goal (txtp
);
983 fs_dprintk (FS_DEBUG_OPEN
, "pcr = %d.\n", pcr
);
985 /* XXX Hmm. officially we're only allowed to do this if rounding
986 is round_down -- REW */
988 if (pcr
> 51840000/53/8) pcr
= 51840000/53/8;
990 if (pcr
> 155520000/53/8) pcr
= 155520000/53/8;
994 tmc0
= IS_FS50(dev
)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
1003 error
= make_rate (pcr
, r
, &tmc0
, NULL
);
1009 fs_dprintk (FS_DEBUG_OPEN
, "pcr = %d.\n", pcr
);
1012 tc
->TMC
[0] = tmc0
| 0x4000;
1013 tc
->TMC
[1] = 0; /* Unused */
1014 tc
->TMC
[2] = 0; /* Unused */
1015 tc
->TMC
[3] = 0; /* Unused */
1017 tc
->spec
= 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1018 tc
->rtag
[0] = 0; /* What should I do with routing tags???
1019 -- Not used -- AS -- Thanks -- REW*/
1023 if (fs_debug
& FS_DEBUG_OPEN
) {
1024 fs_dprintk (FS_DEBUG_OPEN
, "TX config record:\n");
1025 my_hd (tc
, sizeof (*tc
));
1028 /* We now use the "submit_command" function to submit commands to
1029 the firestream. There is a define up near the definition of
1030 that routine that switches this routine between immediate write
1031 to the immediate comamnd registers and queuing the commands in
1032 the HPTXQ for execution. This last technique might be more
1033 efficient if we know we're going to submit a whole lot of
1034 commands in one go, but this driver is not setup to be able to
1035 use such a construct. So it probably doen't matter much right
1038 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1039 submit_command (dev
, &dev
->hp_txq
,
1040 QE_CMD_CONFIG_TX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1041 virt_to_bus (tc
), 0, 0);
1043 submit_command (dev
, &dev
->hp_txq
,
1044 QE_CMD_TX_EN
| QE_CMD_IMM_INQ
| vcc
->channo
,
1046 set_bit (vcc
->channo
, dev
->tx_inuse
);
1049 if (DO_DIRECTION (rxtp
)) {
1050 dev
->atm_vccs
[vcc
->channo
] = atm_vcc
;
1052 for (bfp
= 0;bfp
< FS_NR_FREE_POOLS
; bfp
++)
1053 if (atm_vcc
->qos
.rxtp
.max_sdu
<= dev
->rx_fp
[bfp
].bufsize
) break;
1054 if (bfp
>= FS_NR_FREE_POOLS
) {
1055 fs_dprintk (FS_DEBUG_OPEN
, "No free pool fits sdu: %d.\n",
1056 atm_vcc
->qos
.rxtp
.max_sdu
);
1057 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1059 /* XXX clear tx inuse. Close TX part? */
1060 dev
->atm_vccs
[vcc
->channo
] = NULL
;
1065 switch (atm_vcc
->qos
.aal
) {
1068 submit_command (dev
, &dev
->hp_txq
,
1069 QE_CMD_CONFIG_RX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1071 RC_FLAGS_BFPS_BFP
* bfp
|
1072 RC_FLAGS_RXBM_PSB
, 0, 0);
1075 submit_command (dev
, &dev
->hp_txq
,
1076 QE_CMD_CONFIG_RX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1078 RC_FLAGS_BFPS_BFP
* bfp
|
1079 RC_FLAGS_RXBM_PSB
, 0, 0);
1082 if (IS_FS50 (dev
)) {
1083 submit_command (dev
, &dev
->hp_txq
,
1084 QE_CMD_REG_WR
| QE_CMD_IMM_INQ
,
1086 (vpi
<< 16) | vci
, 0 ); /* XXX -- Use defines. */
1088 submit_command (dev
, &dev
->hp_txq
,
1089 QE_CMD_RX_EN
| QE_CMD_IMM_INQ
| vcc
->channo
,
1093 /* Indicate we're done! */
1094 set_bit(ATM_VF_READY
, &atm_vcc
->flags
);
1101 static void fs_close(struct atm_vcc
*atm_vcc
)
1103 struct fs_dev
*dev
= FS_DEV (atm_vcc
->dev
);
1104 struct fs_vcc
*vcc
= FS_VCC (atm_vcc
);
1105 struct atm_trafprm
* txtp
;
1106 struct atm_trafprm
* rxtp
;
1110 clear_bit(ATM_VF_READY
, &atm_vcc
->flags
);
1112 fs_dprintk (FS_DEBUG_QSIZE
, "--==**[%d]**==--", dev
->ntxpckts
);
1113 if (vcc
->last_skb
) {
1114 fs_dprintk (FS_DEBUG_QUEUE
, "Waiting for skb %p to be sent.\n",
1116 /* We're going to wait for the last packet to get sent on this VC. It would
1117 be impolite not to send them don't you think?
1119 We don't know which packets didn't get sent. So if we get interrupted in
1120 this sleep_on, we'll lose any reference to these packets. Memory leak!
1121 On the other hand, it's awfully convenient that we can abort a "close" that
1122 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1123 interruptible_sleep_on (& vcc
->close_wait
);
1126 txtp
= &atm_vcc
->qos
.txtp
;
1127 rxtp
= &atm_vcc
->qos
.rxtp
;
1130 /* See App note XXX (Unpublished as of now) for the reason for the
1131 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1133 if (DO_DIRECTION (txtp
)) {
1134 submit_command (dev
, &dev
->hp_txq
,
1135 QE_CMD_TX_PURGE_INH
| /*QE_CMD_IMM_INQ|*/ vcc
->channo
, 0,0,0);
1136 clear_bit (vcc
->channo
, dev
->tx_inuse
);
1139 if (DO_DIRECTION (rxtp
)) {
1140 submit_command (dev
, &dev
->hp_txq
,
1141 QE_CMD_RX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1142 dev
->atm_vccs
[vcc
->channo
] = NULL
;
1144 /* This means that this is configured as a receive channel */
1145 if (IS_FS50 (dev
)) {
1146 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1147 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1148 (0xfff...) -- REW */
1149 submit_command (dev
, &dev
->hp_txq
,
1150 QE_CMD_REG_WR
| QE_CMD_IMM_INQ
,
1151 0x80 + vcc
->channo
, -1, 0 );
1155 fs_dprintk (FS_DEBUG_ALLOC
, "Free vcc: %p\n", vcc
);
1162 static int fs_send (struct atm_vcc
*atm_vcc
, struct sk_buff
*skb
)
1164 struct fs_dev
*dev
= FS_DEV (atm_vcc
->dev
);
1165 struct fs_vcc
*vcc
= FS_VCC (atm_vcc
);
1166 struct FS_BPENTRY
*td
;
1170 fs_dprintk (FS_DEBUG_TXMEM
, "I");
1171 fs_dprintk (FS_DEBUG_SEND
, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1172 atm_vcc
, skb
, vcc
, dev
);
1174 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc t-skb: %p (atm_send)\n", skb
);
1176 ATM_SKB(skb
)->vcc
= atm_vcc
;
1178 vcc
->last_skb
= skb
;
1180 td
= kmalloc (sizeof (struct FS_BPENTRY
), GFP_ATOMIC
);
1181 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc transd: %p(%Zd)\n", td
, sizeof (struct FS_BPENTRY
));
1183 /* Oops out of mem */
1187 fs_dprintk (FS_DEBUG_SEND
, "first word in buffer: %x\n",
1188 *(int *) skb
->data
);
1190 td
->flags
= TD_EPI
| TD_DATA
| skb
->len
;
1192 td
->bsa
= virt_to_bus (skb
->data
);
1199 dq
[qd
].flags
= td
->flags
;
1200 dq
[qd
].next
= td
->next
;
1201 dq
[qd
].bsa
= td
->bsa
;
1202 dq
[qd
].skb
= td
->skb
;
1203 dq
[qd
].dev
= td
->dev
;
1205 if (qd
>= 60) qd
= 0;
1208 submit_queue (dev
, &dev
->hp_txq
,
1209 QE_TRANSMIT_DE
| vcc
->channo
,
1210 virt_to_bus (td
), 0,
1213 fs_dprintk (FS_DEBUG_QUEUE
, "in send: txq %d txrq %d\n",
1214 read_fs (dev
, Q_EA (dev
->hp_txq
.offset
)) -
1215 read_fs (dev
, Q_SA (dev
->hp_txq
.offset
)),
1216 read_fs (dev
, Q_EA (dev
->tx_relq
.offset
)) -
1217 read_fs (dev
, Q_SA (dev
->tx_relq
.offset
)));
1224 /* Some function placeholders for functions we don't yet support. */
1227 static int fs_ioctl(struct atm_dev
*dev
,unsigned int cmd
,void __user
*arg
)
1231 return -ENOIOCTLCMD
;
1235 static int fs_getsockopt(struct atm_vcc
*vcc
,int level
,int optname
,
1236 void __user
*optval
,int optlen
)
1244 static int fs_setsockopt(struct atm_vcc
*vcc
,int level
,int optname
,
1245 void __user
*optval
,int optlen
)
1253 static void fs_phy_put(struct atm_dev
*dev
,unsigned char value
,
1261 static unsigned char fs_phy_get(struct atm_dev
*dev
,unsigned long addr
)
1269 static int fs_change_qos(struct atm_vcc
*vcc
,struct atm_qos
*qos
,int flags
)
1279 static const struct atmdev_ops ops
= {
1283 .owner
= THIS_MODULE
,
1284 /* ioctl: fs_ioctl, */
1285 /* getsockopt: fs_getsockopt, */
1286 /* setsockopt: fs_setsockopt, */
1287 /* change_qos: fs_change_qos, */
1289 /* For now implement these internally here... */
1290 /* phy_put: fs_phy_put, */
1291 /* phy_get: fs_phy_get, */
1295 static void __devinit
undocumented_pci_fix (struct pci_dev
*pdev
)
1299 /* The Windows driver says: */
1300 /* Switch off FireStream Retry Limit Threshold
1303 /* The register at 0x28 is documented as "reserved", no further
1306 pci_read_config_dword (pdev
, 0x28, &tint
);
1309 pci_write_config_dword (pdev
, 0x28, tint
);
1315 /**************************************************************************
1317 **************************************************************************/
1319 static void __devinit
write_phy (struct fs_dev
*dev
, int regnum
, int val
)
1321 submit_command (dev
, &dev
->hp_txq
, QE_CMD_PRP_WR
| QE_CMD_IMM_INQ
,
1325 static int __devinit
init_phy (struct fs_dev
*dev
, struct reginit_item
*reginit
)
1330 while (reginit
->reg
!= PHY_EOF
) {
1331 if (reginit
->reg
== PHY_CLEARALL
) {
1332 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1333 for (i
=0;i
<reginit
->val
;i
++) {
1334 write_phy (dev
, i
, 0);
1337 write_phy (dev
, reginit
->reg
, reginit
->val
);
1345 static void reset_chip (struct fs_dev
*dev
)
1349 write_fs (dev
, SARMODE0
, SARMODE0_SRTS0
);
1351 /* Undocumented delay */
1354 /* The "internal registers are documented to all reset to zero, but
1355 comments & code in the Windows driver indicates that the pools are
1357 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1358 write_fs (dev
, FP_CNF (RXB_FP(i
)), 0);
1359 write_fs (dev
, FP_SA (RXB_FP(i
)), 0);
1360 write_fs (dev
, FP_EA (RXB_FP(i
)), 0);
1361 write_fs (dev
, FP_CNT (RXB_FP(i
)), 0);
1362 write_fs (dev
, FP_CTU (RXB_FP(i
)), 0);
1365 /* The same goes for the match channel registers, although those are
1366 NOT documented that way in the Windows driver. -- REW */
1367 /* The Windows driver DOES write 0 to these registers somewhere in
1368 the init sequence. However, a small hardware-feature, will
1369 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1370 allocated happens to have no disabled channels that have a lower
1373 /* Clear the match channel registers. */
1374 if (IS_FS50 (dev
)) {
1375 for (i
=0;i
<FS50_NR_CHANNELS
;i
++) {
1376 write_fs (dev
, 0x200 + i
* 4, -1);
1381 static void __devinit
*aligned_kmalloc (int size
, gfp_t flags
, int alignment
)
1385 if (alignment
<= 0x10) {
1386 t
= kmalloc (size
, flags
);
1387 if ((unsigned long)t
& (alignment
-1)) {
1388 printk ("Kmalloc doesn't align things correctly! %p\n", t
);
1390 return aligned_kmalloc (size
, flags
, alignment
* 4);
1394 printk (KERN_ERR
"Request for > 0x10 alignment not yet implemented (hard!)\n");
1398 static int __devinit
init_q (struct fs_dev
*dev
,
1399 struct queue
*txq
, int queue
, int nentries
, int is_rq
)
1401 int sz
= nentries
* sizeof (struct FS_QENTRY
);
1402 struct FS_QENTRY
*p
;
1406 fs_dprintk (FS_DEBUG_INIT
, "Inititing queue at %x: %d entries:\n",
1409 p
= aligned_kmalloc (sz
, GFP_KERNEL
, 0x10);
1410 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc queue: %p(%d)\n", p
, sz
);
1414 write_fs (dev
, Q_SA(queue
), virt_to_bus(p
));
1415 write_fs (dev
, Q_EA(queue
), virt_to_bus(p
+nentries
-1));
1416 write_fs (dev
, Q_WP(queue
), virt_to_bus(p
));
1417 write_fs (dev
, Q_RP(queue
), virt_to_bus(p
));
1419 /* Configuration for the receive queue: 0: interrupt immediately,
1420 no pre-warning to empty queues: We do our best to keep the
1421 queue filled anyway. */
1422 write_fs (dev
, Q_CNF(queue
), 0 );
1427 txq
->offset
= queue
;
1434 static int __devinit
init_fp (struct fs_dev
*dev
,
1435 struct freepool
*fp
, int queue
, int bufsize
, int nr_buffers
)
1439 fs_dprintk (FS_DEBUG_INIT
, "Inititing free pool at %x:\n", queue
);
1441 write_fs (dev
, FP_CNF(queue
), (bufsize
* RBFP_RBS
) | RBFP_RBSVAL
| RBFP_CME
);
1442 write_fs (dev
, FP_SA(queue
), 0);
1443 write_fs (dev
, FP_EA(queue
), 0);
1444 write_fs (dev
, FP_CTU(queue
), 0);
1445 write_fs (dev
, FP_CNT(queue
), 0);
1448 fp
->bufsize
= bufsize
;
1449 fp
->nr_buffers
= nr_buffers
;
1456 static inline int nr_buffers_in_freepool (struct fs_dev
*dev
, struct freepool
*fp
)
1459 /* This seems to be unreliable.... */
1460 return read_fs (dev
, FP_CNT (fp
->offset
));
1467 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1468 does. I've seen "receive abort: no buffers" and things started
1469 working again after that... -- REW */
1471 static void top_off_fp (struct fs_dev
*dev
, struct freepool
*fp
,
1474 struct FS_BPENTRY
*qe
, *ne
;
1475 struct sk_buff
*skb
;
1478 fs_dprintk (FS_DEBUG_QUEUE
, "Topping off queue at %x (%d-%d/%d)\n",
1479 fp
->offset
, read_fs (dev
, FP_CNT (fp
->offset
)), fp
->n
,
1481 while (nr_buffers_in_freepool(dev
, fp
) < fp
->nr_buffers
) {
1483 skb
= alloc_skb (fp
->bufsize
, gfp_flags
);
1484 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc rec-skb: %p(%d)\n", skb
, fp
->bufsize
);
1486 ne
= kmalloc (sizeof (struct FS_BPENTRY
), gfp_flags
);
1487 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc rec-d: %p(%Zd)\n", ne
, sizeof (struct FS_BPENTRY
));
1489 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", skb
);
1490 dev_kfree_skb_any (skb
);
1494 fs_dprintk (FS_DEBUG_QUEUE
, "Adding skb %p desc %p -> %p(%p) ",
1495 skb
, ne
, skb
->data
, skb
->head
);
1497 ne
->flags
= FP_FLAGS_EPI
| fp
->bufsize
;
1498 ne
->next
= virt_to_bus (NULL
);
1499 ne
->bsa
= virt_to_bus (skb
->data
);
1500 ne
->aal_bufsize
= fp
->bufsize
;
1504 qe
= (struct FS_BPENTRY
*) (read_fs (dev
, FP_EA(fp
->offset
)));
1505 fs_dprintk (FS_DEBUG_QUEUE
, "link at %p\n", qe
);
1507 qe
= bus_to_virt ((long) qe
);
1508 qe
->next
= virt_to_bus(ne
);
1509 qe
->flags
&= ~FP_FLAGS_EPI
;
1511 write_fs (dev
, FP_SA(fp
->offset
), virt_to_bus(ne
));
1513 write_fs (dev
, FP_EA(fp
->offset
), virt_to_bus (ne
));
1514 fp
->n
++; /* XXX Atomic_inc? */
1515 write_fs (dev
, FP_CTU(fp
->offset
), 1);
1518 fs_dprintk (FS_DEBUG_QUEUE
, "Added %d entries. \n", n
);
1521 static void __devexit
free_queue (struct fs_dev
*dev
, struct queue
*txq
)
1525 write_fs (dev
, Q_SA(txq
->offset
), 0);
1526 write_fs (dev
, Q_EA(txq
->offset
), 0);
1527 write_fs (dev
, Q_RP(txq
->offset
), 0);
1528 write_fs (dev
, Q_WP(txq
->offset
), 0);
1529 /* Configuration ? */
1531 fs_dprintk (FS_DEBUG_ALLOC
, "Free queue: %p\n", txq
->sa
);
1537 static void __devexit
free_freepool (struct fs_dev
*dev
, struct freepool
*fp
)
1541 write_fs (dev
, FP_CNF(fp
->offset
), 0);
1542 write_fs (dev
, FP_SA (fp
->offset
), 0);
1543 write_fs (dev
, FP_EA (fp
->offset
), 0);
1544 write_fs (dev
, FP_CNT(fp
->offset
), 0);
1545 write_fs (dev
, FP_CTU(fp
->offset
), 0);
1552 static irqreturn_t
fs_irq (int irq
, void *dev_id
, struct pt_regs
* pt_regs
)
1556 struct fs_dev
*dev
= dev_id
;
1558 status
= read_fs (dev
, ISR
);
1564 #ifdef IRQ_RATE_LIMIT
1565 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1566 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1571 if (lastjif
== jiffies
) {
1572 if (++nintr
> IRQ_RATE_LIMIT
) {
1573 free_irq (dev
->irq
, dev_id
);
1574 printk (KERN_ERR
"fs: Too many interrupts. Turning off interrupt %d.\n",
1583 fs_dprintk (FS_DEBUG_QUEUE
, "in intr: txq %d txrq %d\n",
1584 read_fs (dev
, Q_EA (dev
->hp_txq
.offset
)) -
1585 read_fs (dev
, Q_SA (dev
->hp_txq
.offset
)),
1586 read_fs (dev
, Q_EA (dev
->tx_relq
.offset
)) -
1587 read_fs (dev
, Q_SA (dev
->tx_relq
.offset
)));
1589 /* print the bits in the ISR register. */
1590 if (fs_debug
& FS_DEBUG_IRQ
) {
1591 /* The FS_DEBUG things are unneccesary here. But this way it is
1592 clear for grep that these are debug prints. */
1593 fs_dprintk (FS_DEBUG_IRQ
, "IRQ status:");
1595 if (status
& (1 << i
))
1596 fs_dprintk (FS_DEBUG_IRQ
, " %s", irq_bitname
[i
]);
1597 fs_dprintk (FS_DEBUG_IRQ
, "\n");
1600 if (status
& ISR_RBRQ0_W
) {
1601 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (0)!!!!\n");
1602 process_incoming (dev
, &dev
->rx_rq
[0]);
1603 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1604 top_off_fp (dev
, &dev
->rx_fp
[0], GFP_ATOMIC
);
1605 top_off_fp (dev
, &dev
->rx_fp
[1], GFP_ATOMIC
);
1608 if (status
& ISR_RBRQ1_W
) {
1609 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (1)!!!!\n");
1610 process_incoming (dev
, &dev
->rx_rq
[1]);
1611 top_off_fp (dev
, &dev
->rx_fp
[2], GFP_ATOMIC
);
1612 top_off_fp (dev
, &dev
->rx_fp
[3], GFP_ATOMIC
);
1615 if (status
& ISR_RBRQ2_W
) {
1616 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (2)!!!!\n");
1617 process_incoming (dev
, &dev
->rx_rq
[2]);
1618 top_off_fp (dev
, &dev
->rx_fp
[4], GFP_ATOMIC
);
1619 top_off_fp (dev
, &dev
->rx_fp
[5], GFP_ATOMIC
);
1622 if (status
& ISR_RBRQ3_W
) {
1623 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (3)!!!!\n");
1624 process_incoming (dev
, &dev
->rx_rq
[3]);
1625 top_off_fp (dev
, &dev
->rx_fp
[6], GFP_ATOMIC
);
1626 top_off_fp (dev
, &dev
->rx_fp
[7], GFP_ATOMIC
);
1629 if (status
& ISR_CSQ_W
) {
1630 fs_dprintk (FS_DEBUG_IRQ
, "Command executed ok!\n");
1631 process_return_queue (dev
, &dev
->st_q
);
1634 if (status
& ISR_TBRQ_W
) {
1635 fs_dprintk (FS_DEBUG_IRQ
, "Data tramsitted!\n");
1636 process_txdone_queue (dev
, &dev
->tx_relq
);
1645 static void fs_poll (unsigned long data
)
1647 struct fs_dev
*dev
= (struct fs_dev
*) data
;
1649 fs_irq (0, dev
, NULL
);
1650 dev
->timer
.expires
= jiffies
+ FS_POLL_FREQ
;
1651 add_timer (&dev
->timer
);
1655 static int __devinit
fs_init (struct fs_dev
*dev
)
1657 struct pci_dev
*pci_dev
;
1662 pci_dev
= dev
->pci_dev
;
1664 printk (KERN_INFO
"found a FireStream %d card, base %08lx, irq%d.\n",
1665 IS_FS50(dev
)?50:155,
1666 pci_resource_start(pci_dev
, 0), dev
->pci_dev
->irq
);
1668 if (fs_debug
& FS_DEBUG_INIT
)
1669 my_hd ((unsigned char *) dev
, sizeof (*dev
));
1671 undocumented_pci_fix (pci_dev
);
1673 dev
->hw_base
= pci_resource_start(pci_dev
, 0);
1675 dev
->base
= ioremap(dev
->hw_base
, 0x1000);
1679 write_fs (dev
, SARMODE0
, 0
1680 | (0 * SARMODE0_SHADEN
) /* We don't use shadow registers. */
1681 | (1 * SARMODE0_INTMODE_READCLEAR
)
1682 | (1 * SARMODE0_CWRE
)
1683 | IS_FS50(dev
)?SARMODE0_PRPWT_FS50_5
:
1684 SARMODE0_PRPWT_FS155_3
1685 | (1 * SARMODE0_CALSUP_1
)
1688 | SARMODE0_ABRVCS_32
1689 | SARMODE0_TXVCS_32
):
1692 | SARMODE0_ABRVCS_1k
1693 | SARMODE0_TXVCS_1k
));
1695 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1699 isr
= read_fs (dev
, ISR
);
1701 /* This bit is documented as "RESERVED" */
1702 if (isr
& ISR_INIT_ERR
) {
1703 printk (KERN_ERR
"Error initializing the FS... \n");
1706 if (isr
& ISR_INIT
) {
1707 fs_dprintk (FS_DEBUG_INIT
, "Ha! Initialized OK!\n");
1711 /* Try again after 10ms. */
1716 printk (KERN_ERR
"timeout initializing the FS... \n");
1720 /* XXX fix for fs155 */
1721 dev
->channel_mask
= 0x1f;
1725 write_fs (dev
, SARMODE1
, 0
1726 | (fs_keystream
* SARMODE1_DEFHEC
) /* XXX PHY */
1727 | ((loopback
== 1) * SARMODE1_TSTLP
) /* XXX Loopback mode enable... */
1728 | (1 * SARMODE1_DCRM
)
1729 | (1 * SARMODE1_DCOAM
)
1730 | (0 * SARMODE1_OAMCRC
)
1731 | (0 * SARMODE1_DUMPE
)
1732 | (0 * SARMODE1_GPLEN
)
1733 | (0 * SARMODE1_GNAM
)
1734 | (0 * SARMODE1_GVAS
)
1735 | (0 * SARMODE1_GPAS
)
1736 | (1 * SARMODE1_GPRI
)
1737 | (0 * SARMODE1_PMS
)
1738 | (0 * SARMODE1_GFCR
)
1739 | (1 * SARMODE1_HECM2
)
1740 | (1 * SARMODE1_HECM1
)
1741 | (1 * SARMODE1_HECM0
)
1742 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1743 | (0 * 0xff) /* XXX FS155 */);
1746 /* Cal prescale etc */
1749 write_fs (dev
, TMCONF
, 0x0000000f);
1750 write_fs (dev
, CALPRESCALE
, 0x01010101 * num
);
1751 write_fs (dev
, 0x80, 0x000F00E4);
1754 write_fs (dev
, CELLOSCONF
, 0
1755 | ( 0 * CELLOSCONF_CEN
)
1757 | (0x80 * CELLOSCONF_COBS
)
1758 | (num
* CELLOSCONF_COPK
) /* Changed from 0xff to 0x5a */
1759 | (num
* CELLOSCONF_COST
));/* after a hint from Hang.
1760 * performance jumped 50->70... */
1762 /* Magic value by Hang */
1763 write_fs (dev
, CELLOSCONF_COST
, 0x0B809191);
1765 if (IS_FS50 (dev
)) {
1766 write_fs (dev
, RAS0
, RAS0_DCD_XHLT
);
1767 dev
->atm_dev
->ci_range
.vpi_bits
= 12;
1768 dev
->atm_dev
->ci_range
.vci_bits
= 16;
1769 dev
->nchannels
= FS50_NR_CHANNELS
;
1771 write_fs (dev
, RAS0
, RAS0_DCD_XHLT
1772 | (((1 << FS155_VPI_BITS
) - 1) * RAS0_VPSEL
)
1773 | (((1 << FS155_VCI_BITS
) - 1) * RAS0_VCSEL
));
1774 /* We can chose the split arbitarily. We might be able to
1775 support more. Whatever. This should do for now. */
1776 dev
->atm_dev
->ci_range
.vpi_bits
= FS155_VPI_BITS
;
1777 dev
->atm_dev
->ci_range
.vci_bits
= FS155_VCI_BITS
;
1779 /* Address bits we can't use should be compared to 0. */
1780 write_fs (dev
, RAC
, 0);
1782 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1783 * too. I can't find ASF1 anywhere. Anyway, we AND with just the
1784 * other bits, then compare with 0, which is exactly what we
1786 write_fs (dev
, RAM
, (1 << (28 - FS155_VPI_BITS
- FS155_VCI_BITS
)) - 1);
1787 dev
->nchannels
= FS155_NR_CHANNELS
;
1789 dev
->atm_vccs
= kmalloc (dev
->nchannels
* sizeof (struct atm_vcc
*),
1791 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc atmvccs: %p(%Zd)\n",
1792 dev
->atm_vccs
, dev
->nchannels
* sizeof (struct atm_vcc
*));
1794 if (!dev
->atm_vccs
) {
1795 printk (KERN_WARNING
"Couldn't allocate memory for VCC buffers. Woops!\n");
1796 /* XXX Clean up..... */
1799 memset (dev
->atm_vccs
, 0, dev
->nchannels
* sizeof (struct atm_vcc
*));
1801 dev
->tx_inuse
= kmalloc (dev
->nchannels
/ 8 /* bits/byte */ , GFP_KERNEL
);
1802 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc tx_inuse: %p(%d)\n",
1803 dev
->atm_vccs
, dev
->nchannels
/ 8);
1805 if (!dev
->tx_inuse
) {
1806 printk (KERN_WARNING
"Couldn't allocate memory for tx_inuse bits!\n");
1807 /* XXX Clean up..... */
1810 memset (dev
->tx_inuse
, 0, dev
->nchannels
/ 8);
1812 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1813 /* -- RAS2 : FS50 only: Default is OK. */
1815 /* DMAMODE, default should be OK. -- REW */
1816 write_fs (dev
, DMAMR
, DMAMR_TX_MODE_FULL
);
1818 init_q (dev
, &dev
->hp_txq
, TX_PQ(TXQ_HP
), TXQ_NENTRIES
, 0);
1819 init_q (dev
, &dev
->lp_txq
, TX_PQ(TXQ_LP
), TXQ_NENTRIES
, 0);
1820 init_q (dev
, &dev
->tx_relq
, TXB_RQ
, TXQ_NENTRIES
, 1);
1821 init_q (dev
, &dev
->st_q
, ST_Q
, TXQ_NENTRIES
, 1);
1823 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1824 init_fp (dev
, &dev
->rx_fp
[i
], RXB_FP(i
),
1825 rx_buf_sizes
[i
], rx_pool_sizes
[i
]);
1826 top_off_fp (dev
, &dev
->rx_fp
[i
], GFP_KERNEL
);
1830 for (i
=0;i
< FS_NR_RX_QUEUES
;i
++)
1831 init_q (dev
, &dev
->rx_rq
[i
], RXB_RQ(i
), RXRQ_NENTRIES
, 1);
1833 dev
->irq
= pci_dev
->irq
;
1834 if (request_irq (dev
->irq
, fs_irq
, SA_SHIRQ
, "firestream", dev
)) {
1835 printk (KERN_WARNING
"couldn't get irq %d for firestream.\n", pci_dev
->irq
);
1836 /* XXX undo all previous stuff... */
1839 fs_dprintk (FS_DEBUG_INIT
, "Grabbed irq %d for dev at %p.\n", dev
->irq
, dev
);
1841 /* We want to be notified of most things. Just the statistics count
1842 overflows are not interesting */
1843 write_fs (dev
, IMR
, 0
1851 write_fs (dev
, SARMODE0
, 0
1852 | (0 * SARMODE0_SHADEN
) /* We don't use shadow registers. */
1853 | (1 * SARMODE0_GINT
)
1854 | (1 * SARMODE0_INTMODE_READCLEAR
)
1855 | (0 * SARMODE0_CWRE
)
1856 | (IS_FS50(dev
)?SARMODE0_PRPWT_FS50_5
:
1857 SARMODE0_PRPWT_FS155_3
)
1858 | (1 * SARMODE0_CALSUP_1
)
1861 | SARMODE0_ABRVCS_32
1862 | SARMODE0_TXVCS_32
):
1865 | SARMODE0_ABRVCS_1k
1866 | SARMODE0_TXVCS_1k
))
1867 | (1 * SARMODE0_RUN
));
1869 init_phy (dev
, PHY_NTC_INIT
);
1871 if (loopback
== 2) {
1872 write_phy (dev
, 0x39, 0x000e);
1876 init_timer (&dev
->timer
);
1877 dev
->timer
.data
= (unsigned long) dev
;
1878 dev
->timer
.function
= fs_poll
;
1879 dev
->timer
.expires
= jiffies
+ FS_POLL_FREQ
;
1880 add_timer (&dev
->timer
);
1883 dev
->atm_dev
->dev_data
= dev
;
1889 static int __devinit
firestream_init_one (struct pci_dev
*pci_dev
,
1890 const struct pci_device_id
*ent
)
1892 struct atm_dev
*atm_dev
;
1893 struct fs_dev
*fs_dev
;
1895 if (pci_enable_device(pci_dev
))
1898 fs_dev
= kmalloc (sizeof (struct fs_dev
), GFP_KERNEL
);
1899 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc fs-dev: %p(%Zd)\n",
1900 fs_dev
, sizeof (struct fs_dev
));
1904 memset (fs_dev
, 0, sizeof (struct fs_dev
));
1906 atm_dev
= atm_dev_register("fs", &ops
, -1, NULL
);
1908 goto err_out_free_fs_dev
;
1910 fs_dev
->pci_dev
= pci_dev
;
1911 fs_dev
->atm_dev
= atm_dev
;
1912 fs_dev
->flags
= ent
->driver_data
;
1914 if (fs_init(fs_dev
))
1915 goto err_out_free_atm_dev
;
1917 fs_dev
->next
= fs_boards
;
1921 err_out_free_atm_dev
:
1922 atm_dev_deregister(atm_dev
);
1923 err_out_free_fs_dev
:
1929 static void __devexit
firestream_remove_one (struct pci_dev
*pdev
)
1932 struct fs_dev
*dev
, *nxtdev
;
1934 struct FS_BPENTRY
*fp
, *nxt
;
1939 printk ("hptxq:\n");
1940 for (i
=0;i
<60;i
++) {
1941 printk ("%d: %08x %08x %08x %08x \n",
1942 i
, pq
[qp
].cmd
, pq
[qp
].p0
, pq
[qp
].p1
, pq
[qp
].p2
);
1944 if (qp
>= 60) qp
= 0;
1947 printk ("descriptors:\n");
1948 for (i
=0;i
<60;i
++) {
1949 printk ("%d: %p: %08x %08x %p %p\n",
1950 i
, da
[qd
], dq
[qd
].flags
, dq
[qd
].bsa
, dq
[qd
].skb
, dq
[qd
].dev
);
1952 if (qd
>= 60) qd
= 0;
1956 for (dev
= fs_boards
;dev
!= NULL
;dev
=nxtdev
) {
1957 fs_dprintk (FS_DEBUG_CLEANUP
, "Releasing resources for dev at %p.\n", dev
);
1959 /* XXX Hit all the tx channels too! */
1961 for (i
=0;i
< dev
->nchannels
;i
++) {
1962 if (dev
->atm_vccs
[i
]) {
1963 vcc
= FS_VCC (dev
->atm_vccs
[i
]);
1964 submit_command (dev
, &dev
->hp_txq
,
1965 QE_CMD_TX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1966 submit_command (dev
, &dev
->hp_txq
,
1967 QE_CMD_RX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1972 /* XXX Wait a while for the chip to release all buffers. */
1974 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1975 for (fp
=bus_to_virt (read_fs (dev
, FP_SA(dev
->rx_fp
[i
].offset
)));
1976 !(fp
->flags
& FP_FLAGS_EPI
);fp
= nxt
) {
1977 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", fp
->skb
);
1978 dev_kfree_skb_any (fp
->skb
);
1979 nxt
= bus_to_virt (fp
->next
);
1980 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", fp
);
1983 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", fp
->skb
);
1984 dev_kfree_skb_any (fp
->skb
);
1985 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", fp
);
1989 /* Hang the chip in "reset", prevent it clobbering memory that is
1993 fs_dprintk (FS_DEBUG_CLEANUP
, "Freeing irq%d.\n", dev
->irq
);
1994 free_irq (dev
->irq
, dev
);
1995 del_timer (&dev
->timer
);
1997 atm_dev_deregister(dev
->atm_dev
);
1998 free_queue (dev
, &dev
->hp_txq
);
1999 free_queue (dev
, &dev
->lp_txq
);
2000 free_queue (dev
, &dev
->tx_relq
);
2001 free_queue (dev
, &dev
->st_q
);
2003 fs_dprintk (FS_DEBUG_ALLOC
, "Free atmvccs: %p\n", dev
->atm_vccs
);
2004 kfree (dev
->atm_vccs
);
2006 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++)
2007 free_freepool (dev
, &dev
->rx_fp
[i
]);
2009 for (i
=0;i
< FS_NR_RX_QUEUES
;i
++)
2010 free_queue (dev
, &dev
->rx_rq
[i
]);
2012 fs_dprintk (FS_DEBUG_ALLOC
, "Free fs-dev: %p\n", dev
);
2020 static struct pci_device_id firestream_pci_tbl
[] = {
2021 { PCI_VENDOR_ID_FUJITSU_ME
, PCI_DEVICE_ID_FUJITSU_FS50
,
2022 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, FS_IS50
},
2023 { PCI_VENDOR_ID_FUJITSU_ME
, PCI_DEVICE_ID_FUJITSU_FS155
,
2024 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, FS_IS155
},
2028 MODULE_DEVICE_TABLE(pci
, firestream_pci_tbl
);
2030 static struct pci_driver firestream_driver
= {
2031 .name
= "firestream",
2032 .id_table
= firestream_pci_tbl
,
2033 .probe
= firestream_init_one
,
2034 .remove
= __devexit_p(firestream_remove_one
),
2037 static int __init
firestream_init_module (void)
2042 error
= pci_register_driver(&firestream_driver
);
2047 static void __exit
firestream_cleanup_module(void)
2049 pci_unregister_driver(&firestream_driver
);
2052 module_init(firestream_init_module
);
2053 module_exit(firestream_cleanup_module
);
2055 MODULE_LICENSE("GPL");