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davinci: add support for DM6467T EVM
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-davinci / board-dm646x-evm.c
blob542bfdbbea0f287dee9291edaaae9d2c5fc259b8
1 /*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
27
28 #include <media/tvp514x.h>
29
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h>
33 #include <linux/clk.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37
38 #include <mach/dm646x.h>
39 #include <mach/common.h>
40 #include <mach/serial.h>
41 #include <mach/i2c.h>
42 #include <mach/nand.h>
43
44 #include "clock.h"
45
46 #define NAND_BLOCK_SIZE SZ_128K
47
48 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
49 * and U-Boot environment this avoids dependency on any particular combination
50 * of UBL, U-Boot or flashing tools etc.
51 */
52 static struct mtd_partition davinci_nand_partitions[] = {
53 {
54 /* UBL, U-Boot with environment */
55 .name = "bootloader",
56 .offset = MTDPART_OFS_APPEND,
57 .size = 16 * NAND_BLOCK_SIZE,
58 .mask_flags = MTD_WRITEABLE, /* force read-only */
59 }, {
60 .name = "kernel",
61 .offset = MTDPART_OFS_APPEND,
62 .size = SZ_4M,
63 .mask_flags = 0,
64 }, {
65 .name = "filesystem",
66 .offset = MTDPART_OFS_APPEND,
67 .size = MTDPART_SIZ_FULL,
68 .mask_flags = 0,
69 }
70 };
71
72 static struct davinci_nand_pdata davinci_nand_data = {
73 .mask_cle = 0x80000,
74 .mask_ale = 0x40000,
75 .parts = davinci_nand_partitions,
76 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
77 .ecc_mode = NAND_ECC_HW,
78 .options = 0,
79 };
80
81 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
82 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
83
84 static struct resource davinci_nand_resources[] = {
85 {
86 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
87 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
88 .flags = IORESOURCE_MEM,
89 }, {
90 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
91 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
92 .flags = IORESOURCE_MEM,
93 },
94 };
95
96 static struct platform_device davinci_nand_device = {
97 .name = "davinci_nand",
98 .id = 0,
99
100 .num_resources = ARRAY_SIZE(davinci_nand_resources),
101 .resource = davinci_nand_resources,
102
103 .dev = {
104 .platform_data = &davinci_nand_data,
105 },
106 };
107
108 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
109 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
110 #define HAS_ATA 1
111 #else
112 #define HAS_ATA 0
113 #endif
114
115 /* CPLD Register 0 bits to control ATA */
116 #define DM646X_EVM_ATA_RST BIT(0)
117 #define DM646X_EVM_ATA_PWD BIT(1)
118
119 /* CPLD Register 0 Client: used for I/O Control */
120 static int cpld_reg0_probe(struct i2c_client *client,
121 const struct i2c_device_id *id)
122 {
123 if (HAS_ATA) {
124 u8 data;
125 struct i2c_msg msg[2] = {
126 {
127 .addr = client->addr,
128 .flags = I2C_M_RD,
129 .len = 1,
130 .buf = &data,
131 },
132 {
133 .addr = client->addr,
134 .flags = 0,
135 .len = 1,
136 .buf = &data,
137 },
138 };
139
140 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
141 i2c_transfer(client->adapter, msg, 1);
142 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
143 i2c_transfer(client->adapter, msg + 1, 1);
144 }
145
146 return 0;
147 }
148
149 static const struct i2c_device_id cpld_reg_ids[] = {
150 { "cpld_reg0", 0, },
151 { },
152 };
153
154 static struct i2c_driver dm6467evm_cpld_driver = {
155 .driver.name = "cpld_reg0",
156 .id_table = cpld_reg_ids,
157 .probe = cpld_reg0_probe,
158 };
159
160 /* LEDS */
161
162 static struct gpio_led evm_leds[] = {
163 { .name = "DS1", .active_low = 1, },
164 { .name = "DS2", .active_low = 1, },
165 { .name = "DS3", .active_low = 1, },
166 { .name = "DS4", .active_low = 1, },
167 };
168
169 static const struct gpio_led_platform_data evm_led_data = {
170 .num_leds = ARRAY_SIZE(evm_leds),
171 .leds = evm_leds,
172 };
173
174 static struct platform_device *evm_led_dev;
175
176 static int evm_led_setup(struct i2c_client *client, int gpio,
177 unsigned int ngpio, void *c)
178 {
179 struct gpio_led *leds = evm_leds;
180 int status;
181
182 while (ngpio--) {
183 leds->gpio = gpio++;
184 leds++;
185 };
186
187 evm_led_dev = platform_device_alloc("leds-gpio", 0);
188 platform_device_add_data(evm_led_dev, &evm_led_data,
189 sizeof(evm_led_data));
190
191 evm_led_dev->dev.parent = &client->dev;
192 status = platform_device_add(evm_led_dev);
193 if (status < 0) {
194 platform_device_put(evm_led_dev);
195 evm_led_dev = NULL;
196 }
197 return status;
198 }
199
200 static int evm_led_teardown(struct i2c_client *client, int gpio,
201 unsigned ngpio, void *c)
202 {
203 if (evm_led_dev) {
204 platform_device_unregister(evm_led_dev);
205 evm_led_dev = NULL;
206 }
207 return 0;
208 }
209
210 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
211
212 static int evm_sw_setup(struct i2c_client *client, int gpio,
213 unsigned ngpio, void *c)
214 {
215 int status;
216 int i;
217 char label[10];
218
219 for (i = 0; i < 4; ++i) {
220 snprintf(label, 10, "user_sw%d", i);
221 status = gpio_request(gpio, label);
222 if (status)
223 goto out_free;
224 evm_sw_gpio[i] = gpio++;
225
226 status = gpio_direction_input(evm_sw_gpio[i]);
227 if (status) {
228 gpio_free(evm_sw_gpio[i]);
229 evm_sw_gpio[i] = -EINVAL;
230 goto out_free;
231 }
232
233 status = gpio_export(evm_sw_gpio[i], 0);
234 if (status) {
235 gpio_free(evm_sw_gpio[i]);
236 evm_sw_gpio[i] = -EINVAL;
237 goto out_free;
238 }
239 }
240 return status;
241 out_free:
242 for (i = 0; i < 4; ++i) {
243 if (evm_sw_gpio[i] != -EINVAL) {
244 gpio_free(evm_sw_gpio[i]);
245 evm_sw_gpio[i] = -EINVAL;
246 }
247 }
248 return status;
249 }
250
251 static int evm_sw_teardown(struct i2c_client *client, int gpio,
252 unsigned ngpio, void *c)
253 {
254 int i;
255
256 for (i = 0; i < 4; ++i) {
257 if (evm_sw_gpio[i] != -EINVAL) {
258 gpio_unexport(evm_sw_gpio[i]);
259 gpio_free(evm_sw_gpio[i]);
260 evm_sw_gpio[i] = -EINVAL;
261 }
262 }
263 return 0;
264 }
265
266 static int evm_pcf_setup(struct i2c_client *client, int gpio,
267 unsigned int ngpio, void *c)
268 {
269 int status;
270
271 if (ngpio < 8)
272 return -EINVAL;
273
274 status = evm_sw_setup(client, gpio, 4, c);
275 if (status)
276 return status;
277
278 return evm_led_setup(client, gpio+4, 4, c);
279 }
280
281 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
282 unsigned int ngpio, void *c)
283 {
284 BUG_ON(ngpio < 8);
285
286 evm_sw_teardown(client, gpio, 4, c);
287 evm_led_teardown(client, gpio+4, 4, c);
288
289 return 0;
290 }
291
292 static struct pcf857x_platform_data pcf_data = {
293 .gpio_base = DAVINCI_N_GPIO+1,
294 .setup = evm_pcf_setup,
295 .teardown = evm_pcf_teardown,
296 };
297
298 /* Most of this EEPROM is unused, but U-Boot uses some data:
299 * - 0x7f00, 6 bytes Ethernet Address
300 * - ... newer boards may have more
301 */
302
303 static struct at24_platform_data eeprom_info = {
304 .byte_len = (256*1024) / 8,
305 .page_size = 64,
306 .flags = AT24_FLAG_ADDR16,
307 .setup = davinci_get_mac_addr,
308 .context = (void *)0x7f00,
309 };
310
311 static u8 dm646x_iis_serializer_direction[] = {
312 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
313 };
314
315 static u8 dm646x_dit_serializer_direction[] = {
316 TX_MODE,
317 };
318
319 static struct snd_platform_data dm646x_evm_snd_data[] = {
320 {
321 .tx_dma_offset = 0x400,
322 .rx_dma_offset = 0x400,
323 .op_mode = DAVINCI_MCASP_IIS_MODE,
324 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
325 .tdm_slots = 2,
326 .serial_dir = dm646x_iis_serializer_direction,
327 .eventq_no = EVENTQ_0,
328 },
329 {
330 .tx_dma_offset = 0x400,
331 .rx_dma_offset = 0,
332 .op_mode = DAVINCI_MCASP_DIT_MODE,
333 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
334 .tdm_slots = 32,
335 .serial_dir = dm646x_dit_serializer_direction,
336 .eventq_no = EVENTQ_0,
337 },
338 };
339
340 static struct i2c_client *cpld_client;
341
342 static int cpld_video_probe(struct i2c_client *client,
343 const struct i2c_device_id *id)
344 {
345 cpld_client = client;
346 return 0;
347 }
348
349 static int __devexit cpld_video_remove(struct i2c_client *client)
350 {
351 cpld_client = NULL;
352 return 0;
353 }
354
355 static const struct i2c_device_id cpld_video_id[] = {
356 { "cpld_video", 0 },
357 { }
358 };
359
360 static struct i2c_driver cpld_video_driver = {
361 .driver = {
362 .name = "cpld_video",
363 },
364 .probe = cpld_video_probe,
365 .remove = cpld_video_remove,
366 .id_table = cpld_video_id,
367 };
368
369 static void evm_init_cpld(void)
370 {
371 i2c_add_driver(&cpld_video_driver);
372 }
373
374 static struct i2c_board_info __initdata i2c_info[] = {
375 {
376 I2C_BOARD_INFO("24c256", 0x50),
377 .platform_data = &eeprom_info,
378 },
379 {
380 I2C_BOARD_INFO("pcf8574a", 0x38),
381 .platform_data = &pcf_data,
382 },
383 {
384 I2C_BOARD_INFO("cpld_reg0", 0x3a),
385 },
386 {
387 I2C_BOARD_INFO("tlv320aic33", 0x18),
388 },
389 {
390 I2C_BOARD_INFO("cpld_video", 0x3b),
391 },
392 };
393
394 static struct davinci_i2c_platform_data i2c_pdata = {
395 .bus_freq = 100 /* kHz */,
396 .bus_delay = 0 /* usec */,
397 };
398
399 #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
400 #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
401 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
402 #define VCH2CLK_SYSCLK8 (BIT(9))
403 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
404 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
405 #define VCH3CLK_SYSCLK8 (BIT(13))
406 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
407
408 #define VIDCH2CLK (BIT(10))
409 #define VIDCH3CLK (BIT(11))
410 #define VIDCH1CLK (BIT(4))
411 #define TVP7002_INPUT (BIT(4))
412 #define TVP5147_INPUT (~BIT(4))
413 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
414 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
415 #define TVP5147_CH0 "tvp514x-0"
416 #define TVP5147_CH1 "tvp514x-1"
417
418 static void __iomem *vpif_vidclkctl_reg;
419 static void __iomem *vpif_vsclkdis_reg;
420 /* spin lock for updating above registers */
421 static spinlock_t vpif_reg_lock;
422
423 static int set_vpif_clock(int mux_mode, int hd)
424 {
425 unsigned long flags;
426 unsigned int value;
427 int val = 0;
428 int err = 0;
429
430 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
431 return -ENXIO;
432
433 /* disable the clock */
434 spin_lock_irqsave(&vpif_reg_lock, flags);
435 value = __raw_readl(vpif_vsclkdis_reg);
436 value |= (VIDCH3CLK | VIDCH2CLK);
437 __raw_writel(value, vpif_vsclkdis_reg);
438 spin_unlock_irqrestore(&vpif_reg_lock, flags);
439
440 val = i2c_smbus_read_byte(cpld_client);
441 if (val < 0)
442 return val;
443
444 if (mux_mode == 1)
445 val &= ~0x40;
446 else
447 val |= 0x40;
448
449 err = i2c_smbus_write_byte(cpld_client, val);
450 if (err)
451 return err;
452
453 value = __raw_readl(vpif_vidclkctl_reg);
454 value &= ~(VCH2CLK_MASK);
455 value &= ~(VCH3CLK_MASK);
456
457 if (hd >= 1)
458 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
459 else
460 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
461
462 __raw_writel(value, vpif_vidclkctl_reg);
463
464 spin_lock_irqsave(&vpif_reg_lock, flags);
465 value = __raw_readl(vpif_vsclkdis_reg);
466 /* enable the clock */
467 value &= ~(VIDCH3CLK | VIDCH2CLK);
468 __raw_writel(value, vpif_vsclkdis_reg);
469 spin_unlock_irqrestore(&vpif_reg_lock, flags);
470
471 return 0;
472 }
473
474 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
475 {
476 .name = "adv7343",
477 .board_info = {
478 I2C_BOARD_INFO("adv7343", 0x2a),
479 },
480 },
481 {
482 .name = "ths7303",
483 .board_info = {
484 I2C_BOARD_INFO("ths7303", 0x2c),
485 },
486 },
487 };
488
489 static const char *output[] = {
490 "Composite",
491 "Component",
492 "S-Video",
493 };
494
495 static struct vpif_display_config dm646x_vpif_display_config = {
496 .set_clock = set_vpif_clock,
497 .subdevinfo = dm646x_vpif_subdev,
498 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
499 .output = output,
500 .output_count = ARRAY_SIZE(output),
501 .card_name = "DM646x EVM",
502 };
503
504 /**
505 * setup_vpif_input_path()
506 * @channel: channel id (0 - CH0, 1 - CH1)
507 * @sub_dev_name: ptr sub device name
508 *
509 * This will set vpif input to capture data from tvp514x or
510 * tvp7002.
511 */
512 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
513 {
514 int err = 0;
515 int val;
516
517 /* for channel 1, we don't do anything */
518 if (channel != 0)
519 return 0;
520
521 if (!cpld_client)
522 return -ENXIO;
523
524 val = i2c_smbus_read_byte(cpld_client);
525 if (val < 0)
526 return val;
527
528 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
529 !strcmp(sub_dev_name, TVP5147_CH1))
530 val &= TVP5147_INPUT;
531 else
532 val |= TVP7002_INPUT;
533
534 err = i2c_smbus_write_byte(cpld_client, val);
535 if (err)
536 return err;
537 return 0;
538 }
539
540 /**
541 * setup_vpif_input_channel_mode()
542 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
543 *
544 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
545 */
546 static int setup_vpif_input_channel_mode(int mux_mode)
547 {
548 unsigned long flags;
549 int err = 0;
550 int val;
551 u32 value;
552
553 if (!vpif_vsclkdis_reg || !cpld_client)
554 return -ENXIO;
555
556 val = i2c_smbus_read_byte(cpld_client);
557 if (val < 0)
558 return val;
559
560 spin_lock_irqsave(&vpif_reg_lock, flags);
561 value = __raw_readl(vpif_vsclkdis_reg);
562 if (mux_mode) {
563 val &= VPIF_INPUT_TWO_CHANNEL;
564 value |= VIDCH1CLK;
565 } else {
566 val |= VPIF_INPUT_ONE_CHANNEL;
567 value &= ~VIDCH1CLK;
568 }
569 __raw_writel(value, vpif_vsclkdis_reg);
570 spin_unlock_irqrestore(&vpif_reg_lock, flags);
571
572 err = i2c_smbus_write_byte(cpld_client, val);
573 if (err)
574 return err;
575
576 return 0;
577 }
578
579 static struct tvp514x_platform_data tvp5146_pdata = {
580 .clk_polarity = 0,
581 .hs_polarity = 1,
582 .vs_polarity = 1
583 };
584
585 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
586
587 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
588 {
589 .name = TVP5147_CH0,
590 .board_info = {
591 I2C_BOARD_INFO("tvp5146", 0x5d),
592 .platform_data = &tvp5146_pdata,
593 },
594 .input = INPUT_CVBS_VI2B,
595 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
596 .can_route = 1,
597 .vpif_if = {
598 .if_type = VPIF_IF_BT656,
599 .hd_pol = 1,
600 .vd_pol = 1,
601 .fid_pol = 0,
602 },
603 },
604 {
605 .name = TVP5147_CH1,
606 .board_info = {
607 I2C_BOARD_INFO("tvp5146", 0x5c),
608 .platform_data = &tvp5146_pdata,
609 },
610 .input = INPUT_SVIDEO_VI2C_VI1C,
611 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
612 .can_route = 1,
613 .vpif_if = {
614 .if_type = VPIF_IF_BT656,
615 .hd_pol = 1,
616 .vd_pol = 1,
617 .fid_pol = 0,
618 },
619 },
620 };
621
622 static const struct vpif_input dm6467_ch0_inputs[] = {
623 {
624 .input = {
625 .index = 0,
626 .name = "Composite",
627 .type = V4L2_INPUT_TYPE_CAMERA,
628 .std = TVP514X_STD_ALL,
629 },
630 .subdev_name = TVP5147_CH0,
631 },
632 };
633
634 static const struct vpif_input dm6467_ch1_inputs[] = {
635 {
636 .input = {
637 .index = 0,
638 .name = "S-Video",
639 .type = V4L2_INPUT_TYPE_CAMERA,
640 .std = TVP514X_STD_ALL,
641 },
642 .subdev_name = TVP5147_CH1,
643 },
644 };
645
646 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
647 .setup_input_path = setup_vpif_input_path,
648 .setup_input_channel_mode = setup_vpif_input_channel_mode,
649 .subdev_info = vpif_capture_sdev_info,
650 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
651 .chan_config[0] = {
652 .inputs = dm6467_ch0_inputs,
653 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
654 },
655 .chan_config[1] = {
656 .inputs = dm6467_ch1_inputs,
657 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
658 },
659 };
660
661 static void __init evm_init_video(void)
662 {
663 vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
664 vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
665 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
666 pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
667 return;
668 }
669 spin_lock_init(&vpif_reg_lock);
670
671 dm646x_setup_vpif(&dm646x_vpif_display_config,
672 &dm646x_vpif_capture_cfg);
673 }
674
675 static void __init evm_init_i2c(void)
676 {
677 davinci_init_i2c(&i2c_pdata);
678 i2c_add_driver(&dm6467evm_cpld_driver);
679 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
680 evm_init_cpld();
681 evm_init_video();
682 }
683
684 static void __init davinci_map_io(void)
685 {
686 dm646x_init();
687 }
688
689 static struct davinci_uart_config uart_config __initdata = {
690 .enabled_uarts = (1 << 0),
691 };
692
693 #define DM646X_EVM_PHY_MASK (0x2)
694 #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
695
696 static __init void evm_init(void)
697 {
698 struct davinci_soc_info *soc_info = &davinci_soc_info;
699
700 evm_init_i2c();
701 davinci_serial_init(&uart_config);
702 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
703 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
704
705 platform_device_register(&davinci_nand_device);
706
707 if (HAS_ATA)
708 dm646x_init_ide();
709
710 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
711 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
712 }
713
714 static __init void davinci_dm646x_evm_irq_init(void)
715 {
716 davinci_irq_init();
717 }
718
719 #define DM646X_EVM_REF_FREQ 27000000
720 #define DM6467T_EVM_REF_FREQ 33000000
721
722 void __init dm646x_board_setup_refclk(struct clk *clk)
723 {
724 if (machine_is_davinci_dm6467tevm())
725 clk->rate = DM6467T_EVM_REF_FREQ;
726 else
727 clk->rate = DM646X_EVM_REF_FREQ;
728 }
729
730 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
731 .phys_io = IO_PHYS,
732 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
733 .boot_params = (0x80000100),
734 .map_io = davinci_map_io,
735 .init_irq = davinci_dm646x_evm_irq_init,
736 .timer = &davinci_timer,
737 .init_machine = evm_init,
738 MACHINE_END
739
740 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
741 .phys_io = IO_PHYS,
742 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
743 .boot_params = (0x80000100),
744 .map_io = davinci_map_io,
745 .init_irq = davinci_dm646x_evm_irq_init,
746 .timer = &davinci_timer,
747 .init_machine = evm_init,
748 MACHINE_END
749
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree