2 * SL82C105/Winbond 553 IDE driver
6 * Drive tuning added from Rebel.com's kernel sources
7 * -- Russell King (15/11/98) linux@arm.linux.org.uk
9 * Merge in Russell's HW workarounds, fix various problems
10 * with the timing registers setup.
11 * -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
13 * Copyright (C) 2006-2007,2009 MontaVista Software, Inc. <source@mvista.com>
14 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
17 #include <linux/types.h>
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/ide.h>
25 #define DRV_NAME "sl82c105"
28 * SL82C105 PCI config register 0x40 bits.
30 #define CTRL_IDE_IRQB (1 << 30)
31 #define CTRL_IDE_IRQA (1 << 28)
32 #define CTRL_LEGIRQ (1 << 11)
33 #define CTRL_P1F16 (1 << 5)
34 #define CTRL_P1EN (1 << 4)
35 #define CTRL_P0F16 (1 << 1)
36 #define CTRL_P0EN (1 << 0)
39 * Convert a PIO mode and cycle time to the required on/off times
40 * for the interface. This has protection against runaway timings.
42 static unsigned int get_pio_timings(ide_drive_t
*drive
, u8 pio
)
44 struct ide_timing
*t
= ide_timing_find_mode(XFER_PIO_0
+ pio
);
45 unsigned int cmd_on
, cmd_off
;
48 cmd_on
= (t
->active
+ 29) / 30;
49 cmd_off
= (ide_pio_cycle_time(drive
, pio
) - 30 * cmd_on
+ 29) / 30;
57 if (ide_pio_need_iordy(drive
, pio
))
60 return (cmd_on
- 1) << 8 | (cmd_off
- 1) | iordy
;
64 * Configure the chipset for PIO mode.
66 static void sl82c105_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
68 struct pci_dev
*dev
= to_pci_dev(drive
->hwif
->dev
);
69 unsigned long timings
= (unsigned long)ide_get_drivedata(drive
);
70 int reg
= 0x44 + drive
->dn
* 4;
73 drv_ctrl
= get_pio_timings(drive
, pio
);
76 * Store the PIO timings so that we can restore them
77 * in case DMA will be turned off...
79 timings
&= 0xffff0000;
81 ide_set_drivedata(drive
, (void *)timings
);
83 pci_write_config_word(dev
, reg
, drv_ctrl
);
84 pci_read_config_word (dev
, reg
, &drv_ctrl
);
86 printk(KERN_DEBUG
"%s: selected %s (%dns) (%04X)\n", drive
->name
,
87 ide_xfer_verbose(pio
+ XFER_PIO_0
),
88 ide_pio_cycle_time(drive
, pio
), drv_ctrl
);
92 * Configure the chipset for DMA mode.
94 static void sl82c105_set_dma_mode(ide_drive_t
*drive
, const u8 speed
)
96 static u16 mwdma_timings
[] = {0x0707, 0x0201, 0x0200};
97 unsigned long timings
= (unsigned long)ide_get_drivedata(drive
);
100 drv_ctrl
= mwdma_timings
[speed
- XFER_MW_DMA_0
];
103 * Store the DMA timings so that we can actually program
104 * them when DMA will be turned on...
106 timings
&= 0x0000ffff;
107 timings
|= (unsigned long)drv_ctrl
<< 16;
108 ide_set_drivedata(drive
, (void *)timings
);
111 static int sl82c105_test_irq(ide_hwif_t
*hwif
)
113 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
114 u32 val
, mask
= hwif
->channel
? CTRL_IDE_IRQB
: CTRL_IDE_IRQA
;
116 pci_read_config_dword(dev
, 0x40, &val
);
118 return (val
& mask
) ? 1 : 0;
122 * The SL82C105 holds off all IDE interrupts while in DMA mode until
123 * all DMA activity is completed. Sometimes this causes problems (eg,
124 * when the drive wants to report an error condition).
126 * 0x7e is a "chip testing" register. Bit 2 resets the DMA controller
127 * state machine. We need to kick this to work around various bugs.
129 static inline void sl82c105_reset_host(struct pci_dev
*dev
)
133 pci_read_config_word(dev
, 0x7e, &val
);
134 pci_write_config_word(dev
, 0x7e, val
| (1 << 2));
135 pci_write_config_word(dev
, 0x7e, val
& ~(1 << 2));
139 * If we get an IRQ timeout, it might be that the DMA state machine
140 * got confused. Fix from Todd Inglett. Details from Winbond.
142 * This function is called when the IDE timer expires, the drive
143 * indicates that it is READY, and we were waiting for DMA to complete.
145 static void sl82c105_dma_lost_irq(ide_drive_t
*drive
)
147 ide_hwif_t
*hwif
= drive
->hwif
;
148 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
149 u32 val
, mask
= hwif
->channel
? CTRL_IDE_IRQB
: CTRL_IDE_IRQA
;
152 printk(KERN_WARNING
"sl82c105: lost IRQ, resetting host\n");
155 * Check the raw interrupt from the drive.
157 pci_read_config_dword(dev
, 0x40, &val
);
159 printk(KERN_INFO
"sl82c105: drive was requesting IRQ, "
160 "but host lost it\n");
163 * Was DMA enabled? If so, disable it - we're resetting the
164 * host. The IDE layer will be handling the drive for us.
166 dma_cmd
= inb(hwif
->dma_base
+ ATA_DMA_CMD
);
168 outb(dma_cmd
& ~1, hwif
->dma_base
+ ATA_DMA_CMD
);
169 printk(KERN_INFO
"sl82c105: DMA was enabled\n");
172 sl82c105_reset_host(dev
);
176 * ATAPI devices can cause the SL82C105 DMA state machine to go gaga.
177 * Winbond recommend that the DMA state machine is reset prior to
178 * setting the bus master DMA enable bit.
180 * The generic IDE core will have disabled the BMEN bit before this
181 * function is called.
183 static void sl82c105_dma_start(ide_drive_t
*drive
)
185 ide_hwif_t
*hwif
= drive
->hwif
;
186 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
187 int reg
= 0x44 + drive
->dn
* 4;
189 pci_write_config_word(dev
, reg
,
190 (unsigned long)ide_get_drivedata(drive
) >> 16);
192 sl82c105_reset_host(dev
);
193 ide_dma_start(drive
);
196 static void sl82c105_dma_clear(ide_drive_t
*drive
)
198 struct pci_dev
*dev
= to_pci_dev(drive
->hwif
->dev
);
200 sl82c105_reset_host(dev
);
203 static int sl82c105_dma_end(ide_drive_t
*drive
)
205 struct pci_dev
*dev
= to_pci_dev(drive
->hwif
->dev
);
206 int reg
= 0x44 + drive
->dn
* 4;
207 int ret
= ide_dma_end(drive
);
209 pci_write_config_word(dev
, reg
,
210 (unsigned long)ide_get_drivedata(drive
));
216 * ATA reset will clear the 16 bits mode in the control
217 * register, we need to reprogram it
219 static void sl82c105_resetproc(ide_drive_t
*drive
)
221 struct pci_dev
*dev
= to_pci_dev(drive
->hwif
->dev
);
224 pci_read_config_dword(dev
, 0x40, &val
);
225 val
|= (CTRL_P1F16
| CTRL_P0F16
);
226 pci_write_config_dword(dev
, 0x40, val
);
230 * Return the revision of the Winbond bridge
231 * which this function is part of.
233 static u8
sl82c105_bridge_revision(struct pci_dev
*dev
)
235 struct pci_dev
*bridge
;
238 * The bridge should be part of the same device, but function 0.
240 bridge
= pci_get_bus_and_slot(dev
->bus
->number
,
241 PCI_DEVFN(PCI_SLOT(dev
->devfn
), 0));
246 * Make sure it is a Winbond 553 and is an ISA bridge.
248 if (bridge
->vendor
!= PCI_VENDOR_ID_WINBOND
||
249 bridge
->device
!= PCI_DEVICE_ID_WINBOND_83C553
||
250 bridge
->class >> 8 != PCI_CLASS_BRIDGE_ISA
) {
255 * We need to find function 0's revision, not function 1
259 return bridge
->revision
;
263 * Enable the PCI device
265 * --BenH: It's arch fixup code that should enable channels that
266 * have not been enabled by firmware. I decided we can still enable
267 * channel 0 here at least, but channel 1 has to be enabled by
268 * firmware or arch code. We still set both to 16 bits mode.
270 static int init_chipset_sl82c105(struct pci_dev
*dev
)
274 pci_read_config_dword(dev
, 0x40, &val
);
275 val
|= CTRL_P0EN
| CTRL_P0F16
| CTRL_P1F16
;
276 pci_write_config_dword(dev
, 0x40, val
);
281 static const struct ide_port_ops sl82c105_port_ops
= {
282 .set_pio_mode
= sl82c105_set_pio_mode
,
283 .set_dma_mode
= sl82c105_set_dma_mode
,
284 .resetproc
= sl82c105_resetproc
,
285 .test_irq
= sl82c105_test_irq
,
288 static const struct ide_dma_ops sl82c105_dma_ops
= {
289 .dma_host_set
= ide_dma_host_set
,
290 .dma_setup
= ide_dma_setup
,
291 .dma_start
= sl82c105_dma_start
,
292 .dma_end
= sl82c105_dma_end
,
293 .dma_test_irq
= ide_dma_test_irq
,
294 .dma_lost_irq
= sl82c105_dma_lost_irq
,
295 .dma_timer_expiry
= ide_dma_sff_timer_expiry
,
296 .dma_clear
= sl82c105_dma_clear
,
297 .dma_sff_read_status
= ide_dma_sff_read_status
,
300 static const struct ide_port_info sl82c105_chipset __devinitdata
= {
302 .init_chipset
= init_chipset_sl82c105
,
303 .enablebits
= {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
304 .port_ops
= &sl82c105_port_ops
,
305 .dma_ops
= &sl82c105_dma_ops
,
306 .host_flags
= IDE_HFLAG_IO_32BIT
|
307 IDE_HFLAG_UNMASK_IRQS
|
308 IDE_HFLAG_SERIALIZE_DMA
|
309 IDE_HFLAG_NO_AUTODMA
,
310 .pio_mask
= ATA_PIO5
,
311 .mwdma_mask
= ATA_MWDMA2
,
314 static int __devinit
sl82c105_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
316 struct ide_port_info d
= sl82c105_chipset
;
317 u8 rev
= sl82c105_bridge_revision(dev
);
321 * Never ever EVER under any circumstances enable
322 * DMA when the bridge is this old.
324 printk(KERN_INFO DRV_NAME
": Winbond W83C553 bridge "
325 "revision %d, BM-DMA disabled\n", rev
);
328 d
.host_flags
&= ~IDE_HFLAG_SERIALIZE_DMA
;
331 return ide_pci_init_one(dev
, &d
, NULL
);
334 static const struct pci_device_id sl82c105_pci_tbl
[] = {
335 { PCI_VDEVICE(WINBOND
, PCI_DEVICE_ID_WINBOND_82C105
), 0 },
338 MODULE_DEVICE_TABLE(pci
, sl82c105_pci_tbl
);
340 static struct pci_driver sl82c105_pci_driver
= {
341 .name
= "W82C105_IDE",
342 .id_table
= sl82c105_pci_tbl
,
343 .probe
= sl82c105_init_one
,
344 .remove
= ide_pci_remove
,
345 .suspend
= ide_pci_suspend
,
346 .resume
= ide_pci_resume
,
349 static int __init
sl82c105_ide_init(void)
351 return ide_pci_register_driver(&sl82c105_pci_driver
);
354 static void __exit
sl82c105_ide_exit(void)
356 pci_unregister_driver(&sl82c105_pci_driver
);
359 module_init(sl82c105_ide_init
);
360 module_exit(sl82c105_ide_exit
);
362 MODULE_DESCRIPTION("PCI driver module for W82C105 IDE");
363 MODULE_LICENSE("GPL");