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cciss: use new doorbell-bit-5 reset method
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / block / cciss.c
blobdf58c59d9031d24bb029eb96d50aae79f5347b66
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
31 #include <linux/fs.h>
32 #include <linux/bio.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/init.h>
38 #include <linux/jiffies.h>
39 #include <linux/hdreg.h>
40 #include <linux/spinlock.h>
41 #include <linux/compat.h>
42 #include <linux/mutex.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
45
46 #include <linux/dma-mapping.h>
47 #include <linux/blkdev.h>
48 #include <linux/genhd.h>
49 #include <linux/completion.h>
50 #include <scsi/scsi.h>
51 #include <scsi/sg.h>
52 #include <scsi/scsi_ioctl.h>
53 #include <linux/cdrom.h>
54 #include <linux/scatterlist.h>
55 #include <linux/kthread.h>
56
57 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
58 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
60
61 /* Embedded module documentation macros - see modules.h */
62 MODULE_AUTHOR("Hewlett-Packard Company");
63 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
64 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65 MODULE_VERSION("3.6.26");
66 MODULE_LICENSE("GPL");
67
68 static DEFINE_MUTEX(cciss_mutex);
69 static struct proc_dir_entry *proc_cciss;
70
71 #include "cciss_cmd.h"
72 #include "cciss.h"
73 #include <linux/cciss_ioctl.h>
74
75 /* define the PCI info for the cards we can control */
76 static const struct pci_device_id cciss_pci_device_id[] = {
77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
97 {0,}
98 };
99
100 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101
102 /* board_id = Subsystem Device ID & Vendor ID
103 * product = Marketing Name for the board
104 * access = Address of the struct of function pointers
105 */
106 static struct board_type products[] = {
107 {0x40700E11, "Smart Array 5300", &SA5_access},
108 {0x40800E11, "Smart Array 5i", &SA5B_access},
109 {0x40820E11, "Smart Array 532", &SA5B_access},
110 {0x40830E11, "Smart Array 5312", &SA5B_access},
111 {0x409A0E11, "Smart Array 641", &SA5_access},
112 {0x409B0E11, "Smart Array 642", &SA5_access},
113 {0x409C0E11, "Smart Array 6400", &SA5_access},
114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
115 {0x40910E11, "Smart Array 6i", &SA5_access},
116 {0x3225103C, "Smart Array P600", &SA5_access},
117 {0x3223103C, "Smart Array P800", &SA5_access},
118 {0x3234103C, "Smart Array P400", &SA5_access},
119 {0x3235103C, "Smart Array P400i", &SA5_access},
120 {0x3211103C, "Smart Array E200i", &SA5_access},
121 {0x3212103C, "Smart Array E200", &SA5_access},
122 {0x3213103C, "Smart Array E200i", &SA5_access},
123 {0x3214103C, "Smart Array E200i", &SA5_access},
124 {0x3215103C, "Smart Array E200i", &SA5_access},
125 {0x3237103C, "Smart Array E500", &SA5_access},
126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
128 {0x323D103C, "Smart Array P700m", &SA5_access},
129 };
130
131 /* How long to wait (in milliseconds) for board to go into simple mode */
132 #define MAX_CONFIG_WAIT 30000
133 #define MAX_IOCTL_CONFIG_WAIT 1000
134
135 /*define how many times we will try a command because of bus resets */
136 #define MAX_CMD_RETRIES 3
137
138 #define MAX_CTLR 32
139
140 /* Originally cciss driver only supports 8 major numbers */
141 #define MAX_CTLR_ORIG 8
142
143 static ctlr_info_t *hba[MAX_CTLR];
144
145 static struct task_struct *cciss_scan_thread;
146 static DEFINE_MUTEX(scan_mutex);
147 static LIST_HEAD(scan_q);
148
149 static void do_cciss_request(struct request_queue *q);
150 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
151 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
152 static int cciss_open(struct block_device *bdev, fmode_t mode);
153 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
154 static int cciss_release(struct gendisk *disk, fmode_t mode);
155 static int do_ioctl(struct block_device *bdev, fmode_t mode,
156 unsigned int cmd, unsigned long arg);
157 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
158 unsigned int cmd, unsigned long arg);
159 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
160
161 static int cciss_revalidate(struct gendisk *disk);
162 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
163 static int deregister_disk(ctlr_info_t *h, int drv_index,
164 int clear_all, int via_ioctl);
165
166 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
167 sector_t *total_size, unsigned int *block_size);
168 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
169 sector_t *total_size, unsigned int *block_size);
170 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
171 sector_t total_size,
172 unsigned int block_size, InquiryData_struct *inq_buff,
173 drive_info_struct *drv);
174 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
175 static void start_io(ctlr_info_t *h);
176 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
177 __u8 page_code, unsigned char scsi3addr[],
178 int cmd_type);
179 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
180 int attempt_retry);
181 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
182
183 static int add_to_scan_list(struct ctlr_info *h);
184 static int scan_thread(void *data);
185 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
186 static void cciss_hba_release(struct device *dev);
187 static void cciss_device_release(struct device *dev);
188 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
189 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
190 static inline u32 next_command(ctlr_info_t *h);
191 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
193 u64 *cfg_offset);
194 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
195 unsigned long *memory_bar);
196 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
197 static __devinit int write_driver_ver_to_cfgtable(
198 CfgTable_struct __iomem *cfgtable);
199
200 /* performant mode helper functions */
201 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
202 int *bucket_map);
203 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
204
205 #ifdef CONFIG_PROC_FS
206 static void cciss_procinit(ctlr_info_t *h);
207 #else
208 static void cciss_procinit(ctlr_info_t *h)
209 {
210 }
211 #endif /* CONFIG_PROC_FS */
212
213 #ifdef CONFIG_COMPAT
214 static int cciss_compat_ioctl(struct block_device *, fmode_t,
215 unsigned, unsigned long);
216 #endif
217
218 static const struct block_device_operations cciss_fops = {
219 .owner = THIS_MODULE,
220 .open = cciss_unlocked_open,
221 .release = cciss_release,
222 .ioctl = do_ioctl,
223 .getgeo = cciss_getgeo,
224 #ifdef CONFIG_COMPAT
225 .compat_ioctl = cciss_compat_ioctl,
226 #endif
227 .revalidate_disk = cciss_revalidate,
228 };
229
230 /* set_performant_mode: Modify the tag for cciss performant
231 * set bit 0 for pull model, bits 3-1 for block fetch
232 * register number
233 */
234 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
235 {
236 if (likely(h->transMethod & CFGTBL_Trans_Performant))
237 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
238 }
239
240 /*
241 * Enqueuing and dequeuing functions for cmdlists.
242 */
243 static inline void addQ(struct list_head *list, CommandList_struct *c)
244 {
245 list_add_tail(&c->list, list);
246 }
247
248 static inline void removeQ(CommandList_struct *c)
249 {
250 /*
251 * After kexec/dump some commands might still
252 * be in flight, which the firmware will try
253 * to complete. Resetting the firmware doesn't work
254 * with old fw revisions, so we have to mark
255 * them off as 'stale' to prevent the driver from
256 * falling over.
257 */
258 if (WARN_ON(list_empty(&c->list))) {
259 c->cmd_type = CMD_MSG_STALE;
260 return;
261 }
262
263 list_del_init(&c->list);
264 }
265
266 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
267 CommandList_struct *c)
268 {
269 unsigned long flags;
270 set_performant_mode(h, c);
271 spin_lock_irqsave(&h->lock, flags);
272 addQ(&h->reqQ, c);
273 h->Qdepth++;
274 if (h->Qdepth > h->maxQsinceinit)
275 h->maxQsinceinit = h->Qdepth;
276 start_io(h);
277 spin_unlock_irqrestore(&h->lock, flags);
278 }
279
280 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
281 int nr_cmds)
282 {
283 int i;
284
285 if (!cmd_sg_list)
286 return;
287 for (i = 0; i < nr_cmds; i++) {
288 kfree(cmd_sg_list[i]);
289 cmd_sg_list[i] = NULL;
290 }
291 kfree(cmd_sg_list);
292 }
293
294 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
295 ctlr_info_t *h, int chainsize, int nr_cmds)
296 {
297 int j;
298 SGDescriptor_struct **cmd_sg_list;
299
300 if (chainsize <= 0)
301 return NULL;
302
303 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
304 if (!cmd_sg_list)
305 return NULL;
306
307 /* Build up chain blocks for each command */
308 for (j = 0; j < nr_cmds; j++) {
309 /* Need a block of chainsized s/g elements. */
310 cmd_sg_list[j] = kmalloc((chainsize *
311 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
312 if (!cmd_sg_list[j]) {
313 dev_err(&h->pdev->dev, "Cannot get memory "
314 "for s/g chains.\n");
315 goto clean;
316 }
317 }
318 return cmd_sg_list;
319 clean:
320 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
321 return NULL;
322 }
323
324 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
325 {
326 SGDescriptor_struct *chain_sg;
327 u64bit temp64;
328
329 if (c->Header.SGTotal <= h->max_cmd_sgentries)
330 return;
331
332 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
333 temp64.val32.lower = chain_sg->Addr.lower;
334 temp64.val32.upper = chain_sg->Addr.upper;
335 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
336 }
337
338 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
339 SGDescriptor_struct *chain_block, int len)
340 {
341 SGDescriptor_struct *chain_sg;
342 u64bit temp64;
343
344 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
345 chain_sg->Ext = CCISS_SG_CHAIN;
346 chain_sg->Len = len;
347 temp64.val = pci_map_single(h->pdev, chain_block, len,
348 PCI_DMA_TODEVICE);
349 chain_sg->Addr.lower = temp64.val32.lower;
350 chain_sg->Addr.upper = temp64.val32.upper;
351 }
352
353 #include "cciss_scsi.c" /* For SCSI tape support */
354
355 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
356 "UNKNOWN"
357 };
358 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
359
360 #ifdef CONFIG_PROC_FS
361
362 /*
363 * Report information about this controller.
364 */
365 #define ENG_GIG 1000000000
366 #define ENG_GIG_FACTOR (ENG_GIG/512)
367 #define ENGAGE_SCSI "engage scsi"
368
369 static void cciss_seq_show_header(struct seq_file *seq)
370 {
371 ctlr_info_t *h = seq->private;
372
373 seq_printf(seq, "%s: HP %s Controller\n"
374 "Board ID: 0x%08lx\n"
375 "Firmware Version: %c%c%c%c\n"
376 "IRQ: %d\n"
377 "Logical drives: %d\n"
378 "Current Q depth: %d\n"
379 "Current # commands on controller: %d\n"
380 "Max Q depth since init: %d\n"
381 "Max # commands on controller since init: %d\n"
382 "Max SG entries since init: %d\n",
383 h->devname,
384 h->product_name,
385 (unsigned long)h->board_id,
386 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
387 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
388 h->num_luns,
389 h->Qdepth, h->commands_outstanding,
390 h->maxQsinceinit, h->max_outstanding, h->maxSG);
391
392 #ifdef CONFIG_CISS_SCSI_TAPE
393 cciss_seq_tape_report(seq, h);
394 #endif /* CONFIG_CISS_SCSI_TAPE */
395 }
396
397 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
398 {
399 ctlr_info_t *h = seq->private;
400 unsigned long flags;
401
402 /* prevent displaying bogus info during configuration
403 * or deconfiguration of a logical volume
404 */
405 spin_lock_irqsave(&h->lock, flags);
406 if (h->busy_configuring) {
407 spin_unlock_irqrestore(&h->lock, flags);
408 return ERR_PTR(-EBUSY);
409 }
410 h->busy_configuring = 1;
411 spin_unlock_irqrestore(&h->lock, flags);
412
413 if (*pos == 0)
414 cciss_seq_show_header(seq);
415
416 return pos;
417 }
418
419 static int cciss_seq_show(struct seq_file *seq, void *v)
420 {
421 sector_t vol_sz, vol_sz_frac;
422 ctlr_info_t *h = seq->private;
423 unsigned ctlr = h->ctlr;
424 loff_t *pos = v;
425 drive_info_struct *drv = h->drv[*pos];
426
427 if (*pos > h->highest_lun)
428 return 0;
429
430 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
431 return 0;
432
433 if (drv->heads == 0)
434 return 0;
435
436 vol_sz = drv->nr_blocks;
437 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
438 vol_sz_frac *= 100;
439 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
440
441 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
442 drv->raid_level = RAID_UNKNOWN;
443 seq_printf(seq, "cciss/c%dd%d:"
444 "\t%4u.%02uGB\tRAID %s\n",
445 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
446 raid_label[drv->raid_level]);
447 return 0;
448 }
449
450 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
451 {
452 ctlr_info_t *h = seq->private;
453
454 if (*pos > h->highest_lun)
455 return NULL;
456 *pos += 1;
457
458 return pos;
459 }
460
461 static void cciss_seq_stop(struct seq_file *seq, void *v)
462 {
463 ctlr_info_t *h = seq->private;
464
465 /* Only reset h->busy_configuring if we succeeded in setting
466 * it during cciss_seq_start. */
467 if (v == ERR_PTR(-EBUSY))
468 return;
469
470 h->busy_configuring = 0;
471 }
472
473 static const struct seq_operations cciss_seq_ops = {
474 .start = cciss_seq_start,
475 .show = cciss_seq_show,
476 .next = cciss_seq_next,
477 .stop = cciss_seq_stop,
478 };
479
480 static int cciss_seq_open(struct inode *inode, struct file *file)
481 {
482 int ret = seq_open(file, &cciss_seq_ops);
483 struct seq_file *seq = file->private_data;
484
485 if (!ret)
486 seq->private = PDE(inode)->data;
487
488 return ret;
489 }
490
491 static ssize_t
492 cciss_proc_write(struct file *file, const char __user *buf,
493 size_t length, loff_t *ppos)
494 {
495 int err;
496 char *buffer;
497
498 #ifndef CONFIG_CISS_SCSI_TAPE
499 return -EINVAL;
500 #endif
501
502 if (!buf || length > PAGE_SIZE - 1)
503 return -EINVAL;
504
505 buffer = (char *)__get_free_page(GFP_KERNEL);
506 if (!buffer)
507 return -ENOMEM;
508
509 err = -EFAULT;
510 if (copy_from_user(buffer, buf, length))
511 goto out;
512 buffer[length] = '\0';
513
514 #ifdef CONFIG_CISS_SCSI_TAPE
515 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
516 struct seq_file *seq = file->private_data;
517 ctlr_info_t *h = seq->private;
518
519 err = cciss_engage_scsi(h);
520 if (err == 0)
521 err = length;
522 } else
523 #endif /* CONFIG_CISS_SCSI_TAPE */
524 err = -EINVAL;
525 /* might be nice to have "disengage" too, but it's not
526 safely possible. (only 1 module use count, lock issues.) */
527
528 out:
529 free_page((unsigned long)buffer);
530 return err;
531 }
532
533 static const struct file_operations cciss_proc_fops = {
534 .owner = THIS_MODULE,
535 .open = cciss_seq_open,
536 .read = seq_read,
537 .llseek = seq_lseek,
538 .release = seq_release,
539 .write = cciss_proc_write,
540 };
541
542 static void __devinit cciss_procinit(ctlr_info_t *h)
543 {
544 struct proc_dir_entry *pde;
545
546 if (proc_cciss == NULL)
547 proc_cciss = proc_mkdir("driver/cciss", NULL);
548 if (!proc_cciss)
549 return;
550 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
551 S_IROTH, proc_cciss,
552 &cciss_proc_fops, h);
553 }
554 #endif /* CONFIG_PROC_FS */
555
556 #define MAX_PRODUCT_NAME_LEN 19
557
558 #define to_hba(n) container_of(n, struct ctlr_info, dev)
559 #define to_drv(n) container_of(n, drive_info_struct, dev)
560
561 /* List of controllers which cannot be reset on kexec with reset_devices */
562 static u32 unresettable_controller[] = {
563 0x324a103C, /* Smart Array P712m */
564 0x324b103C, /* SmartArray P711m */
565 0x3223103C, /* Smart Array P800 */
566 0x3234103C, /* Smart Array P400 */
567 0x3235103C, /* Smart Array P400i */
568 0x3211103C, /* Smart Array E200i */
569 0x3212103C, /* Smart Array E200 */
570 0x3213103C, /* Smart Array E200i */
571 0x3214103C, /* Smart Array E200i */
572 0x3215103C, /* Smart Array E200i */
573 0x3237103C, /* Smart Array E500 */
574 0x323D103C, /* Smart Array P700m */
575 0x409C0E11, /* Smart Array 6400 */
576 0x409D0E11, /* Smart Array 6400 EM */
577 };
578
579 static int ctlr_is_resettable(struct ctlr_info *h)
580 {
581 int i;
582
583 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
584 if (unresettable_controller[i] == h->board_id)
585 return 0;
586 return 1;
587 }
588
589 static ssize_t host_show_resettable(struct device *dev,
590 struct device_attribute *attr,
591 char *buf)
592 {
593 struct ctlr_info *h = to_hba(dev);
594
595 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
596 }
597 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
598
599 static ssize_t host_store_rescan(struct device *dev,
600 struct device_attribute *attr,
601 const char *buf, size_t count)
602 {
603 struct ctlr_info *h = to_hba(dev);
604
605 add_to_scan_list(h);
606 wake_up_process(cciss_scan_thread);
607 wait_for_completion_interruptible(&h->scan_wait);
608
609 return count;
610 }
611 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
612
613 static ssize_t dev_show_unique_id(struct device *dev,
614 struct device_attribute *attr,
615 char *buf)
616 {
617 drive_info_struct *drv = to_drv(dev);
618 struct ctlr_info *h = to_hba(drv->dev.parent);
619 __u8 sn[16];
620 unsigned long flags;
621 int ret = 0;
622
623 spin_lock_irqsave(&h->lock, flags);
624 if (h->busy_configuring)
625 ret = -EBUSY;
626 else
627 memcpy(sn, drv->serial_no, sizeof(sn));
628 spin_unlock_irqrestore(&h->lock, flags);
629
630 if (ret)
631 return ret;
632 else
633 return snprintf(buf, 16 * 2 + 2,
634 "%02X%02X%02X%02X%02X%02X%02X%02X"
635 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
636 sn[0], sn[1], sn[2], sn[3],
637 sn[4], sn[5], sn[6], sn[7],
638 sn[8], sn[9], sn[10], sn[11],
639 sn[12], sn[13], sn[14], sn[15]);
640 }
641 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
642
643 static ssize_t dev_show_vendor(struct device *dev,
644 struct device_attribute *attr,
645 char *buf)
646 {
647 drive_info_struct *drv = to_drv(dev);
648 struct ctlr_info *h = to_hba(drv->dev.parent);
649 char vendor[VENDOR_LEN + 1];
650 unsigned long flags;
651 int ret = 0;
652
653 spin_lock_irqsave(&h->lock, flags);
654 if (h->busy_configuring)
655 ret = -EBUSY;
656 else
657 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
658 spin_unlock_irqrestore(&h->lock, flags);
659
660 if (ret)
661 return ret;
662 else
663 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
664 }
665 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
666
667 static ssize_t dev_show_model(struct device *dev,
668 struct device_attribute *attr,
669 char *buf)
670 {
671 drive_info_struct *drv = to_drv(dev);
672 struct ctlr_info *h = to_hba(drv->dev.parent);
673 char model[MODEL_LEN + 1];
674 unsigned long flags;
675 int ret = 0;
676
677 spin_lock_irqsave(&h->lock, flags);
678 if (h->busy_configuring)
679 ret = -EBUSY;
680 else
681 memcpy(model, drv->model, MODEL_LEN + 1);
682 spin_unlock_irqrestore(&h->lock, flags);
683
684 if (ret)
685 return ret;
686 else
687 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
688 }
689 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
690
691 static ssize_t dev_show_rev(struct device *dev,
692 struct device_attribute *attr,
693 char *buf)
694 {
695 drive_info_struct *drv = to_drv(dev);
696 struct ctlr_info *h = to_hba(drv->dev.parent);
697 char rev[REV_LEN + 1];
698 unsigned long flags;
699 int ret = 0;
700
701 spin_lock_irqsave(&h->lock, flags);
702 if (h->busy_configuring)
703 ret = -EBUSY;
704 else
705 memcpy(rev, drv->rev, REV_LEN + 1);
706 spin_unlock_irqrestore(&h->lock, flags);
707
708 if (ret)
709 return ret;
710 else
711 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
712 }
713 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
714
715 static ssize_t cciss_show_lunid(struct device *dev,
716 struct device_attribute *attr, char *buf)
717 {
718 drive_info_struct *drv = to_drv(dev);
719 struct ctlr_info *h = to_hba(drv->dev.parent);
720 unsigned long flags;
721 unsigned char lunid[8];
722
723 spin_lock_irqsave(&h->lock, flags);
724 if (h->busy_configuring) {
725 spin_unlock_irqrestore(&h->lock, flags);
726 return -EBUSY;
727 }
728 if (!drv->heads) {
729 spin_unlock_irqrestore(&h->lock, flags);
730 return -ENOTTY;
731 }
732 memcpy(lunid, drv->LunID, sizeof(lunid));
733 spin_unlock_irqrestore(&h->lock, flags);
734 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
735 lunid[0], lunid[1], lunid[2], lunid[3],
736 lunid[4], lunid[5], lunid[6], lunid[7]);
737 }
738 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
739
740 static ssize_t cciss_show_raid_level(struct device *dev,
741 struct device_attribute *attr, char *buf)
742 {
743 drive_info_struct *drv = to_drv(dev);
744 struct ctlr_info *h = to_hba(drv->dev.parent);
745 int raid;
746 unsigned long flags;
747
748 spin_lock_irqsave(&h->lock, flags);
749 if (h->busy_configuring) {
750 spin_unlock_irqrestore(&h->lock, flags);
751 return -EBUSY;
752 }
753 raid = drv->raid_level;
754 spin_unlock_irqrestore(&h->lock, flags);
755 if (raid < 0 || raid > RAID_UNKNOWN)
756 raid = RAID_UNKNOWN;
757
758 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
759 raid_label[raid]);
760 }
761 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
762
763 static ssize_t cciss_show_usage_count(struct device *dev,
764 struct device_attribute *attr, char *buf)
765 {
766 drive_info_struct *drv = to_drv(dev);
767 struct ctlr_info *h = to_hba(drv->dev.parent);
768 unsigned long flags;
769 int count;
770
771 spin_lock_irqsave(&h->lock, flags);
772 if (h->busy_configuring) {
773 spin_unlock_irqrestore(&h->lock, flags);
774 return -EBUSY;
775 }
776 count = drv->usage_count;
777 spin_unlock_irqrestore(&h->lock, flags);
778 return snprintf(buf, 20, "%d\n", count);
779 }
780 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
781
782 static struct attribute *cciss_host_attrs[] = {
783 &dev_attr_rescan.attr,
784 &dev_attr_resettable.attr,
785 NULL
786 };
787
788 static struct attribute_group cciss_host_attr_group = {
789 .attrs = cciss_host_attrs,
790 };
791
792 static const struct attribute_group *cciss_host_attr_groups[] = {
793 &cciss_host_attr_group,
794 NULL
795 };
796
797 static struct device_type cciss_host_type = {
798 .name = "cciss_host",
799 .groups = cciss_host_attr_groups,
800 .release = cciss_hba_release,
801 };
802
803 static struct attribute *cciss_dev_attrs[] = {
804 &dev_attr_unique_id.attr,
805 &dev_attr_model.attr,
806 &dev_attr_vendor.attr,
807 &dev_attr_rev.attr,
808 &dev_attr_lunid.attr,
809 &dev_attr_raid_level.attr,
810 &dev_attr_usage_count.attr,
811 NULL
812 };
813
814 static struct attribute_group cciss_dev_attr_group = {
815 .attrs = cciss_dev_attrs,
816 };
817
818 static const struct attribute_group *cciss_dev_attr_groups[] = {
819 &cciss_dev_attr_group,
820 NULL
821 };
822
823 static struct device_type cciss_dev_type = {
824 .name = "cciss_device",
825 .groups = cciss_dev_attr_groups,
826 .release = cciss_device_release,
827 };
828
829 static struct bus_type cciss_bus_type = {
830 .name = "cciss",
831 };
832
833 /*
834 * cciss_hba_release is called when the reference count
835 * of h->dev goes to zero.
836 */
837 static void cciss_hba_release(struct device *dev)
838 {
839 /*
840 * nothing to do, but need this to avoid a warning
841 * about not having a release handler from lib/kref.c.
842 */
843 }
844
845 /*
846 * Initialize sysfs entry for each controller. This sets up and registers
847 * the 'cciss#' directory for each individual controller under
848 * /sys/bus/pci/devices/<dev>/.
849 */
850 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
851 {
852 device_initialize(&h->dev);
853 h->dev.type = &cciss_host_type;
854 h->dev.bus = &cciss_bus_type;
855 dev_set_name(&h->dev, "%s", h->devname);
856 h->dev.parent = &h->pdev->dev;
857
858 return device_add(&h->dev);
859 }
860
861 /*
862 * Remove sysfs entries for an hba.
863 */
864 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
865 {
866 device_del(&h->dev);
867 put_device(&h->dev); /* final put. */
868 }
869
870 /* cciss_device_release is called when the reference count
871 * of h->drv[x]dev goes to zero.
872 */
873 static void cciss_device_release(struct device *dev)
874 {
875 drive_info_struct *drv = to_drv(dev);
876 kfree(drv);
877 }
878
879 /*
880 * Initialize sysfs for each logical drive. This sets up and registers
881 * the 'c#d#' directory for each individual logical drive under
882 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
883 * /sys/block/cciss!c#d# to this entry.
884 */
885 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
886 int drv_index)
887 {
888 struct device *dev;
889
890 if (h->drv[drv_index]->device_initialized)
891 return 0;
892
893 dev = &h->drv[drv_index]->dev;
894 device_initialize(dev);
895 dev->type = &cciss_dev_type;
896 dev->bus = &cciss_bus_type;
897 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
898 dev->parent = &h->dev;
899 h->drv[drv_index]->device_initialized = 1;
900 return device_add(dev);
901 }
902
903 /*
904 * Remove sysfs entries for a logical drive.
905 */
906 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
907 int ctlr_exiting)
908 {
909 struct device *dev = &h->drv[drv_index]->dev;
910
911 /* special case for c*d0, we only destroy it on controller exit */
912 if (drv_index == 0 && !ctlr_exiting)
913 return;
914
915 device_del(dev);
916 put_device(dev); /* the "final" put. */
917 h->drv[drv_index] = NULL;
918 }
919
920 /*
921 * For operations that cannot sleep, a command block is allocated at init,
922 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
923 * which ones are free or in use.
924 */
925 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
926 {
927 CommandList_struct *c;
928 int i;
929 u64bit temp64;
930 dma_addr_t cmd_dma_handle, err_dma_handle;
931
932 do {
933 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
934 if (i == h->nr_cmds)
935 return NULL;
936 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
937 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
938 c = h->cmd_pool + i;
939 memset(c, 0, sizeof(CommandList_struct));
940 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
941 c->err_info = h->errinfo_pool + i;
942 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
943 err_dma_handle = h->errinfo_pool_dhandle
944 + i * sizeof(ErrorInfo_struct);
945 h->nr_allocs++;
946
947 c->cmdindex = i;
948
949 INIT_LIST_HEAD(&c->list);
950 c->busaddr = (__u32) cmd_dma_handle;
951 temp64.val = (__u64) err_dma_handle;
952 c->ErrDesc.Addr.lower = temp64.val32.lower;
953 c->ErrDesc.Addr.upper = temp64.val32.upper;
954 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
955
956 c->ctlr = h->ctlr;
957 return c;
958 }
959
960 /* allocate a command using pci_alloc_consistent, used for ioctls,
961 * etc., not for the main i/o path.
962 */
963 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
964 {
965 CommandList_struct *c;
966 u64bit temp64;
967 dma_addr_t cmd_dma_handle, err_dma_handle;
968
969 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
970 sizeof(CommandList_struct), &cmd_dma_handle);
971 if (c == NULL)
972 return NULL;
973 memset(c, 0, sizeof(CommandList_struct));
974
975 c->cmdindex = -1;
976
977 c->err_info = (ErrorInfo_struct *)
978 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
979 &err_dma_handle);
980
981 if (c->err_info == NULL) {
982 pci_free_consistent(h->pdev,
983 sizeof(CommandList_struct), c, cmd_dma_handle);
984 return NULL;
985 }
986 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
987
988 INIT_LIST_HEAD(&c->list);
989 c->busaddr = (__u32) cmd_dma_handle;
990 temp64.val = (__u64) err_dma_handle;
991 c->ErrDesc.Addr.lower = temp64.val32.lower;
992 c->ErrDesc.Addr.upper = temp64.val32.upper;
993 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
994
995 c->ctlr = h->ctlr;
996 return c;
997 }
998
999 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1000 {
1001 int i;
1002
1003 i = c - h->cmd_pool;
1004 clear_bit(i & (BITS_PER_LONG - 1),
1005 h->cmd_pool_bits + (i / BITS_PER_LONG));
1006 h->nr_frees++;
1007 }
1008
1009 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1010 {
1011 u64bit temp64;
1012
1013 temp64.val32.lower = c->ErrDesc.Addr.lower;
1014 temp64.val32.upper = c->ErrDesc.Addr.upper;
1015 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1016 c->err_info, (dma_addr_t) temp64.val);
1017 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1018 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1019 }
1020
1021 static inline ctlr_info_t *get_host(struct gendisk *disk)
1022 {
1023 return disk->queue->queuedata;
1024 }
1025
1026 static inline drive_info_struct *get_drv(struct gendisk *disk)
1027 {
1028 return disk->private_data;
1029 }
1030
1031 /*
1032 * Open. Make sure the device is really there.
1033 */
1034 static int cciss_open(struct block_device *bdev, fmode_t mode)
1035 {
1036 ctlr_info_t *h = get_host(bdev->bd_disk);
1037 drive_info_struct *drv = get_drv(bdev->bd_disk);
1038
1039 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1040 if (drv->busy_configuring)
1041 return -EBUSY;
1042 /*
1043 * Root is allowed to open raw volume zero even if it's not configured
1044 * so array config can still work. Root is also allowed to open any
1045 * volume that has a LUN ID, so it can issue IOCTL to reread the
1046 * disk information. I don't think I really like this
1047 * but I'm already using way to many device nodes to claim another one
1048 * for "raw controller".
1049 */
1050 if (drv->heads == 0) {
1051 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1052 /* if not node 0 make sure it is a partition = 0 */
1053 if (MINOR(bdev->bd_dev) & 0x0f) {
1054 return -ENXIO;
1055 /* if it is, make sure we have a LUN ID */
1056 } else if (memcmp(drv->LunID, CTLR_LUNID,
1057 sizeof(drv->LunID))) {
1058 return -ENXIO;
1059 }
1060 }
1061 if (!capable(CAP_SYS_ADMIN))
1062 return -EPERM;
1063 }
1064 drv->usage_count++;
1065 h->usage_count++;
1066 return 0;
1067 }
1068
1069 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1070 {
1071 int ret;
1072
1073 mutex_lock(&cciss_mutex);
1074 ret = cciss_open(bdev, mode);
1075 mutex_unlock(&cciss_mutex);
1076
1077 return ret;
1078 }
1079
1080 /*
1081 * Close. Sync first.
1082 */
1083 static int cciss_release(struct gendisk *disk, fmode_t mode)
1084 {
1085 ctlr_info_t *h;
1086 drive_info_struct *drv;
1087
1088 mutex_lock(&cciss_mutex);
1089 h = get_host(disk);
1090 drv = get_drv(disk);
1091 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1092 drv->usage_count--;
1093 h->usage_count--;
1094 mutex_unlock(&cciss_mutex);
1095 return 0;
1096 }
1097
1098 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1099 unsigned cmd, unsigned long arg)
1100 {
1101 int ret;
1102 mutex_lock(&cciss_mutex);
1103 ret = cciss_ioctl(bdev, mode, cmd, arg);
1104 mutex_unlock(&cciss_mutex);
1105 return ret;
1106 }
1107
1108 #ifdef CONFIG_COMPAT
1109
1110 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1111 unsigned cmd, unsigned long arg);
1112 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1113 unsigned cmd, unsigned long arg);
1114
1115 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1116 unsigned cmd, unsigned long arg)
1117 {
1118 switch (cmd) {
1119 case CCISS_GETPCIINFO:
1120 case CCISS_GETINTINFO:
1121 case CCISS_SETINTINFO:
1122 case CCISS_GETNODENAME:
1123 case CCISS_SETNODENAME:
1124 case CCISS_GETHEARTBEAT:
1125 case CCISS_GETBUSTYPES:
1126 case CCISS_GETFIRMVER:
1127 case CCISS_GETDRIVVER:
1128 case CCISS_REVALIDVOLS:
1129 case CCISS_DEREGDISK:
1130 case CCISS_REGNEWDISK:
1131 case CCISS_REGNEWD:
1132 case CCISS_RESCANDISK:
1133 case CCISS_GETLUNINFO:
1134 return do_ioctl(bdev, mode, cmd, arg);
1135
1136 case CCISS_PASSTHRU32:
1137 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1138 case CCISS_BIG_PASSTHRU32:
1139 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1140
1141 default:
1142 return -ENOIOCTLCMD;
1143 }
1144 }
1145
1146 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1147 unsigned cmd, unsigned long arg)
1148 {
1149 IOCTL32_Command_struct __user *arg32 =
1150 (IOCTL32_Command_struct __user *) arg;
1151 IOCTL_Command_struct arg64;
1152 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1153 int err;
1154 u32 cp;
1155
1156 err = 0;
1157 err |=
1158 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1159 sizeof(arg64.LUN_info));
1160 err |=
1161 copy_from_user(&arg64.Request, &arg32->Request,
1162 sizeof(arg64.Request));
1163 err |=
1164 copy_from_user(&arg64.error_info, &arg32->error_info,
1165 sizeof(arg64.error_info));
1166 err |= get_user(arg64.buf_size, &arg32->buf_size);
1167 err |= get_user(cp, &arg32->buf);
1168 arg64.buf = compat_ptr(cp);
1169 err |= copy_to_user(p, &arg64, sizeof(arg64));
1170
1171 if (err)
1172 return -EFAULT;
1173
1174 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1175 if (err)
1176 return err;
1177 err |=
1178 copy_in_user(&arg32->error_info, &p->error_info,
1179 sizeof(arg32->error_info));
1180 if (err)
1181 return -EFAULT;
1182 return err;
1183 }
1184
1185 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1186 unsigned cmd, unsigned long arg)
1187 {
1188 BIG_IOCTL32_Command_struct __user *arg32 =
1189 (BIG_IOCTL32_Command_struct __user *) arg;
1190 BIG_IOCTL_Command_struct arg64;
1191 BIG_IOCTL_Command_struct __user *p =
1192 compat_alloc_user_space(sizeof(arg64));
1193 int err;
1194 u32 cp;
1195
1196 memset(&arg64, 0, sizeof(arg64));
1197 err = 0;
1198 err |=
1199 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1200 sizeof(arg64.LUN_info));
1201 err |=
1202 copy_from_user(&arg64.Request, &arg32->Request,
1203 sizeof(arg64.Request));
1204 err |=
1205 copy_from_user(&arg64.error_info, &arg32->error_info,
1206 sizeof(arg64.error_info));
1207 err |= get_user(arg64.buf_size, &arg32->buf_size);
1208 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1209 err |= get_user(cp, &arg32->buf);
1210 arg64.buf = compat_ptr(cp);
1211 err |= copy_to_user(p, &arg64, sizeof(arg64));
1212
1213 if (err)
1214 return -EFAULT;
1215
1216 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1217 if (err)
1218 return err;
1219 err |=
1220 copy_in_user(&arg32->error_info, &p->error_info,
1221 sizeof(arg32->error_info));
1222 if (err)
1223 return -EFAULT;
1224 return err;
1225 }
1226 #endif
1227
1228 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1229 {
1230 drive_info_struct *drv = get_drv(bdev->bd_disk);
1231
1232 if (!drv->cylinders)
1233 return -ENXIO;
1234
1235 geo->heads = drv->heads;
1236 geo->sectors = drv->sectors;
1237 geo->cylinders = drv->cylinders;
1238 return 0;
1239 }
1240
1241 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1242 {
1243 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1244 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1245 (void)check_for_unit_attention(h, c);
1246 }
1247
1248 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1249 {
1250 cciss_pci_info_struct pciinfo;
1251
1252 if (!argp)
1253 return -EINVAL;
1254 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1255 pciinfo.bus = h->pdev->bus->number;
1256 pciinfo.dev_fn = h->pdev->devfn;
1257 pciinfo.board_id = h->board_id;
1258 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1259 return -EFAULT;
1260 return 0;
1261 }
1262
1263 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1264 {
1265 cciss_coalint_struct intinfo;
1266
1267 if (!argp)
1268 return -EINVAL;
1269 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1270 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1271 if (copy_to_user
1272 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1273 return -EFAULT;
1274 return 0;
1275 }
1276
1277 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1278 {
1279 cciss_coalint_struct intinfo;
1280 unsigned long flags;
1281 int i;
1282
1283 if (!argp)
1284 return -EINVAL;
1285 if (!capable(CAP_SYS_ADMIN))
1286 return -EPERM;
1287 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1288 return -EFAULT;
1289 if ((intinfo.delay == 0) && (intinfo.count == 0))
1290 return -EINVAL;
1291 spin_lock_irqsave(&h->lock, flags);
1292 /* Update the field, and then ring the doorbell */
1293 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1294 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1295 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1296
1297 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1298 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1299 break;
1300 udelay(1000); /* delay and try again */
1301 }
1302 spin_unlock_irqrestore(&h->lock, flags);
1303 if (i >= MAX_IOCTL_CONFIG_WAIT)
1304 return -EAGAIN;
1305 return 0;
1306 }
1307
1308 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1309 {
1310 NodeName_type NodeName;
1311 int i;
1312
1313 if (!argp)
1314 return -EINVAL;
1315 for (i = 0; i < 16; i++)
1316 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1317 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1318 return -EFAULT;
1319 return 0;
1320 }
1321
1322 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1323 {
1324 NodeName_type NodeName;
1325 unsigned long flags;
1326 int i;
1327
1328 if (!argp)
1329 return -EINVAL;
1330 if (!capable(CAP_SYS_ADMIN))
1331 return -EPERM;
1332 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1333 return -EFAULT;
1334 spin_lock_irqsave(&h->lock, flags);
1335 /* Update the field, and then ring the doorbell */
1336 for (i = 0; i < 16; i++)
1337 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1338 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1339 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1340 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1341 break;
1342 udelay(1000); /* delay and try again */
1343 }
1344 spin_unlock_irqrestore(&h->lock, flags);
1345 if (i >= MAX_IOCTL_CONFIG_WAIT)
1346 return -EAGAIN;
1347 return 0;
1348 }
1349
1350 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1351 {
1352 Heartbeat_type heartbeat;
1353
1354 if (!argp)
1355 return -EINVAL;
1356 heartbeat = readl(&h->cfgtable->HeartBeat);
1357 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1358 return -EFAULT;
1359 return 0;
1360 }
1361
1362 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1363 {
1364 BusTypes_type BusTypes;
1365
1366 if (!argp)
1367 return -EINVAL;
1368 BusTypes = readl(&h->cfgtable->BusTypes);
1369 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1370 return -EFAULT;
1371 return 0;
1372 }
1373
1374 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1375 {
1376 FirmwareVer_type firmware;
1377
1378 if (!argp)
1379 return -EINVAL;
1380 memcpy(firmware, h->firm_ver, 4);
1381
1382 if (copy_to_user
1383 (argp, firmware, sizeof(FirmwareVer_type)))
1384 return -EFAULT;
1385 return 0;
1386 }
1387
1388 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1389 {
1390 DriverVer_type DriverVer = DRIVER_VERSION;
1391
1392 if (!argp)
1393 return -EINVAL;
1394 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1395 return -EFAULT;
1396 return 0;
1397 }
1398
1399 static int cciss_getluninfo(ctlr_info_t *h,
1400 struct gendisk *disk, void __user *argp)
1401 {
1402 LogvolInfo_struct luninfo;
1403 drive_info_struct *drv = get_drv(disk);
1404
1405 if (!argp)
1406 return -EINVAL;
1407 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1408 luninfo.num_opens = drv->usage_count;
1409 luninfo.num_parts = 0;
1410 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1411 return -EFAULT;
1412 return 0;
1413 }
1414
1415 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1416 {
1417 IOCTL_Command_struct iocommand;
1418 CommandList_struct *c;
1419 char *buff = NULL;
1420 u64bit temp64;
1421 DECLARE_COMPLETION_ONSTACK(wait);
1422
1423 if (!argp)
1424 return -EINVAL;
1425
1426 if (!capable(CAP_SYS_RAWIO))
1427 return -EPERM;
1428
1429 if (copy_from_user
1430 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1431 return -EFAULT;
1432 if ((iocommand.buf_size < 1) &&
1433 (iocommand.Request.Type.Direction != XFER_NONE)) {
1434 return -EINVAL;
1435 }
1436 if (iocommand.buf_size > 0) {
1437 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1438 if (buff == NULL)
1439 return -EFAULT;
1440 }
1441 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1442 /* Copy the data into the buffer we created */
1443 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1444 kfree(buff);
1445 return -EFAULT;
1446 }
1447 } else {
1448 memset(buff, 0, iocommand.buf_size);
1449 }
1450 c = cmd_special_alloc(h);
1451 if (!c) {
1452 kfree(buff);
1453 return -ENOMEM;
1454 }
1455 /* Fill in the command type */
1456 c->cmd_type = CMD_IOCTL_PEND;
1457 /* Fill in Command Header */
1458 c->Header.ReplyQueue = 0; /* unused in simple mode */
1459 if (iocommand.buf_size > 0) { /* buffer to fill */
1460 c->Header.SGList = 1;
1461 c->Header.SGTotal = 1;
1462 } else { /* no buffers to fill */
1463 c->Header.SGList = 0;
1464 c->Header.SGTotal = 0;
1465 }
1466 c->Header.LUN = iocommand.LUN_info;
1467 /* use the kernel address the cmd block for tag */
1468 c->Header.Tag.lower = c->busaddr;
1469
1470 /* Fill in Request block */
1471 c->Request = iocommand.Request;
1472
1473 /* Fill in the scatter gather information */
1474 if (iocommand.buf_size > 0) {
1475 temp64.val = pci_map_single(h->pdev, buff,
1476 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1477 c->SG[0].Addr.lower = temp64.val32.lower;
1478 c->SG[0].Addr.upper = temp64.val32.upper;
1479 c->SG[0].Len = iocommand.buf_size;
1480 c->SG[0].Ext = 0; /* we are not chaining */
1481 }
1482 c->waiting = &wait;
1483
1484 enqueue_cmd_and_start_io(h, c);
1485 wait_for_completion(&wait);
1486
1487 /* unlock the buffers from DMA */
1488 temp64.val32.lower = c->SG[0].Addr.lower;
1489 temp64.val32.upper = c->SG[0].Addr.upper;
1490 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1491 PCI_DMA_BIDIRECTIONAL);
1492 check_ioctl_unit_attention(h, c);
1493
1494 /* Copy the error information out */
1495 iocommand.error_info = *(c->err_info);
1496 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1497 kfree(buff);
1498 cmd_special_free(h, c);
1499 return -EFAULT;
1500 }
1501
1502 if (iocommand.Request.Type.Direction == XFER_READ) {
1503 /* Copy the data out of the buffer we created */
1504 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1505 kfree(buff);
1506 cmd_special_free(h, c);
1507 return -EFAULT;
1508 }
1509 }
1510 kfree(buff);
1511 cmd_special_free(h, c);
1512 return 0;
1513 }
1514
1515 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1516 {
1517 BIG_IOCTL_Command_struct *ioc;
1518 CommandList_struct *c;
1519 unsigned char **buff = NULL;
1520 int *buff_size = NULL;
1521 u64bit temp64;
1522 BYTE sg_used = 0;
1523 int status = 0;
1524 int i;
1525 DECLARE_COMPLETION_ONSTACK(wait);
1526 __u32 left;
1527 __u32 sz;
1528 BYTE __user *data_ptr;
1529
1530 if (!argp)
1531 return -EINVAL;
1532 if (!capable(CAP_SYS_RAWIO))
1533 return -EPERM;
1534 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1535 if (!ioc) {
1536 status = -ENOMEM;
1537 goto cleanup1;
1538 }
1539 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1540 status = -EFAULT;
1541 goto cleanup1;
1542 }
1543 if ((ioc->buf_size < 1) &&
1544 (ioc->Request.Type.Direction != XFER_NONE)) {
1545 status = -EINVAL;
1546 goto cleanup1;
1547 }
1548 /* Check kmalloc limits using all SGs */
1549 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1550 status = -EINVAL;
1551 goto cleanup1;
1552 }
1553 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1554 status = -EINVAL;
1555 goto cleanup1;
1556 }
1557 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1558 if (!buff) {
1559 status = -ENOMEM;
1560 goto cleanup1;
1561 }
1562 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1563 if (!buff_size) {
1564 status = -ENOMEM;
1565 goto cleanup1;
1566 }
1567 left = ioc->buf_size;
1568 data_ptr = ioc->buf;
1569 while (left) {
1570 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1571 buff_size[sg_used] = sz;
1572 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1573 if (buff[sg_used] == NULL) {
1574 status = -ENOMEM;
1575 goto cleanup1;
1576 }
1577 if (ioc->Request.Type.Direction == XFER_WRITE) {
1578 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1579 status = -EFAULT;
1580 goto cleanup1;
1581 }
1582 } else {
1583 memset(buff[sg_used], 0, sz);
1584 }
1585 left -= sz;
1586 data_ptr += sz;
1587 sg_used++;
1588 }
1589 c = cmd_special_alloc(h);
1590 if (!c) {
1591 status = -ENOMEM;
1592 goto cleanup1;
1593 }
1594 c->cmd_type = CMD_IOCTL_PEND;
1595 c->Header.ReplyQueue = 0;
1596 c->Header.SGList = sg_used;
1597 c->Header.SGTotal = sg_used;
1598 c->Header.LUN = ioc->LUN_info;
1599 c->Header.Tag.lower = c->busaddr;
1600
1601 c->Request = ioc->Request;
1602 for (i = 0; i < sg_used; i++) {
1603 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1604 PCI_DMA_BIDIRECTIONAL);
1605 c->SG[i].Addr.lower = temp64.val32.lower;
1606 c->SG[i].Addr.upper = temp64.val32.upper;
1607 c->SG[i].Len = buff_size[i];
1608 c->SG[i].Ext = 0; /* we are not chaining */
1609 }
1610 c->waiting = &wait;
1611 enqueue_cmd_and_start_io(h, c);
1612 wait_for_completion(&wait);
1613 /* unlock the buffers from DMA */
1614 for (i = 0; i < sg_used; i++) {
1615 temp64.val32.lower = c->SG[i].Addr.lower;
1616 temp64.val32.upper = c->SG[i].Addr.upper;
1617 pci_unmap_single(h->pdev,
1618 (dma_addr_t) temp64.val, buff_size[i],
1619 PCI_DMA_BIDIRECTIONAL);
1620 }
1621 check_ioctl_unit_attention(h, c);
1622 /* Copy the error information out */
1623 ioc->error_info = *(c->err_info);
1624 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1625 cmd_special_free(h, c);
1626 status = -EFAULT;
1627 goto cleanup1;
1628 }
1629 if (ioc->Request.Type.Direction == XFER_READ) {
1630 /* Copy the data out of the buffer we created */
1631 BYTE __user *ptr = ioc->buf;
1632 for (i = 0; i < sg_used; i++) {
1633 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1634 cmd_special_free(h, c);
1635 status = -EFAULT;
1636 goto cleanup1;
1637 }
1638 ptr += buff_size[i];
1639 }
1640 }
1641 cmd_special_free(h, c);
1642 status = 0;
1643 cleanup1:
1644 if (buff) {
1645 for (i = 0; i < sg_used; i++)
1646 kfree(buff[i]);
1647 kfree(buff);
1648 }
1649 kfree(buff_size);
1650 kfree(ioc);
1651 return status;
1652 }
1653
1654 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1655 unsigned int cmd, unsigned long arg)
1656 {
1657 struct gendisk *disk = bdev->bd_disk;
1658 ctlr_info_t *h = get_host(disk);
1659 void __user *argp = (void __user *)arg;
1660
1661 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1662 cmd, arg);
1663 switch (cmd) {
1664 case CCISS_GETPCIINFO:
1665 return cciss_getpciinfo(h, argp);
1666 case CCISS_GETINTINFO:
1667 return cciss_getintinfo(h, argp);
1668 case CCISS_SETINTINFO:
1669 return cciss_setintinfo(h, argp);
1670 case CCISS_GETNODENAME:
1671 return cciss_getnodename(h, argp);
1672 case CCISS_SETNODENAME:
1673 return cciss_setnodename(h, argp);
1674 case CCISS_GETHEARTBEAT:
1675 return cciss_getheartbeat(h, argp);
1676 case CCISS_GETBUSTYPES:
1677 return cciss_getbustypes(h, argp);
1678 case CCISS_GETFIRMVER:
1679 return cciss_getfirmver(h, argp);
1680 case CCISS_GETDRIVVER:
1681 return cciss_getdrivver(h, argp);
1682 case CCISS_DEREGDISK:
1683 case CCISS_REGNEWD:
1684 case CCISS_REVALIDVOLS:
1685 return rebuild_lun_table(h, 0, 1);
1686 case CCISS_GETLUNINFO:
1687 return cciss_getluninfo(h, disk, argp);
1688 case CCISS_PASSTHRU:
1689 return cciss_passthru(h, argp);
1690 case CCISS_BIG_PASSTHRU:
1691 return cciss_bigpassthru(h, argp);
1692
1693 /* scsi_cmd_ioctl handles these, below, though some are not */
1694 /* very meaningful for cciss. SG_IO is the main one people want. */
1695
1696 case SG_GET_VERSION_NUM:
1697 case SG_SET_TIMEOUT:
1698 case SG_GET_TIMEOUT:
1699 case SG_GET_RESERVED_SIZE:
1700 case SG_SET_RESERVED_SIZE:
1701 case SG_EMULATED_HOST:
1702 case SG_IO:
1703 case SCSI_IOCTL_SEND_COMMAND:
1704 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
1705
1706 /* scsi_cmd_ioctl would normally handle these, below, but */
1707 /* they aren't a good fit for cciss, as CD-ROMs are */
1708 /* not supported, and we don't have any bus/target/lun */
1709 /* which we present to the kernel. */
1710
1711 case CDROM_SEND_PACKET:
1712 case CDROMCLOSETRAY:
1713 case CDROMEJECT:
1714 case SCSI_IOCTL_GET_IDLUN:
1715 case SCSI_IOCTL_GET_BUS_NUMBER:
1716 default:
1717 return -ENOTTY;
1718 }
1719 }
1720
1721 static void cciss_check_queues(ctlr_info_t *h)
1722 {
1723 int start_queue = h->next_to_run;
1724 int i;
1725
1726 /* check to see if we have maxed out the number of commands that can
1727 * be placed on the queue. If so then exit. We do this check here
1728 * in case the interrupt we serviced was from an ioctl and did not
1729 * free any new commands.
1730 */
1731 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1732 return;
1733
1734 /* We have room on the queue for more commands. Now we need to queue
1735 * them up. We will also keep track of the next queue to run so
1736 * that every queue gets a chance to be started first.
1737 */
1738 for (i = 0; i < h->highest_lun + 1; i++) {
1739 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1740 /* make sure the disk has been added and the drive is real
1741 * because this can be called from the middle of init_one.
1742 */
1743 if (!h->drv[curr_queue])
1744 continue;
1745 if (!(h->drv[curr_queue]->queue) ||
1746 !(h->drv[curr_queue]->heads))
1747 continue;
1748 blk_start_queue(h->gendisk[curr_queue]->queue);
1749
1750 /* check to see if we have maxed out the number of commands
1751 * that can be placed on the queue.
1752 */
1753 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1754 if (curr_queue == start_queue) {
1755 h->next_to_run =
1756 (start_queue + 1) % (h->highest_lun + 1);
1757 break;
1758 } else {
1759 h->next_to_run = curr_queue;
1760 break;
1761 }
1762 }
1763 }
1764 }
1765
1766 static void cciss_softirq_done(struct request *rq)
1767 {
1768 CommandList_struct *c = rq->completion_data;
1769 ctlr_info_t *h = hba[c->ctlr];
1770 SGDescriptor_struct *curr_sg = c->SG;
1771 u64bit temp64;
1772 unsigned long flags;
1773 int i, ddir;
1774 int sg_index = 0;
1775
1776 if (c->Request.Type.Direction == XFER_READ)
1777 ddir = PCI_DMA_FROMDEVICE;
1778 else
1779 ddir = PCI_DMA_TODEVICE;
1780
1781 /* command did not need to be retried */
1782 /* unmap the DMA mapping for all the scatter gather elements */
1783 for (i = 0; i < c->Header.SGList; i++) {
1784 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1785 cciss_unmap_sg_chain_block(h, c);
1786 /* Point to the next block */
1787 curr_sg = h->cmd_sg_list[c->cmdindex];
1788 sg_index = 0;
1789 }
1790 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1791 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1792 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1793 ddir);
1794 ++sg_index;
1795 }
1796
1797 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1798
1799 /* set the residual count for pc requests */
1800 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1801 rq->resid_len = c->err_info->ResidualCnt;
1802
1803 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1804
1805 spin_lock_irqsave(&h->lock, flags);
1806 cmd_free(h, c);
1807 cciss_check_queues(h);
1808 spin_unlock_irqrestore(&h->lock, flags);
1809 }
1810
1811 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1812 unsigned char scsi3addr[], uint32_t log_unit)
1813 {
1814 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1815 sizeof(h->drv[log_unit]->LunID));
1816 }
1817
1818 /* This function gets the SCSI vendor, model, and revision of a logical drive
1819 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1820 * they cannot be read.
1821 */
1822 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1823 char *vendor, char *model, char *rev)
1824 {
1825 int rc;
1826 InquiryData_struct *inq_buf;
1827 unsigned char scsi3addr[8];
1828
1829 *vendor = '\0';
1830 *model = '\0';
1831 *rev = '\0';
1832
1833 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1834 if (!inq_buf)
1835 return;
1836
1837 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1838 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1839 scsi3addr, TYPE_CMD);
1840 if (rc == IO_OK) {
1841 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1842 vendor[VENDOR_LEN] = '\0';
1843 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1844 model[MODEL_LEN] = '\0';
1845 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1846 rev[REV_LEN] = '\0';
1847 }
1848
1849 kfree(inq_buf);
1850 return;
1851 }
1852
1853 /* This function gets the serial number of a logical drive via
1854 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1855 * number cannot be had, for whatever reason, 16 bytes of 0xff
1856 * are returned instead.
1857 */
1858 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1859 unsigned char *serial_no, int buflen)
1860 {
1861 #define PAGE_83_INQ_BYTES 64
1862 int rc;
1863 unsigned char *buf;
1864 unsigned char scsi3addr[8];
1865
1866 if (buflen > 16)
1867 buflen = 16;
1868 memset(serial_no, 0xff, buflen);
1869 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1870 if (!buf)
1871 return;
1872 memset(serial_no, 0, buflen);
1873 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1874 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1875 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1876 if (rc == IO_OK)
1877 memcpy(serial_no, &buf[8], buflen);
1878 kfree(buf);
1879 return;
1880 }
1881
1882 /*
1883 * cciss_add_disk sets up the block device queue for a logical drive
1884 */
1885 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1886 int drv_index)
1887 {
1888 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1889 if (!disk->queue)
1890 goto init_queue_failure;
1891 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1892 disk->major = h->major;
1893 disk->first_minor = drv_index << NWD_SHIFT;
1894 disk->fops = &cciss_fops;
1895 if (cciss_create_ld_sysfs_entry(h, drv_index))
1896 goto cleanup_queue;
1897 disk->private_data = h->drv[drv_index];
1898 disk->driverfs_dev = &h->drv[drv_index]->dev;
1899
1900 /* Set up queue information */
1901 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1902
1903 /* This is a hardware imposed limit. */
1904 blk_queue_max_segments(disk->queue, h->maxsgentries);
1905
1906 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1907
1908 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1909
1910 disk->queue->queuedata = h;
1911
1912 blk_queue_logical_block_size(disk->queue,
1913 h->drv[drv_index]->block_size);
1914
1915 /* Make sure all queue data is written out before */
1916 /* setting h->drv[drv_index]->queue, as setting this */
1917 /* allows the interrupt handler to start the queue */
1918 wmb();
1919 h->drv[drv_index]->queue = disk->queue;
1920 add_disk(disk);
1921 return 0;
1922
1923 cleanup_queue:
1924 blk_cleanup_queue(disk->queue);
1925 disk->queue = NULL;
1926 init_queue_failure:
1927 return -1;
1928 }
1929
1930 /* This function will check the usage_count of the drive to be updated/added.
1931 * If the usage_count is zero and it is a heretofore unknown drive, or,
1932 * the drive's capacity, geometry, or serial number has changed,
1933 * then the drive information will be updated and the disk will be
1934 * re-registered with the kernel. If these conditions don't hold,
1935 * then it will be left alone for the next reboot. The exception to this
1936 * is disk 0 which will always be left registered with the kernel since it
1937 * is also the controller node. Any changes to disk 0 will show up on
1938 * the next reboot.
1939 */
1940 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1941 int first_time, int via_ioctl)
1942 {
1943 struct gendisk *disk;
1944 InquiryData_struct *inq_buff = NULL;
1945 unsigned int block_size;
1946 sector_t total_size;
1947 unsigned long flags = 0;
1948 int ret = 0;
1949 drive_info_struct *drvinfo;
1950
1951 /* Get information about the disk and modify the driver structure */
1952 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1953 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1954 if (inq_buff == NULL || drvinfo == NULL)
1955 goto mem_msg;
1956
1957 /* testing to see if 16-byte CDBs are already being used */
1958 if (h->cciss_read == CCISS_READ_16) {
1959 cciss_read_capacity_16(h, drv_index,
1960 &total_size, &block_size);
1961
1962 } else {
1963 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1964 /* if read_capacity returns all F's this volume is >2TB */
1965 /* in size so we switch to 16-byte CDB's for all */
1966 /* read/write ops */
1967 if (total_size == 0xFFFFFFFFULL) {
1968 cciss_read_capacity_16(h, drv_index,
1969 &total_size, &block_size);
1970 h->cciss_read = CCISS_READ_16;
1971 h->cciss_write = CCISS_WRITE_16;
1972 } else {
1973 h->cciss_read = CCISS_READ_10;
1974 h->cciss_write = CCISS_WRITE_10;
1975 }
1976 }
1977
1978 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
1979 inq_buff, drvinfo);
1980 drvinfo->block_size = block_size;
1981 drvinfo->nr_blocks = total_size + 1;
1982
1983 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
1984 drvinfo->model, drvinfo->rev);
1985 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
1986 sizeof(drvinfo->serial_no));
1987 /* Save the lunid in case we deregister the disk, below. */
1988 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1989 sizeof(drvinfo->LunID));
1990
1991 /* Is it the same disk we already know, and nothing's changed? */
1992 if (h->drv[drv_index]->raid_level != -1 &&
1993 ((memcmp(drvinfo->serial_no,
1994 h->drv[drv_index]->serial_no, 16) == 0) &&
1995 drvinfo->block_size == h->drv[drv_index]->block_size &&
1996 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1997 drvinfo->heads == h->drv[drv_index]->heads &&
1998 drvinfo->sectors == h->drv[drv_index]->sectors &&
1999 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2000 /* The disk is unchanged, nothing to update */
2001 goto freeret;
2002
2003 /* If we get here it's not the same disk, or something's changed,
2004 * so we need to * deregister it, and re-register it, if it's not
2005 * in use.
2006 * If the disk already exists then deregister it before proceeding
2007 * (unless it's the first disk (for the controller node).
2008 */
2009 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2010 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2011 spin_lock_irqsave(&h->lock, flags);
2012 h->drv[drv_index]->busy_configuring = 1;
2013 spin_unlock_irqrestore(&h->lock, flags);
2014
2015 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2016 * which keeps the interrupt handler from starting
2017 * the queue.
2018 */
2019 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2020 }
2021
2022 /* If the disk is in use return */
2023 if (ret)
2024 goto freeret;
2025
2026 /* Save the new information from cciss_geometry_inquiry
2027 * and serial number inquiry. If the disk was deregistered
2028 * above, then h->drv[drv_index] will be NULL.
2029 */
2030 if (h->drv[drv_index] == NULL) {
2031 drvinfo->device_initialized = 0;
2032 h->drv[drv_index] = drvinfo;
2033 drvinfo = NULL; /* so it won't be freed below. */
2034 } else {
2035 /* special case for cxd0 */
2036 h->drv[drv_index]->block_size = drvinfo->block_size;
2037 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2038 h->drv[drv_index]->heads = drvinfo->heads;
2039 h->drv[drv_index]->sectors = drvinfo->sectors;
2040 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2041 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2042 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2043 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2044 VENDOR_LEN + 1);
2045 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2046 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2047 }
2048
2049 ++h->num_luns;
2050 disk = h->gendisk[drv_index];
2051 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2052
2053 /* If it's not disk 0 (drv_index != 0)
2054 * or if it was disk 0, but there was previously
2055 * no actual corresponding configured logical drive
2056 * (raid_leve == -1) then we want to update the
2057 * logical drive's information.
2058 */
2059 if (drv_index || first_time) {
2060 if (cciss_add_disk(h, disk, drv_index) != 0) {
2061 cciss_free_gendisk(h, drv_index);
2062 cciss_free_drive_info(h, drv_index);
2063 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2064 drv_index);
2065 --h->num_luns;
2066 }
2067 }
2068
2069 freeret:
2070 kfree(inq_buff);
2071 kfree(drvinfo);
2072 return;
2073 mem_msg:
2074 dev_err(&h->pdev->dev, "out of memory\n");
2075 goto freeret;
2076 }
2077
2078 /* This function will find the first index of the controllers drive array
2079 * that has a null drv pointer and allocate the drive info struct and
2080 * will return that index This is where new drives will be added.
2081 * If the index to be returned is greater than the highest_lun index for
2082 * the controller then highest_lun is set * to this new index.
2083 * If there are no available indexes or if tha allocation fails, then -1
2084 * is returned. * "controller_node" is used to know if this is a real
2085 * logical drive, or just the controller node, which determines if this
2086 * counts towards highest_lun.
2087 */
2088 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2089 {
2090 int i;
2091 drive_info_struct *drv;
2092
2093 /* Search for an empty slot for our drive info */
2094 for (i = 0; i < CISS_MAX_LUN; i++) {
2095
2096 /* if not cxd0 case, and it's occupied, skip it. */
2097 if (h->drv[i] && i != 0)
2098 continue;
2099 /*
2100 * If it's cxd0 case, and drv is alloc'ed already, and a
2101 * disk is configured there, skip it.
2102 */
2103 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2104 continue;
2105
2106 /*
2107 * We've found an empty slot. Update highest_lun
2108 * provided this isn't just the fake cxd0 controller node.
2109 */
2110 if (i > h->highest_lun && !controller_node)
2111 h->highest_lun = i;
2112
2113 /* If adding a real disk at cxd0, and it's already alloc'ed */
2114 if (i == 0 && h->drv[i] != NULL)
2115 return i;
2116
2117 /*
2118 * Found an empty slot, not already alloc'ed. Allocate it.
2119 * Mark it with raid_level == -1, so we know it's new later on.
2120 */
2121 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2122 if (!drv)
2123 return -1;
2124 drv->raid_level = -1; /* so we know it's new */
2125 h->drv[i] = drv;
2126 return i;
2127 }
2128 return -1;
2129 }
2130
2131 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2132 {
2133 kfree(h->drv[drv_index]);
2134 h->drv[drv_index] = NULL;
2135 }
2136
2137 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2138 {
2139 put_disk(h->gendisk[drv_index]);
2140 h->gendisk[drv_index] = NULL;
2141 }
2142
2143 /* cciss_add_gendisk finds a free hba[]->drv structure
2144 * and allocates a gendisk if needed, and sets the lunid
2145 * in the drvinfo structure. It returns the index into
2146 * the ->drv[] array, or -1 if none are free.
2147 * is_controller_node indicates whether highest_lun should
2148 * count this disk, or if it's only being added to provide
2149 * a means to talk to the controller in case no logical
2150 * drives have yet been configured.
2151 */
2152 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2153 int controller_node)
2154 {
2155 int drv_index;
2156
2157 drv_index = cciss_alloc_drive_info(h, controller_node);
2158 if (drv_index == -1)
2159 return -1;
2160
2161 /*Check if the gendisk needs to be allocated */
2162 if (!h->gendisk[drv_index]) {
2163 h->gendisk[drv_index] =
2164 alloc_disk(1 << NWD_SHIFT);
2165 if (!h->gendisk[drv_index]) {
2166 dev_err(&h->pdev->dev,
2167 "could not allocate a new disk %d\n",
2168 drv_index);
2169 goto err_free_drive_info;
2170 }
2171 }
2172 memcpy(h->drv[drv_index]->LunID, lunid,
2173 sizeof(h->drv[drv_index]->LunID));
2174 if (cciss_create_ld_sysfs_entry(h, drv_index))
2175 goto err_free_disk;
2176 /* Don't need to mark this busy because nobody */
2177 /* else knows about this disk yet to contend */
2178 /* for access to it. */
2179 h->drv[drv_index]->busy_configuring = 0;
2180 wmb();
2181 return drv_index;
2182
2183 err_free_disk:
2184 cciss_free_gendisk(h, drv_index);
2185 err_free_drive_info:
2186 cciss_free_drive_info(h, drv_index);
2187 return -1;
2188 }
2189
2190 /* This is for the special case of a controller which
2191 * has no logical drives. In this case, we still need
2192 * to register a disk so the controller can be accessed
2193 * by the Array Config Utility.
2194 */
2195 static void cciss_add_controller_node(ctlr_info_t *h)
2196 {
2197 struct gendisk *disk;
2198 int drv_index;
2199
2200 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2201 return;
2202
2203 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2204 if (drv_index == -1)
2205 goto error;
2206 h->drv[drv_index]->block_size = 512;
2207 h->drv[drv_index]->nr_blocks = 0;
2208 h->drv[drv_index]->heads = 0;
2209 h->drv[drv_index]->sectors = 0;
2210 h->drv[drv_index]->cylinders = 0;
2211 h->drv[drv_index]->raid_level = -1;
2212 memset(h->drv[drv_index]->serial_no, 0, 16);
2213 disk = h->gendisk[drv_index];
2214 if (cciss_add_disk(h, disk, drv_index) == 0)
2215 return;
2216 cciss_free_gendisk(h, drv_index);
2217 cciss_free_drive_info(h, drv_index);
2218 error:
2219 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2220 return;
2221 }
2222
2223 /* This function will add and remove logical drives from the Logical
2224 * drive array of the controller and maintain persistency of ordering
2225 * so that mount points are preserved until the next reboot. This allows
2226 * for the removal of logical drives in the middle of the drive array
2227 * without a re-ordering of those drives.
2228 * INPUT
2229 * h = The controller to perform the operations on
2230 */
2231 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2232 int via_ioctl)
2233 {
2234 int num_luns;
2235 ReportLunData_struct *ld_buff = NULL;
2236 int return_code;
2237 int listlength = 0;
2238 int i;
2239 int drv_found;
2240 int drv_index = 0;
2241 unsigned char lunid[8] = CTLR_LUNID;
2242 unsigned long flags;
2243
2244 if (!capable(CAP_SYS_RAWIO))
2245 return -EPERM;
2246
2247 /* Set busy_configuring flag for this operation */
2248 spin_lock_irqsave(&h->lock, flags);
2249 if (h->busy_configuring) {
2250 spin_unlock_irqrestore(&h->lock, flags);
2251 return -EBUSY;
2252 }
2253 h->busy_configuring = 1;
2254 spin_unlock_irqrestore(&h->lock, flags);
2255
2256 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2257 if (ld_buff == NULL)
2258 goto mem_msg;
2259
2260 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2261 sizeof(ReportLunData_struct),
2262 0, CTLR_LUNID, TYPE_CMD);
2263
2264 if (return_code == IO_OK)
2265 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2266 else { /* reading number of logical volumes failed */
2267 dev_warn(&h->pdev->dev,
2268 "report logical volume command failed\n");
2269 listlength = 0;
2270 goto freeret;
2271 }
2272
2273 num_luns = listlength / 8; /* 8 bytes per entry */
2274 if (num_luns > CISS_MAX_LUN) {
2275 num_luns = CISS_MAX_LUN;
2276 dev_warn(&h->pdev->dev, "more luns configured"
2277 " on controller than can be handled by"
2278 " this driver.\n");
2279 }
2280
2281 if (num_luns == 0)
2282 cciss_add_controller_node(h);
2283
2284 /* Compare controller drive array to driver's drive array
2285 * to see if any drives are missing on the controller due
2286 * to action of Array Config Utility (user deletes drive)
2287 * and deregister logical drives which have disappeared.
2288 */
2289 for (i = 0; i <= h->highest_lun; i++) {
2290 int j;
2291 drv_found = 0;
2292
2293 /* skip holes in the array from already deleted drives */
2294 if (h->drv[i] == NULL)
2295 continue;
2296
2297 for (j = 0; j < num_luns; j++) {
2298 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2299 if (memcmp(h->drv[i]->LunID, lunid,
2300 sizeof(lunid)) == 0) {
2301 drv_found = 1;
2302 break;
2303 }
2304 }
2305 if (!drv_found) {
2306 /* Deregister it from the OS, it's gone. */
2307 spin_lock_irqsave(&h->lock, flags);
2308 h->drv[i]->busy_configuring = 1;
2309 spin_unlock_irqrestore(&h->lock, flags);
2310 return_code = deregister_disk(h, i, 1, via_ioctl);
2311 if (h->drv[i] != NULL)
2312 h->drv[i]->busy_configuring = 0;
2313 }
2314 }
2315
2316 /* Compare controller drive array to driver's drive array.
2317 * Check for updates in the drive information and any new drives
2318 * on the controller due to ACU adding logical drives, or changing
2319 * a logical drive's size, etc. Reregister any new/changed drives
2320 */
2321 for (i = 0; i < num_luns; i++) {
2322 int j;
2323
2324 drv_found = 0;
2325
2326 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2327 /* Find if the LUN is already in the drive array
2328 * of the driver. If so then update its info
2329 * if not in use. If it does not exist then find
2330 * the first free index and add it.
2331 */
2332 for (j = 0; j <= h->highest_lun; j++) {
2333 if (h->drv[j] != NULL &&
2334 memcmp(h->drv[j]->LunID, lunid,
2335 sizeof(h->drv[j]->LunID)) == 0) {
2336 drv_index = j;
2337 drv_found = 1;
2338 break;
2339 }
2340 }
2341
2342 /* check if the drive was found already in the array */
2343 if (!drv_found) {
2344 drv_index = cciss_add_gendisk(h, lunid, 0);
2345 if (drv_index == -1)
2346 goto freeret;
2347 }
2348 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2349 } /* end for */
2350
2351 freeret:
2352 kfree(ld_buff);
2353 h->busy_configuring = 0;
2354 /* We return -1 here to tell the ACU that we have registered/updated
2355 * all of the drives that we can and to keep it from calling us
2356 * additional times.
2357 */
2358 return -1;
2359 mem_msg:
2360 dev_err(&h->pdev->dev, "out of memory\n");
2361 h->busy_configuring = 0;
2362 goto freeret;
2363 }
2364
2365 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2366 {
2367 /* zero out the disk size info */
2368 drive_info->nr_blocks = 0;
2369 drive_info->block_size = 0;
2370 drive_info->heads = 0;
2371 drive_info->sectors = 0;
2372 drive_info->cylinders = 0;
2373 drive_info->raid_level = -1;
2374 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2375 memset(drive_info->model, 0, sizeof(drive_info->model));
2376 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2377 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2378 /*
2379 * don't clear the LUNID though, we need to remember which
2380 * one this one is.
2381 */
2382 }
2383
2384 /* This function will deregister the disk and it's queue from the
2385 * kernel. It must be called with the controller lock held and the
2386 * drv structures busy_configuring flag set. It's parameters are:
2387 *
2388 * disk = This is the disk to be deregistered
2389 * drv = This is the drive_info_struct associated with the disk to be
2390 * deregistered. It contains information about the disk used
2391 * by the driver.
2392 * clear_all = This flag determines whether or not the disk information
2393 * is going to be completely cleared out and the highest_lun
2394 * reset. Sometimes we want to clear out information about
2395 * the disk in preparation for re-adding it. In this case
2396 * the highest_lun should be left unchanged and the LunID
2397 * should not be cleared.
2398 * via_ioctl
2399 * This indicates whether we've reached this path via ioctl.
2400 * This affects the maximum usage count allowed for c0d0 to be messed with.
2401 * If this path is reached via ioctl(), then the max_usage_count will
2402 * be 1, as the process calling ioctl() has got to have the device open.
2403 * If we get here via sysfs, then the max usage count will be zero.
2404 */
2405 static int deregister_disk(ctlr_info_t *h, int drv_index,
2406 int clear_all, int via_ioctl)
2407 {
2408 int i;
2409 struct gendisk *disk;
2410 drive_info_struct *drv;
2411 int recalculate_highest_lun;
2412
2413 if (!capable(CAP_SYS_RAWIO))
2414 return -EPERM;
2415
2416 drv = h->drv[drv_index];
2417 disk = h->gendisk[drv_index];
2418
2419 /* make sure logical volume is NOT is use */
2420 if (clear_all || (h->gendisk[0] == disk)) {
2421 if (drv->usage_count > via_ioctl)
2422 return -EBUSY;
2423 } else if (drv->usage_count > 0)
2424 return -EBUSY;
2425
2426 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2427
2428 /* invalidate the devices and deregister the disk. If it is disk
2429 * zero do not deregister it but just zero out it's values. This
2430 * allows us to delete disk zero but keep the controller registered.
2431 */
2432 if (h->gendisk[0] != disk) {
2433 struct request_queue *q = disk->queue;
2434 if (disk->flags & GENHD_FL_UP) {
2435 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2436 del_gendisk(disk);
2437 }
2438 if (q)
2439 blk_cleanup_queue(q);
2440 /* If clear_all is set then we are deleting the logical
2441 * drive, not just refreshing its info. For drives
2442 * other than disk 0 we will call put_disk. We do not
2443 * do this for disk 0 as we need it to be able to
2444 * configure the controller.
2445 */
2446 if (clear_all){
2447 /* This isn't pretty, but we need to find the
2448 * disk in our array and NULL our the pointer.
2449 * This is so that we will call alloc_disk if
2450 * this index is used again later.
2451 */
2452 for (i=0; i < CISS_MAX_LUN; i++){
2453 if (h->gendisk[i] == disk) {
2454 h->gendisk[i] = NULL;
2455 break;
2456 }
2457 }
2458 put_disk(disk);
2459 }
2460 } else {
2461 set_capacity(disk, 0);
2462 cciss_clear_drive_info(drv);
2463 }
2464
2465 --h->num_luns;
2466
2467 /* if it was the last disk, find the new hightest lun */
2468 if (clear_all && recalculate_highest_lun) {
2469 int newhighest = -1;
2470 for (i = 0; i <= h->highest_lun; i++) {
2471 /* if the disk has size > 0, it is available */
2472 if (h->drv[i] && h->drv[i]->heads)
2473 newhighest = i;
2474 }
2475 h->highest_lun = newhighest;
2476 }
2477 return 0;
2478 }
2479
2480 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2481 size_t size, __u8 page_code, unsigned char *scsi3addr,
2482 int cmd_type)
2483 {
2484 u64bit buff_dma_handle;
2485 int status = IO_OK;
2486
2487 c->cmd_type = CMD_IOCTL_PEND;
2488 c->Header.ReplyQueue = 0;
2489 if (buff != NULL) {
2490 c->Header.SGList = 1;
2491 c->Header.SGTotal = 1;
2492 } else {
2493 c->Header.SGList = 0;
2494 c->Header.SGTotal = 0;
2495 }
2496 c->Header.Tag.lower = c->busaddr;
2497 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2498
2499 c->Request.Type.Type = cmd_type;
2500 if (cmd_type == TYPE_CMD) {
2501 switch (cmd) {
2502 case CISS_INQUIRY:
2503 /* are we trying to read a vital product page */
2504 if (page_code != 0) {
2505 c->Request.CDB[1] = 0x01;
2506 c->Request.CDB[2] = page_code;
2507 }
2508 c->Request.CDBLen = 6;
2509 c->Request.Type.Attribute = ATTR_SIMPLE;
2510 c->Request.Type.Direction = XFER_READ;
2511 c->Request.Timeout = 0;
2512 c->Request.CDB[0] = CISS_INQUIRY;
2513 c->Request.CDB[4] = size & 0xFF;
2514 break;
2515 case CISS_REPORT_LOG:
2516 case CISS_REPORT_PHYS:
2517 /* Talking to controller so It's a physical command
2518 mode = 00 target = 0. Nothing to write.
2519 */
2520 c->Request.CDBLen = 12;
2521 c->Request.Type.Attribute = ATTR_SIMPLE;
2522 c->Request.Type.Direction = XFER_READ;
2523 c->Request.Timeout = 0;
2524 c->Request.CDB[0] = cmd;
2525 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2526 c->Request.CDB[7] = (size >> 16) & 0xFF;
2527 c->Request.CDB[8] = (size >> 8) & 0xFF;
2528 c->Request.CDB[9] = size & 0xFF;
2529 break;
2530
2531 case CCISS_READ_CAPACITY:
2532 c->Request.CDBLen = 10;
2533 c->Request.Type.Attribute = ATTR_SIMPLE;
2534 c->Request.Type.Direction = XFER_READ;
2535 c->Request.Timeout = 0;
2536 c->Request.CDB[0] = cmd;
2537 break;
2538 case CCISS_READ_CAPACITY_16:
2539 c->Request.CDBLen = 16;
2540 c->Request.Type.Attribute = ATTR_SIMPLE;
2541 c->Request.Type.Direction = XFER_READ;
2542 c->Request.Timeout = 0;
2543 c->Request.CDB[0] = cmd;
2544 c->Request.CDB[1] = 0x10;
2545 c->Request.CDB[10] = (size >> 24) & 0xFF;
2546 c->Request.CDB[11] = (size >> 16) & 0xFF;
2547 c->Request.CDB[12] = (size >> 8) & 0xFF;
2548 c->Request.CDB[13] = size & 0xFF;
2549 c->Request.Timeout = 0;
2550 c->Request.CDB[0] = cmd;
2551 break;
2552 case CCISS_CACHE_FLUSH:
2553 c->Request.CDBLen = 12;
2554 c->Request.Type.Attribute = ATTR_SIMPLE;
2555 c->Request.Type.Direction = XFER_WRITE;
2556 c->Request.Timeout = 0;
2557 c->Request.CDB[0] = BMIC_WRITE;
2558 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2559 break;
2560 case TEST_UNIT_READY:
2561 c->Request.CDBLen = 6;
2562 c->Request.Type.Attribute = ATTR_SIMPLE;
2563 c->Request.Type.Direction = XFER_NONE;
2564 c->Request.Timeout = 0;
2565 break;
2566 default:
2567 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2568 return IO_ERROR;
2569 }
2570 } else if (cmd_type == TYPE_MSG) {
2571 switch (cmd) {
2572 case CCISS_ABORT_MSG:
2573 c->Request.CDBLen = 12;
2574 c->Request.Type.Attribute = ATTR_SIMPLE;
2575 c->Request.Type.Direction = XFER_WRITE;
2576 c->Request.Timeout = 0;
2577 c->Request.CDB[0] = cmd; /* abort */
2578 c->Request.CDB[1] = 0; /* abort a command */
2579 /* buff contains the tag of the command to abort */
2580 memcpy(&c->Request.CDB[4], buff, 8);
2581 break;
2582 case CCISS_RESET_MSG:
2583 c->Request.CDBLen = 16;
2584 c->Request.Type.Attribute = ATTR_SIMPLE;
2585 c->Request.Type.Direction = XFER_NONE;
2586 c->Request.Timeout = 0;
2587 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2588 c->Request.CDB[0] = cmd; /* reset */
2589 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2590 break;
2591 case CCISS_NOOP_MSG:
2592 c->Request.CDBLen = 1;
2593 c->Request.Type.Attribute = ATTR_SIMPLE;
2594 c->Request.Type.Direction = XFER_WRITE;
2595 c->Request.Timeout = 0;
2596 c->Request.CDB[0] = cmd;
2597 break;
2598 default:
2599 dev_warn(&h->pdev->dev,
2600 "unknown message type %d\n", cmd);
2601 return IO_ERROR;
2602 }
2603 } else {
2604 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2605 return IO_ERROR;
2606 }
2607 /* Fill in the scatter gather information */
2608 if (size > 0) {
2609 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2610 buff, size,
2611 PCI_DMA_BIDIRECTIONAL);
2612 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2613 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2614 c->SG[0].Len = size;
2615 c->SG[0].Ext = 0; /* we are not chaining */
2616 }
2617 return status;
2618 }
2619
2620 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2621 {
2622 switch (c->err_info->ScsiStatus) {
2623 case SAM_STAT_GOOD:
2624 return IO_OK;
2625 case SAM_STAT_CHECK_CONDITION:
2626 switch (0xf & c->err_info->SenseInfo[2]) {
2627 case 0: return IO_OK; /* no sense */
2628 case 1: return IO_OK; /* recovered error */
2629 default:
2630 if (check_for_unit_attention(h, c))
2631 return IO_NEEDS_RETRY;
2632 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2633 "check condition, sense key = 0x%02x\n",
2634 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2635 }
2636 break;
2637 default:
2638 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2639 "scsi status = 0x%02x\n",
2640 c->Request.CDB[0], c->err_info->ScsiStatus);
2641 break;
2642 }
2643 return IO_ERROR;
2644 }
2645
2646 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2647 {
2648 int return_status = IO_OK;
2649
2650 if (c->err_info->CommandStatus == CMD_SUCCESS)
2651 return IO_OK;
2652
2653 switch (c->err_info->CommandStatus) {
2654 case CMD_TARGET_STATUS:
2655 return_status = check_target_status(h, c);
2656 break;
2657 case CMD_DATA_UNDERRUN:
2658 case CMD_DATA_OVERRUN:
2659 /* expected for inquiry and report lun commands */
2660 break;
2661 case CMD_INVALID:
2662 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2663 "reported invalid\n", c->Request.CDB[0]);
2664 return_status = IO_ERROR;
2665 break;
2666 case CMD_PROTOCOL_ERR:
2667 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2668 "protocol error\n", c->Request.CDB[0]);
2669 return_status = IO_ERROR;
2670 break;
2671 case CMD_HARDWARE_ERR:
2672 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2673 " hardware error\n", c->Request.CDB[0]);
2674 return_status = IO_ERROR;
2675 break;
2676 case CMD_CONNECTION_LOST:
2677 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2678 "connection lost\n", c->Request.CDB[0]);
2679 return_status = IO_ERROR;
2680 break;
2681 case CMD_ABORTED:
2682 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2683 "aborted\n", c->Request.CDB[0]);
2684 return_status = IO_ERROR;
2685 break;
2686 case CMD_ABORT_FAILED:
2687 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2688 "abort failed\n", c->Request.CDB[0]);
2689 return_status = IO_ERROR;
2690 break;
2691 case CMD_UNSOLICITED_ABORT:
2692 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2693 c->Request.CDB[0]);
2694 return_status = IO_NEEDS_RETRY;
2695 break;
2696 case CMD_UNABORTABLE:
2697 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2698 return_status = IO_ERROR;
2699 break;
2700 default:
2701 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2702 "unknown status %x\n", c->Request.CDB[0],
2703 c->err_info->CommandStatus);
2704 return_status = IO_ERROR;
2705 }
2706 return return_status;
2707 }
2708
2709 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2710 int attempt_retry)
2711 {
2712 DECLARE_COMPLETION_ONSTACK(wait);
2713 u64bit buff_dma_handle;
2714 int return_status = IO_OK;
2715
2716 resend_cmd2:
2717 c->waiting = &wait;
2718 enqueue_cmd_and_start_io(h, c);
2719
2720 wait_for_completion(&wait);
2721
2722 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2723 goto command_done;
2724
2725 return_status = process_sendcmd_error(h, c);
2726
2727 if (return_status == IO_NEEDS_RETRY &&
2728 c->retry_count < MAX_CMD_RETRIES) {
2729 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2730 c->Request.CDB[0]);
2731 c->retry_count++;
2732 /* erase the old error information */
2733 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2734 return_status = IO_OK;
2735 INIT_COMPLETION(wait);
2736 goto resend_cmd2;
2737 }
2738
2739 command_done:
2740 /* unlock the buffers from DMA */
2741 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2742 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2743 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2744 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2745 return return_status;
2746 }
2747
2748 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2749 __u8 page_code, unsigned char scsi3addr[],
2750 int cmd_type)
2751 {
2752 CommandList_struct *c;
2753 int return_status;
2754
2755 c = cmd_special_alloc(h);
2756 if (!c)
2757 return -ENOMEM;
2758 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2759 scsi3addr, cmd_type);
2760 if (return_status == IO_OK)
2761 return_status = sendcmd_withirq_core(h, c, 1);
2762
2763 cmd_special_free(h, c);
2764 return return_status;
2765 }
2766
2767 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2768 sector_t total_size,
2769 unsigned int block_size,
2770 InquiryData_struct *inq_buff,
2771 drive_info_struct *drv)
2772 {
2773 int return_code;
2774 unsigned long t;
2775 unsigned char scsi3addr[8];
2776
2777 memset(inq_buff, 0, sizeof(InquiryData_struct));
2778 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2779 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2780 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2781 if (return_code == IO_OK) {
2782 if (inq_buff->data_byte[8] == 0xFF) {
2783 dev_warn(&h->pdev->dev,
2784 "reading geometry failed, volume "
2785 "does not support reading geometry\n");
2786 drv->heads = 255;
2787 drv->sectors = 32; /* Sectors per track */
2788 drv->cylinders = total_size + 1;
2789 drv->raid_level = RAID_UNKNOWN;
2790 } else {
2791 drv->heads = inq_buff->data_byte[6];
2792 drv->sectors = inq_buff->data_byte[7];
2793 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2794 drv->cylinders += inq_buff->data_byte[5];
2795 drv->raid_level = inq_buff->data_byte[8];
2796 }
2797 drv->block_size = block_size;
2798 drv->nr_blocks = total_size + 1;
2799 t = drv->heads * drv->sectors;
2800 if (t > 1) {
2801 sector_t real_size = total_size + 1;
2802 unsigned long rem = sector_div(real_size, t);
2803 if (rem)
2804 real_size++;
2805 drv->cylinders = real_size;
2806 }
2807 } else { /* Get geometry failed */
2808 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2809 }
2810 }
2811
2812 static void
2813 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2814 unsigned int *block_size)
2815 {
2816 ReadCapdata_struct *buf;
2817 int return_code;
2818 unsigned char scsi3addr[8];
2819
2820 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2821 if (!buf) {
2822 dev_warn(&h->pdev->dev, "out of memory\n");
2823 return;
2824 }
2825
2826 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2827 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2828 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2829 if (return_code == IO_OK) {
2830 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2831 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2832 } else { /* read capacity command failed */
2833 dev_warn(&h->pdev->dev, "read capacity failed\n");
2834 *total_size = 0;
2835 *block_size = BLOCK_SIZE;
2836 }
2837 kfree(buf);
2838 }
2839
2840 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2841 sector_t *total_size, unsigned int *block_size)
2842 {
2843 ReadCapdata_struct_16 *buf;
2844 int return_code;
2845 unsigned char scsi3addr[8];
2846
2847 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2848 if (!buf) {
2849 dev_warn(&h->pdev->dev, "out of memory\n");
2850 return;
2851 }
2852
2853 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2854 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2855 buf, sizeof(ReadCapdata_struct_16),
2856 0, scsi3addr, TYPE_CMD);
2857 if (return_code == IO_OK) {
2858 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2859 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2860 } else { /* read capacity command failed */
2861 dev_warn(&h->pdev->dev, "read capacity failed\n");
2862 *total_size = 0;
2863 *block_size = BLOCK_SIZE;
2864 }
2865 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2866 (unsigned long long)*total_size+1, *block_size);
2867 kfree(buf);
2868 }
2869
2870 static int cciss_revalidate(struct gendisk *disk)
2871 {
2872 ctlr_info_t *h = get_host(disk);
2873 drive_info_struct *drv = get_drv(disk);
2874 int logvol;
2875 int FOUND = 0;
2876 unsigned int block_size;
2877 sector_t total_size;
2878 InquiryData_struct *inq_buff = NULL;
2879
2880 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2881 if (!h->drv[logvol])
2882 continue;
2883 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2884 sizeof(drv->LunID)) == 0) {
2885 FOUND = 1;
2886 break;
2887 }
2888 }
2889
2890 if (!FOUND)
2891 return 1;
2892
2893 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2894 if (inq_buff == NULL) {
2895 dev_warn(&h->pdev->dev, "out of memory\n");
2896 return 1;
2897 }
2898 if (h->cciss_read == CCISS_READ_10) {
2899 cciss_read_capacity(h, logvol,
2900 &total_size, &block_size);
2901 } else {
2902 cciss_read_capacity_16(h, logvol,
2903 &total_size, &block_size);
2904 }
2905 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2906 inq_buff, drv);
2907
2908 blk_queue_logical_block_size(drv->queue, drv->block_size);
2909 set_capacity(disk, drv->nr_blocks);
2910
2911 kfree(inq_buff);
2912 return 0;
2913 }
2914
2915 /*
2916 * Map (physical) PCI mem into (virtual) kernel space
2917 */
2918 static void __iomem *remap_pci_mem(ulong base, ulong size)
2919 {
2920 ulong page_base = ((ulong) base) & PAGE_MASK;
2921 ulong page_offs = ((ulong) base) - page_base;
2922 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2923
2924 return page_remapped ? (page_remapped + page_offs) : NULL;
2925 }
2926
2927 /*
2928 * Takes jobs of the Q and sends them to the hardware, then puts it on
2929 * the Q to wait for completion.
2930 */
2931 static void start_io(ctlr_info_t *h)
2932 {
2933 CommandList_struct *c;
2934
2935 while (!list_empty(&h->reqQ)) {
2936 c = list_entry(h->reqQ.next, CommandList_struct, list);
2937 /* can't do anything if fifo is full */
2938 if ((h->access.fifo_full(h))) {
2939 dev_warn(&h->pdev->dev, "fifo full\n");
2940 break;
2941 }
2942
2943 /* Get the first entry from the Request Q */
2944 removeQ(c);
2945 h->Qdepth--;
2946
2947 /* Tell the controller execute command */
2948 h->access.submit_command(h, c);
2949
2950 /* Put job onto the completed Q */
2951 addQ(&h->cmpQ, c);
2952 }
2953 }
2954
2955 /* Assumes that h->lock is held. */
2956 /* Zeros out the error record and then resends the command back */
2957 /* to the controller */
2958 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
2959 {
2960 /* erase the old error information */
2961 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2962
2963 /* add it to software queue and then send it to the controller */
2964 addQ(&h->reqQ, c);
2965 h->Qdepth++;
2966 if (h->Qdepth > h->maxQsinceinit)
2967 h->maxQsinceinit = h->Qdepth;
2968
2969 start_io(h);
2970 }
2971
2972 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2973 unsigned int msg_byte, unsigned int host_byte,
2974 unsigned int driver_byte)
2975 {
2976 /* inverse of macros in scsi.h */
2977 return (scsi_status_byte & 0xff) |
2978 ((msg_byte & 0xff) << 8) |
2979 ((host_byte & 0xff) << 16) |
2980 ((driver_byte & 0xff) << 24);
2981 }
2982
2983 static inline int evaluate_target_status(ctlr_info_t *h,
2984 CommandList_struct *cmd, int *retry_cmd)
2985 {
2986 unsigned char sense_key;
2987 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2988 int error_value;
2989
2990 *retry_cmd = 0;
2991 /* If we get in here, it means we got "target status", that is, scsi status */
2992 status_byte = cmd->err_info->ScsiStatus;
2993 driver_byte = DRIVER_OK;
2994 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2995
2996 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
2997 host_byte = DID_PASSTHROUGH;
2998 else
2999 host_byte = DID_OK;
3000
3001 error_value = make_status_bytes(status_byte, msg_byte,
3002 host_byte, driver_byte);
3003
3004 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3005 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3006 dev_warn(&h->pdev->dev, "cmd %p "
3007 "has SCSI Status 0x%x\n",
3008 cmd, cmd->err_info->ScsiStatus);
3009 return error_value;
3010 }
3011
3012 /* check the sense key */
3013 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3014 /* no status or recovered error */
3015 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3016 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3017 error_value = 0;
3018
3019 if (check_for_unit_attention(h, cmd)) {
3020 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3021 return 0;
3022 }
3023
3024 /* Not SG_IO or similar? */
3025 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3026 if (error_value != 0)
3027 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3028 " sense key = 0x%x\n", cmd, sense_key);
3029 return error_value;
3030 }
3031
3032 /* SG_IO or similar, copy sense data back */
3033 if (cmd->rq->sense) {
3034 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3035 cmd->rq->sense_len = cmd->err_info->SenseLen;
3036 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3037 cmd->rq->sense_len);
3038 } else
3039 cmd->rq->sense_len = 0;
3040
3041 return error_value;
3042 }
3043
3044 /* checks the status of the job and calls complete buffers to mark all
3045 * buffers for the completed job. Note that this function does not need
3046 * to hold the hba/queue lock.
3047 */
3048 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3049 int timeout)
3050 {
3051 int retry_cmd = 0;
3052 struct request *rq = cmd->rq;
3053
3054 rq->errors = 0;
3055
3056 if (timeout)
3057 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3058
3059 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3060 goto after_error_processing;
3061
3062 switch (cmd->err_info->CommandStatus) {
3063 case CMD_TARGET_STATUS:
3064 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3065 break;
3066 case CMD_DATA_UNDERRUN:
3067 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3068 dev_warn(&h->pdev->dev, "cmd %p has"
3069 " completed with data underrun "
3070 "reported\n", cmd);
3071 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3072 }
3073 break;
3074 case CMD_DATA_OVERRUN:
3075 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3076 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3077 " completed with data overrun "
3078 "reported\n", cmd);
3079 break;
3080 case CMD_INVALID:
3081 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3082 "reported invalid\n", cmd);
3083 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3084 cmd->err_info->CommandStatus, DRIVER_OK,
3085 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3086 DID_PASSTHROUGH : DID_ERROR);
3087 break;
3088 case CMD_PROTOCOL_ERR:
3089 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3090 "protocol error\n", cmd);
3091 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3092 cmd->err_info->CommandStatus, DRIVER_OK,
3093 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3094 DID_PASSTHROUGH : DID_ERROR);
3095 break;
3096 case CMD_HARDWARE_ERR:
3097 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3098 " hardware error\n", cmd);
3099 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3100 cmd->err_info->CommandStatus, DRIVER_OK,
3101 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3102 DID_PASSTHROUGH : DID_ERROR);
3103 break;
3104 case CMD_CONNECTION_LOST:
3105 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3106 "connection lost\n", cmd);
3107 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3108 cmd->err_info->CommandStatus, DRIVER_OK,
3109 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3110 DID_PASSTHROUGH : DID_ERROR);
3111 break;
3112 case CMD_ABORTED:
3113 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3114 "aborted\n", cmd);
3115 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3116 cmd->err_info->CommandStatus, DRIVER_OK,
3117 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3118 DID_PASSTHROUGH : DID_ABORT);
3119 break;
3120 case CMD_ABORT_FAILED:
3121 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3122 "abort failed\n", cmd);
3123 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3124 cmd->err_info->CommandStatus, DRIVER_OK,
3125 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3126 DID_PASSTHROUGH : DID_ERROR);
3127 break;
3128 case CMD_UNSOLICITED_ABORT:
3129 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3130 "abort %p\n", h->ctlr, cmd);
3131 if (cmd->retry_count < MAX_CMD_RETRIES) {
3132 retry_cmd = 1;
3133 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3134 cmd->retry_count++;
3135 } else
3136 dev_warn(&h->pdev->dev,
3137 "%p retried too many times\n", cmd);
3138 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3139 cmd->err_info->CommandStatus, DRIVER_OK,
3140 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3141 DID_PASSTHROUGH : DID_ABORT);
3142 break;
3143 case CMD_TIMEOUT:
3144 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3145 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3146 cmd->err_info->CommandStatus, DRIVER_OK,
3147 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3148 DID_PASSTHROUGH : DID_ERROR);
3149 break;
3150 case CMD_UNABORTABLE:
3151 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3152 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3153 cmd->err_info->CommandStatus, DRIVER_OK,
3154 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3155 DID_PASSTHROUGH : DID_ERROR);
3156 break;
3157 default:
3158 dev_warn(&h->pdev->dev, "cmd %p returned "
3159 "unknown status %x\n", cmd,
3160 cmd->err_info->CommandStatus);
3161 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3162 cmd->err_info->CommandStatus, DRIVER_OK,
3163 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3164 DID_PASSTHROUGH : DID_ERROR);
3165 }
3166
3167 after_error_processing:
3168
3169 /* We need to return this command */
3170 if (retry_cmd) {
3171 resend_cciss_cmd(h, cmd);
3172 return;
3173 }
3174 cmd->rq->completion_data = cmd;
3175 blk_complete_request(cmd->rq);
3176 }
3177
3178 static inline u32 cciss_tag_contains_index(u32 tag)
3179 {
3180 #define DIRECT_LOOKUP_BIT 0x10
3181 return tag & DIRECT_LOOKUP_BIT;
3182 }
3183
3184 static inline u32 cciss_tag_to_index(u32 tag)
3185 {
3186 #define DIRECT_LOOKUP_SHIFT 5
3187 return tag >> DIRECT_LOOKUP_SHIFT;
3188 }
3189
3190 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3191 {
3192 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3193 #define CCISS_SIMPLE_ERROR_BITS 0x03
3194 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3195 return tag & ~CCISS_PERF_ERROR_BITS;
3196 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3197 }
3198
3199 static inline void cciss_mark_tag_indexed(u32 *tag)
3200 {
3201 *tag |= DIRECT_LOOKUP_BIT;
3202 }
3203
3204 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3205 {
3206 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3207 }
3208
3209 /*
3210 * Get a request and submit it to the controller.
3211 */
3212 static void do_cciss_request(struct request_queue *q)
3213 {
3214 ctlr_info_t *h = q->queuedata;
3215 CommandList_struct *c;
3216 sector_t start_blk;
3217 int seg;
3218 struct request *creq;
3219 u64bit temp64;
3220 struct scatterlist *tmp_sg;
3221 SGDescriptor_struct *curr_sg;
3222 drive_info_struct *drv;
3223 int i, dir;
3224 int sg_index = 0;
3225 int chained = 0;
3226
3227 queue:
3228 creq = blk_peek_request(q);
3229 if (!creq)
3230 goto startio;
3231
3232 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3233
3234 c = cmd_alloc(h);
3235 if (!c)
3236 goto full;
3237
3238 blk_start_request(creq);
3239
3240 tmp_sg = h->scatter_list[c->cmdindex];
3241 spin_unlock_irq(q->queue_lock);
3242
3243 c->cmd_type = CMD_RWREQ;
3244 c->rq = creq;
3245
3246 /* fill in the request */
3247 drv = creq->rq_disk->private_data;
3248 c->Header.ReplyQueue = 0; /* unused in simple mode */
3249 /* got command from pool, so use the command block index instead */
3250 /* for direct lookups. */
3251 /* The first 2 bits are reserved for controller error reporting. */
3252 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3253 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3254 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3255 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3256 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3257 c->Request.Type.Attribute = ATTR_SIMPLE;
3258 c->Request.Type.Direction =
3259 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3260 c->Request.Timeout = 0; /* Don't time out */
3261 c->Request.CDB[0] =
3262 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3263 start_blk = blk_rq_pos(creq);
3264 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3265 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3266 sg_init_table(tmp_sg, h->maxsgentries);
3267 seg = blk_rq_map_sg(q, creq, tmp_sg);
3268
3269 /* get the DMA records for the setup */
3270 if (c->Request.Type.Direction == XFER_READ)
3271 dir = PCI_DMA_FROMDEVICE;
3272 else
3273 dir = PCI_DMA_TODEVICE;
3274
3275 curr_sg = c->SG;
3276 sg_index = 0;
3277 chained = 0;
3278
3279 for (i = 0; i < seg; i++) {
3280 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3281 !chained && ((seg - i) > 1)) {
3282 /* Point to next chain block. */
3283 curr_sg = h->cmd_sg_list[c->cmdindex];
3284 sg_index = 0;
3285 chained = 1;
3286 }
3287 curr_sg[sg_index].Len = tmp_sg[i].length;
3288 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3289 tmp_sg[i].offset,
3290 tmp_sg[i].length, dir);
3291 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3292 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3293 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3294 ++sg_index;
3295 }
3296 if (chained)
3297 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3298 (seg - (h->max_cmd_sgentries - 1)) *
3299 sizeof(SGDescriptor_struct));
3300
3301 /* track how many SG entries we are using */
3302 if (seg > h->maxSG)
3303 h->maxSG = seg;
3304
3305 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3306 "chained[%d]\n",
3307 blk_rq_sectors(creq), seg, chained);
3308
3309 c->Header.SGTotal = seg + chained;
3310 if (seg <= h->max_cmd_sgentries)
3311 c->Header.SGList = c->Header.SGTotal;
3312 else
3313 c->Header.SGList = h->max_cmd_sgentries;
3314 set_performant_mode(h, c);
3315
3316 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3317 if(h->cciss_read == CCISS_READ_10) {
3318 c->Request.CDB[1] = 0;
3319 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3320 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3321 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3322 c->Request.CDB[5] = start_blk & 0xff;
3323 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3324 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3325 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3326 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3327 } else {
3328 u32 upper32 = upper_32_bits(start_blk);
3329
3330 c->Request.CDBLen = 16;
3331 c->Request.CDB[1]= 0;
3332 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3333 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3334 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3335 c->Request.CDB[5]= upper32 & 0xff;
3336 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3337 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3338 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3339 c->Request.CDB[9]= start_blk & 0xff;
3340 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3341 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3342 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3343 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3344 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3345 }
3346 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3347 c->Request.CDBLen = creq->cmd_len;
3348 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3349 } else {
3350 dev_warn(&h->pdev->dev, "bad request type %d\n",
3351 creq->cmd_type);
3352 BUG();
3353 }
3354
3355 spin_lock_irq(q->queue_lock);
3356
3357 addQ(&h->reqQ, c);
3358 h->Qdepth++;
3359 if (h->Qdepth > h->maxQsinceinit)
3360 h->maxQsinceinit = h->Qdepth;
3361
3362 goto queue;
3363 full:
3364 blk_stop_queue(q);
3365 startio:
3366 /* We will already have the driver lock here so not need
3367 * to lock it.
3368 */
3369 start_io(h);
3370 }
3371
3372 static inline unsigned long get_next_completion(ctlr_info_t *h)
3373 {
3374 return h->access.command_completed(h);
3375 }
3376
3377 static inline int interrupt_pending(ctlr_info_t *h)
3378 {
3379 return h->access.intr_pending(h);
3380 }
3381
3382 static inline long interrupt_not_for_us(ctlr_info_t *h)
3383 {
3384 return ((h->access.intr_pending(h) == 0) ||
3385 (h->interrupts_enabled == 0));
3386 }
3387
3388 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3389 u32 raw_tag)
3390 {
3391 if (unlikely(tag_index >= h->nr_cmds)) {
3392 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3393 return 1;
3394 }
3395 return 0;
3396 }
3397
3398 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3399 u32 raw_tag)
3400 {
3401 removeQ(c);
3402 if (likely(c->cmd_type == CMD_RWREQ))
3403 complete_command(h, c, 0);
3404 else if (c->cmd_type == CMD_IOCTL_PEND)
3405 complete(c->waiting);
3406 #ifdef CONFIG_CISS_SCSI_TAPE
3407 else if (c->cmd_type == CMD_SCSI)
3408 complete_scsi_command(c, 0, raw_tag);
3409 #endif
3410 }
3411
3412 static inline u32 next_command(ctlr_info_t *h)
3413 {
3414 u32 a;
3415
3416 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3417 return h->access.command_completed(h);
3418
3419 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3420 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3421 (h->reply_pool_head)++;
3422 h->commands_outstanding--;
3423 } else {
3424 a = FIFO_EMPTY;
3425 }
3426 /* Check for wraparound */
3427 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3428 h->reply_pool_head = h->reply_pool;
3429 h->reply_pool_wraparound ^= 1;
3430 }
3431 return a;
3432 }
3433
3434 /* process completion of an indexed ("direct lookup") command */
3435 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3436 {
3437 u32 tag_index;
3438 CommandList_struct *c;
3439
3440 tag_index = cciss_tag_to_index(raw_tag);
3441 if (bad_tag(h, tag_index, raw_tag))
3442 return next_command(h);
3443 c = h->cmd_pool + tag_index;
3444 finish_cmd(h, c, raw_tag);
3445 return next_command(h);
3446 }
3447
3448 /* process completion of a non-indexed command */
3449 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3450 {
3451 CommandList_struct *c = NULL;
3452 __u32 busaddr_masked, tag_masked;
3453
3454 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3455 list_for_each_entry(c, &h->cmpQ, list) {
3456 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3457 if (busaddr_masked == tag_masked) {
3458 finish_cmd(h, c, raw_tag);
3459 return next_command(h);
3460 }
3461 }
3462 bad_tag(h, h->nr_cmds + 1, raw_tag);
3463 return next_command(h);
3464 }
3465
3466 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3467 {
3468 ctlr_info_t *h = dev_id;
3469 unsigned long flags;
3470 u32 raw_tag;
3471
3472 if (interrupt_not_for_us(h))
3473 return IRQ_NONE;
3474 spin_lock_irqsave(&h->lock, flags);
3475 while (interrupt_pending(h)) {
3476 raw_tag = get_next_completion(h);
3477 while (raw_tag != FIFO_EMPTY) {
3478 if (cciss_tag_contains_index(raw_tag))
3479 raw_tag = process_indexed_cmd(h, raw_tag);
3480 else
3481 raw_tag = process_nonindexed_cmd(h, raw_tag);
3482 }
3483 }
3484 spin_unlock_irqrestore(&h->lock, flags);
3485 return IRQ_HANDLED;
3486 }
3487
3488 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3489 * check the interrupt pending register because it is not set.
3490 */
3491 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3492 {
3493 ctlr_info_t *h = dev_id;
3494 unsigned long flags;
3495 u32 raw_tag;
3496
3497 spin_lock_irqsave(&h->lock, flags);
3498 raw_tag = get_next_completion(h);
3499 while (raw_tag != FIFO_EMPTY) {
3500 if (cciss_tag_contains_index(raw_tag))
3501 raw_tag = process_indexed_cmd(h, raw_tag);
3502 else
3503 raw_tag = process_nonindexed_cmd(h, raw_tag);
3504 }
3505 spin_unlock_irqrestore(&h->lock, flags);
3506 return IRQ_HANDLED;
3507 }
3508
3509 /**
3510 * add_to_scan_list() - add controller to rescan queue
3511 * @h: Pointer to the controller.
3512 *
3513 * Adds the controller to the rescan queue if not already on the queue.
3514 *
3515 * returns 1 if added to the queue, 0 if skipped (could be on the
3516 * queue already, or the controller could be initializing or shutting
3517 * down).
3518 **/
3519 static int add_to_scan_list(struct ctlr_info *h)
3520 {
3521 struct ctlr_info *test_h;
3522 int found = 0;
3523 int ret = 0;
3524
3525 if (h->busy_initializing)
3526 return 0;
3527
3528 if (!mutex_trylock(&h->busy_shutting_down))
3529 return 0;
3530
3531 mutex_lock(&scan_mutex);
3532 list_for_each_entry(test_h, &scan_q, scan_list) {
3533 if (test_h == h) {
3534 found = 1;
3535 break;
3536 }
3537 }
3538 if (!found && !h->busy_scanning) {
3539 INIT_COMPLETION(h->scan_wait);
3540 list_add_tail(&h->scan_list, &scan_q);
3541 ret = 1;
3542 }
3543 mutex_unlock(&scan_mutex);
3544 mutex_unlock(&h->busy_shutting_down);
3545
3546 return ret;
3547 }
3548
3549 /**
3550 * remove_from_scan_list() - remove controller from rescan queue
3551 * @h: Pointer to the controller.
3552 *
3553 * Removes the controller from the rescan queue if present. Blocks if
3554 * the controller is currently conducting a rescan. The controller
3555 * can be in one of three states:
3556 * 1. Doesn't need a scan
3557 * 2. On the scan list, but not scanning yet (we remove it)
3558 * 3. Busy scanning (and not on the list). In this case we want to wait for
3559 * the scan to complete to make sure the scanning thread for this
3560 * controller is completely idle.
3561 **/
3562 static void remove_from_scan_list(struct ctlr_info *h)
3563 {
3564 struct ctlr_info *test_h, *tmp_h;
3565
3566 mutex_lock(&scan_mutex);
3567 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3568 if (test_h == h) { /* state 2. */
3569 list_del(&h->scan_list);
3570 complete_all(&h->scan_wait);
3571 mutex_unlock(&scan_mutex);
3572 return;
3573 }
3574 }
3575 if (h->busy_scanning) { /* state 3. */
3576 mutex_unlock(&scan_mutex);
3577 wait_for_completion(&h->scan_wait);
3578 } else { /* state 1, nothing to do. */
3579 mutex_unlock(&scan_mutex);
3580 }
3581 }
3582
3583 /**
3584 * scan_thread() - kernel thread used to rescan controllers
3585 * @data: Ignored.
3586 *
3587 * A kernel thread used scan for drive topology changes on
3588 * controllers. The thread processes only one controller at a time
3589 * using a queue. Controllers are added to the queue using
3590 * add_to_scan_list() and removed from the queue either after done
3591 * processing or using remove_from_scan_list().
3592 *
3593 * returns 0.
3594 **/
3595 static int scan_thread(void *data)
3596 {
3597 struct ctlr_info *h;
3598
3599 while (1) {
3600 set_current_state(TASK_INTERRUPTIBLE);
3601 schedule();
3602 if (kthread_should_stop())
3603 break;
3604
3605 while (1) {
3606 mutex_lock(&scan_mutex);
3607 if (list_empty(&scan_q)) {
3608 mutex_unlock(&scan_mutex);
3609 break;
3610 }
3611
3612 h = list_entry(scan_q.next,
3613 struct ctlr_info,
3614 scan_list);
3615 list_del(&h->scan_list);
3616 h->busy_scanning = 1;
3617 mutex_unlock(&scan_mutex);
3618
3619 rebuild_lun_table(h, 0, 0);
3620 complete_all(&h->scan_wait);
3621 mutex_lock(&scan_mutex);
3622 h->busy_scanning = 0;
3623 mutex_unlock(&scan_mutex);
3624 }
3625 }
3626
3627 return 0;
3628 }
3629
3630 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3631 {
3632 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3633 return 0;
3634
3635 switch (c->err_info->SenseInfo[12]) {
3636 case STATE_CHANGED:
3637 dev_warn(&h->pdev->dev, "a state change "
3638 "detected, command retried\n");
3639 return 1;
3640 break;
3641 case LUN_FAILED:
3642 dev_warn(&h->pdev->dev, "LUN failure "
3643 "detected, action required\n");
3644 return 1;
3645 break;
3646 case REPORT_LUNS_CHANGED:
3647 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3648 /*
3649 * Here, we could call add_to_scan_list and wake up the scan thread,
3650 * except that it's quite likely that we will get more than one
3651 * REPORT_LUNS_CHANGED condition in quick succession, which means
3652 * that those which occur after the first one will likely happen
3653 * *during* the scan_thread's rescan. And the rescan code is not
3654 * robust enough to restart in the middle, undoing what it has already
3655 * done, and it's not clear that it's even possible to do this, since
3656 * part of what it does is notify the block layer, which starts
3657 * doing it's own i/o to read partition tables and so on, and the
3658 * driver doesn't have visibility to know what might need undoing.
3659 * In any event, if possible, it is horribly complicated to get right
3660 * so we just don't do it for now.
3661 *
3662 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3663 */
3664 return 1;
3665 break;
3666 case POWER_OR_RESET:
3667 dev_warn(&h->pdev->dev,
3668 "a power on or device reset detected\n");
3669 return 1;
3670 break;
3671 case UNIT_ATTENTION_CLEARED:
3672 dev_warn(&h->pdev->dev,
3673 "unit attention cleared by another initiator\n");
3674 return 1;
3675 break;
3676 default:
3677 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3678 return 1;
3679 }
3680 }
3681
3682 /*
3683 * We cannot read the structure directly, for portability we must use
3684 * the io functions.
3685 * This is for debug only.
3686 */
3687 static void print_cfg_table(ctlr_info_t *h)
3688 {
3689 int i;
3690 char temp_name[17];
3691 CfgTable_struct *tb = h->cfgtable;
3692
3693 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3694 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3695 for (i = 0; i < 4; i++)
3696 temp_name[i] = readb(&(tb->Signature[i]));
3697 temp_name[4] = '\0';
3698 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3699 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3700 readl(&(tb->SpecValence)));
3701 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3702 readl(&(tb->TransportSupport)));
3703 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3704 readl(&(tb->TransportActive)));
3705 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3706 readl(&(tb->HostWrite.TransportRequest)));
3707 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3708 readl(&(tb->HostWrite.CoalIntDelay)));
3709 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3710 readl(&(tb->HostWrite.CoalIntCount)));
3711 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3712 readl(&(tb->CmdsOutMax)));
3713 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3714 readl(&(tb->BusTypes)));
3715 for (i = 0; i < 16; i++)
3716 temp_name[i] = readb(&(tb->ServerName[i]));
3717 temp_name[16] = '\0';
3718 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3719 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3720 readl(&(tb->HeartBeat)));
3721 }
3722
3723 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3724 {
3725 int i, offset, mem_type, bar_type;
3726 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3727 return 0;
3728 offset = 0;
3729 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3730 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3731 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3732 offset += 4;
3733 else {
3734 mem_type = pci_resource_flags(pdev, i) &
3735 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3736 switch (mem_type) {
3737 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3738 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3739 offset += 4; /* 32 bit */
3740 break;
3741 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3742 offset += 8;
3743 break;
3744 default: /* reserved in PCI 2.2 */
3745 dev_warn(&pdev->dev,
3746 "Base address is invalid\n");
3747 return -1;
3748 break;
3749 }
3750 }
3751 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3752 return i + 1;
3753 }
3754 return -1;
3755 }
3756
3757 /* Fill in bucket_map[], given nsgs (the max number of
3758 * scatter gather elements supported) and bucket[],
3759 * which is an array of 8 integers. The bucket[] array
3760 * contains 8 different DMA transfer sizes (in 16
3761 * byte increments) which the controller uses to fetch
3762 * commands. This function fills in bucket_map[], which
3763 * maps a given number of scatter gather elements to one of
3764 * the 8 DMA transfer sizes. The point of it is to allow the
3765 * controller to only do as much DMA as needed to fetch the
3766 * command, with the DMA transfer size encoded in the lower
3767 * bits of the command address.
3768 */
3769 static void calc_bucket_map(int bucket[], int num_buckets,
3770 int nsgs, int *bucket_map)
3771 {
3772 int i, j, b, size;
3773
3774 /* even a command with 0 SGs requires 4 blocks */
3775 #define MINIMUM_TRANSFER_BLOCKS 4
3776 #define NUM_BUCKETS 8
3777 /* Note, bucket_map must have nsgs+1 entries. */
3778 for (i = 0; i <= nsgs; i++) {
3779 /* Compute size of a command with i SG entries */
3780 size = i + MINIMUM_TRANSFER_BLOCKS;
3781 b = num_buckets; /* Assume the biggest bucket */
3782 /* Find the bucket that is just big enough */
3783 for (j = 0; j < 8; j++) {
3784 if (bucket[j] >= size) {
3785 b = j;
3786 break;
3787 }
3788 }
3789 /* for a command with i SG entries, use bucket b. */
3790 bucket_map[i] = b;
3791 }
3792 }
3793
3794 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3795 {
3796 int i;
3797
3798 /* under certain very rare conditions, this can take awhile.
3799 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3800 * as we enter this code.) */
3801 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3802 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3803 break;
3804 usleep_range(10000, 20000);
3805 }
3806 }
3807
3808 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3809 u32 use_short_tags)
3810 {
3811 /* This is a bit complicated. There are 8 registers on
3812 * the controller which we write to to tell it 8 different
3813 * sizes of commands which there may be. It's a way of
3814 * reducing the DMA done to fetch each command. Encoded into
3815 * each command's tag are 3 bits which communicate to the controller
3816 * which of the eight sizes that command fits within. The size of
3817 * each command depends on how many scatter gather entries there are.
3818 * Each SG entry requires 16 bytes. The eight registers are programmed
3819 * with the number of 16-byte blocks a command of that size requires.
3820 * The smallest command possible requires 5 such 16 byte blocks.
3821 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3822 * blocks. Note, this only extends to the SG entries contained
3823 * within the command block, and does not extend to chained blocks
3824 * of SG elements. bft[] contains the eight values we write to
3825 * the registers. They are not evenly distributed, but have more
3826 * sizes for small commands, and fewer sizes for larger commands.
3827 */
3828 __u32 trans_offset;
3829 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3830 /*
3831 * 5 = 1 s/g entry or 4k
3832 * 6 = 2 s/g entry or 8k
3833 * 8 = 4 s/g entry or 16k
3834 * 10 = 6 s/g entry or 24k
3835 */
3836 unsigned long register_value;
3837 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3838
3839 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3840
3841 /* Controller spec: zero out this buffer. */
3842 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3843 h->reply_pool_head = h->reply_pool;
3844
3845 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3846 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3847 h->blockFetchTable);
3848 writel(bft[0], &h->transtable->BlockFetch0);
3849 writel(bft[1], &h->transtable->BlockFetch1);
3850 writel(bft[2], &h->transtable->BlockFetch2);
3851 writel(bft[3], &h->transtable->BlockFetch3);
3852 writel(bft[4], &h->transtable->BlockFetch4);
3853 writel(bft[5], &h->transtable->BlockFetch5);
3854 writel(bft[6], &h->transtable->BlockFetch6);
3855 writel(bft[7], &h->transtable->BlockFetch7);
3856
3857 /* size of controller ring buffer */
3858 writel(h->max_commands, &h->transtable->RepQSize);
3859 writel(1, &h->transtable->RepQCount);
3860 writel(0, &h->transtable->RepQCtrAddrLow32);
3861 writel(0, &h->transtable->RepQCtrAddrHigh32);
3862 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3863 writel(0, &h->transtable->RepQAddr0High32);
3864 writel(CFGTBL_Trans_Performant | use_short_tags,
3865 &(h->cfgtable->HostWrite.TransportRequest));
3866
3867 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3868 cciss_wait_for_mode_change_ack(h);
3869 register_value = readl(&(h->cfgtable->TransportActive));
3870 if (!(register_value & CFGTBL_Trans_Performant))
3871 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3872 " performant mode\n");
3873 }
3874
3875 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3876 {
3877 __u32 trans_support;
3878
3879 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3880 /* Attempt to put controller into performant mode if supported */
3881 /* Does board support performant mode? */
3882 trans_support = readl(&(h->cfgtable->TransportSupport));
3883 if (!(trans_support & PERFORMANT_MODE))
3884 return;
3885
3886 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3887 /* Performant mode demands commands on a 32 byte boundary
3888 * pci_alloc_consistent aligns on page boundarys already.
3889 * Just need to check if divisible by 32
3890 */
3891 if ((sizeof(CommandList_struct) % 32) != 0) {
3892 dev_warn(&h->pdev->dev, "%s %d %s\n",
3893 "cciss info: command size[",
3894 (int)sizeof(CommandList_struct),
3895 "] not divisible by 32, no performant mode..\n");
3896 return;
3897 }
3898
3899 /* Performant mode ring buffer and supporting data structures */
3900 h->reply_pool = (__u64 *)pci_alloc_consistent(
3901 h->pdev, h->max_commands * sizeof(__u64),
3902 &(h->reply_pool_dhandle));
3903
3904 /* Need a block fetch table for performant mode */
3905 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3906 sizeof(__u32)), GFP_KERNEL);
3907
3908 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3909 goto clean_up;
3910
3911 cciss_enter_performant_mode(h,
3912 trans_support & CFGTBL_Trans_use_short_tags);
3913
3914 /* Change the access methods to the performant access methods */
3915 h->access = SA5_performant_access;
3916 h->transMethod = CFGTBL_Trans_Performant;
3917
3918 return;
3919 clean_up:
3920 kfree(h->blockFetchTable);
3921 if (h->reply_pool)
3922 pci_free_consistent(h->pdev,
3923 h->max_commands * sizeof(__u64),
3924 h->reply_pool,
3925 h->reply_pool_dhandle);
3926 return;
3927
3928 } /* cciss_put_controller_into_performant_mode */
3929
3930 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3931 * controllers that are capable. If not, we use IO-APIC mode.
3932 */
3933
3934 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
3935 {
3936 #ifdef CONFIG_PCI_MSI
3937 int err;
3938 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3939 {0, 2}, {0, 3}
3940 };
3941
3942 /* Some boards advertise MSI but don't really support it */
3943 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3944 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3945 goto default_int_mode;
3946
3947 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3948 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
3949 if (!err) {
3950 h->intr[0] = cciss_msix_entries[0].vector;
3951 h->intr[1] = cciss_msix_entries[1].vector;
3952 h->intr[2] = cciss_msix_entries[2].vector;
3953 h->intr[3] = cciss_msix_entries[3].vector;
3954 h->msix_vector = 1;
3955 return;
3956 }
3957 if (err > 0) {
3958 dev_warn(&h->pdev->dev,
3959 "only %d MSI-X vectors available\n", err);
3960 goto default_int_mode;
3961 } else {
3962 dev_warn(&h->pdev->dev,
3963 "MSI-X init failed %d\n", err);
3964 goto default_int_mode;
3965 }
3966 }
3967 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3968 if (!pci_enable_msi(h->pdev))
3969 h->msi_vector = 1;
3970 else
3971 dev_warn(&h->pdev->dev, "MSI init failed\n");
3972 }
3973 default_int_mode:
3974 #endif /* CONFIG_PCI_MSI */
3975 /* if we get here we're going to use the default interrupt mode */
3976 h->intr[PERF_MODE_INT] = h->pdev->irq;
3977 return;
3978 }
3979
3980 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3981 {
3982 int i;
3983 u32 subsystem_vendor_id, subsystem_device_id;
3984
3985 subsystem_vendor_id = pdev->subsystem_vendor;
3986 subsystem_device_id = pdev->subsystem_device;
3987 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3988 subsystem_vendor_id;
3989
3990 for (i = 0; i < ARRAY_SIZE(products); i++)
3991 if (*board_id == products[i].board_id)
3992 return i;
3993 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3994 *board_id);
3995 return -ENODEV;
3996 }
3997
3998 static inline bool cciss_board_disabled(ctlr_info_t *h)
3999 {
4000 u16 command;
4001
4002 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4003 return ((command & PCI_COMMAND_MEMORY) == 0);
4004 }
4005
4006 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4007 unsigned long *memory_bar)
4008 {
4009 int i;
4010
4011 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4012 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4013 /* addressing mode bits already removed */
4014 *memory_bar = pci_resource_start(pdev, i);
4015 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4016 *memory_bar);
4017 return 0;
4018 }
4019 dev_warn(&pdev->dev, "no memory BAR found\n");
4020 return -ENODEV;
4021 }
4022
4023 static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4024 void __iomem *vaddr, int wait_for_ready)
4025 #define BOARD_READY 1
4026 #define BOARD_NOT_READY 0
4027 {
4028 int i, iterations;
4029 u32 scratchpad;
4030
4031 if (wait_for_ready)
4032 iterations = CCISS_BOARD_READY_ITERATIONS;
4033 else
4034 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4035
4036 for (i = 0; i < iterations; i++) {
4037 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4038 if (wait_for_ready) {
4039 if (scratchpad == CCISS_FIRMWARE_READY)
4040 return 0;
4041 } else {
4042 if (scratchpad != CCISS_FIRMWARE_READY)
4043 return 0;
4044 }
4045 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4046 }
4047 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4048 return -ENODEV;
4049 }
4050
4051 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4052 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4053 u64 *cfg_offset)
4054 {
4055 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4056 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4057 *cfg_base_addr &= (u32) 0x0000ffff;
4058 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4059 if (*cfg_base_addr_index == -1) {
4060 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4061 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4062 return -ENODEV;
4063 }
4064 return 0;
4065 }
4066
4067 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4068 {
4069 u64 cfg_offset;
4070 u32 cfg_base_addr;
4071 u64 cfg_base_addr_index;
4072 u32 trans_offset;
4073 int rc;
4074
4075 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4076 &cfg_base_addr_index, &cfg_offset);
4077 if (rc)
4078 return rc;
4079 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4080 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4081 if (!h->cfgtable)
4082 return -ENOMEM;
4083 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4084 if (rc)
4085 return rc;
4086 /* Find performant mode table. */
4087 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4088 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4089 cfg_base_addr_index)+cfg_offset+trans_offset,
4090 sizeof(*h->transtable));
4091 if (!h->transtable)
4092 return -ENOMEM;
4093 return 0;
4094 }
4095
4096 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4097 {
4098 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4099
4100 /* Limit commands in memory limited kdump scenario. */
4101 if (reset_devices && h->max_commands > 32)
4102 h->max_commands = 32;
4103
4104 if (h->max_commands < 16) {
4105 dev_warn(&h->pdev->dev, "Controller reports "
4106 "max supported commands of %d, an obvious lie. "
4107 "Using 16. Ensure that firmware is up to date.\n",
4108 h->max_commands);
4109 h->max_commands = 16;
4110 }
4111 }
4112
4113 /* Interrogate the hardware for some limits:
4114 * max commands, max SG elements without chaining, and with chaining,
4115 * SG chain block size, etc.
4116 */
4117 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4118 {
4119 cciss_get_max_perf_mode_cmds(h);
4120 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4121 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4122 /*
4123 * Limit in-command s/g elements to 32 save dma'able memory.
4124 * Howvever spec says if 0, use 31
4125 */
4126 h->max_cmd_sgentries = 31;
4127 if (h->maxsgentries > 512) {
4128 h->max_cmd_sgentries = 32;
4129 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4130 h->maxsgentries--; /* save one for chain pointer */
4131 } else {
4132 h->maxsgentries = 31; /* default to traditional values */
4133 h->chainsize = 0;
4134 }
4135 }
4136
4137 static inline bool CISS_signature_present(ctlr_info_t *h)
4138 {
4139 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4140 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4141 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4142 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4143 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4144 return false;
4145 }
4146 return true;
4147 }
4148
4149 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4150 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4151 {
4152 #ifdef CONFIG_X86
4153 u32 prefetch;
4154
4155 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4156 prefetch |= 0x100;
4157 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4158 #endif
4159 }
4160
4161 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4162 * in a prefetch beyond physical memory.
4163 */
4164 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4165 {
4166 u32 dma_prefetch;
4167 __u32 dma_refetch;
4168
4169 if (h->board_id != 0x3225103C)
4170 return;
4171 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4172 dma_prefetch |= 0x8000;
4173 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4174 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4175 dma_refetch |= 0x1;
4176 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4177 }
4178
4179 static int __devinit cciss_pci_init(ctlr_info_t *h)
4180 {
4181 int prod_index, err;
4182
4183 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4184 if (prod_index < 0)
4185 return -ENODEV;
4186 h->product_name = products[prod_index].product_name;
4187 h->access = *(products[prod_index].access);
4188
4189 if (cciss_board_disabled(h)) {
4190 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4191 return -ENODEV;
4192 }
4193 err = pci_enable_device(h->pdev);
4194 if (err) {
4195 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4196 return err;
4197 }
4198
4199 err = pci_request_regions(h->pdev, "cciss");
4200 if (err) {
4201 dev_warn(&h->pdev->dev,
4202 "Cannot obtain PCI resources, aborting\n");
4203 return err;
4204 }
4205
4206 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4207 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4208
4209 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4210 * else we use the IO-APIC interrupt assigned to us by system ROM.
4211 */
4212 cciss_interrupt_mode(h);
4213 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4214 if (err)
4215 goto err_out_free_res;
4216 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4217 if (!h->vaddr) {
4218 err = -ENOMEM;
4219 goto err_out_free_res;
4220 }
4221 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4222 if (err)
4223 goto err_out_free_res;
4224 err = cciss_find_cfgtables(h);
4225 if (err)
4226 goto err_out_free_res;
4227 print_cfg_table(h);
4228 cciss_find_board_params(h);
4229
4230 if (!CISS_signature_present(h)) {
4231 err = -ENODEV;
4232 goto err_out_free_res;
4233 }
4234 cciss_enable_scsi_prefetch(h);
4235 cciss_p600_dma_prefetch_quirk(h);
4236 cciss_put_controller_into_performant_mode(h);
4237 return 0;
4238
4239 err_out_free_res:
4240 /*
4241 * Deliberately omit pci_disable_device(): it does something nasty to
4242 * Smart Array controllers that pci_enable_device does not undo
4243 */
4244 if (h->transtable)
4245 iounmap(h->transtable);
4246 if (h->cfgtable)
4247 iounmap(h->cfgtable);
4248 if (h->vaddr)
4249 iounmap(h->vaddr);
4250 pci_release_regions(h->pdev);
4251 return err;
4252 }
4253
4254 /* Function to find the first free pointer into our hba[] array
4255 * Returns -1 if no free entries are left.
4256 */
4257 static int alloc_cciss_hba(struct pci_dev *pdev)
4258 {
4259 int i;
4260
4261 for (i = 0; i < MAX_CTLR; i++) {
4262 if (!hba[i]) {
4263 ctlr_info_t *h;
4264
4265 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4266 if (!h)
4267 goto Enomem;
4268 hba[i] = h;
4269 return i;
4270 }
4271 }
4272 dev_warn(&pdev->dev, "This driver supports a maximum"
4273 " of %d controllers.\n", MAX_CTLR);
4274 return -1;
4275 Enomem:
4276 dev_warn(&pdev->dev, "out of memory.\n");
4277 return -1;
4278 }
4279
4280 static void free_hba(ctlr_info_t *h)
4281 {
4282 int i;
4283
4284 hba[h->ctlr] = NULL;
4285 for (i = 0; i < h->highest_lun + 1; i++)
4286 if (h->gendisk[i] != NULL)
4287 put_disk(h->gendisk[i]);
4288 kfree(h);
4289 }
4290
4291 /* Send a message CDB to the firmware. */
4292 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4293 {
4294 typedef struct {
4295 CommandListHeader_struct CommandHeader;
4296 RequestBlock_struct Request;
4297 ErrDescriptor_struct ErrorDescriptor;
4298 } Command;
4299 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4300 Command *cmd;
4301 dma_addr_t paddr64;
4302 uint32_t paddr32, tag;
4303 void __iomem *vaddr;
4304 int i, err;
4305
4306 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4307 if (vaddr == NULL)
4308 return -ENOMEM;
4309
4310 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4311 CCISS commands, so they must be allocated from the lower 4GiB of
4312 memory. */
4313 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4314 if (err) {
4315 iounmap(vaddr);
4316 return -ENOMEM;
4317 }
4318
4319 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4320 if (cmd == NULL) {
4321 iounmap(vaddr);
4322 return -ENOMEM;
4323 }
4324
4325 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4326 although there's no guarantee, we assume that the address is at
4327 least 4-byte aligned (most likely, it's page-aligned). */
4328 paddr32 = paddr64;
4329
4330 cmd->CommandHeader.ReplyQueue = 0;
4331 cmd->CommandHeader.SGList = 0;
4332 cmd->CommandHeader.SGTotal = 0;
4333 cmd->CommandHeader.Tag.lower = paddr32;
4334 cmd->CommandHeader.Tag.upper = 0;
4335 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4336
4337 cmd->Request.CDBLen = 16;
4338 cmd->Request.Type.Type = TYPE_MSG;
4339 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4340 cmd->Request.Type.Direction = XFER_NONE;
4341 cmd->Request.Timeout = 0; /* Don't time out */
4342 cmd->Request.CDB[0] = opcode;
4343 cmd->Request.CDB[1] = type;
4344 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4345
4346 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4347 cmd->ErrorDescriptor.Addr.upper = 0;
4348 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4349
4350 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4351
4352 for (i = 0; i < 10; i++) {
4353 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4354 if ((tag & ~3) == paddr32)
4355 break;
4356 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4357 }
4358
4359 iounmap(vaddr);
4360
4361 /* we leak the DMA buffer here ... no choice since the controller could
4362 still complete the command. */
4363 if (i == 10) {
4364 dev_err(&pdev->dev,
4365 "controller message %02x:%02x timed out\n",
4366 opcode, type);
4367 return -ETIMEDOUT;
4368 }
4369
4370 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4371
4372 if (tag & 2) {
4373 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4374 opcode, type);
4375 return -EIO;
4376 }
4377
4378 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4379 opcode, type);
4380 return 0;
4381 }
4382
4383 #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4384 #define cciss_noop(p) cciss_message(p, 3, 0)
4385
4386 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4387 void * __iomem vaddr, u32 use_doorbell)
4388 {
4389 u16 pmcsr;
4390 int pos;
4391
4392 if (use_doorbell) {
4393 /* For everything after the P600, the PCI power state method
4394 * of resetting the controller doesn't work, so we have this
4395 * other way using the doorbell register.
4396 */
4397 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4398 writel(use_doorbell, vaddr + SA5_DOORBELL);
4399 msleep(1000);
4400 } else { /* Try to do it the PCI power state way */
4401
4402 /* Quoting from the Open CISS Specification: "The Power
4403 * Management Control/Status Register (CSR) controls the power
4404 * state of the device. The normal operating state is D0,
4405 * CSR=00h. The software off state is D3, CSR=03h. To reset
4406 * the controller, place the interface device in D3 then to D0,
4407 * this causes a secondary PCI reset which will reset the
4408 * controller." */
4409
4410 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4411 if (pos == 0) {
4412 dev_err(&pdev->dev,
4413 "cciss_controller_hard_reset: "
4414 "PCI PM not supported\n");
4415 return -ENODEV;
4416 }
4417 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4418 /* enter the D3hot power management state */
4419 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4420 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4421 pmcsr |= PCI_D3hot;
4422 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4423
4424 msleep(500);
4425
4426 /* enter the D0 power management state */
4427 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4428 pmcsr |= PCI_D0;
4429 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4430
4431 msleep(500);
4432 }
4433 return 0;
4434 }
4435
4436 static __devinit void init_driver_version(char *driver_version, int len)
4437 {
4438 memset(driver_version, 0, len);
4439 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4440 }
4441
4442 static __devinit int write_driver_ver_to_cfgtable(
4443 CfgTable_struct __iomem *cfgtable)
4444 {
4445 char *driver_version;
4446 int i, size = sizeof(cfgtable->driver_version);
4447
4448 driver_version = kmalloc(size, GFP_KERNEL);
4449 if (!driver_version)
4450 return -ENOMEM;
4451
4452 init_driver_version(driver_version, size);
4453 for (i = 0; i < size; i++)
4454 writeb(driver_version[i], &cfgtable->driver_version[i]);
4455 kfree(driver_version);
4456 return 0;
4457 }
4458
4459 static __devinit void read_driver_ver_from_cfgtable(
4460 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4461 {
4462 int i;
4463
4464 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4465 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4466 }
4467
4468 static __devinit int controller_reset_failed(
4469 CfgTable_struct __iomem *cfgtable)
4470 {
4471
4472 char *driver_ver, *old_driver_ver;
4473 int rc, size = sizeof(cfgtable->driver_version);
4474
4475 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4476 if (!old_driver_ver)
4477 return -ENOMEM;
4478 driver_ver = old_driver_ver + size;
4479
4480 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4481 * should have been changed, otherwise we know the reset failed.
4482 */
4483 init_driver_version(old_driver_ver, size);
4484 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4485 rc = !memcmp(driver_ver, old_driver_ver, size);
4486 kfree(old_driver_ver);
4487 return rc;
4488 }
4489
4490 /* This does a hard reset of the controller using PCI power management
4491 * states or using the doorbell register. */
4492 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4493 {
4494 u64 cfg_offset;
4495 u32 cfg_base_addr;
4496 u64 cfg_base_addr_index;
4497 void __iomem *vaddr;
4498 unsigned long paddr;
4499 u32 misc_fw_support;
4500 int rc;
4501 CfgTable_struct __iomem *cfgtable;
4502 u32 use_doorbell;
4503 u32 board_id;
4504 u16 command_register;
4505
4506 /* For controllers as old a the p600, this is very nearly
4507 * the same thing as
4508 *
4509 * pci_save_state(pci_dev);
4510 * pci_set_power_state(pci_dev, PCI_D3hot);
4511 * pci_set_power_state(pci_dev, PCI_D0);
4512 * pci_restore_state(pci_dev);
4513 *
4514 * For controllers newer than the P600, the pci power state
4515 * method of resetting doesn't work so we have another way
4516 * using the doorbell register.
4517 */
4518
4519 /* Exclude 640x boards. These are two pci devices in one slot
4520 * which share a battery backed cache module. One controls the
4521 * cache, the other accesses the cache through the one that controls
4522 * it. If we reset the one controlling the cache, the other will
4523 * likely not be happy. Just forbid resetting this conjoined mess.
4524 */
4525 cciss_lookup_board_id(pdev, &board_id);
4526 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4527 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4528 "due to shared cache module.");
4529 return -ENODEV;
4530 }
4531
4532 /* Save the PCI command register */
4533 pci_read_config_word(pdev, 4, &command_register);
4534 /* Turn the board off. This is so that later pci_restore_state()
4535 * won't turn the board on before the rest of config space is ready.
4536 */
4537 pci_disable_device(pdev);
4538 pci_save_state(pdev);
4539
4540 /* find the first memory BAR, so we can find the cfg table */
4541 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4542 if (rc)
4543 return rc;
4544 vaddr = remap_pci_mem(paddr, 0x250);
4545 if (!vaddr)
4546 return -ENOMEM;
4547
4548 /* find cfgtable in order to check if reset via doorbell is supported */
4549 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4550 &cfg_base_addr_index, &cfg_offset);
4551 if (rc)
4552 goto unmap_vaddr;
4553 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4554 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4555 if (!cfgtable) {
4556 rc = -ENOMEM;
4557 goto unmap_vaddr;
4558 }
4559 rc = write_driver_ver_to_cfgtable(cfgtable);
4560 if (rc)
4561 goto unmap_vaddr;
4562
4563 /* If reset via doorbell register is supported, use that.
4564 * There are two such methods. Favor the newest method.
4565 */
4566 misc_fw_support = readl(&cfgtable->misc_fw_support);
4567 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4568 if (use_doorbell) {
4569 use_doorbell = DOORBELL_CTLR_RESET2;
4570 } else {
4571 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4572 if (use_doorbell)
4573 use_doorbell = DOORBELL_CTLR_RESET;
4574 }
4575
4576 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4577 if (rc)
4578 goto unmap_cfgtable;
4579 pci_restore_state(pdev);
4580 rc = pci_enable_device(pdev);
4581 if (rc) {
4582 dev_warn(&pdev->dev, "failed to enable device.\n");
4583 goto unmap_cfgtable;
4584 }
4585 pci_write_config_word(pdev, 4, command_register);
4586
4587 /* Some devices (notably the HP Smart Array 5i Controller)
4588 need a little pause here */
4589 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4590
4591 /* Wait for board to become not ready, then ready. */
4592 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4593 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4594 if (rc) /* Don't bail, might be E500, etc. which can't be reset */
4595 dev_warn(&pdev->dev,
4596 "failed waiting for board to reset\n");
4597 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4598 if (rc) {
4599 dev_warn(&pdev->dev,
4600 "failed waiting for board to become ready\n");
4601 goto unmap_cfgtable;
4602 }
4603
4604 rc = controller_reset_failed(vaddr);
4605 if (rc < 0)
4606 goto unmap_cfgtable;
4607 if (rc) {
4608 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4609 " Ignoring controller.\n");
4610 rc = -ENODEV;
4611 goto unmap_cfgtable;
4612 } else {
4613 dev_info(&pdev->dev, "board ready.\n");
4614 }
4615
4616 dev_info(&pdev->dev, "board ready.\n");
4617
4618 unmap_cfgtable:
4619 iounmap(cfgtable);
4620
4621 unmap_vaddr:
4622 iounmap(vaddr);
4623 return rc;
4624 }
4625
4626 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4627 {
4628 int rc, i;
4629
4630 if (!reset_devices)
4631 return 0;
4632
4633 /* Reset the controller with a PCI power-cycle or via doorbell */
4634 rc = cciss_kdump_hard_reset_controller(pdev);
4635
4636 /* -ENOTSUPP here means we cannot reset the controller
4637 * but it's already (and still) up and running in
4638 * "performant mode". Or, it might be 640x, which can't reset
4639 * due to concerns about shared bbwc between 6402/6404 pair.
4640 */
4641 if (rc == -ENOTSUPP)
4642 return 0; /* just try to do the kdump anyhow. */
4643 if (rc)
4644 return -ENODEV;
4645
4646 /* Now try to get the controller to respond to a no-op */
4647 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4648 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4649 if (cciss_noop(pdev) == 0)
4650 break;
4651 else
4652 dev_warn(&pdev->dev, "no-op failed%s\n",
4653 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4654 "; re-trying" : ""));
4655 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4656 }
4657 return 0;
4658 }
4659
4660 static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4661 {
4662 h->cmd_pool_bits = kmalloc(
4663 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4664 sizeof(unsigned long), GFP_KERNEL);
4665 h->cmd_pool = pci_alloc_consistent(h->pdev,
4666 h->nr_cmds * sizeof(CommandList_struct),
4667 &(h->cmd_pool_dhandle));
4668 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4669 h->nr_cmds * sizeof(ErrorInfo_struct),
4670 &(h->errinfo_pool_dhandle));
4671 if ((h->cmd_pool_bits == NULL)
4672 || (h->cmd_pool == NULL)
4673 || (h->errinfo_pool == NULL)) {
4674 dev_err(&h->pdev->dev, "out of memory");
4675 return -ENOMEM;
4676 }
4677 return 0;
4678 }
4679
4680 static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4681 {
4682 int i;
4683
4684 /* zero it, so that on free we need not know how many were alloc'ed */
4685 h->scatter_list = kzalloc(h->max_commands *
4686 sizeof(struct scatterlist *), GFP_KERNEL);
4687 if (!h->scatter_list)
4688 return -ENOMEM;
4689
4690 for (i = 0; i < h->nr_cmds; i++) {
4691 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4692 h->maxsgentries, GFP_KERNEL);
4693 if (h->scatter_list[i] == NULL) {
4694 dev_err(&h->pdev->dev, "could not allocate "
4695 "s/g lists\n");
4696 return -ENOMEM;
4697 }
4698 }
4699 return 0;
4700 }
4701
4702 static void cciss_free_scatterlists(ctlr_info_t *h)
4703 {
4704 int i;
4705
4706 if (h->scatter_list) {
4707 for (i = 0; i < h->nr_cmds; i++)
4708 kfree(h->scatter_list[i]);
4709 kfree(h->scatter_list);
4710 }
4711 }
4712
4713 static void cciss_free_cmd_pool(ctlr_info_t *h)
4714 {
4715 kfree(h->cmd_pool_bits);
4716 if (h->cmd_pool)
4717 pci_free_consistent(h->pdev,
4718 h->nr_cmds * sizeof(CommandList_struct),
4719 h->cmd_pool, h->cmd_pool_dhandle);
4720 if (h->errinfo_pool)
4721 pci_free_consistent(h->pdev,
4722 h->nr_cmds * sizeof(ErrorInfo_struct),
4723 h->errinfo_pool, h->errinfo_pool_dhandle);
4724 }
4725
4726 static int cciss_request_irq(ctlr_info_t *h,
4727 irqreturn_t (*msixhandler)(int, void *),
4728 irqreturn_t (*intxhandler)(int, void *))
4729 {
4730 if (h->msix_vector || h->msi_vector) {
4731 if (!request_irq(h->intr[PERF_MODE_INT], msixhandler,
4732 IRQF_DISABLED, h->devname, h))
4733 return 0;
4734 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4735 " for %s\n", h->intr[PERF_MODE_INT],
4736 h->devname);
4737 return -1;
4738 }
4739
4740 if (!request_irq(h->intr[PERF_MODE_INT], intxhandler,
4741 IRQF_DISABLED, h->devname, h))
4742 return 0;
4743 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4744 h->intr[PERF_MODE_INT], h->devname);
4745 return -1;
4746 }
4747
4748 /*
4749 * This is it. Find all the controllers and register them. I really hate
4750 * stealing all these major device numbers.
4751 * returns the number of block devices registered.
4752 */
4753 static int __devinit cciss_init_one(struct pci_dev *pdev,
4754 const struct pci_device_id *ent)
4755 {
4756 int i;
4757 int j = 0;
4758 int rc;
4759 int dac, return_code;
4760 InquiryData_struct *inq_buff;
4761 ctlr_info_t *h;
4762
4763 rc = cciss_init_reset_devices(pdev);
4764 if (rc)
4765 return rc;
4766 i = alloc_cciss_hba(pdev);
4767 if (i < 0)
4768 return -1;
4769
4770 h = hba[i];
4771 h->pdev = pdev;
4772 h->busy_initializing = 1;
4773 INIT_LIST_HEAD(&h->cmpQ);
4774 INIT_LIST_HEAD(&h->reqQ);
4775 mutex_init(&h->busy_shutting_down);
4776
4777 if (cciss_pci_init(h) != 0)
4778 goto clean_no_release_regions;
4779
4780 sprintf(h->devname, "cciss%d", i);
4781 h->ctlr = i;
4782
4783 init_completion(&h->scan_wait);
4784
4785 if (cciss_create_hba_sysfs_entry(h))
4786 goto clean0;
4787
4788 /* configure PCI DMA stuff */
4789 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4790 dac = 1;
4791 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4792 dac = 0;
4793 else {
4794 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4795 goto clean1;
4796 }
4797
4798 /*
4799 * register with the major number, or get a dynamic major number
4800 * by passing 0 as argument. This is done for greater than
4801 * 8 controller support.
4802 */
4803 if (i < MAX_CTLR_ORIG)
4804 h->major = COMPAQ_CISS_MAJOR + i;
4805 rc = register_blkdev(h->major, h->devname);
4806 if (rc == -EBUSY || rc == -EINVAL) {
4807 dev_err(&h->pdev->dev,
4808 "Unable to get major number %d for %s "
4809 "on hba %d\n", h->major, h->devname, i);
4810 goto clean1;
4811 } else {
4812 if (i >= MAX_CTLR_ORIG)
4813 h->major = rc;
4814 }
4815
4816 /* make sure the board interrupts are off */
4817 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4818 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
4819 if (rc)
4820 goto clean2;
4821
4822 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
4823 h->devname, pdev->device, pci_name(pdev),
4824 h->intr[PERF_MODE_INT], dac ? "" : " not");
4825
4826 if (cciss_allocate_cmd_pool(h))
4827 goto clean4;
4828
4829 if (cciss_allocate_scatterlists(h))
4830 goto clean4;
4831
4832 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4833 h->chainsize, h->nr_cmds);
4834 if (!h->cmd_sg_list && h->chainsize > 0)
4835 goto clean4;
4836
4837 spin_lock_init(&h->lock);
4838
4839 /* Initialize the pdev driver private data.
4840 have it point to h. */
4841 pci_set_drvdata(pdev, h);
4842 /* command and error info recs zeroed out before
4843 they are used */
4844 memset(h->cmd_pool_bits, 0,
4845 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4846 * sizeof(unsigned long));
4847
4848 h->num_luns = 0;
4849 h->highest_lun = -1;
4850 for (j = 0; j < CISS_MAX_LUN; j++) {
4851 h->drv[j] = NULL;
4852 h->gendisk[j] = NULL;
4853 }
4854
4855 cciss_scsi_setup(h);
4856
4857 /* Turn the interrupts on so we can service requests */
4858 h->access.set_intr_mask(h, CCISS_INTR_ON);
4859
4860 /* Get the firmware version */
4861 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4862 if (inq_buff == NULL) {
4863 dev_err(&h->pdev->dev, "out of memory\n");
4864 goto clean4;
4865 }
4866
4867 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
4868 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
4869 if (return_code == IO_OK) {
4870 h->firm_ver[0] = inq_buff->data_byte[32];
4871 h->firm_ver[1] = inq_buff->data_byte[33];
4872 h->firm_ver[2] = inq_buff->data_byte[34];
4873 h->firm_ver[3] = inq_buff->data_byte[35];
4874 } else { /* send command failed */
4875 dev_warn(&h->pdev->dev, "unable to determine firmware"
4876 " version of controller\n");
4877 }
4878 kfree(inq_buff);
4879
4880 cciss_procinit(h);
4881
4882 h->cciss_max_sectors = 8192;
4883
4884 rebuild_lun_table(h, 1, 0);
4885 h->busy_initializing = 0;
4886 return 1;
4887
4888 clean4:
4889 cciss_free_cmd_pool(h);
4890 cciss_free_scatterlists(h);
4891 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4892 free_irq(h->intr[PERF_MODE_INT], h);
4893 clean2:
4894 unregister_blkdev(h->major, h->devname);
4895 clean1:
4896 cciss_destroy_hba_sysfs_entry(h);
4897 clean0:
4898 pci_release_regions(pdev);
4899 clean_no_release_regions:
4900 h->busy_initializing = 0;
4901
4902 /*
4903 * Deliberately omit pci_disable_device(): it does something nasty to
4904 * Smart Array controllers that pci_enable_device does not undo
4905 */
4906 pci_set_drvdata(pdev, NULL);
4907 free_hba(h);
4908 return -1;
4909 }
4910
4911 static void cciss_shutdown(struct pci_dev *pdev)
4912 {
4913 ctlr_info_t *h;
4914 char *flush_buf;
4915 int return_code;
4916
4917 h = pci_get_drvdata(pdev);
4918 flush_buf = kzalloc(4, GFP_KERNEL);
4919 if (!flush_buf) {
4920 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
4921 return;
4922 }
4923 /* write all data in the battery backed cache to disk */
4924 memset(flush_buf, 0, 4);
4925 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
4926 4, 0, CTLR_LUNID, TYPE_CMD);
4927 kfree(flush_buf);
4928 if (return_code != IO_OK)
4929 dev_warn(&h->pdev->dev, "Error flushing cache\n");
4930 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4931 free_irq(h->intr[PERF_MODE_INT], h);
4932 }
4933
4934 static void __devexit cciss_remove_one(struct pci_dev *pdev)
4935 {
4936 ctlr_info_t *h;
4937 int i, j;
4938
4939 if (pci_get_drvdata(pdev) == NULL) {
4940 dev_err(&pdev->dev, "Unable to remove device\n");
4941 return;
4942 }
4943
4944 h = pci_get_drvdata(pdev);
4945 i = h->ctlr;
4946 if (hba[i] == NULL) {
4947 dev_err(&pdev->dev, "device appears to already be removed\n");
4948 return;
4949 }
4950
4951 mutex_lock(&h->busy_shutting_down);
4952
4953 remove_from_scan_list(h);
4954 remove_proc_entry(h->devname, proc_cciss);
4955 unregister_blkdev(h->major, h->devname);
4956
4957 /* remove it from the disk list */
4958 for (j = 0; j < CISS_MAX_LUN; j++) {
4959 struct gendisk *disk = h->gendisk[j];
4960 if (disk) {
4961 struct request_queue *q = disk->queue;
4962
4963 if (disk->flags & GENHD_FL_UP) {
4964 cciss_destroy_ld_sysfs_entry(h, j, 1);
4965 del_gendisk(disk);
4966 }
4967 if (q)
4968 blk_cleanup_queue(q);
4969 }
4970 }
4971
4972 #ifdef CONFIG_CISS_SCSI_TAPE
4973 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
4974 #endif
4975
4976 cciss_shutdown(pdev);
4977
4978 #ifdef CONFIG_PCI_MSI
4979 if (h->msix_vector)
4980 pci_disable_msix(h->pdev);
4981 else if (h->msi_vector)
4982 pci_disable_msi(h->pdev);
4983 #endif /* CONFIG_PCI_MSI */
4984
4985 iounmap(h->transtable);
4986 iounmap(h->cfgtable);
4987 iounmap(h->vaddr);
4988
4989 cciss_free_cmd_pool(h);
4990 /* Free up sg elements */
4991 for (j = 0; j < h->nr_cmds; j++)
4992 kfree(h->scatter_list[j]);
4993 kfree(h->scatter_list);
4994 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4995 kfree(h->blockFetchTable);
4996 if (h->reply_pool)
4997 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4998 h->reply_pool, h->reply_pool_dhandle);
4999 /*
5000 * Deliberately omit pci_disable_device(): it does something nasty to
5001 * Smart Array controllers that pci_enable_device does not undo
5002 */
5003 pci_release_regions(pdev);
5004 pci_set_drvdata(pdev, NULL);
5005 cciss_destroy_hba_sysfs_entry(h);
5006 mutex_unlock(&h->busy_shutting_down);
5007 free_hba(h);
5008 }
5009
5010 static struct pci_driver cciss_pci_driver = {
5011 .name = "cciss",
5012 .probe = cciss_init_one,
5013 .remove = __devexit_p(cciss_remove_one),
5014 .id_table = cciss_pci_device_id, /* id_table */
5015 .shutdown = cciss_shutdown,
5016 };
5017
5018 /*
5019 * This is it. Register the PCI driver information for the cards we control
5020 * the OS will call our registered routines when it finds one of our cards.
5021 */
5022 static int __init cciss_init(void)
5023 {
5024 int err;
5025
5026 /*
5027 * The hardware requires that commands are aligned on a 64-bit
5028 * boundary. Given that we use pci_alloc_consistent() to allocate an
5029 * array of them, the size must be a multiple of 8 bytes.
5030 */
5031 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5032 printk(KERN_INFO DRIVER_NAME "\n");
5033
5034 err = bus_register(&cciss_bus_type);
5035 if (err)
5036 return err;
5037
5038 /* Start the scan thread */
5039 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5040 if (IS_ERR(cciss_scan_thread)) {
5041 err = PTR_ERR(cciss_scan_thread);
5042 goto err_bus_unregister;
5043 }
5044
5045 /* Register for our PCI devices */
5046 err = pci_register_driver(&cciss_pci_driver);
5047 if (err)
5048 goto err_thread_stop;
5049
5050 return err;
5051
5052 err_thread_stop:
5053 kthread_stop(cciss_scan_thread);
5054 err_bus_unregister:
5055 bus_unregister(&cciss_bus_type);
5056
5057 return err;
5058 }
5059
5060 static void __exit cciss_cleanup(void)
5061 {
5062 int i;
5063
5064 pci_unregister_driver(&cciss_pci_driver);
5065 /* double check that all controller entrys have been removed */
5066 for (i = 0; i < MAX_CTLR; i++) {
5067 if (hba[i] != NULL) {
5068 dev_warn(&hba[i]->pdev->dev,
5069 "had to remove controller\n");
5070 cciss_remove_one(hba[i]->pdev);
5071 }
5072 }
5073 kthread_stop(cciss_scan_thread);
5074 if (proc_cciss)
5075 remove_proc_entry("driver/cciss", NULL);
5076 bus_unregister(&cciss_bus_type);
5077 }
5078
5079 module_init(cciss_init);
5080 module_exit(cciss_cleanup);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree