include/asm-x86_64/i387.h

   1 /*
   2  * include/asm-x86_64/i387.h
   3  *
   4  * Copyright (C) 1994 Linus Torvalds
   5  *
   6  * Pentium III FXSR, SSE support
   7  * General FPU state handling cleanups
   8  *      Gareth Hughes <gareth@valinux.com>, May 2000
   9  * x86-64 work by Andi Kleen 2002
  10  */
  11
  12 #ifndef __ASM_X86_64_I387_H
  13 #define __ASM_X86_64_I387_H
  14
  15 #include <linux/sched.h>
  16 #include <asm/processor.h>
  17 #include <asm/sigcontext.h>
  18 #include <asm/user.h>
  19 #include <asm/thread_info.h>
  20 #include <asm/uaccess.h>
  21
  22 extern void fpu_init(void);
  23 extern unsigned int mxcsr_feature_mask;
  24 extern void mxcsr_feature_mask_init(void);
  25 extern void init_fpu(struct task_struct *child);
  26 extern int save_i387(struct _fpstate __user *buf);
  27
  28 /*
  29  * FPU lazy state save handling...
  30  */
  31
  32 #define unlazy_fpu(tsk) do { \
  33         if (task_thread_info(tsk)->status & TS_USEDFPU) \
  34                 save_init_fpu(tsk); \
  35 } while (0)
  36
  37 /* Ignore delayed exceptions from user space */
  38 static inline void tolerant_fwait(void)
  39 {
  40         asm volatile("1: fwait\n"
  41                      "2:\n"
  42                      "   .section __ex_table,\"a\"\n"
  43                      "  .align 8\n"
  44                      "  .quad 1b,2b\n"
  45                      "  .previous\n");
  46 }
  47
  48 #define clear_fpu(tsk) do { \
  49         if (task_thread_info(tsk)->status & TS_USEDFPU) {       \
  50                 tolerant_fwait();                               \
  51                 task_thread_info(tsk)->status &= ~TS_USEDFPU;   \
  52                 stts();                                         \
  53         }                                                       \
  54 } while (0)
  55
  56 /*
  57  * ptrace request handers...
  58  */
  59 extern int get_fpregs(struct user_i387_struct __user *buf,
  60                       struct task_struct *tsk);
  61 extern int set_fpregs(struct task_struct *tsk,
  62                       struct user_i387_struct __user *buf);
  63
  64 /*
  65  * i387 state interaction
  66  */
  67 #define get_fpu_mxcsr(t) ((t)->thread.i387.fxsave.mxcsr)
  68 #define get_fpu_cwd(t) ((t)->thread.i387.fxsave.cwd)
  69 #define get_fpu_fxsr_twd(t) ((t)->thread.i387.fxsave.twd)
  70 #define get_fpu_swd(t) ((t)->thread.i387.fxsave.swd)
  71 #define set_fpu_cwd(t,val) ((t)->thread.i387.fxsave.cwd = (val))
  72 #define set_fpu_swd(t,val) ((t)->thread.i387.fxsave.swd = (val))
  73 #define set_fpu_fxsr_twd(t,val) ((t)->thread.i387.fxsave.twd = (val))
  74
  75 #define X87_FSW_ES (1 << 7)     /* Exception Summary */
  76
  77 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
  78    is pending. Clear the x87 state here by setting it to fixed
  79    values. The kernel data segment can be sometimes 0 and sometimes
  80    new user value. Both should be ok.
  81    Use the PDA as safe address because it should be already in L1. */
  82 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
  83 {
  84         if (unlikely(fx->swd & X87_FSW_ES))
  85                  asm volatile("fnclex");
  86         alternative_input(ASM_NOP8 ASM_NOP2,
  87                      "    emms\n"               /* clear stack tags */
  88                      "    fildl %%gs:0",        /* load to clear state */
  89                      X86_FEATURE_FXSAVE_LEAK);
  90 }
  91
  92 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
  93 {
  94         int err;
  95
  96         asm volatile("1:  rex64/fxrstor (%[fx])\n\t"
  97                      "2:\n"
  98                      ".section .fixup,\"ax\"\n"
  99                      "3:  movl $-1,%[err]\n"
 100                      "    jmp  2b\n"
 101                      ".previous\n"
 102                      ".section __ex_table,\"a\"\n"
 103                      "   .align 8\n"
 104                      "   .quad  1b,3b\n"
 105                      ".previous"
 106                      : [err] "=r" (err)
 107 #if 0 /* See comment in __fxsave_clear() below. */
 108                      : [fx] "r" (fx), "m" (*fx), "0" (0));
 109 #else
 110                      : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
 111 #endif
 112         if (unlikely(err))
 113                 init_fpu(current);
 114         return err;
 115 }
 116
 117 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
 118 {
 119         int err;
 120
 121         asm volatile("1:  rex64/fxsave (%[fx])\n\t"
 122                      "2:\n"
 123                      ".section .fixup,\"ax\"\n"
 124                      "3:  movl $-1,%[err]\n"
 125                      "    jmp  2b\n"
 126                      ".previous\n"
 127                      ".section __ex_table,\"a\"\n"
 128                      "   .align 8\n"
 129                      "   .quad  1b,3b\n"
 130                      ".previous"
 131                      : [err] "=r" (err), "=m" (*fx)
 132 #if 0 /* See comment in __fxsave_clear() below. */
 133                      : [fx] "r" (fx), "0" (0));
 134 #else
 135                      : [fx] "cdaSDb" (fx), "0" (0));
 136 #endif
 137         if (unlikely(err))
 138                 __clear_user(fx, sizeof(struct i387_fxsave_struct));
 139         /* No need to clear here because the caller clears USED_MATH */
 140         return err;
 141 }
 142
 143 static inline void __fxsave_clear(struct task_struct *tsk)
 144 {
 145         /* Using "rex64; fxsave %0" is broken because, if the memory operand
 146            uses any extended registers for addressing, a second REX prefix
 147            will be generated (to the assembler, rex64 followed by semicolon
 148            is a separate instruction), and hence the 64-bitness is lost. */
 149 #if 0
 150         /* Using "fxsaveq %0" would be the ideal choice, but is only supported
 151            starting with gas 2.16. */
 152         __asm__ __volatile__("fxsaveq %0"
 153                              : "=m" (tsk->thread.i387.fxsave));
 154 #elif 0
 155         /* Using, as a workaround, the properly prefixed form below isn't
 156            accepted by any binutils version so far released, complaining that
 157            the same type of prefix is used twice if an extended register is
 158            needed for addressing (fix submitted to mainline 2005-11-21). */
 159         __asm__ __volatile__("rex64/fxsave %0"
 160                              : "=m" (tsk->thread.i387.fxsave));
 161 #else
 162         /* This, however, we can work around by forcing the compiler to select
 163            an addressing mode that doesn't require extended registers. */
 164         __asm__ __volatile__("rex64/fxsave %P2(%1)"
 165                              : "=m" (tsk->thread.i387.fxsave)
 166                              : "cdaSDb" (tsk),
 167                                 "i" (offsetof(__typeof__(*tsk),
 168                                               thread.i387.fxsave)));
 169 #endif
 170         clear_fpu_state(&tsk->thread.i387.fxsave);
 171 }
 172
 173 static inline void kernel_fpu_begin(void)
 174 {
 175         struct thread_info *me = current_thread_info();
 176         preempt_disable();
 177         if (me->status & TS_USEDFPU) {
 178                 __fxsave_clear(me->task);
 179                 me->status &= ~TS_USEDFPU;
 180                 return;
 181         }
 182         clts();
 183 }
 184
 185 static inline void kernel_fpu_end(void)
 186 {
 187         stts();
 188         preempt_enable();
 189 }
 190
 191 static inline void save_init_fpu(struct task_struct *tsk)
 192 {
 193         __fxsave_clear(tsk);
 194         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 195         stts();
 196 }
 197
 198 /*
 199  * This restores directly out of user space. Exceptions are handled.
 200  */
 201 static inline int restore_i387(struct _fpstate __user *buf)
 202 {
 203         return restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
 204 }
 205
 206 #endif /* __ASM_X86_64_I387_H */