2 * Driver for the NXP ISP1760 chip
4 * However, the code might contain some bugs. What doesn't work for sure is:
7 e The interrupt line is configured as active low, level.
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
15 #include <linux/list.h>
16 #include <linux/usb.h>
17 #include <linux/usb/hcd.h>
18 #include <linux/debugfs.h>
19 #include <linux/uaccess.h>
22 #include <asm/unaligned.h>
23 #include <asm/cacheflush.h>
25 #include "isp1760-hcd.h"
27 static struct kmem_cache
*qtd_cachep
;
28 static struct kmem_cache
*qh_cachep
;
33 struct inter_packet_info atl_ints
[32];
34 struct inter_packet_info int_ints
[32];
35 struct memory_chunk memory_pool
[BLOCKS
];
38 /* periodic schedule support */
39 #define DEFAULT_I_TDPS 1024
40 unsigned periodic_size
;
42 unsigned long reset_done
;
43 unsigned long next_statechange
;
44 unsigned int devflags
;
47 static inline struct isp1760_hcd
*hcd_to_priv(struct usb_hcd
*hcd
)
49 return (struct isp1760_hcd
*) (hcd
->hcd_priv
);
51 static inline struct usb_hcd
*priv_to_hcd(struct isp1760_hcd
*priv
)
53 return container_of((void *) priv
, struct usb_hcd
, hcd_priv
);
56 /* Section 2.2 Host Controller Capability Registers */
57 #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
58 #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
59 #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
60 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
61 #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
62 #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
63 #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
65 /* Section 2.3 Host Controller Operational Registers */
66 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
67 #define CMD_RESET (1<<1) /* reset HC not bus */
68 #define CMD_RUN (1<<0) /* start/stop HC */
69 #define STS_PCD (1<<2) /* port change detect */
70 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
72 #define PORT_OWNER (1<<13) /* true: companion hc owns this port */
73 #define PORT_POWER (1<<12) /* true: has power (see PPC) */
74 #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
75 #define PORT_RESET (1<<8) /* reset port */
76 #define PORT_SUSPEND (1<<7) /* suspend port */
77 #define PORT_RESUME (1<<6) /* resume it */
78 #define PORT_PE (1<<2) /* port enable */
79 #define PORT_CSC (1<<1) /* connect status change */
80 #define PORT_CONNECT (1<<0) /* device connected */
81 #define PORT_RWC_BITS (PORT_CSC)
84 struct isp1760_qtd
*hw_next
;
89 /* the rest is HCD-private */
90 struct list_head qtd_list
;
96 #define URB_COMPLETE_NOTIFY (1 << 0)
97 #define URB_ENQUEUED (1 << 1)
98 #define URB_TYPE_ATL (1 << 2)
99 #define URB_TYPE_INT (1 << 3)
103 /* first part defined by EHCI spec */
104 struct list_head qtd_list
;
105 struct isp1760_hcd
*priv
;
107 /* periodic schedule info */
108 unsigned short period
; /* polling interval */
109 struct usb_device
*dev
;
115 #define ehci_port_speed(priv, portsc) USB_PORT_STAT_HIGH_SPEED
118 * Access functions for isp176x registers (addresses 0..0x03FF).
120 static u32
reg_read32(void __iomem
*base
, u32 reg
)
122 return readl(base
+ reg
);
125 static void reg_write32(void __iomem
*base
, u32 reg
, u32 val
)
127 writel(val
, base
+ reg
);
131 * Access functions for isp176x memory (offset >= 0x0400).
133 * bank_reads8() reads memory locations prefetched by an earlier write to
134 * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
135 * bank optimizations, you should use the more generic mem_reads8() below.
137 * For access to ptd memory, use the specialized ptd_read() and ptd_write()
140 * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
141 * doesn't quite work because some people have to enforce 32-bit access
143 static void bank_reads8(void __iomem
*src_base
, u32 src_offset
, u32 bank_addr
,
144 __u32
*dst
, u32 bytes
)
151 src
= src_base
+ (bank_addr
| src_offset
);
153 if (src_offset
< PAYLOAD_OFFSET
) {
155 *dst
= le32_to_cpu(__raw_readl(src
));
162 *dst
= __raw_readl(src
);
172 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
175 if (src_offset
< PAYLOAD_OFFSET
)
176 val
= le32_to_cpu(__raw_readl(src
));
178 val
= __raw_readl(src
);
180 dst_byteptr
= (void *) dst
;
181 src_byteptr
= (void *) &val
;
183 *dst_byteptr
= *src_byteptr
;
190 static void mem_reads8(void __iomem
*src_base
, u32 src_offset
, void *dst
,
193 reg_write32(src_base
, HC_MEMORY_REG
, src_offset
+ ISP_BANK(0));
195 bank_reads8(src_base
, src_offset
, ISP_BANK(0), dst
, bytes
);
198 static void mem_writes8(void __iomem
*dst_base
, u32 dst_offset
,
199 __u32
const *src
, u32 bytes
)
203 dst
= dst_base
+ dst_offset
;
205 if (dst_offset
< PAYLOAD_OFFSET
) {
207 __raw_writel(cpu_to_le32(*src
), dst
);
214 __raw_writel(*src
, dst
);
223 /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
224 * extra bytes should not be read by the HW.
227 if (dst_offset
< PAYLOAD_OFFSET
)
228 __raw_writel(cpu_to_le32(*src
), dst
);
230 __raw_writel(*src
, dst
);
234 * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
235 * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
237 static void ptd_read(void __iomem
*base
, u32 ptd_offset
, u32 slot
,
240 reg_write32(base
, HC_MEMORY_REG
,
241 ISP_BANK(0) + ptd_offset
+ slot
*sizeof(*ptd
));
243 bank_reads8(base
, ptd_offset
+ slot
*sizeof(*ptd
), ISP_BANK(0),
244 (void *) ptd
, sizeof(*ptd
));
247 static void ptd_write(void __iomem
*base
, u32 ptd_offset
, u32 slot
,
250 mem_writes8(base
, ptd_offset
+ slot
*sizeof(*ptd
) + sizeof(ptd
->dw0
),
251 &ptd
->dw1
, 7*sizeof(ptd
->dw1
));
252 /* Make sure dw0 gets written last (after other dw's and after payload)
253 since it contains the enable bit */
255 mem_writes8(base
, ptd_offset
+ slot
*sizeof(*ptd
), &ptd
->dw0
,
260 /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
261 static void init_memory(struct isp1760_hcd
*priv
)
267 for (i
= 0; i
< BLOCK_1_NUM
; i
++) {
268 priv
->memory_pool
[i
].start
= payload
;
269 priv
->memory_pool
[i
].size
= BLOCK_1_SIZE
;
270 priv
->memory_pool
[i
].free
= 1;
271 payload
+= priv
->memory_pool
[i
].size
;
275 for (i
= BLOCK_1_NUM
; i
< BLOCK_1_NUM
+ BLOCK_2_NUM
; i
++) {
276 priv
->memory_pool
[i
].start
= payload
;
277 priv
->memory_pool
[i
].size
= BLOCK_2_SIZE
;
278 priv
->memory_pool
[i
].free
= 1;
279 payload
+= priv
->memory_pool
[i
].size
;
283 for (i
= BLOCK_1_NUM
+ BLOCK_2_NUM
; i
< BLOCKS
; i
++) {
284 priv
->memory_pool
[i
].start
= payload
;
285 priv
->memory_pool
[i
].size
= BLOCK_3_SIZE
;
286 priv
->memory_pool
[i
].free
= 1;
287 payload
+= priv
->memory_pool
[i
].size
;
290 BUG_ON(payload
- priv
->memory_pool
[i
- 1].size
> PAYLOAD_SIZE
);
293 static u32
alloc_mem(struct isp1760_hcd
*priv
, u32 size
)
298 return ISP1760_NULL_POINTER
;
300 for (i
= 0; i
< BLOCKS
; i
++) {
301 if (priv
->memory_pool
[i
].size
>= size
&&
302 priv
->memory_pool
[i
].free
) {
304 priv
->memory_pool
[i
].free
= 0;
305 return priv
->memory_pool
[i
].start
;
309 printk(KERN_ERR
"ISP1760 MEM: can not allocate %d bytes of memory\n",
311 printk(KERN_ERR
"Current memory map:\n");
312 for (i
= 0; i
< BLOCKS
; i
++) {
313 printk(KERN_ERR
"Pool %2d size %4d status: %d\n",
314 i
, priv
->memory_pool
[i
].size
,
315 priv
->memory_pool
[i
].free
);
317 /* XXX maybe -ENOMEM could be possible */
322 static void free_mem(struct isp1760_hcd
*priv
, u32 mem
)
326 if (mem
== ISP1760_NULL_POINTER
)
329 for (i
= 0; i
< BLOCKS
; i
++) {
330 if (priv
->memory_pool
[i
].start
== mem
) {
332 BUG_ON(priv
->memory_pool
[i
].free
);
334 priv
->memory_pool
[i
].free
= 1;
339 printk(KERN_ERR
"Trying to free not-here-allocated memory :%08x\n",
344 static void isp1760_init_regs(struct usb_hcd
*hcd
)
346 reg_write32(hcd
->regs
, HC_BUFFER_STATUS_REG
, 0);
347 reg_write32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
, NO_TRANSFER_ACTIVE
);
348 reg_write32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
, NO_TRANSFER_ACTIVE
);
349 reg_write32(hcd
->regs
, HC_ISO_PTD_SKIPMAP_REG
, NO_TRANSFER_ACTIVE
);
351 reg_write32(hcd
->regs
, HC_ATL_PTD_DONEMAP_REG
, ~NO_TRANSFER_ACTIVE
);
352 reg_write32(hcd
->regs
, HC_INT_PTD_DONEMAP_REG
, ~NO_TRANSFER_ACTIVE
);
353 reg_write32(hcd
->regs
, HC_ISO_PTD_DONEMAP_REG
, ~NO_TRANSFER_ACTIVE
);
356 static int handshake(struct usb_hcd
*hcd
, u32 reg
,
357 u32 mask
, u32 done
, int usec
)
362 result
= reg_read32(hcd
->regs
, reg
);
374 /* reset a non-running (STS_HALT == 1) controller */
375 static int ehci_reset(struct isp1760_hcd
*priv
)
378 struct usb_hcd
*hcd
= priv_to_hcd(priv
);
379 u32 command
= reg_read32(hcd
->regs
, HC_USBCMD
);
381 command
|= CMD_RESET
;
382 reg_write32(hcd
->regs
, HC_USBCMD
, command
);
383 hcd
->state
= HC_STATE_HALT
;
384 priv
->next_statechange
= jiffies
;
385 retval
= handshake(hcd
, HC_USBCMD
,
386 CMD_RESET
, 0, 250 * 1000);
390 static void qh_destroy(struct isp1760_qh
*qh
)
392 BUG_ON(!list_empty(&qh
->qtd_list
));
393 kmem_cache_free(qh_cachep
, qh
);
396 static struct isp1760_qh
*isp1760_qh_alloc(struct isp1760_hcd
*priv
,
399 struct isp1760_qh
*qh
;
401 qh
= kmem_cache_zalloc(qh_cachep
, flags
);
405 INIT_LIST_HEAD(&qh
->qtd_list
);
410 /* magic numbers that can affect system performance */
411 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
412 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
413 #define EHCI_TUNE_RL_TT 0
414 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
415 #define EHCI_TUNE_MULT_TT 1
416 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
418 /* one-time init, only for memory state */
419 static int priv_init(struct usb_hcd
*hcd
)
421 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
424 spin_lock_init(&priv
->lock
);
427 * hw default: 1K periodic list heads, one per frame.
428 * periodic_size can shrink by USBCMD update if hcc_params allows.
430 priv
->periodic_size
= DEFAULT_I_TDPS
;
432 /* controllers may cache some of the periodic schedule ... */
433 hcc_params
= reg_read32(hcd
->regs
, HC_HCCPARAMS
);
434 /* full frame cache */
435 if (HCC_ISOC_CACHE(hcc_params
))
437 else /* N microframes cached */
438 priv
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
443 static int isp1760_hc_setup(struct usb_hcd
*hcd
)
445 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
449 /* Setup HW Mode Control: This assumes a level active-low interrupt */
450 hwmode
= HW_DATA_BUS_32BIT
;
452 if (priv
->devflags
& ISP1760_FLAG_BUS_WIDTH_16
)
453 hwmode
&= ~HW_DATA_BUS_32BIT
;
454 if (priv
->devflags
& ISP1760_FLAG_ANALOG_OC
)
455 hwmode
|= HW_ANA_DIGI_OC
;
456 if (priv
->devflags
& ISP1760_FLAG_DACK_POL_HIGH
)
457 hwmode
|= HW_DACK_POL_HIGH
;
458 if (priv
->devflags
& ISP1760_FLAG_DREQ_POL_HIGH
)
459 hwmode
|= HW_DREQ_POL_HIGH
;
460 if (priv
->devflags
& ISP1760_FLAG_INTR_POL_HIGH
)
461 hwmode
|= HW_INTR_HIGH_ACT
;
462 if (priv
->devflags
& ISP1760_FLAG_INTR_EDGE_TRIG
)
463 hwmode
|= HW_INTR_EDGE_TRIG
;
466 * We have to set this first in case we're in 16-bit mode.
467 * Write it twice to ensure correct upper bits if switching
470 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, hwmode
);
471 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, hwmode
);
473 reg_write32(hcd
->regs
, HC_SCRATCH_REG
, 0xdeadbabe);
474 /* Change bus pattern */
475 scratch
= reg_read32(hcd
->regs
, HC_CHIP_ID_REG
);
476 scratch
= reg_read32(hcd
->regs
, HC_SCRATCH_REG
);
477 if (scratch
!= 0xdeadbabe) {
478 printk(KERN_ERR
"ISP1760: Scratch test failed.\n");
483 isp1760_init_regs(hcd
);
486 reg_write32(hcd
->regs
, HC_RESET_REG
, SW_RESET_RESET_ALL
);
489 reg_write32(hcd
->regs
, HC_RESET_REG
, SW_RESET_RESET_HC
);
492 result
= ehci_reset(priv
);
498 isp1760_info(priv
, "bus width: %d, oc: %s\n",
499 (priv
->devflags
& ISP1760_FLAG_BUS_WIDTH_16
) ?
500 16 : 32, (priv
->devflags
& ISP1760_FLAG_ANALOG_OC
) ?
501 "analog" : "digital");
504 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, hwmode
| ALL_ATX_RESET
);
506 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, hwmode
);
508 reg_write32(hcd
->regs
, HC_INTERRUPT_REG
, INTERRUPT_ENABLE_MASK
);
509 reg_write32(hcd
->regs
, HC_INTERRUPT_ENABLE
, INTERRUPT_ENABLE_MASK
);
512 * PORT 1 Control register of the ISP1760 is the OTG control
513 * register on ISP1761. Since there is no OTG or device controller
514 * support in this driver, we use port 1 as a "normal" USB host port on
517 reg_write32(hcd
->regs
, HC_PORT1_CTRL
, PORT1_POWER
| PORT1_INIT2
);
520 priv
->hcs_params
= reg_read32(hcd
->regs
, HC_HCSPARAMS
);
522 return priv_init(hcd
);
525 static void isp1760_init_maps(struct usb_hcd
*hcd
)
527 /*set last maps, for iso its only 1, else 32 tds bitmap*/
528 reg_write32(hcd
->regs
, HC_ATL_PTD_LASTPTD_REG
, 0x80000000);
529 reg_write32(hcd
->regs
, HC_INT_PTD_LASTPTD_REG
, 0x80000000);
530 reg_write32(hcd
->regs
, HC_ISO_PTD_LASTPTD_REG
, 0x00000001);
533 static void isp1760_enable_interrupts(struct usb_hcd
*hcd
)
535 reg_write32(hcd
->regs
, HC_ATL_IRQ_MASK_AND_REG
, 0);
536 reg_write32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
, 0);
537 reg_write32(hcd
->regs
, HC_INT_IRQ_MASK_AND_REG
, 0);
538 reg_write32(hcd
->regs
, HC_INT_IRQ_MASK_OR_REG
, 0);
539 reg_write32(hcd
->regs
, HC_ISO_IRQ_MASK_AND_REG
, 0);
540 reg_write32(hcd
->regs
, HC_ISO_IRQ_MASK_OR_REG
, 0xffffffff);
544 static int isp1760_run(struct usb_hcd
*hcd
)
546 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
552 hcd
->uses_new_polling
= 1;
554 hcd
->state
= HC_STATE_RUNNING
;
555 isp1760_enable_interrupts(hcd
);
556 temp
= reg_read32(hcd
->regs
, HC_HW_MODE_CTRL
);
557 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, temp
| HW_GLOBAL_INTR_EN
);
559 command
= reg_read32(hcd
->regs
, HC_USBCMD
);
560 command
&= ~(CMD_LRESET
|CMD_RESET
);
562 reg_write32(hcd
->regs
, HC_USBCMD
, command
);
564 retval
= handshake(hcd
, HC_USBCMD
, CMD_RUN
, CMD_RUN
,
571 * Spec says to write FLAG_CF as last config action, priv code grabs
572 * the semaphore while doing so.
574 down_write(&ehci_cf_port_reset_rwsem
);
575 reg_write32(hcd
->regs
, HC_CONFIGFLAG
, FLAG_CF
);
577 retval
= handshake(hcd
, HC_CONFIGFLAG
, FLAG_CF
, FLAG_CF
, 250 * 1000);
578 up_write(&ehci_cf_port_reset_rwsem
);
582 chipid
= reg_read32(hcd
->regs
, HC_CHIP_ID_REG
);
583 isp1760_info(priv
, "USB ISP %04x HW rev. %d started\n", chipid
& 0xffff,
586 /* PTD Register Init Part 2, Step 28 */
588 isp1760_init_maps(hcd
);
590 /* GRR this is run-once init(), being done every time the HC starts.
591 * So long as they're part of class devices, we can't do it init()
592 * since the class device isn't created that early.
597 static u32
base_to_chip(u32 base
)
599 return ((base
- 0x400) >> 3);
602 static void transform_into_atl(struct isp1760_hcd
*priv
, struct isp1760_qh
*qh
,
603 struct isp1760_qtd
*qtd
, struct urb
*urb
,
604 u32 payload
, struct ptd
*ptd
)
610 u32 nak
= NAK_COUNTER
;
612 memset(ptd
, 0, sizeof(*ptd
));
614 /* according to 3.6.2, max packet len can not be > 0x400 */
615 maxpacket
= usb_maxpacket(urb
->dev
, urb
->pipe
, usb_pipeout(urb
->pipe
));
616 multi
= 1 + ((maxpacket
>> 11) & 0x3);
620 ptd
->dw0
= PTD_VALID
;
621 ptd
->dw0
|= PTD_LENGTH(qtd
->length
);
622 ptd
->dw0
|= PTD_MAXPACKET(maxpacket
);
623 ptd
->dw0
|= PTD_ENDPOINT(usb_pipeendpoint(urb
->pipe
));
624 ptd
->dw1
= usb_pipeendpoint(urb
->pipe
) >> 1;
627 ptd
->dw1
|= PTD_DEVICE_ADDR(usb_pipedevice(urb
->pipe
));
629 pid_code
= qtd
->packet_type
;
630 ptd
->dw1
|= PTD_PID_TOKEN(pid_code
);
632 if (usb_pipebulk(urb
->pipe
))
633 ptd
->dw1
|= PTD_TRANS_BULK
;
634 else if (usb_pipeint(urb
->pipe
))
635 ptd
->dw1
|= PTD_TRANS_INT
;
637 if (urb
->dev
->speed
!= USB_SPEED_HIGH
) {
638 /* split transaction */
640 ptd
->dw1
|= PTD_TRANS_SPLIT
;
641 if (urb
->dev
->speed
== USB_SPEED_LOW
)
642 ptd
->dw1
|= PTD_SE_USB_LOSPEED
;
644 ptd
->dw1
|= PTD_PORT_NUM(urb
->dev
->ttport
);
645 ptd
->dw1
|= PTD_HUB_NUM(urb
->dev
->tt
->hub
->devnum
);
647 /* SE bit for Split INT transfers */
648 if (usb_pipeint(urb
->pipe
) &&
649 (urb
->dev
->speed
== USB_SPEED_LOW
))
656 ptd
->dw0
|= PTD_MULTI(multi
);
657 if (usb_pipecontrol(urb
->pipe
) || usb_pipebulk(urb
->pipe
))
664 ptd
->dw2
|= PTD_DATA_START_ADDR(base_to_chip(payload
));
665 ptd
->dw2
|= PTD_RL_CNT(rl
);
666 ptd
->dw3
|= PTD_NAC_CNT(nak
);
669 if (usb_pipecontrol(urb
->pipe
))
670 ptd
->dw3
|= PTD_DATA_TOGGLE(qtd
->toggle
);
672 ptd
->dw3
|= qh
->toggle
;
675 ptd
->dw3
|= PTD_ACTIVE
;
677 ptd
->dw3
|= PTD_CERR(ERR_COUNTER
);
680 static void transform_add_int(struct isp1760_hcd
*priv
, struct isp1760_qh
*qh
,
681 struct isp1760_qtd
*qtd
, struct urb
*urb
,
682 u32 payload
, struct ptd
*ptd
)
691 maxpacket
= usb_maxpacket(urb
->dev
, urb
->pipe
, usb_pipeout(urb
->pipe
));
692 multi
= 1 + ((maxpacket
>> 11) & 0x3);
694 /* length of the data per uframe */
695 maxpacket
= multi
* maxpacket
;
697 numberofusofs
= urb
->transfer_buffer_length
/ maxpacket
;
698 if (urb
->transfer_buffer_length
% maxpacket
)
703 for (i
= 0; i
< numberofusofs
; i
++) {
708 if (urb
->dev
->speed
!= USB_SPEED_HIGH
) {
712 if (qh
->period
>= 32)
713 period
= qh
->period
/ 2;
720 period
= qh
->period
/8;
727 if (qh
->period
>= 8) {
728 /* millisecond period */
729 period
= (period
<< 3);
731 /* usof based tranmsfers */
732 /* minimum 4 usofs */
741 static void transform_into_int(struct isp1760_hcd
*priv
, struct isp1760_qh
*qh
,
742 struct isp1760_qtd
*qtd
, struct urb
*urb
,
743 u32 payload
, struct ptd
*ptd
)
745 transform_into_atl(priv
, qh
, qtd
, urb
, payload
, ptd
);
746 transform_add_int(priv
, qh
, qtd
, urb
, payload
, ptd
);
749 static int qtd_fill(struct isp1760_qtd
*qtd
, void *databuffer
, size_t len
,
754 qtd
->data_buffer
= databuffer
;
755 qtd
->packet_type
= GET_QTD_TOKEN_TYPE(token
);
756 qtd
->toggle
= GET_DATA_TOGGLE(token
);
758 if (len
> HC_ATL_PL_SIZE
)
759 count
= HC_ATL_PL_SIZE
;
767 static int check_error(struct ptd
*ptd
)
771 if (ptd
->dw3
& DW3_HALT_BIT
) {
774 if (ptd
->dw3
& DW3_ERROR_BIT
)
775 pr_err("error bit is set in DW3\n");
778 if (ptd
->dw3
& DW3_QTD_ACTIVE
) {
779 printk(KERN_ERR
"transfer active bit is set DW3\n");
780 printk(KERN_ERR
"nak counter: %d, rl: %d\n",
781 (ptd
->dw3
>> 19) & 0xf, (ptd
->dw2
>> 25) & 0xf);
787 static void check_int_err_status(u32 dw4
)
793 for (i
= 0; i
< 8; i
++) {
796 printk(KERN_ERR
"ERROR: under run , %d\n", i
);
800 printk(KERN_ERR
"ERROR: transaction error, %d\n", i
);
804 printk(KERN_ERR
"ERROR: babble error, %d\n", i
);
811 static void enqueue_one_qtd(struct isp1760_qtd
*qtd
, struct isp1760_hcd
*priv
,
815 struct usb_hcd
*hcd
= priv_to_hcd(priv
);
817 token
= qtd
->packet_type
;
819 if (qtd
->length
&& (qtd
->length
<= HC_ATL_PL_SIZE
)) {
825 mem_writes8(hcd
->regs
, payload
, qtd
->data_buffer
,
831 static void enqueue_one_atl_qtd(u32 payload
,
832 struct isp1760_hcd
*priv
, struct isp1760_qh
*qh
,
833 struct urb
*urb
, u32 slot
, struct isp1760_qtd
*qtd
)
836 struct usb_hcd
*hcd
= priv_to_hcd(priv
);
838 transform_into_atl(priv
, qh
, qtd
, urb
, payload
, &ptd
);
839 ptd_write(hcd
->regs
, ATL_PTD_OFFSET
, slot
, &ptd
);
840 enqueue_one_qtd(qtd
, priv
, payload
);
842 priv
->atl_ints
[slot
].urb
= urb
;
843 priv
->atl_ints
[slot
].qh
= qh
;
844 priv
->atl_ints
[slot
].qtd
= qtd
;
845 priv
->atl_ints
[slot
].data_buffer
= qtd
->data_buffer
;
846 priv
->atl_ints
[slot
].payload
= payload
;
847 qtd
->status
|= URB_ENQUEUED
| URB_TYPE_ATL
;
848 qtd
->status
|= slot
<< 16;
851 static void enqueue_one_int_qtd(u32 payload
,
852 struct isp1760_hcd
*priv
, struct isp1760_qh
*qh
,
853 struct urb
*urb
, u32 slot
, struct isp1760_qtd
*qtd
)
856 struct usb_hcd
*hcd
= priv_to_hcd(priv
);
858 transform_into_int(priv
, qh
, qtd
, urb
, payload
, &ptd
);
859 ptd_write(hcd
->regs
, INT_PTD_OFFSET
, slot
, &ptd
);
860 enqueue_one_qtd(qtd
, priv
, payload
);
862 priv
->int_ints
[slot
].urb
= urb
;
863 priv
->int_ints
[slot
].qh
= qh
;
864 priv
->int_ints
[slot
].qtd
= qtd
;
865 priv
->int_ints
[slot
].data_buffer
= qtd
->data_buffer
;
866 priv
->int_ints
[slot
].payload
= payload
;
867 qtd
->status
|= URB_ENQUEUED
| URB_TYPE_INT
;
868 qtd
->status
|= slot
<< 16;
871 static void enqueue_an_ATL_packet(struct usb_hcd
*hcd
, struct isp1760_qh
*qh
,
872 struct isp1760_qtd
*qtd
)
874 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
875 u32 skip_map
, or_map
;
882 * When this function is called from the interrupt handler to enqueue
883 * a follow-up packet, the SKIP register gets written and read back
884 * almost immediately. With ISP1761, this register requires a delay of
885 * 195ns between a write and subsequent read (see section 15.1.1.3).
889 skip_map
= reg_read32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
);
892 slot
= __ffs(skip_map
);
893 queue_entry
= 1 << slot
;
895 payload
= alloc_mem(priv
, qtd
->length
);
897 enqueue_one_atl_qtd(payload
, priv
, qh
, qtd
->urb
, slot
, qtd
);
899 or_map
= reg_read32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
);
900 or_map
|= queue_entry
;
901 reg_write32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
, or_map
);
903 skip_map
&= ~queue_entry
;
904 reg_write32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
, skip_map
);
907 if (priv
->atl_queued
== 2)
908 reg_write32(hcd
->regs
, HC_INTERRUPT_ENABLE
,
909 INTERRUPT_ENABLE_SOT_MASK
);
911 buffstatus
= reg_read32(hcd
->regs
, HC_BUFFER_STATUS_REG
);
912 buffstatus
|= ATL_BUFFER
;
913 reg_write32(hcd
->regs
, HC_BUFFER_STATUS_REG
, buffstatus
);
916 static void enqueue_an_INT_packet(struct usb_hcd
*hcd
, struct isp1760_qh
*qh
,
917 struct isp1760_qtd
*qtd
)
919 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
920 u32 skip_map
, or_map
;
927 * When this function is called from the interrupt handler to enqueue
928 * a follow-up packet, the SKIP register gets written and read back
929 * almost immediately. With ISP1761, this register requires a delay of
930 * 195ns between a write and subsequent read (see section 15.1.1.3).
934 skip_map
= reg_read32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
);
937 slot
= __ffs(skip_map
);
938 queue_entry
= 1 << slot
;
940 payload
= alloc_mem(priv
, qtd
->length
);
942 enqueue_one_int_qtd(payload
, priv
, qh
, qtd
->urb
, slot
, qtd
);
944 or_map
= reg_read32(hcd
->regs
, HC_INT_IRQ_MASK_OR_REG
);
945 or_map
|= queue_entry
;
946 reg_write32(hcd
->regs
, HC_INT_IRQ_MASK_OR_REG
, or_map
);
948 skip_map
&= ~queue_entry
;
949 reg_write32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
, skip_map
);
951 buffstatus
= reg_read32(hcd
->regs
, HC_BUFFER_STATUS_REG
);
952 buffstatus
|= INT_BUFFER
;
953 reg_write32(hcd
->regs
, HC_BUFFER_STATUS_REG
, buffstatus
);
956 static void isp1760_urb_done(struct isp1760_hcd
*priv
, struct urb
*urb
,
958 __releases(priv
->lock
)
959 __acquires(priv
->lock
)
961 if (!urb
->unlinked
) {
962 if (status
== -EINPROGRESS
)
966 if (usb_pipein(urb
->pipe
) && usb_pipetype(urb
->pipe
) != PIPE_CONTROL
) {
968 for (ptr
= urb
->transfer_buffer
;
969 ptr
< urb
->transfer_buffer
+ urb
->transfer_buffer_length
;
971 flush_dcache_page(virt_to_page(ptr
));
974 /* complete() can reenter this HCD */
975 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv
), urb
);
976 spin_unlock(&priv
->lock
);
977 usb_hcd_giveback_urb(priv_to_hcd(priv
), urb
, status
);
978 spin_lock(&priv
->lock
);
981 static void isp1760_qtd_free(struct isp1760_qtd
*qtd
)
983 kmem_cache_free(qtd_cachep
, qtd
);
986 static struct isp1760_qtd
*clean_this_qtd(struct isp1760_qtd
*qtd
)
988 struct isp1760_qtd
*tmp_qtd
;
990 tmp_qtd
= qtd
->hw_next
;
991 list_del(&qtd
->qtd_list
);
992 isp1760_qtd_free(qtd
);
997 * Remove this QTD from the QH list and free its memory. If this QTD
998 * isn't the last one than remove also his successor(s).
999 * Returns the QTD which is part of an new URB and should be enqueued.
1001 static struct isp1760_qtd
*clean_up_qtdlist(struct isp1760_qtd
*qtd
)
1003 struct isp1760_qtd
*tmp_qtd
;
1007 tmp_qtd
= qtd
->hw_next
;
1008 last_one
= qtd
->status
& URB_COMPLETE_NOTIFY
;
1009 list_del(&qtd
->qtd_list
);
1010 isp1760_qtd_free(qtd
);
1012 } while (!last_one
&& qtd
);
1017 static void do_atl_int(struct usb_hcd
*hcd
)
1019 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1020 u32 done_map
, skip_map
;
1022 struct urb
*urb
= NULL
;
1027 u32 status
= -EINVAL
;
1029 struct isp1760_qtd
*qtd
;
1030 struct isp1760_qh
*qh
;
1034 done_map
= reg_read32(hcd
->regs
, HC_ATL_PTD_DONEMAP_REG
);
1035 skip_map
= reg_read32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
);
1037 or_map
= reg_read32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
);
1038 or_map
&= ~done_map
;
1039 reg_write32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
, or_map
);
1045 queue_entry
= __ffs(done_map
);
1046 done_map
&= ~(1 << queue_entry
);
1047 skip_map
|= 1 << queue_entry
;
1049 urb
= priv
->atl_ints
[queue_entry
].urb
;
1050 qtd
= priv
->atl_ints
[queue_entry
].qtd
;
1051 qh
= priv
->atl_ints
[queue_entry
].qh
;
1052 payload
= priv
->atl_ints
[queue_entry
].payload
;
1055 printk(KERN_ERR
"qh is 0\n");
1058 ptd_read(hcd
->regs
, ATL_PTD_OFFSET
, queue_entry
, &ptd
);
1060 rl
= (ptd
.dw2
>> 25) & 0x0f;
1061 nakcount
= (ptd
.dw3
>> 19) & 0xf;
1063 /* Transfer Error, *but* active and no HALT -> reload */
1064 if ((ptd
.dw3
& DW3_ERROR_BIT
) && (ptd
.dw3
& DW3_QTD_ACTIVE
) &&
1065 !(ptd
.dw3
& DW3_HALT_BIT
)) {
1067 /* according to ppriv code, we have to
1068 * reload this one if trasfered bytes != requested bytes
1069 * else act like everything went smooth..
1070 * XXX This just doesn't feel right and hasn't
1074 length
= PTD_XFERRED_LENGTH(ptd
.dw3
);
1075 printk(KERN_ERR
"Should reload now.... transfered %d "
1076 "of %zu\n", length
, qtd
->length
);
1080 if (!nakcount
&& (ptd
.dw3
& DW3_QTD_ACTIVE
)) {
1084 * NAKs are handled in HW by the chip. Usually if the
1085 * device is not able to send data fast enough.
1086 * This happens mostly on slower hardware.
1089 /* RL counter = ERR counter */
1090 ptd
.dw3
&= ~(0xf << 19);
1091 ptd
.dw3
|= rl
<< 19;
1092 ptd
.dw3
&= ~(3 << (55 - 32));
1093 ptd
.dw3
|= ERR_COUNTER
<< (55 - 32);
1096 * It is not needed to write skip map back because it
1097 * is unchanged. Just make sure that this entry is
1098 * unskipped once it gets written to the HW.
1100 skip_map
&= ~(1 << queue_entry
);
1101 or_map
= reg_read32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
);
1102 or_map
|= 1 << queue_entry
;
1103 reg_write32(hcd
->regs
, HC_ATL_IRQ_MASK_OR_REG
, or_map
);
1105 ptd
.dw0
|= PTD_VALID
;
1106 ptd_write(hcd
->regs
, ATL_PTD_OFFSET
, queue_entry
, &ptd
);
1109 if (priv
->atl_queued
== 2)
1110 reg_write32(hcd
->regs
, HC_INTERRUPT_ENABLE
,
1111 INTERRUPT_ENABLE_SOT_MASK
);
1113 buffstatus
= reg_read32(hcd
->regs
,
1114 HC_BUFFER_STATUS_REG
);
1115 buffstatus
|= ATL_BUFFER
;
1116 reg_write32(hcd
->regs
, HC_BUFFER_STATUS_REG
,
1121 error
= check_error(&ptd
);
1124 priv
->atl_ints
[queue_entry
].qh
->toggle
= 0;
1125 priv
->atl_ints
[queue_entry
].qh
->ping
= 0;
1126 urb
->status
= -EPIPE
;
1129 printk(KERN_ERR
"Error in %s().\n", __func__
);
1130 printk(KERN_ERR
"IN dw0: %08x dw1: %08x dw2: %08x "
1131 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1133 ptd
.dw0
, ptd
.dw1
, ptd
.dw2
, ptd
.dw3
,
1134 ptd
.dw4
, ptd
.dw5
, ptd
.dw6
, ptd
.dw7
);
1137 if (usb_pipetype(urb
->pipe
) == PIPE_BULK
) {
1138 priv
->atl_ints
[queue_entry
].qh
->toggle
=
1139 ptd
.dw3
& (1 << 25);
1140 priv
->atl_ints
[queue_entry
].qh
->ping
=
1141 ptd
.dw3
& (1 << 26);
1145 length
= PTD_XFERRED_LENGTH(ptd
.dw3
);
1147 switch (DW1_GET_PID(ptd
.dw1
)) {
1149 mem_reads8(hcd
->regs
, payload
,
1150 priv
->atl_ints
[queue_entry
].data_buffer
,
1155 urb
->actual_length
+= length
;
1162 priv
->atl_ints
[queue_entry
].data_buffer
= NULL
;
1163 priv
->atl_ints
[queue_entry
].urb
= NULL
;
1164 priv
->atl_ints
[queue_entry
].qtd
= NULL
;
1165 priv
->atl_ints
[queue_entry
].qh
= NULL
;
1167 free_mem(priv
, payload
);
1169 reg_write32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
, skip_map
);
1171 if (urb
->status
== -EPIPE
) {
1172 /* HALT was received */
1174 qtd
= clean_up_qtdlist(qtd
);
1175 isp1760_urb_done(priv
, urb
, urb
->status
);
1177 } else if (usb_pipebulk(urb
->pipe
) && (length
< qtd
->length
)) {
1178 /* short BULK received */
1180 if (urb
->transfer_flags
& URB_SHORT_NOT_OK
) {
1181 urb
->status
= -EREMOTEIO
;
1182 isp1760_dbg(priv
, "short bulk, %d instead %zu "
1183 "with URB_SHORT_NOT_OK flag.\n",
1184 length
, qtd
->length
);
1187 if (urb
->status
== -EINPROGRESS
)
1190 qtd
= clean_up_qtdlist(qtd
);
1192 isp1760_urb_done(priv
, urb
, urb
->status
);
1194 } else if (qtd
->status
& URB_COMPLETE_NOTIFY
) {
1195 /* that was the last qtd of that URB */
1197 if (urb
->status
== -EINPROGRESS
)
1200 qtd
= clean_this_qtd(qtd
);
1201 isp1760_urb_done(priv
, urb
, urb
->status
);
1204 /* next QTD of this URB */
1206 qtd
= clean_this_qtd(qtd
);
1211 enqueue_an_ATL_packet(hcd
, qh
, qtd
);
1213 skip_map
= reg_read32(hcd
->regs
, HC_ATL_PTD_SKIPMAP_REG
);
1215 if (priv
->atl_queued
<= 1)
1216 reg_write32(hcd
->regs
, HC_INTERRUPT_ENABLE
,
1217 INTERRUPT_ENABLE_MASK
);
1220 static void do_intl_int(struct usb_hcd
*hcd
)
1222 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1223 u32 done_map
, skip_map
;
1225 struct urb
*urb
= NULL
;
1231 struct isp1760_qtd
*qtd
;
1232 struct isp1760_qh
*qh
;
1234 done_map
= reg_read32(hcd
->regs
, HC_INT_PTD_DONEMAP_REG
);
1235 skip_map
= reg_read32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
);
1237 or_map
= reg_read32(hcd
->regs
, HC_INT_IRQ_MASK_OR_REG
);
1238 or_map
&= ~done_map
;
1239 reg_write32(hcd
->regs
, HC_INT_IRQ_MASK_OR_REG
, or_map
);
1242 queue_entry
= __ffs(done_map
);
1243 done_map
&= ~(1 << queue_entry
);
1244 skip_map
|= 1 << queue_entry
;
1246 urb
= priv
->int_ints
[queue_entry
].urb
;
1247 qtd
= priv
->int_ints
[queue_entry
].qtd
;
1248 qh
= priv
->int_ints
[queue_entry
].qh
;
1249 payload
= priv
->int_ints
[queue_entry
].payload
;
1252 printk(KERN_ERR
"(INT) qh is 0\n");
1256 ptd_read(hcd
->regs
, INT_PTD_OFFSET
, queue_entry
, &ptd
);
1257 check_int_err_status(ptd
.dw4
);
1259 error
= check_error(&ptd
);
1262 printk(KERN_ERR
"Error in %s().\n", __func__
);
1263 printk(KERN_ERR
"IN dw0: %08x dw1: %08x dw2: %08x "
1264 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1266 ptd
.dw0
, ptd
.dw1
, ptd
.dw2
, ptd
.dw3
,
1267 ptd
.dw4
, ptd
.dw5
, ptd
.dw6
, ptd
.dw7
);
1269 urb
->status
= -EPIPE
;
1270 priv
->int_ints
[queue_entry
].qh
->toggle
= 0;
1271 priv
->int_ints
[queue_entry
].qh
->ping
= 0;
1274 priv
->int_ints
[queue_entry
].qh
->toggle
=
1275 ptd
.dw3
& (1 << 25);
1276 priv
->int_ints
[queue_entry
].qh
->ping
=
1277 ptd
.dw3
& (1 << 26);
1280 if (urb
->dev
->speed
!= USB_SPEED_HIGH
)
1281 length
= PTD_XFERRED_LENGTH_LO(ptd
.dw3
);
1283 length
= PTD_XFERRED_LENGTH(ptd
.dw3
);
1286 switch (DW1_GET_PID(ptd
.dw1
)) {
1288 mem_reads8(hcd
->regs
, payload
,
1289 priv
->int_ints
[queue_entry
].data_buffer
,
1293 urb
->actual_length
+= length
;
1300 priv
->int_ints
[queue_entry
].data_buffer
= NULL
;
1301 priv
->int_ints
[queue_entry
].urb
= NULL
;
1302 priv
->int_ints
[queue_entry
].qtd
= NULL
;
1303 priv
->int_ints
[queue_entry
].qh
= NULL
;
1305 reg_write32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
, skip_map
);
1306 free_mem(priv
, payload
);
1308 if (urb
->status
== -EPIPE
) {
1311 qtd
= clean_up_qtdlist(qtd
);
1312 isp1760_urb_done(priv
, urb
, urb
->status
);
1314 } else if (qtd
->status
& URB_COMPLETE_NOTIFY
) {
1316 if (urb
->status
== -EINPROGRESS
)
1319 qtd
= clean_this_qtd(qtd
);
1320 isp1760_urb_done(priv
, urb
, urb
->status
);
1323 /* next QTD of this URB */
1325 qtd
= clean_this_qtd(qtd
);
1330 enqueue_an_INT_packet(hcd
, qh
, qtd
);
1332 skip_map
= reg_read32(hcd
->regs
, HC_INT_PTD_SKIPMAP_REG
);
1336 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1337 static struct isp1760_qh
*qh_make(struct isp1760_hcd
*priv
, struct urb
*urb
,
1340 struct isp1760_qh
*qh
;
1343 qh
= isp1760_qh_alloc(priv
, flags
);
1348 * init endpoint/device data for this QH
1350 is_input
= usb_pipein(urb
->pipe
);
1351 type
= usb_pipetype(urb
->pipe
);
1353 if (type
== PIPE_INTERRUPT
) {
1355 if (urb
->dev
->speed
== USB_SPEED_HIGH
) {
1357 qh
->period
= urb
->interval
>> 3;
1358 if (qh
->period
== 0 && urb
->interval
!= 1) {
1359 /* NOTE interval 2 or 4 uframes could work.
1360 * But interval 1 scheduling is simpler, and
1361 * includes high bandwidth.
1363 printk(KERN_ERR
"intr period %d uframes, NYET!",
1369 qh
->period
= urb
->interval
;
1373 /* support for tt scheduling, and access to toggles */
1376 if (!usb_pipecontrol(urb
->pipe
))
1377 usb_settoggle(urb
->dev
, usb_pipeendpoint(urb
->pipe
), !is_input
,
1383 * For control/bulk/interrupt, return QH with these TDs appended.
1384 * Allocates and initializes the QH if necessary.
1385 * Returns null if it can't allocate a QH it needs to.
1386 * If the QH has TDs (urbs) already, that's great.
1388 static struct isp1760_qh
*qh_append_tds(struct isp1760_hcd
*priv
,
1389 struct urb
*urb
, struct list_head
*qtd_list
, int epnum
,
1392 struct isp1760_qh
*qh
;
1393 struct isp1760_qtd
*qtd
;
1394 struct isp1760_qtd
*prev_qtd
;
1396 qh
= (struct isp1760_qh
*)*ptr
;
1398 /* can't sleep here, we have priv->lock... */
1399 qh
= qh_make(priv
, urb
, GFP_ATOMIC
);
1405 qtd
= list_entry(qtd_list
->next
, struct isp1760_qtd
,
1407 if (!list_empty(&qh
->qtd_list
))
1408 prev_qtd
= list_entry(qh
->qtd_list
.prev
,
1409 struct isp1760_qtd
, qtd_list
);
1413 list_splice(qtd_list
, qh
->qtd_list
.prev
);
1415 BUG_ON(prev_qtd
->hw_next
);
1416 prev_qtd
->hw_next
= qtd
;
1423 static void qtd_list_free(struct isp1760_hcd
*priv
, struct urb
*urb
,
1424 struct list_head
*qtd_list
)
1426 struct list_head
*entry
, *temp
;
1428 list_for_each_safe(entry
, temp
, qtd_list
) {
1429 struct isp1760_qtd
*qtd
;
1431 qtd
= list_entry(entry
, struct isp1760_qtd
, qtd_list
);
1432 list_del(&qtd
->qtd_list
);
1433 isp1760_qtd_free(qtd
);
1437 static int isp1760_prepare_enqueue(struct isp1760_hcd
*priv
, struct urb
*urb
,
1438 struct list_head
*qtd_list
, gfp_t mem_flags
, packet_enqueue
*p
)
1440 struct isp1760_qtd
*qtd
;
1442 unsigned long flags
;
1443 struct isp1760_qh
*qh
= NULL
;
1447 qtd
= list_entry(qtd_list
->next
, struct isp1760_qtd
, qtd_list
);
1448 epnum
= urb
->ep
->desc
.bEndpointAddress
;
1450 spin_lock_irqsave(&priv
->lock
, flags
);
1451 if (!HCD_HW_ACCESSIBLE(priv_to_hcd(priv
))) {
1455 rc
= usb_hcd_link_urb_to_ep(priv_to_hcd(priv
), urb
);
1459 qh
= urb
->ep
->hcpriv
;
1461 qh_busy
= !list_empty(&qh
->qtd_list
);
1465 qh
= qh_append_tds(priv
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
1467 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv
), urb
);
1473 p(priv_to_hcd(priv
), qh
, qtd
);
1476 spin_unlock_irqrestore(&priv
->lock
, flags
);
1478 qtd_list_free(priv
, urb
, qtd_list
);
1482 static struct isp1760_qtd
*isp1760_qtd_alloc(struct isp1760_hcd
*priv
,
1485 struct isp1760_qtd
*qtd
;
1487 qtd
= kmem_cache_zalloc(qtd_cachep
, flags
);
1489 INIT_LIST_HEAD(&qtd
->qtd_list
);
1495 * create a list of filled qtds for this URB; won't link into qh.
1497 static struct list_head
*qh_urb_transaction(struct isp1760_hcd
*priv
,
1498 struct urb
*urb
, struct list_head
*head
, gfp_t flags
)
1500 struct isp1760_qtd
*qtd
, *qtd_prev
;
1507 * URBs map to sequences of QTDs: one logical transaction
1509 qtd
= isp1760_qtd_alloc(priv
, flags
);
1513 list_add_tail(&qtd
->qtd_list
, head
);
1515 urb
->status
= -EINPROGRESS
;
1518 /* for split transactions, SplitXState initialized to zero */
1520 len
= urb
->transfer_buffer_length
;
1521 is_input
= usb_pipein(urb
->pipe
);
1522 if (usb_pipecontrol(urb
->pipe
)) {
1524 qtd_fill(qtd
, urb
->setup_packet
,
1525 sizeof(struct usb_ctrlrequest
),
1528 /* ... and always at least one more pid */
1529 token
^= DATA_TOGGLE
;
1531 qtd
= isp1760_qtd_alloc(priv
, flags
);
1535 qtd_prev
->hw_next
= qtd
;
1536 list_add_tail(&qtd
->qtd_list
, head
);
1538 /* for zero length DATA stages, STATUS is always IN */
1544 * data transfer stage: buffer setup
1546 buf
= urb
->transfer_buffer
;
1553 maxpacket
= max_packet(usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
));
1556 * buffer gets wrapped in one or more qtds;
1557 * last one may be "short" (including zero len)
1558 * and may serve as a control status ack
1564 /* XXX This looks like usb storage / SCSI bug */
1565 printk(KERN_ERR
"buf is null, dma is %08lx len is %d\n",
1566 (long unsigned)urb
->transfer_dma
, len
);
1570 this_qtd_len
= qtd_fill(qtd
, buf
, len
, token
);
1571 len
-= this_qtd_len
;
1572 buf
+= this_qtd_len
;
1574 /* qh makes control packets use qtd toggle; maybe switch it */
1575 if ((maxpacket
& (this_qtd_len
+ (maxpacket
- 1))) == 0)
1576 token
^= DATA_TOGGLE
;
1582 qtd
= isp1760_qtd_alloc(priv
, flags
);
1586 qtd_prev
->hw_next
= qtd
;
1587 list_add_tail(&qtd
->qtd_list
, head
);
1591 * control requests may need a terminating data "status" ack;
1592 * bulk ones may need a terminating short packet (zero length).
1594 if (urb
->transfer_buffer_length
!= 0) {
1597 if (usb_pipecontrol(urb
->pipe
)) {
1599 /* "in" <--> "out" */
1602 token
|= DATA_TOGGLE
;
1603 } else if (usb_pipebulk(urb
->pipe
)
1604 && (urb
->transfer_flags
& URB_ZERO_PACKET
)
1605 && !(urb
->transfer_buffer_length
% maxpacket
)) {
1610 qtd
= isp1760_qtd_alloc(priv
, flags
);
1614 qtd_prev
->hw_next
= qtd
;
1615 list_add_tail(&qtd
->qtd_list
, head
);
1617 /* never any data in such packets */
1618 qtd_fill(qtd
, NULL
, 0, token
);
1622 qtd
->status
= URB_COMPLETE_NOTIFY
;
1626 qtd_list_free(priv
, urb
, head
);
1630 static int isp1760_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
1633 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1634 struct list_head qtd_list
;
1637 INIT_LIST_HEAD(&qtd_list
);
1639 switch (usb_pipetype(urb
->pipe
)) {
1643 if (!qh_urb_transaction(priv
, urb
, &qtd_list
, mem_flags
))
1645 pe
= enqueue_an_ATL_packet
;
1648 case PIPE_INTERRUPT
:
1649 if (!qh_urb_transaction(priv
, urb
, &qtd_list
, mem_flags
))
1651 pe
= enqueue_an_INT_packet
;
1654 case PIPE_ISOCHRONOUS
:
1655 printk(KERN_ERR
"PIPE_ISOCHRONOUS ain't supported\n");
1660 return isp1760_prepare_enqueue(priv
, urb
, &qtd_list
, mem_flags
, pe
);
1663 static int isp1760_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
,
1666 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1667 struct inter_packet_info
*ints
;
1669 u32 reg_base
, or_reg
, skip_reg
;
1670 unsigned long flags
;
1674 switch (usb_pipetype(urb
->pipe
)) {
1675 case PIPE_ISOCHRONOUS
:
1679 case PIPE_INTERRUPT
:
1680 ints
= priv
->int_ints
;
1681 reg_base
= INT_PTD_OFFSET
;
1682 or_reg
= HC_INT_IRQ_MASK_OR_REG
;
1683 skip_reg
= HC_INT_PTD_SKIPMAP_REG
;
1684 pe
= enqueue_an_INT_packet
;
1688 ints
= priv
->atl_ints
;
1689 reg_base
= ATL_PTD_OFFSET
;
1690 or_reg
= HC_ATL_IRQ_MASK_OR_REG
;
1691 skip_reg
= HC_ATL_PTD_SKIPMAP_REG
;
1692 pe
= enqueue_an_ATL_packet
;
1696 memset(&ptd
, 0, sizeof(ptd
));
1697 spin_lock_irqsave(&priv
->lock
, flags
);
1699 for (i
= 0; i
< 32; i
++) {
1700 if (ints
->urb
== urb
) {
1703 struct isp1760_qtd
*qtd
;
1704 struct isp1760_qh
*qh
= ints
->qh
;
1706 skip_map
= reg_read32(hcd
->regs
, skip_reg
);
1708 reg_write32(hcd
->regs
, skip_reg
, skip_map
);
1710 or_map
= reg_read32(hcd
->regs
, or_reg
);
1711 or_map
&= ~(1 << i
);
1712 reg_write32(hcd
->regs
, or_reg
, or_map
);
1714 ptd_write(hcd
->regs
, reg_base
, i
, &ptd
);
1717 qtd
= clean_up_qtdlist(qtd
);
1719 free_mem(priv
, ints
->payload
);
1724 ints
->data_buffer
= NULL
;
1727 isp1760_urb_done(priv
, urb
, status
);
1732 } else if (ints
->qtd
) {
1733 struct isp1760_qtd
*qtd
, *prev_qtd
= ints
->qtd
;
1735 for (qtd
= ints
->qtd
->hw_next
; qtd
; qtd
= qtd
->hw_next
) {
1736 if (qtd
->urb
== urb
) {
1738 clean_up_qtdlist(qtd
);
1739 isp1760_urb_done(priv
, urb
, status
);
1744 /* we found the urb before the end of the list */
1751 spin_unlock_irqrestore(&priv
->lock
, flags
);
1755 static irqreturn_t
isp1760_irq(struct usb_hcd
*usb_hcd
)
1757 struct isp1760_hcd
*priv
= hcd_to_priv(usb_hcd
);
1759 irqreturn_t irqret
= IRQ_NONE
;
1761 spin_lock(&priv
->lock
);
1763 if (!(usb_hcd
->state
& HC_STATE_RUNNING
))
1766 imask
= reg_read32(usb_hcd
->regs
, HC_INTERRUPT_REG
);
1767 if (unlikely(!imask
))
1770 reg_write32(usb_hcd
->regs
, HC_INTERRUPT_REG
, imask
);
1771 if (imask
& (HC_ATL_INT
| HC_SOT_INT
))
1772 do_atl_int(usb_hcd
);
1774 if (imask
& HC_INTL_INT
)
1775 do_intl_int(usb_hcd
);
1777 irqret
= IRQ_HANDLED
;
1779 spin_unlock(&priv
->lock
);
1783 static int isp1760_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
1785 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1786 u32 temp
, status
= 0;
1789 unsigned long flags
;
1791 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1792 if (!HC_IS_RUNNING(hcd
->state
))
1795 /* init status to no-changes */
1799 spin_lock_irqsave(&priv
->lock
, flags
);
1800 temp
= reg_read32(hcd
->regs
, HC_PORTSC1
);
1802 if (temp
& PORT_OWNER
) {
1803 if (temp
& PORT_CSC
) {
1805 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
);
1811 * Return status information even for ports with OWNER set.
1812 * Otherwise khubd wouldn't see the disconnect event when a
1813 * high-speed device is switched over to the companion
1814 * controller by the user.
1817 if ((temp
& mask
) != 0
1818 || ((temp
& PORT_RESUME
) != 0
1819 && time_after_eq(jiffies
,
1820 priv
->reset_done
))) {
1821 buf
[0] |= 1 << (0 + 1);
1824 /* FIXME autosuspend idle root hubs */
1826 spin_unlock_irqrestore(&priv
->lock
, flags
);
1827 return status
? retval
: 0;
1830 static void isp1760_hub_descriptor(struct isp1760_hcd
*priv
,
1831 struct usb_hub_descriptor
*desc
)
1833 int ports
= HCS_N_PORTS(priv
->hcs_params
);
1836 desc
->bDescriptorType
= 0x29;
1837 /* priv 1.0, 2.3.9 says 20ms max */
1838 desc
->bPwrOn2PwrGood
= 10;
1839 desc
->bHubContrCurrent
= 0;
1841 desc
->bNbrPorts
= ports
;
1842 temp
= 1 + (ports
/ 8);
1843 desc
->bDescLength
= 7 + 2 * temp
;
1845 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1846 memset(&desc
->bitmap
[0], 0, temp
);
1847 memset(&desc
->bitmap
[temp
], 0xff, temp
);
1849 /* per-port overcurrent reporting */
1851 if (HCS_PPC(priv
->hcs_params
))
1852 /* per-port power control */
1855 /* no power switching */
1857 desc
->wHubCharacteristics
= cpu_to_le16(temp
);
1860 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1862 static int check_reset_complete(struct usb_hcd
*hcd
, int index
,
1865 if (!(port_status
& PORT_CONNECT
))
1868 /* if reset finished and it's still not enabled -- handoff */
1869 if (!(port_status
& PORT_PE
)) {
1871 printk(KERN_ERR
"port %d full speed --> companion\n",
1874 port_status
|= PORT_OWNER
;
1875 port_status
&= ~PORT_RWC_BITS
;
1876 reg_write32(hcd
->regs
, HC_PORTSC1
, port_status
);
1879 printk(KERN_ERR
"port %d high speed\n", index
+ 1);
1884 static int isp1760_hub_control(struct usb_hcd
*hcd
, u16 typeReq
,
1885 u16 wValue
, u16 wIndex
, char *buf
, u16 wLength
)
1887 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
1888 int ports
= HCS_N_PORTS(priv
->hcs_params
);
1890 unsigned long flags
;
1895 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1896 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1897 * (track current state ourselves) ... blink for diagnostics,
1898 * power, "this is the one", etc. EHCI spec supports this.
1901 spin_lock_irqsave(&priv
->lock
, flags
);
1903 case ClearHubFeature
:
1905 case C_HUB_LOCAL_POWER
:
1906 case C_HUB_OVER_CURRENT
:
1907 /* no hub-wide feature/status flags */
1913 case ClearPortFeature
:
1914 if (!wIndex
|| wIndex
> ports
)
1917 temp
= reg_read32(hcd
->regs
, HC_PORTSC1
);
1920 * Even if OWNER is set, so the port is owned by the
1921 * companion controller, khubd needs to be able to clear
1922 * the port-change status bits (especially
1923 * USB_PORT_STAT_C_CONNECTION).
1927 case USB_PORT_FEAT_ENABLE
:
1928 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
& ~PORT_PE
);
1930 case USB_PORT_FEAT_C_ENABLE
:
1933 case USB_PORT_FEAT_SUSPEND
:
1934 if (temp
& PORT_RESET
)
1937 if (temp
& PORT_SUSPEND
) {
1938 if ((temp
& PORT_PE
) == 0)
1940 /* resume signaling for 20 msec */
1941 temp
&= ~(PORT_RWC_BITS
);
1942 reg_write32(hcd
->regs
, HC_PORTSC1
,
1943 temp
| PORT_RESUME
);
1944 priv
->reset_done
= jiffies
+
1945 msecs_to_jiffies(20);
1948 case USB_PORT_FEAT_C_SUSPEND
:
1949 /* we auto-clear this feature */
1951 case USB_PORT_FEAT_POWER
:
1952 if (HCS_PPC(priv
->hcs_params
))
1953 reg_write32(hcd
->regs
, HC_PORTSC1
,
1954 temp
& ~PORT_POWER
);
1956 case USB_PORT_FEAT_C_CONNECTION
:
1957 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
| PORT_CSC
);
1959 case USB_PORT_FEAT_C_OVER_CURRENT
:
1962 case USB_PORT_FEAT_C_RESET
:
1963 /* GetPortStatus clears reset */
1968 reg_read32(hcd
->regs
, HC_USBCMD
);
1970 case GetHubDescriptor
:
1971 isp1760_hub_descriptor(priv
, (struct usb_hub_descriptor
*)
1975 /* no hub-wide feature/status flags */
1979 if (!wIndex
|| wIndex
> ports
)
1983 temp
= reg_read32(hcd
->regs
, HC_PORTSC1
);
1985 /* wPortChange bits */
1986 if (temp
& PORT_CSC
)
1987 status
|= USB_PORT_STAT_C_CONNECTION
<< 16;
1990 /* whoever resumes must GetPortStatus to complete it!! */
1991 if (temp
& PORT_RESUME
) {
1992 printk(KERN_ERR
"Port resume should be skipped.\n");
1994 /* Remote Wakeup received? */
1995 if (!priv
->reset_done
) {
1996 /* resume signaling for 20 msec */
1997 priv
->reset_done
= jiffies
1998 + msecs_to_jiffies(20);
1999 /* check the port again */
2000 mod_timer(&priv_to_hcd(priv
)->rh_timer
,
2004 /* resume completed? */
2005 else if (time_after_eq(jiffies
,
2006 priv
->reset_done
)) {
2007 status
|= USB_PORT_STAT_C_SUSPEND
<< 16;
2008 priv
->reset_done
= 0;
2010 /* stop resume signaling */
2011 temp
= reg_read32(hcd
->regs
, HC_PORTSC1
);
2012 reg_write32(hcd
->regs
, HC_PORTSC1
,
2013 temp
& ~(PORT_RWC_BITS
| PORT_RESUME
));
2014 retval
= handshake(hcd
, HC_PORTSC1
,
2015 PORT_RESUME
, 0, 2000 /* 2msec */);
2018 "port %d resume error %d\n",
2019 wIndex
+ 1, retval
);
2022 temp
&= ~(PORT_SUSPEND
|PORT_RESUME
|(3<<10));
2026 /* whoever resets must GetPortStatus to complete it!! */
2027 if ((temp
& PORT_RESET
)
2028 && time_after_eq(jiffies
,
2029 priv
->reset_done
)) {
2030 status
|= USB_PORT_STAT_C_RESET
<< 16;
2031 priv
->reset_done
= 0;
2033 /* force reset to complete */
2034 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
& ~PORT_RESET
);
2035 /* REVISIT: some hardware needs 550+ usec to clear
2036 * this bit; seems too long to spin routinely...
2038 retval
= handshake(hcd
, HC_PORTSC1
,
2039 PORT_RESET
, 0, 750);
2041 isp1760_err(priv
, "port %d reset error %d\n",
2042 wIndex
+ 1, retval
);
2046 /* see what we found out */
2047 temp
= check_reset_complete(hcd
, wIndex
,
2048 reg_read32(hcd
->regs
, HC_PORTSC1
));
2051 * Even if OWNER is set, there's no harm letting khubd
2052 * see the wPortStatus values (they should all be 0 except
2053 * for PORT_POWER anyway).
2056 if (temp
& PORT_OWNER
)
2057 printk(KERN_ERR
"Warning: PORT_OWNER is set\n");
2059 if (temp
& PORT_CONNECT
) {
2060 status
|= USB_PORT_STAT_CONNECTION
;
2061 /* status may be from integrated TT */
2062 status
|= ehci_port_speed(priv
, temp
);
2065 status
|= USB_PORT_STAT_ENABLE
;
2066 if (temp
& (PORT_SUSPEND
|PORT_RESUME
))
2067 status
|= USB_PORT_STAT_SUSPEND
;
2068 if (temp
& PORT_RESET
)
2069 status
|= USB_PORT_STAT_RESET
;
2070 if (temp
& PORT_POWER
)
2071 status
|= USB_PORT_STAT_POWER
;
2073 put_unaligned(cpu_to_le32(status
), (__le32
*) buf
);
2077 case C_HUB_LOCAL_POWER
:
2078 case C_HUB_OVER_CURRENT
:
2079 /* no hub-wide feature/status flags */
2085 case SetPortFeature
:
2086 selector
= wIndex
>> 8;
2088 if (!wIndex
|| wIndex
> ports
)
2091 temp
= reg_read32(hcd
->regs
, HC_PORTSC1
);
2092 if (temp
& PORT_OWNER
)
2095 /* temp &= ~PORT_RWC_BITS; */
2097 case USB_PORT_FEAT_ENABLE
:
2098 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
| PORT_PE
);
2101 case USB_PORT_FEAT_SUSPEND
:
2102 if ((temp
& PORT_PE
) == 0
2103 || (temp
& PORT_RESET
) != 0)
2106 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
| PORT_SUSPEND
);
2108 case USB_PORT_FEAT_POWER
:
2109 if (HCS_PPC(priv
->hcs_params
))
2110 reg_write32(hcd
->regs
, HC_PORTSC1
,
2113 case USB_PORT_FEAT_RESET
:
2114 if (temp
& PORT_RESUME
)
2116 /* line status bits may report this as low speed,
2117 * which can be fine if this root hub has a
2118 * transaction translator built in.
2120 if ((temp
& (PORT_PE
|PORT_CONNECT
)) == PORT_CONNECT
2121 && PORT_USB11(temp
)) {
2128 * caller must wait, then call GetPortStatus
2129 * usb 2.0 spec says 50 ms resets on root
2131 priv
->reset_done
= jiffies
+
2132 msecs_to_jiffies(50);
2134 reg_write32(hcd
->regs
, HC_PORTSC1
, temp
);
2139 reg_read32(hcd
->regs
, HC_USBCMD
);
2144 /* "stall" on error */
2147 spin_unlock_irqrestore(&priv
->lock
, flags
);
2151 static void isp1760_endpoint_disable(struct usb_hcd
*usb_hcd
,
2152 struct usb_host_endpoint
*ep
)
2154 struct isp1760_hcd
*priv
= hcd_to_priv(usb_hcd
);
2155 struct isp1760_qh
*qh
;
2156 struct isp1760_qtd
*qtd
;
2157 unsigned long flags
;
2159 spin_lock_irqsave(&priv
->lock
, flags
);
2166 /* more than entry might get removed */
2167 if (list_empty(&qh
->qtd_list
))
2170 qtd
= list_first_entry(&qh
->qtd_list
, struct isp1760_qtd
,
2173 if (qtd
->status
& URB_ENQUEUED
) {
2175 spin_unlock_irqrestore(&priv
->lock
, flags
);
2176 isp1760_urb_dequeue(usb_hcd
, qtd
->urb
, -ECONNRESET
);
2177 spin_lock_irqsave(&priv
->lock
, flags
);
2182 clean_up_qtdlist(qtd
);
2183 isp1760_urb_done(priv
, urb
, -ECONNRESET
);
2188 /* remove requests and leak them.
2189 * ATL are pretty fast done, INT could take a while...
2190 * The latter shoule be removed
2193 spin_unlock_irqrestore(&priv
->lock
, flags
);
2196 static int isp1760_get_frame(struct usb_hcd
*hcd
)
2198 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
2201 fr
= reg_read32(hcd
->regs
, HC_FRINDEX
);
2202 return (fr
>> 3) % priv
->periodic_size
;
2205 static void isp1760_stop(struct usb_hcd
*hcd
)
2207 struct isp1760_hcd
*priv
= hcd_to_priv(hcd
);
2210 isp1760_hub_control(hcd
, ClearPortFeature
, USB_PORT_FEAT_POWER
, 1,
2214 spin_lock_irq(&priv
->lock
);
2217 temp
= reg_read32(hcd
->regs
, HC_HW_MODE_CTRL
);
2218 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, temp
&= ~HW_GLOBAL_INTR_EN
);
2219 spin_unlock_irq(&priv
->lock
);
2221 reg_write32(hcd
->regs
, HC_CONFIGFLAG
, 0);
2224 static void isp1760_shutdown(struct usb_hcd
*hcd
)
2229 temp
= reg_read32(hcd
->regs
, HC_HW_MODE_CTRL
);
2230 reg_write32(hcd
->regs
, HC_HW_MODE_CTRL
, temp
&= ~HW_GLOBAL_INTR_EN
);
2232 command
= reg_read32(hcd
->regs
, HC_USBCMD
);
2233 command
&= ~CMD_RUN
;
2234 reg_write32(hcd
->regs
, HC_USBCMD
, command
);
2237 static const struct hc_driver isp1760_hc_driver
= {
2238 .description
= "isp1760-hcd",
2239 .product_desc
= "NXP ISP1760 USB Host Controller",
2240 .hcd_priv_size
= sizeof(struct isp1760_hcd
),
2242 .flags
= HCD_MEMORY
| HCD_USB2
,
2243 .reset
= isp1760_hc_setup
,
2244 .start
= isp1760_run
,
2245 .stop
= isp1760_stop
,
2246 .shutdown
= isp1760_shutdown
,
2247 .urb_enqueue
= isp1760_urb_enqueue
,
2248 .urb_dequeue
= isp1760_urb_dequeue
,
2249 .endpoint_disable
= isp1760_endpoint_disable
,
2250 .get_frame_number
= isp1760_get_frame
,
2251 .hub_status_data
= isp1760_hub_status_data
,
2252 .hub_control
= isp1760_hub_control
,
2255 int __init
init_kmem_once(void)
2257 qtd_cachep
= kmem_cache_create("isp1760_qtd",
2258 sizeof(struct isp1760_qtd
), 0, SLAB_TEMPORARY
|
2259 SLAB_MEM_SPREAD
, NULL
);
2264 qh_cachep
= kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh
),
2265 0, SLAB_TEMPORARY
| SLAB_MEM_SPREAD
, NULL
);
2268 kmem_cache_destroy(qtd_cachep
);
2275 void deinit_kmem_cache(void)
2277 kmem_cache_destroy(qtd_cachep
);
2278 kmem_cache_destroy(qh_cachep
);
2281 struct usb_hcd
*isp1760_register(phys_addr_t res_start
, resource_size_t res_len
,
2282 int irq
, unsigned long irqflags
,
2283 struct device
*dev
, const char *busname
,
2284 unsigned int devflags
)
2286 struct usb_hcd
*hcd
;
2287 struct isp1760_hcd
*priv
;
2291 return ERR_PTR(-ENODEV
);
2293 /* prevent usb-core allocating DMA pages */
2294 dev
->dma_mask
= NULL
;
2296 hcd
= usb_create_hcd(&isp1760_hc_driver
, dev
, dev_name(dev
));
2298 return ERR_PTR(-ENOMEM
);
2300 priv
= hcd_to_priv(hcd
);
2301 priv
->devflags
= devflags
;
2303 hcd
->regs
= ioremap(res_start
, res_len
);
2310 hcd
->rsrc_start
= res_start
;
2311 hcd
->rsrc_len
= res_len
;
2313 ret
= usb_add_hcd(hcd
, irq
, irqflags
);
2325 return ERR_PTR(ret
);
2328 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2329 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2330 MODULE_LICENSE("GPL v2");