atmel_lcdfb: add fb_blank function
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / video / atmel_lcdfb.c
blob59654e29e205500ec93485e1231473bb7a5b9828
1 /*
2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
22 #include <mach/board.h>
23 #include <mach/cpu.h>
24 #include <mach/gpio.h>
26 #include <video/atmel_lcdc.h>
28 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
29 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
31 /* configurable parameters */
32 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
33 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
34 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
36 #if defined(CONFIG_ARCH_AT91)
37 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
38 | FBINFO_PARTIAL_PAN_OK \
39 | FBINFO_HWACCEL_YPAN)
41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
42 struct fb_var_screeninfo *var)
46 #elif defined(CONFIG_AVR32)
47 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
48 | FBINFO_PARTIAL_PAN_OK \
49 | FBINFO_HWACCEL_XPAN \
50 | FBINFO_HWACCEL_YPAN)
52 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
53 struct fb_var_screeninfo *var)
55 u32 dma2dcfg;
56 u32 pixeloff;
58 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
60 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
61 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
62 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
64 /* Update configuration */
65 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
66 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
67 | ATMEL_LCDC_DMAUPDT);
69 #endif
71 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
72 | ATMEL_LCDC_POL_POSITIVE
73 | ATMEL_LCDC_ENA_PWMENABLE;
75 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
77 /* some bl->props field just changed */
78 static int atmel_bl_update_status(struct backlight_device *bl)
80 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
81 int power = sinfo->bl_power;
82 int brightness = bl->props.brightness;
84 /* REVISIT there may be a meaningful difference between
85 * fb_blank and power ... there seem to be some cases
86 * this doesn't handle correctly.
88 if (bl->props.fb_blank != sinfo->bl_power)
89 power = bl->props.fb_blank;
90 else if (bl->props.power != sinfo->bl_power)
91 power = bl->props.power;
93 if (brightness < 0 && power == FB_BLANK_UNBLANK)
94 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
95 else if (power != FB_BLANK_UNBLANK)
96 brightness = 0;
98 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
99 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
100 brightness ? contrast_ctr : 0);
102 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
104 return 0;
107 static int atmel_bl_get_brightness(struct backlight_device *bl)
109 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
111 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114 static const struct backlight_ops atmel_lcdc_bl_ops = {
115 .update_status = atmel_bl_update_status,
116 .get_brightness = atmel_bl_get_brightness,
119 static void init_backlight(struct atmel_lcdfb_info *sinfo)
121 struct backlight_properties props;
122 struct backlight_device *bl;
124 sinfo->bl_power = FB_BLANK_UNBLANK;
126 if (sinfo->backlight)
127 return;
129 memset(&props, 0, sizeof(struct backlight_properties));
130 props.max_brightness = 0xff;
131 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
132 &atmel_lcdc_bl_ops, &props);
133 if (IS_ERR(bl)) {
134 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
135 PTR_ERR(bl));
136 return;
138 sinfo->backlight = bl;
140 bl->props.power = FB_BLANK_UNBLANK;
141 bl->props.fb_blank = FB_BLANK_UNBLANK;
142 bl->props.brightness = atmel_bl_get_brightness(bl);
145 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
147 if (sinfo->backlight)
148 backlight_device_unregister(sinfo->backlight);
151 #else
153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
155 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
158 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
162 #endif
164 static void init_contrast(struct atmel_lcdfb_info *sinfo)
166 /* contrast pwm can be 'inverted' */
167 if (sinfo->lcdcon_pol_negative)
168 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
170 /* have some default contrast/backlight settings */
171 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
172 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
174 if (sinfo->lcdcon_is_backlight)
175 init_backlight(sinfo);
179 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
180 .type = FB_TYPE_PACKED_PIXELS,
181 .visual = FB_VISUAL_TRUECOLOR,
182 .xpanstep = 0,
183 .ypanstep = 1,
184 .ywrapstep = 0,
185 .accel = FB_ACCEL_NONE,
188 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
190 unsigned long value;
192 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
193 || cpu_is_at32ap7000()))
194 return xres;
196 value = xres;
197 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
198 /* STN display */
199 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
200 value *= 3;
202 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
203 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
204 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
205 value = DIV_ROUND_UP(value, 4);
206 else
207 value = DIV_ROUND_UP(value, 8);
210 return value;
213 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
215 /* Turn off the LCD controller and the DMA controller */
216 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
217 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
219 /* Wait for the LCDC core to become idle */
220 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
221 msleep(10);
223 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
226 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
228 atmel_lcdfb_stop_nowait(sinfo);
230 /* Wait for DMA engine to become idle... */
231 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
232 msleep(10);
235 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
237 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
238 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
239 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
240 | ATMEL_LCDC_PWR);
243 static void atmel_lcdfb_update_dma(struct fb_info *info,
244 struct fb_var_screeninfo *var)
246 struct atmel_lcdfb_info *sinfo = info->par;
247 struct fb_fix_screeninfo *fix = &info->fix;
248 unsigned long dma_addr;
250 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
251 + var->xoffset * var->bits_per_pixel / 8);
253 dma_addr &= ~3UL;
255 /* Set framebuffer DMA base address and pixel offset */
256 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
258 atmel_lcdfb_update_dma2d(sinfo, var);
261 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
263 struct fb_info *info = sinfo->info;
265 dma_free_writecombine(info->device, info->fix.smem_len,
266 info->screen_base, info->fix.smem_start);
270 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
271 * @sinfo: the frame buffer to allocate memory for
273 * This function is called only from the atmel_lcdfb_probe()
274 * so no locking by fb_info->mm_lock around smem_len setting is needed.
276 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
278 struct fb_info *info = sinfo->info;
279 struct fb_var_screeninfo *var = &info->var;
280 unsigned int smem_len;
282 smem_len = (var->xres_virtual * var->yres_virtual
283 * ((var->bits_per_pixel + 7) / 8));
284 info->fix.smem_len = max(smem_len, sinfo->smem_len);
286 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
287 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
289 if (!info->screen_base) {
290 return -ENOMEM;
293 memset(info->screen_base, 0, info->fix.smem_len);
295 return 0;
298 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
299 struct fb_info *info)
301 struct fb_videomode varfbmode;
302 const struct fb_videomode *fbmode = NULL;
304 fb_var_to_videomode(&varfbmode, var);
305 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
306 if (fbmode)
307 fb_videomode_to_var(var, fbmode);
308 return fbmode;
313 * atmel_lcdfb_check_var - Validates a var passed in.
314 * @var: frame buffer variable screen structure
315 * @info: frame buffer structure that represents a single frame buffer
317 * Checks to see if the hardware supports the state requested by
318 * var passed in. This function does not alter the hardware
319 * state!!! This means the data stored in struct fb_info and
320 * struct atmel_lcdfb_info do not change. This includes the var
321 * inside of struct fb_info. Do NOT change these. This function
322 * can be called on its own if we intent to only test a mode and
323 * not actually set it. The stuff in modedb.c is a example of
324 * this. If the var passed in is slightly off by what the
325 * hardware can support then we alter the var PASSED in to what
326 * we can do. If the hardware doesn't support mode change a
327 * -EINVAL will be returned by the upper layers. You don't need
328 * to implement this function then. If you hardware doesn't
329 * support changing the resolution then this function is not
330 * needed. In this case the driver would just provide a var that
331 * represents the static state the screen is in.
333 * Returns negative errno on error, or zero on success.
335 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
336 struct fb_info *info)
338 struct device *dev = info->device;
339 struct atmel_lcdfb_info *sinfo = info->par;
340 unsigned long clk_value_khz;
342 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
344 dev_dbg(dev, "%s:\n", __func__);
346 if (!(var->pixclock && var->bits_per_pixel)) {
347 /* choose a suitable mode if possible */
348 if (!atmel_lcdfb_choose_mode(var, info)) {
349 dev_err(dev, "needed value not specified\n");
350 return -EINVAL;
354 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
355 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
356 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
357 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
359 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
360 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
361 return -EINVAL;
364 /* Do not allow to have real resoulution larger than virtual */
365 if (var->xres > var->xres_virtual)
366 var->xres_virtual = var->xres;
368 if (var->yres > var->yres_virtual)
369 var->yres_virtual = var->yres;
371 /* Force same alignment for each line */
372 var->xres = (var->xres + 3) & ~3UL;
373 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
375 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
376 var->transp.msb_right = 0;
377 var->transp.offset = var->transp.length = 0;
378 var->xoffset = var->yoffset = 0;
380 if (info->fix.smem_len) {
381 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
382 * ((var->bits_per_pixel + 7) / 8));
383 if (smem_len > info->fix.smem_len)
384 return -EINVAL;
387 /* Saturate vertical and horizontal timings at maximum values */
388 var->vsync_len = min_t(u32, var->vsync_len,
389 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
390 var->upper_margin = min_t(u32, var->upper_margin,
391 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
392 var->lower_margin = min_t(u32, var->lower_margin,
393 ATMEL_LCDC_VFP);
394 var->right_margin = min_t(u32, var->right_margin,
395 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
396 var->hsync_len = min_t(u32, var->hsync_len,
397 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
398 var->left_margin = min_t(u32, var->left_margin,
399 ATMEL_LCDC_HBP + 1);
401 /* Some parameters can't be zero */
402 var->vsync_len = max_t(u32, var->vsync_len, 1);
403 var->right_margin = max_t(u32, var->right_margin, 1);
404 var->hsync_len = max_t(u32, var->hsync_len, 1);
405 var->left_margin = max_t(u32, var->left_margin, 1);
407 switch (var->bits_per_pixel) {
408 case 1:
409 case 2:
410 case 4:
411 case 8:
412 var->red.offset = var->green.offset = var->blue.offset = 0;
413 var->red.length = var->green.length = var->blue.length
414 = var->bits_per_pixel;
415 break;
416 case 15:
417 case 16:
418 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
419 /* RGB:565 mode */
420 var->red.offset = 11;
421 var->blue.offset = 0;
422 var->green.length = 6;
423 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
424 var->red.offset = 10;
425 var->blue.offset = 0;
426 var->green.length = 5;
427 } else {
428 /* BGR:555 mode */
429 var->red.offset = 0;
430 var->blue.offset = 10;
431 var->green.length = 5;
433 var->green.offset = 5;
434 var->red.length = var->blue.length = 5;
435 break;
436 case 32:
437 var->transp.offset = 24;
438 var->transp.length = 8;
439 /* fall through */
440 case 24:
441 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
442 /* RGB:888 mode */
443 var->red.offset = 16;
444 var->blue.offset = 0;
445 } else {
446 /* BGR:888 mode */
447 var->red.offset = 0;
448 var->blue.offset = 16;
450 var->green.offset = 8;
451 var->red.length = var->green.length = var->blue.length = 8;
452 break;
453 default:
454 dev_err(dev, "color depth %d not supported\n",
455 var->bits_per_pixel);
456 return -EINVAL;
459 return 0;
463 * LCD reset sequence
465 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
467 might_sleep();
469 atmel_lcdfb_stop(sinfo);
470 atmel_lcdfb_start(sinfo);
474 * atmel_lcdfb_set_par - Alters the hardware state.
475 * @info: frame buffer structure that represents a single frame buffer
477 * Using the fb_var_screeninfo in fb_info we set the resolution
478 * of the this particular framebuffer. This function alters the
479 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
480 * not alter var in fb_info since we are using that data. This
481 * means we depend on the data in var inside fb_info to be
482 * supported by the hardware. atmel_lcdfb_check_var is always called
483 * before atmel_lcdfb_set_par to ensure this. Again if you can't
484 * change the resolution you don't need this function.
487 static int atmel_lcdfb_set_par(struct fb_info *info)
489 struct atmel_lcdfb_info *sinfo = info->par;
490 unsigned long hozval_linesz;
491 unsigned long value;
492 unsigned long clk_value_khz;
493 unsigned long bits_per_line;
494 unsigned long pix_factor = 2;
496 might_sleep();
498 dev_dbg(info->device, "%s:\n", __func__);
499 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
500 info->var.xres, info->var.yres,
501 info->var.xres_virtual, info->var.yres_virtual);
503 atmel_lcdfb_stop_nowait(sinfo);
505 if (info->var.bits_per_pixel == 1)
506 info->fix.visual = FB_VISUAL_MONO01;
507 else if (info->var.bits_per_pixel <= 8)
508 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
509 else
510 info->fix.visual = FB_VISUAL_TRUECOLOR;
512 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
513 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
515 /* Re-initialize the DMA engine... */
516 dev_dbg(info->device, " * update DMA engine\n");
517 atmel_lcdfb_update_dma(info, &info->var);
519 /* ...set frame size and burst length = 8 words (?) */
520 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
521 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
522 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
524 /* Now, the LCDC core... */
526 /* Set pixel clock */
527 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
528 pix_factor = 1;
530 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
532 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
534 if (value < pix_factor) {
535 dev_notice(info->device, "Bypassing pixel clock divider\n");
536 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
537 } else {
538 value = (value / pix_factor) - 1;
539 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
540 value);
541 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
542 value << ATMEL_LCDC_CLKVAL_OFFSET);
543 info->var.pixclock =
544 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
545 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
546 PICOS2KHZ(info->var.pixclock));
550 /* Initialize control register 2 */
551 value = sinfo->default_lcdcon2;
553 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
554 value |= ATMEL_LCDC_INVLINE_INVERTED;
555 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
556 value |= ATMEL_LCDC_INVFRAME_INVERTED;
558 switch (info->var.bits_per_pixel) {
559 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
560 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
561 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
562 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
563 case 15: /* fall through */
564 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
565 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
566 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
567 default: BUG(); break;
569 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
570 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
572 /* Vertical timing */
573 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
574 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
575 value |= info->var.lower_margin;
576 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
577 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
579 /* Horizontal timing */
580 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
581 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
582 value |= (info->var.left_margin - 1);
583 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
584 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
586 /* Horizontal value (aka line size) */
587 hozval_linesz = compute_hozval(info->var.xres,
588 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
590 /* Display size */
591 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
592 value |= info->var.yres - 1;
593 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
594 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
596 /* FIFO Threshold: Use formula from data sheet */
597 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
598 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
600 /* Toggle LCD_MODE every frame */
601 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
603 /* Disable all interrupts */
604 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
605 /* Enable FIFO & DMA errors */
606 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
608 /* ...wait for DMA engine to become idle... */
609 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
610 msleep(10);
612 atmel_lcdfb_start(sinfo);
614 dev_dbg(info->device, " * DONE\n");
616 return 0;
619 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
621 chan &= 0xffff;
622 chan >>= 16 - bf->length;
623 return chan << bf->offset;
627 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
628 * @regno: Which register in the CLUT we are programming
629 * @red: The red value which can be up to 16 bits wide
630 * @green: The green value which can be up to 16 bits wide
631 * @blue: The blue value which can be up to 16 bits wide.
632 * @transp: If supported the alpha value which can be up to 16 bits wide.
633 * @info: frame buffer info structure
635 * Set a single color register. The values supplied have a 16 bit
636 * magnitude which needs to be scaled in this function for the hardware.
637 * Things to take into consideration are how many color registers, if
638 * any, are supported with the current color visual. With truecolor mode
639 * no color palettes are supported. Here a psuedo palette is created
640 * which we store the value in pseudo_palette in struct fb_info. For
641 * pseudocolor mode we have a limited color palette. To deal with this
642 * we can program what color is displayed for a particular pixel value.
643 * DirectColor is similar in that we can program each color field. If
644 * we have a static colormap we don't need to implement this function.
646 * Returns negative errno on error, or zero on success. In an
647 * ideal world, this would have been the case, but as it turns
648 * out, the other drivers return 1 on failure, so that's what
649 * we're going to do.
651 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
652 unsigned int green, unsigned int blue,
653 unsigned int transp, struct fb_info *info)
655 struct atmel_lcdfb_info *sinfo = info->par;
656 unsigned int val;
657 u32 *pal;
658 int ret = 1;
660 if (info->var.grayscale)
661 red = green = blue = (19595 * red + 38470 * green
662 + 7471 * blue) >> 16;
664 switch (info->fix.visual) {
665 case FB_VISUAL_TRUECOLOR:
666 if (regno < 16) {
667 pal = info->pseudo_palette;
669 val = chan_to_field(red, &info->var.red);
670 val |= chan_to_field(green, &info->var.green);
671 val |= chan_to_field(blue, &info->var.blue);
673 pal[regno] = val;
674 ret = 0;
676 break;
678 case FB_VISUAL_PSEUDOCOLOR:
679 if (regno < 256) {
680 val = ((red >> 11) & 0x001f);
681 val |= ((green >> 6) & 0x03e0);
682 val |= ((blue >> 1) & 0x7c00);
685 * TODO: intensity bit. Maybe something like
686 * ~(red[10] ^ green[10] ^ blue[10]) & 1
689 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
690 ret = 0;
692 break;
694 case FB_VISUAL_MONO01:
695 if (regno < 2) {
696 val = (regno == 0) ? 0x00 : 0x1F;
697 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
698 ret = 0;
700 break;
704 return ret;
707 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
708 struct fb_info *info)
710 dev_dbg(info->device, "%s\n", __func__);
712 atmel_lcdfb_update_dma(info, var);
714 return 0;
717 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
719 struct atmel_lcdfb_info *sinfo = info->par;
721 switch (blank_mode) {
722 case FB_BLANK_UNBLANK:
723 case FB_BLANK_NORMAL:
724 atmel_lcdfb_start(sinfo);
725 break;
726 case FB_BLANK_VSYNC_SUSPEND:
727 case FB_BLANK_HSYNC_SUSPEND:
728 break;
729 case FB_BLANK_POWERDOWN:
730 atmel_lcdfb_stop(sinfo);
731 break;
732 default:
733 return -EINVAL;
736 /* let fbcon do a soft blank for us */
737 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
740 static struct fb_ops atmel_lcdfb_ops = {
741 .owner = THIS_MODULE,
742 .fb_check_var = atmel_lcdfb_check_var,
743 .fb_set_par = atmel_lcdfb_set_par,
744 .fb_setcolreg = atmel_lcdfb_setcolreg,
745 .fb_blank = atmel_lcdfb_blank,
746 .fb_pan_display = atmel_lcdfb_pan_display,
747 .fb_fillrect = cfb_fillrect,
748 .fb_copyarea = cfb_copyarea,
749 .fb_imageblit = cfb_imageblit,
752 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
754 struct fb_info *info = dev_id;
755 struct atmel_lcdfb_info *sinfo = info->par;
756 u32 status;
758 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
759 if (status & ATMEL_LCDC_UFLWI) {
760 dev_warn(info->device, "FIFO underflow %#x\n", status);
761 /* reset DMA and FIFO to avoid screen shifting */
762 schedule_work(&sinfo->task);
764 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
765 return IRQ_HANDLED;
769 * LCD controller task (to reset the LCD)
771 static void atmel_lcdfb_task(struct work_struct *work)
773 struct atmel_lcdfb_info *sinfo =
774 container_of(work, struct atmel_lcdfb_info, task);
776 atmel_lcdfb_reset(sinfo);
779 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
781 struct fb_info *info = sinfo->info;
782 int ret = 0;
784 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
786 dev_info(info->device,
787 "%luKiB frame buffer at %08lx (mapped at %p)\n",
788 (unsigned long)info->fix.smem_len / 1024,
789 (unsigned long)info->fix.smem_start,
790 info->screen_base);
792 /* Allocate colormap */
793 ret = fb_alloc_cmap(&info->cmap, 256, 0);
794 if (ret < 0)
795 dev_err(info->device, "Alloc color map failed\n");
797 return ret;
800 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
802 if (sinfo->bus_clk)
803 clk_enable(sinfo->bus_clk);
804 clk_enable(sinfo->lcdc_clk);
807 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
809 if (sinfo->bus_clk)
810 clk_disable(sinfo->bus_clk);
811 clk_disable(sinfo->lcdc_clk);
815 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
817 struct device *dev = &pdev->dev;
818 struct fb_info *info;
819 struct atmel_lcdfb_info *sinfo;
820 struct atmel_lcdfb_info *pdata_sinfo;
821 struct fb_videomode fbmode;
822 struct resource *regs = NULL;
823 struct resource *map = NULL;
824 int ret;
826 dev_dbg(dev, "%s BEGIN\n", __func__);
828 ret = -ENOMEM;
829 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
830 if (!info) {
831 dev_err(dev, "cannot allocate memory\n");
832 goto out;
835 sinfo = info->par;
837 if (dev->platform_data) {
838 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
839 sinfo->default_bpp = pdata_sinfo->default_bpp;
840 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
841 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
842 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
843 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
844 sinfo->guard_time = pdata_sinfo->guard_time;
845 sinfo->smem_len = pdata_sinfo->smem_len;
846 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
847 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
848 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
849 } else {
850 dev_err(dev, "cannot get default configuration\n");
851 goto free_info;
853 sinfo->info = info;
854 sinfo->pdev = pdev;
856 strcpy(info->fix.id, sinfo->pdev->name);
857 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
858 info->pseudo_palette = sinfo->pseudo_palette;
859 info->fbops = &atmel_lcdfb_ops;
861 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
862 info->fix = atmel_lcdfb_fix;
864 /* Enable LCDC Clocks */
865 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
866 || cpu_is_at32ap7000()) {
867 sinfo->bus_clk = clk_get(dev, "hck1");
868 if (IS_ERR(sinfo->bus_clk)) {
869 ret = PTR_ERR(sinfo->bus_clk);
870 goto free_info;
873 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
874 if (IS_ERR(sinfo->lcdc_clk)) {
875 ret = PTR_ERR(sinfo->lcdc_clk);
876 goto put_bus_clk;
878 atmel_lcdfb_start_clock(sinfo);
880 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
881 info->monspecs.modedb_len, info->monspecs.modedb,
882 sinfo->default_bpp);
883 if (!ret) {
884 dev_err(dev, "no suitable video mode found\n");
885 goto stop_clk;
889 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
890 if (!regs) {
891 dev_err(dev, "resources unusable\n");
892 ret = -ENXIO;
893 goto stop_clk;
896 sinfo->irq_base = platform_get_irq(pdev, 0);
897 if (sinfo->irq_base < 0) {
898 dev_err(dev, "unable to get irq\n");
899 ret = sinfo->irq_base;
900 goto stop_clk;
903 /* Initialize video memory */
904 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
905 if (map) {
906 /* use a pre-allocated memory buffer */
907 info->fix.smem_start = map->start;
908 info->fix.smem_len = map->end - map->start + 1;
909 if (!request_mem_region(info->fix.smem_start,
910 info->fix.smem_len, pdev->name)) {
911 ret = -EBUSY;
912 goto stop_clk;
915 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
916 if (!info->screen_base)
917 goto release_intmem;
920 * Don't clear the framebuffer -- someone may have set
921 * up a splash image.
923 } else {
924 /* alocate memory buffer */
925 ret = atmel_lcdfb_alloc_video_memory(sinfo);
926 if (ret < 0) {
927 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
928 goto stop_clk;
932 /* LCDC registers */
933 info->fix.mmio_start = regs->start;
934 info->fix.mmio_len = regs->end - regs->start + 1;
936 if (!request_mem_region(info->fix.mmio_start,
937 info->fix.mmio_len, pdev->name)) {
938 ret = -EBUSY;
939 goto free_fb;
942 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
943 if (!sinfo->mmio) {
944 dev_err(dev, "cannot map LCDC registers\n");
945 goto release_mem;
948 /* Initialize PWM for contrast or backlight ("off") */
949 init_contrast(sinfo);
951 /* interrupt */
952 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
953 if (ret) {
954 dev_err(dev, "request_irq failed: %d\n", ret);
955 goto unmap_mmio;
958 /* Some operations on the LCDC might sleep and
959 * require a preemptible task context */
960 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
962 ret = atmel_lcdfb_init_fbinfo(sinfo);
963 if (ret < 0) {
964 dev_err(dev, "init fbinfo failed: %d\n", ret);
965 goto unregister_irqs;
969 * This makes sure that our colour bitfield
970 * descriptors are correctly initialised.
972 atmel_lcdfb_check_var(&info->var, info);
974 ret = fb_set_var(info, &info->var);
975 if (ret) {
976 dev_warn(dev, "unable to set display parameters\n");
977 goto free_cmap;
980 dev_set_drvdata(dev, info);
983 * Tell the world that we're ready to go
985 ret = register_framebuffer(info);
986 if (ret < 0) {
987 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
988 goto reset_drvdata;
991 /* add selected videomode to modelist */
992 fb_var_to_videomode(&fbmode, &info->var);
993 fb_add_videomode(&fbmode, &info->modelist);
995 /* Power up the LCDC screen */
996 if (sinfo->atmel_lcdfb_power_control)
997 sinfo->atmel_lcdfb_power_control(1);
999 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1000 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1002 return 0;
1004 reset_drvdata:
1005 dev_set_drvdata(dev, NULL);
1006 free_cmap:
1007 fb_dealloc_cmap(&info->cmap);
1008 unregister_irqs:
1009 cancel_work_sync(&sinfo->task);
1010 free_irq(sinfo->irq_base, info);
1011 unmap_mmio:
1012 exit_backlight(sinfo);
1013 iounmap(sinfo->mmio);
1014 release_mem:
1015 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1016 free_fb:
1017 if (map)
1018 iounmap(info->screen_base);
1019 else
1020 atmel_lcdfb_free_video_memory(sinfo);
1022 release_intmem:
1023 if (map)
1024 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1025 stop_clk:
1026 atmel_lcdfb_stop_clock(sinfo);
1027 clk_put(sinfo->lcdc_clk);
1028 put_bus_clk:
1029 if (sinfo->bus_clk)
1030 clk_put(sinfo->bus_clk);
1031 free_info:
1032 framebuffer_release(info);
1033 out:
1034 dev_dbg(dev, "%s FAILED\n", __func__);
1035 return ret;
1038 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1040 struct device *dev = &pdev->dev;
1041 struct fb_info *info = dev_get_drvdata(dev);
1042 struct atmel_lcdfb_info *sinfo;
1044 if (!info || !info->par)
1045 return 0;
1046 sinfo = info->par;
1048 cancel_work_sync(&sinfo->task);
1049 exit_backlight(sinfo);
1050 if (sinfo->atmel_lcdfb_power_control)
1051 sinfo->atmel_lcdfb_power_control(0);
1052 unregister_framebuffer(info);
1053 atmel_lcdfb_stop_clock(sinfo);
1054 clk_put(sinfo->lcdc_clk);
1055 if (sinfo->bus_clk)
1056 clk_put(sinfo->bus_clk);
1057 fb_dealloc_cmap(&info->cmap);
1058 free_irq(sinfo->irq_base, info);
1059 iounmap(sinfo->mmio);
1060 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1061 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1062 iounmap(info->screen_base);
1063 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1064 } else {
1065 atmel_lcdfb_free_video_memory(sinfo);
1068 dev_set_drvdata(dev, NULL);
1069 framebuffer_release(info);
1071 return 0;
1074 #ifdef CONFIG_PM
1076 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1078 struct fb_info *info = platform_get_drvdata(pdev);
1079 struct atmel_lcdfb_info *sinfo = info->par;
1082 * We don't want to handle interrupts while the clock is
1083 * stopped. It may take forever.
1085 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1087 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1088 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1089 if (sinfo->atmel_lcdfb_power_control)
1090 sinfo->atmel_lcdfb_power_control(0);
1092 atmel_lcdfb_stop(sinfo);
1093 atmel_lcdfb_stop_clock(sinfo);
1095 return 0;
1098 static int atmel_lcdfb_resume(struct platform_device *pdev)
1100 struct fb_info *info = platform_get_drvdata(pdev);
1101 struct atmel_lcdfb_info *sinfo = info->par;
1103 atmel_lcdfb_start_clock(sinfo);
1104 atmel_lcdfb_start(sinfo);
1105 if (sinfo->atmel_lcdfb_power_control)
1106 sinfo->atmel_lcdfb_power_control(1);
1107 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1109 /* Enable FIFO & DMA errors */
1110 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1111 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1113 return 0;
1116 #else
1117 #define atmel_lcdfb_suspend NULL
1118 #define atmel_lcdfb_resume NULL
1119 #endif
1121 static struct platform_driver atmel_lcdfb_driver = {
1122 .remove = __exit_p(atmel_lcdfb_remove),
1123 .suspend = atmel_lcdfb_suspend,
1124 .resume = atmel_lcdfb_resume,
1126 .driver = {
1127 .name = "atmel_lcdfb",
1128 .owner = THIS_MODULE,
1132 static int __init atmel_lcdfb_init(void)
1134 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1137 static void __exit atmel_lcdfb_exit(void)
1139 platform_driver_unregister(&atmel_lcdfb_driver);
1142 module_init(atmel_lcdfb_init);
1143 module_exit(atmel_lcdfb_exit);
1145 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1146 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1147 MODULE_LICENSE("GPL");