arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/delay.h>
  19 #include <linux/smc91x.h>
  20 #include <linux/gpio.h>
  21 #include <linux/input.h>
  22 #include <linux/input/sh_keysc.h>
  23 #include <linux/usb/r8a66597.h>
  24 #include <video/sh_mobile_lcdc.h>
  25 #include <media/sh_mobile_ceu.h>
  26 #include <sound/sh_fsi.h>
  27 #include <asm/io.h>
  28 #include <asm/heartbeat.h>
  29 #include <asm/sh_eth.h>
  30 #include <asm/clock.h>
  31 #include <asm/suspend.h>
  32 #include <cpu/sh7724.h>
  33 #include <mach-se/mach/se7724.h>
  34
  35 /*
  36  * SWx    1234 5678
  37  * ------------------------------------
  38  * SW31 : 1001 1100    : default
  39  * SW32 : 0111 1111    : use on board flash
  40  *
  41  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  42  *                          1 : Digital monitor
  43  *                      b = 0 : VGA
  44  *                          1 : 720p
  45  */
  46
  47 /*
  48  * about 720p
  49  *
  50  * When you use 1280 x 720 lcdc output,
  51  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  52  * and change SW41 to use 720p
  53  */
  54
  55 /*
  56  * about sound
  57  *
  58  * This setup.c supports FSI slave mode.
  59  * Please change J20, J21, J22 pin to 1-2 connection.
  60  */
  61
  62 /* Heartbeat */
  63 static struct resource heartbeat_resource = {
  64         .start  = PA_LED,
  65         .end    = PA_LED,
  66         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  67 };
  68
  69 static struct platform_device heartbeat_device = {
  70         .name           = "heartbeat",
  71         .id             = -1,
  72         .num_resources  = 1,
  73         .resource       = &heartbeat_resource,
  74 };
  75
  76 /* LAN91C111 */
  77 static struct smc91x_platdata smc91x_info = {
  78         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  79 };
  80
  81 static struct resource smc91x_eth_resources[] = {
  82         [0] = {
  83                 .name   = "SMC91C111" ,
  84                 .start  = 0x1a300300,
  85                 .end    = 0x1a30030f,
  86                 .flags  = IORESOURCE_MEM,
  87         },
  88         [1] = {
  89                 .start  = IRQ0_SMC,
  90                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  91         },
  92 };
  93
  94 static struct platform_device smc91x_eth_device = {
  95         .name   = "smc91x",
  96         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  97         .resource       = smc91x_eth_resources,
  98         .dev    = {
  99                 .platform_data  = &smc91x_info,
 100         },
 101 };
 102
 103 /* MTD */
 104 static struct mtd_partition nor_flash_partitions[] = {
 105         {
 106                 .name = "uboot",
 107                 .offset = 0,
 108                 .size = (1 * 1024 * 1024),
 109                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 110         }, {
 111                 .name = "kernel",
 112                 .offset = MTDPART_OFS_APPEND,
 113                 .size = (2 * 1024 * 1024),
 114         }, {
 115                 .name = "free-area",
 116                 .offset = MTDPART_OFS_APPEND,
 117                 .size = MTDPART_SIZ_FULL,
 118         },
 119 };
 120
 121 static struct physmap_flash_data nor_flash_data = {
 122         .width          = 2,
 123         .parts          = nor_flash_partitions,
 124         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 125 };
 126
 127 static struct resource nor_flash_resources[] = {
 128         [0] = {
 129                 .name   = "NOR Flash",
 130                 .start  = 0x00000000,
 131                 .end    = 0x01ffffff,
 132                 .flags  = IORESOURCE_MEM,
 133         }
 134 };
 135
 136 static struct platform_device nor_flash_device = {
 137         .name           = "physmap-flash",
 138         .resource       = nor_flash_resources,
 139         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 140         .dev            = {
 141                 .platform_data = &nor_flash_data,
 142         },
 143 };
 144
 145 /* LCDC */
 146 static struct sh_mobile_lcdc_info lcdc_info = {
 147         .clock_source = LCDC_CLK_EXTERNAL,
 148         .ch[0] = {
 149                 .chan = LCDC_CHAN_MAINLCD,
 150                 .bpp = 16,
 151                 .clock_divider = 1,
 152                 .lcd_cfg = {
 153                         .name = "LB070WV1",
 154                         .sync = 0, /* hsync and vsync are active low */
 155                 },
 156                 .lcd_size_cfg = { /* 7.0 inch */
 157                         .width = 152,
 158                         .height = 91,
 159                 },
 160                 .board_cfg = {
 161                 },
 162         }
 163 };
 164
 165 static struct resource lcdc_resources[] = {
 166         [0] = {
 167                 .name   = "LCDC",
 168                 .start  = 0xfe940000,
 169                 .end    = 0xfe942fff,
 170                 .flags  = IORESOURCE_MEM,
 171         },
 172         [1] = {
 173                 .start  = 106,
 174                 .flags  = IORESOURCE_IRQ,
 175         },
 176 };
 177
 178 static struct platform_device lcdc_device = {
 179         .name           = "sh_mobile_lcdc_fb",
 180         .num_resources  = ARRAY_SIZE(lcdc_resources),
 181         .resource       = lcdc_resources,
 182         .dev            = {
 183                 .platform_data  = &lcdc_info,
 184         },
 185         .archdata = {
 186                 .hwblk_id = HWBLK_LCDC,
 187         },
 188 };
 189
 190 /* CEU0 */
 191 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 192         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 193 };
 194
 195 static struct resource ceu0_resources[] = {
 196         [0] = {
 197                 .name   = "CEU0",
 198                 .start  = 0xfe910000,
 199                 .end    = 0xfe91009f,
 200                 .flags  = IORESOURCE_MEM,
 201         },
 202         [1] = {
 203                 .start  = 52,
 204                 .flags  = IORESOURCE_IRQ,
 205         },
 206         [2] = {
 207                 /* place holder for contiguous memory */
 208         },
 209 };
 210
 211 static struct platform_device ceu0_device = {
 212         .name           = "sh_mobile_ceu",
 213         .id             = 0, /* "ceu0" clock */
 214         .num_resources  = ARRAY_SIZE(ceu0_resources),
 215         .resource       = ceu0_resources,
 216         .dev    = {
 217                 .platform_data  = &sh_mobile_ceu0_info,
 218         },
 219         .archdata = {
 220                 .hwblk_id = HWBLK_CEU0,
 221         },
 222 };
 223
 224 /* CEU1 */
 225 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 226         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 227 };
 228
 229 static struct resource ceu1_resources[] = {
 230         [0] = {
 231                 .name   = "CEU1",
 232                 .start  = 0xfe914000,
 233                 .end    = 0xfe91409f,
 234                 .flags  = IORESOURCE_MEM,
 235         },
 236         [1] = {
 237                 .start  = 63,
 238                 .flags  = IORESOURCE_IRQ,
 239         },
 240         [2] = {
 241                 /* place holder for contiguous memory */
 242         },
 243 };
 244
 245 static struct platform_device ceu1_device = {
 246         .name           = "sh_mobile_ceu",
 247         .id             = 1, /* "ceu1" clock */
 248         .num_resources  = ARRAY_SIZE(ceu1_resources),
 249         .resource       = ceu1_resources,
 250         .dev    = {
 251                 .platform_data  = &sh_mobile_ceu1_info,
 252         },
 253         .archdata = {
 254                 .hwblk_id = HWBLK_CEU1,
 255         },
 256 };
 257
 258 /* FSI */
 259 /*
 260  * FSI-A use external clock which came from ak464x.
 261  * So, we should change parent of fsi
 262  */
 263 #define FCLKACR         0xa4150008
 264 static void fsimck_init(struct clk *clk)
 265 {
 266         u32 status = __raw_readl(clk->enable_reg);
 267
 268         /* use external clock */
 269         status &= ~0x000000ff;
 270         status |= 0x00000080;
 271         __raw_writel(status, clk->enable_reg);
 272 }
 273
 274 static struct clk_ops fsimck_clk_ops = {
 275         .init = fsimck_init,
 276 };
 277
 278 static struct clk fsimcka_clk = {
 279         .name           = "fsimcka_clk",
 280         .id             = -1,
 281         .ops            = &fsimck_clk_ops,
 282         .enable_reg     = (void __iomem *)FCLKACR,
 283         .rate           = 0, /* unknown */
 284 };
 285
 286 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 287 struct sh_fsi_platform_info fsi_info = {
 288         .porta_flags = SH_FSI_BRS_INV |
 289                        SH_FSI_OUT_SLAVE_MODE |
 290                        SH_FSI_IN_SLAVE_MODE |
 291                        SH_FSI_OFMT(PCM) |
 292                        SH_FSI_IFMT(PCM),
 293 };
 294
 295 static struct resource fsi_resources[] = {
 296         [0] = {
 297                 .name   = "FSI",
 298                 .start  = 0xFE3C0000,
 299                 .end    = 0xFE3C021d,
 300                 .flags  = IORESOURCE_MEM,
 301         },
 302         [1] = {
 303                 .start  = 108,
 304                 .flags  = IORESOURCE_IRQ,
 305         },
 306 };
 307
 308 static struct platform_device fsi_device = {
 309         .name           = "sh_fsi",
 310         .id             = 0,
 311         .num_resources  = ARRAY_SIZE(fsi_resources),
 312         .resource       = fsi_resources,
 313         .dev    = {
 314                 .platform_data  = &fsi_info,
 315         },
 316         .archdata = {
 317                 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
 318         },
 319 };
 320
 321 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 322 static struct sh_keysc_info keysc_info = {
 323         .mode = SH_KEYSC_MODE_1,
 324         .scan_timing = 3,
 325         .delay = 50,
 326         .keycodes = {
 327                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 328                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 329                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 330                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 331                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 332                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 333         },
 334 };
 335
 336 static struct resource keysc_resources[] = {
 337         [0] = {
 338                 .name   = "KEYSC",
 339                 .start  = 0x044b0000,
 340                 .end    = 0x044b000f,
 341                 .flags  = IORESOURCE_MEM,
 342         },
 343         [1] = {
 344                 .start  = 79,
 345                 .flags  = IORESOURCE_IRQ,
 346         },
 347 };
 348
 349 static struct platform_device keysc_device = {
 350         .name           = "sh_keysc",
 351         .id             = 0, /* "keysc0" clock */
 352         .num_resources  = ARRAY_SIZE(keysc_resources),
 353         .resource       = keysc_resources,
 354         .dev    = {
 355                 .platform_data  = &keysc_info,
 356         },
 357         .archdata = {
 358                 .hwblk_id = HWBLK_KEYSC,
 359         },
 360 };
 361
 362 /* SH Eth */
 363 static struct resource sh_eth_resources[] = {
 364         [0] = {
 365                 .start = SH_ETH_ADDR,
 366                 .end   = SH_ETH_ADDR + 0x1FC,
 367                 .flags = IORESOURCE_MEM,
 368         },
 369         [1] = {
 370                 .start = 91,
 371                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 372         },
 373 };
 374
 375 struct sh_eth_plat_data sh_eth_plat = {
 376         .phy = 0x1f, /* SMSC LAN8187 */
 377         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 378 };
 379
 380 static struct platform_device sh_eth_device = {
 381         .name = "sh-eth",
 382         .id     = 0,
 383         .dev = {
 384                 .platform_data = &sh_eth_plat,
 385         },
 386         .num_resources = ARRAY_SIZE(sh_eth_resources),
 387         .resource = sh_eth_resources,
 388         .archdata = {
 389                 .hwblk_id = HWBLK_ETHER,
 390         },
 391 };
 392
 393 static struct r8a66597_platdata sh7724_usb0_host_data = {
 394         .on_chip = 1,
 395 };
 396
 397 static struct resource sh7724_usb0_host_resources[] = {
 398         [0] = {
 399                 .start  = 0xa4d80000,
 400                 .end    = 0xa4d80124 - 1,
 401                 .flags  = IORESOURCE_MEM,
 402         },
 403         [1] = {
 404                 .start  = 65,
 405                 .end    = 65,
 406                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 407         },
 408 };
 409
 410 static struct platform_device sh7724_usb0_host_device = {
 411         .name           = "r8a66597_hcd",
 412         .id             = 0,
 413         .dev = {
 414                 .dma_mask               = NULL,         /*  not use dma */
 415                 .coherent_dma_mask      = 0xffffffff,
 416                 .platform_data          = &sh7724_usb0_host_data,
 417         },
 418         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 419         .resource       = sh7724_usb0_host_resources,
 420         .archdata = {
 421                 .hwblk_id = HWBLK_USB0,
 422         },
 423 };
 424
 425 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 426         .on_chip = 1,
 427 };
 428
 429 static struct resource sh7724_usb1_gadget_resources[] = {
 430         [0] = {
 431                 .start  = 0xa4d90000,
 432                 .end    = 0xa4d90123,
 433                 .flags  = IORESOURCE_MEM,
 434         },
 435         [1] = {
 436                 .start  = 66,
 437                 .end    = 66,
 438                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 439         },
 440 };
 441
 442 static struct platform_device sh7724_usb1_gadget_device = {
 443         .name           = "r8a66597_udc",
 444         .id             = 1, /* USB1 */
 445         .dev = {
 446                 .dma_mask               = NULL,         /*  not use dma */
 447                 .coherent_dma_mask      = 0xffffffff,
 448                 .platform_data          = &sh7724_usb1_gadget_data,
 449         },
 450         .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 451         .resource       = sh7724_usb1_gadget_resources,
 452 };
 453
 454 static struct resource sdhi0_cn7_resources[] = {
 455         [0] = {
 456                 .name   = "SDHI0",
 457                 .start  = 0x04ce0000,
 458                 .end    = 0x04ce01ff,
 459                 .flags  = IORESOURCE_MEM,
 460         },
 461         [1] = {
 462                 .start  = 100,
 463                 .flags  = IORESOURCE_IRQ,
 464         },
 465 };
 466
 467 static struct platform_device sdhi0_cn7_device = {
 468         .name           = "sh_mobile_sdhi",
 469         .id             = 0,
 470         .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 471         .resource       = sdhi0_cn7_resources,
 472         .archdata = {
 473                 .hwblk_id = HWBLK_SDHI0,
 474         },
 475 };
 476
 477 static struct resource sdhi1_cn8_resources[] = {
 478         [0] = {
 479                 .name   = "SDHI1",
 480                 .start  = 0x04cf0000,
 481                 .end    = 0x04cf01ff,
 482                 .flags  = IORESOURCE_MEM,
 483         },
 484         [1] = {
 485                 .start  = 23,
 486                 .flags  = IORESOURCE_IRQ,
 487         },
 488 };
 489
 490 static struct platform_device sdhi1_cn8_device = {
 491         .name           = "sh_mobile_sdhi",
 492         .id             = 1,
 493         .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 494         .resource       = sdhi1_cn8_resources,
 495         .archdata = {
 496                 .hwblk_id = HWBLK_SDHI1,
 497         },
 498 };
 499
 500 /* IrDA */
 501 static struct resource irda_resources[] = {
 502         [0] = {
 503                 .name   = "IrDA",
 504                 .start  = 0xA45D0000,
 505                 .end    = 0xA45D0049,
 506                 .flags  = IORESOURCE_MEM,
 507         },
 508         [1] = {
 509                 .start  = 20,
 510                 .flags  = IORESOURCE_IRQ,
 511         },
 512 };
 513
 514 static struct platform_device irda_device = {
 515         .name           = "sh_sir",
 516         .num_resources  = ARRAY_SIZE(irda_resources),
 517         .resource       = irda_resources,
 518 };
 519
 520 static struct platform_device *ms7724se_devices[] __initdata = {
 521         &heartbeat_device,
 522         &smc91x_eth_device,
 523         &lcdc_device,
 524         &nor_flash_device,
 525         &ceu0_device,
 526         &ceu1_device,
 527         &keysc_device,
 528         &sh_eth_device,
 529         &sh7724_usb0_host_device,
 530         &sh7724_usb1_gadget_device,
 531         &fsi_device,
 532         &sdhi0_cn7_device,
 533         &sdhi1_cn8_device,
 534         &irda_device,
 535 };
 536
 537 /* I2C device */
 538 static struct i2c_board_info i2c0_devices[] = {
 539         {
 540                 I2C_BOARD_INFO("ak4642", 0x12),
 541         },
 542 };
 543
 544 #define EEPROM_OP   0xBA206000
 545 #define EEPROM_ADR  0xBA206004
 546 #define EEPROM_DATA 0xBA20600C
 547 #define EEPROM_STAT 0xBA206010
 548 #define EEPROM_STRT 0xBA206014
 549 static int __init sh_eth_is_eeprom_ready(void)
 550 {
 551         int t = 10000;
 552
 553         while (t--) {
 554                 if (!__raw_readw(EEPROM_STAT))
 555                         return 1;
 556                 udelay(1);
 557         }
 558
 559         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 560         return 0;
 561 }
 562
 563 static void __init sh_eth_init(void)
 564 {
 565         int i;
 566         u16 mac;
 567
 568         /* check EEPROM status */
 569         if (!sh_eth_is_eeprom_ready())
 570                 return;
 571
 572         /* read MAC addr from EEPROM */
 573         for (i = 0 ; i < 3 ; i++) {
 574                 __raw_writew(0x0, EEPROM_OP); /* read */
 575                 __raw_writew(i*2, EEPROM_ADR);
 576                 __raw_writew(0x1, EEPROM_STRT);
 577                 if (!sh_eth_is_eeprom_ready())
 578                         return;
 579
 580                 mac = __raw_readw(EEPROM_DATA);
 581                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 582                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 583         }
 584 }
 585
 586 #define SW4140    0xBA201000
 587 #define FPGA_OUT  0xBA200400
 588 #define PORT_HIZA 0xA4050158
 589 #define PORT_MSELCRB 0xA4050182
 590
 591 #define SW41_A    0x0100
 592 #define SW41_B    0x0200
 593 #define SW41_C    0x0400
 594 #define SW41_D    0x0800
 595 #define SW41_E    0x1000
 596 #define SW41_F    0x2000
 597 #define SW41_G    0x4000
 598 #define SW41_H    0x8000
 599
 600 extern char ms7724se_sdram_enter_start;
 601 extern char ms7724se_sdram_enter_end;
 602 extern char ms7724se_sdram_leave_start;
 603 extern char ms7724se_sdram_leave_end;
 604
 605
 606 static int __init arch_setup(void)
 607 {
 608         /* enable I2C device */
 609         i2c_register_board_info(0, i2c0_devices,
 610                                 ARRAY_SIZE(i2c0_devices));
 611         return 0;
 612 }
 613 arch_initcall(arch_setup);
 614
 615 static int __init devices_setup(void)
 616 {
 617         u16 sw = __raw_readw(SW4140); /* select camera, monitor */
 618         struct clk *clk;
 619
 620         /* register board specific self-refresh code */
 621         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
 622                                         SUSP_SH_RSTANDBY,
 623                                         &ms7724se_sdram_enter_start,
 624                                         &ms7724se_sdram_enter_end,
 625                                         &ms7724se_sdram_leave_start,
 626                                         &ms7724se_sdram_leave_end);
 627         /* Reset Release */
 628         __raw_writew(__raw_readw(FPGA_OUT) &
 629                   ~((1 << 1)  | /* LAN */
 630                     (1 << 6)  | /* VIDEO DAC */
 631                     (1 << 7)  | /* AK4643 */
 632                     (1 << 8)  | /* IrDA */
 633                     (1 << 12) | /* USB0 */
 634                     (1 << 14)), /* RMII */
 635                   FPGA_OUT);
 636
 637         /* turn on USB clocks, use external clock */
 638         __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 639
 640         /* Let LED9 show STATUS2 */
 641         gpio_request(GPIO_FN_STATUS2, NULL);
 642
 643         /* Lit LED10 show STATUS0 */
 644         gpio_request(GPIO_FN_STATUS0, NULL);
 645
 646         /* Lit LED11 show PDSTATUS */
 647         gpio_request(GPIO_FN_PDSTATUS, NULL);
 648
 649         /* enable USB0 port */
 650         __raw_writew(0x0600, 0xa40501d4);
 651
 652         /* enable USB1 port */
 653         __raw_writew(0x0600, 0xa4050192);
 654
 655         /* enable IRQ 0,1,2 */
 656         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 657         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 658         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 659
 660         /* enable SCIFA3 */
 661         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 662         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 663         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 664         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 665         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 666
 667         /* enable LCDC */
 668         gpio_request(GPIO_FN_LCDD23,   NULL);
 669         gpio_request(GPIO_FN_LCDD22,   NULL);
 670         gpio_request(GPIO_FN_LCDD21,   NULL);
 671         gpio_request(GPIO_FN_LCDD20,   NULL);
 672         gpio_request(GPIO_FN_LCDD19,   NULL);
 673         gpio_request(GPIO_FN_LCDD18,   NULL);
 674         gpio_request(GPIO_FN_LCDD17,   NULL);
 675         gpio_request(GPIO_FN_LCDD16,   NULL);
 676         gpio_request(GPIO_FN_LCDD15,   NULL);
 677         gpio_request(GPIO_FN_LCDD14,   NULL);
 678         gpio_request(GPIO_FN_LCDD13,   NULL);
 679         gpio_request(GPIO_FN_LCDD12,   NULL);
 680         gpio_request(GPIO_FN_LCDD11,   NULL);
 681         gpio_request(GPIO_FN_LCDD10,   NULL);
 682         gpio_request(GPIO_FN_LCDD9,    NULL);
 683         gpio_request(GPIO_FN_LCDD8,    NULL);
 684         gpio_request(GPIO_FN_LCDD7,    NULL);
 685         gpio_request(GPIO_FN_LCDD6,    NULL);
 686         gpio_request(GPIO_FN_LCDD5,    NULL);
 687         gpio_request(GPIO_FN_LCDD4,    NULL);
 688         gpio_request(GPIO_FN_LCDD3,    NULL);
 689         gpio_request(GPIO_FN_LCDD2,    NULL);
 690         gpio_request(GPIO_FN_LCDD1,    NULL);
 691         gpio_request(GPIO_FN_LCDD0,    NULL);
 692         gpio_request(GPIO_FN_LCDDISP,  NULL);
 693         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 694         gpio_request(GPIO_FN_LCDDCK,   NULL);
 695         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 696         gpio_request(GPIO_FN_LCDDON,   NULL);
 697         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 698         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 699         gpio_request(GPIO_FN_LCDRD,    NULL);
 700         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 701         __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 702
 703         /* enable CEU0 */
 704         gpio_request(GPIO_FN_VIO0_D15, NULL);
 705         gpio_request(GPIO_FN_VIO0_D14, NULL);
 706         gpio_request(GPIO_FN_VIO0_D13, NULL);
 707         gpio_request(GPIO_FN_VIO0_D12, NULL);
 708         gpio_request(GPIO_FN_VIO0_D11, NULL);
 709         gpio_request(GPIO_FN_VIO0_D10, NULL);
 710         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 711         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 712         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 713         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 714         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 715         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 716         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 717         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 718         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 719         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 720         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 721         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 722         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 723         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 724         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 725
 726         /* enable CEU1 */
 727         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 728         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 729         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 730         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 731         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 732         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 733         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 734         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 735         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 736         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 737         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 738         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 739         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 740
 741         /* KEYSC */
 742         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 743         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 744         gpio_request(GPIO_FN_KEYIN4,      NULL);
 745         gpio_request(GPIO_FN_KEYIN3,      NULL);
 746         gpio_request(GPIO_FN_KEYIN2,      NULL);
 747         gpio_request(GPIO_FN_KEYIN1,      NULL);
 748         gpio_request(GPIO_FN_KEYIN0,      NULL);
 749         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 750         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 751         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 752         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 753
 754         /* enable FSI */
 755         gpio_request(GPIO_FN_FSIMCKB,    NULL);
 756         gpio_request(GPIO_FN_FSIMCKA,    NULL);
 757         gpio_request(GPIO_FN_FSIOASD,    NULL);
 758         gpio_request(GPIO_FN_FSIIABCK,   NULL);
 759         gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 760         gpio_request(GPIO_FN_FSIOABCK,   NULL);
 761         gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 762         gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 763         gpio_request(GPIO_FN_FSIIBSD,    NULL);
 764         gpio_request(GPIO_FN_FSIOBSD,    NULL);
 765         gpio_request(GPIO_FN_FSIIBBCK,   NULL);
 766         gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
 767         gpio_request(GPIO_FN_FSIOBBCK,   NULL);
 768         gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
 769         gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
 770         gpio_request(GPIO_FN_FSIIASD,    NULL);
 771
 772         /* set SPU2 clock to 83.4 MHz */
 773         clk = clk_get(NULL, "spu_clk");
 774         clk_set_rate(clk, clk_round_rate(clk, 83333333));
 775         clk_put(clk);
 776
 777         /* change parent of FSI A */
 778         clk = clk_get(NULL, "fsia_clk");
 779         clk_register(&fsimcka_clk);
 780         clk_set_parent(clk, &fsimcka_clk);
 781         clk_set_rate(clk, 11000);
 782         clk_set_rate(&fsimcka_clk, 11000);
 783         clk_put(clk);
 784
 785         /* SDHI0 connected to cn7 */
 786         gpio_request(GPIO_FN_SDHI0CD, NULL);
 787         gpio_request(GPIO_FN_SDHI0WP, NULL);
 788         gpio_request(GPIO_FN_SDHI0D3, NULL);
 789         gpio_request(GPIO_FN_SDHI0D2, NULL);
 790         gpio_request(GPIO_FN_SDHI0D1, NULL);
 791         gpio_request(GPIO_FN_SDHI0D0, NULL);
 792         gpio_request(GPIO_FN_SDHI0CMD, NULL);
 793         gpio_request(GPIO_FN_SDHI0CLK, NULL);
 794
 795         /* SDHI1 connected to cn8 */
 796         gpio_request(GPIO_FN_SDHI1CD, NULL);
 797         gpio_request(GPIO_FN_SDHI1WP, NULL);
 798         gpio_request(GPIO_FN_SDHI1D3, NULL);
 799         gpio_request(GPIO_FN_SDHI1D2, NULL);
 800         gpio_request(GPIO_FN_SDHI1D1, NULL);
 801         gpio_request(GPIO_FN_SDHI1D0, NULL);
 802         gpio_request(GPIO_FN_SDHI1CMD, NULL);
 803         gpio_request(GPIO_FN_SDHI1CLK, NULL);
 804
 805         /* enable IrDA */
 806         gpio_request(GPIO_FN_IRDA_OUT, NULL);
 807         gpio_request(GPIO_FN_IRDA_IN,  NULL);
 808
 809         /*
 810          * enable SH-Eth
 811          *
 812          * please remove J33 pin from your board !!
 813          *
 814          * ms7724 board should not use GPIO_FN_LNKSTA pin
 815          * So, This time PTX5 is set to input pin
 816          */
 817         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 818         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 819         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 820         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 821         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 822         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 823         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 824         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 825         gpio_request(GPIO_FN_MDIO,         NULL);
 826         gpio_request(GPIO_FN_MDC,          NULL);
 827         gpio_request(GPIO_PTX5, NULL);
 828         gpio_direction_input(GPIO_PTX5);
 829         sh_eth_init();
 830
 831         if (sw & SW41_B) {
 832                 /* 720p */
 833                 lcdc_info.ch[0].lcd_cfg.xres         = 1280;
 834                 lcdc_info.ch[0].lcd_cfg.yres         = 720;
 835                 lcdc_info.ch[0].lcd_cfg.left_margin  = 220;
 836                 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
 837                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 40;
 838                 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
 839                 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
 840                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 5;
 841         } else {
 842                 /* VGA */
 843                 lcdc_info.ch[0].lcd_cfg.xres         = 640;
 844                 lcdc_info.ch[0].lcd_cfg.yres         = 480;
 845                 lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
 846                 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
 847                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
 848                 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
 849                 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
 850                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
 851         }
 852
 853         if (sw & SW41_A) {
 854                 /* Digital monitor */
 855                 lcdc_info.ch[0].interface_type = RGB18;
 856                 lcdc_info.ch[0].flags          = 0;
 857         } else {
 858                 /* Analog monitor */
 859                 lcdc_info.ch[0].interface_type = RGB24;
 860                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 861         }
 862
 863         return platform_add_devices(ms7724se_devices,
 864                                     ARRAY_SIZE(ms7724se_devices));
 865 }
 866 device_initcall(devices_setup);
 867
 868 static struct sh_machine_vector mv_ms7724se __initmv = {
 869         .mv_name        = "ms7724se",
 870         .mv_init_irq    = init_se7724_IRQ,
 871         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 872 };