2 * linux/arch/arm/mach-realview/core.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sysdev.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
33 #include <linux/clkdev.h>
35 #include <asm/system.h>
36 #include <mach/hardware.h>
39 #include <asm/mach-types.h>
40 #include <asm/hardware/arm_timer.h>
41 #include <asm/hardware/icst.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/flash.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
48 #include <asm/hardware/gic.h>
50 #include <mach/platform.h>
51 #include <mach/irqs.h>
52 #include <asm/hardware/timer-sp.h>
54 #include <plat/clcd.h>
55 #include <plat/sched_clock.h>
59 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
61 static int realview_flash_init(void)
65 val
= __raw_readl(REALVIEW_FLASHCTRL
);
66 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
67 __raw_writel(val
, REALVIEW_FLASHCTRL
);
72 static void realview_flash_exit(void)
76 val
= __raw_readl(REALVIEW_FLASHCTRL
);
77 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
78 __raw_writel(val
, REALVIEW_FLASHCTRL
);
81 static void realview_flash_set_vpp(int on
)
85 val
= __raw_readl(REALVIEW_FLASHCTRL
);
87 val
|= REALVIEW_FLASHPROG_FLVPPEN
;
89 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
90 __raw_writel(val
, REALVIEW_FLASHCTRL
);
93 static struct flash_platform_data realview_flash_data
= {
94 .map_name
= "cfi_probe",
96 .init
= realview_flash_init
,
97 .exit
= realview_flash_exit
,
98 .set_vpp
= realview_flash_set_vpp
,
101 struct platform_device realview_flash_device
= {
105 .platform_data
= &realview_flash_data
,
109 int realview_flash_register(struct resource
*res
, u32 num
)
111 realview_flash_device
.resource
= res
;
112 realview_flash_device
.num_resources
= num
;
113 return platform_device_register(&realview_flash_device
);
116 static struct smsc911x_platform_config smsc911x_config
= {
117 .flags
= SMSC911X_USE_32BIT
,
118 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
,
119 .irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
,
120 .phy_interface
= PHY_INTERFACE_MODE_MII
,
123 static struct platform_device realview_eth_device
= {
129 int realview_eth_register(const char *name
, struct resource
*res
)
132 realview_eth_device
.name
= name
;
133 realview_eth_device
.resource
= res
;
134 if (strcmp(realview_eth_device
.name
, "smsc911x") == 0)
135 realview_eth_device
.dev
.platform_data
= &smsc911x_config
;
137 return platform_device_register(&realview_eth_device
);
140 struct platform_device realview_usb_device
= {
145 int realview_usb_register(struct resource
*res
)
147 realview_usb_device
.resource
= res
;
148 return platform_device_register(&realview_usb_device
);
151 static struct pata_platform_info pata_platform_data
= {
155 static struct resource pata_resources
[] = {
157 .start
= REALVIEW_CF_BASE
,
158 .end
= REALVIEW_CF_BASE
+ 0xff,
159 .flags
= IORESOURCE_MEM
,
162 .start
= REALVIEW_CF_BASE
+ 0x100,
163 .end
= REALVIEW_CF_BASE
+ SZ_4K
- 1,
164 .flags
= IORESOURCE_MEM
,
168 struct platform_device realview_cf_device
= {
169 .name
= "pata_platform",
171 .num_resources
= ARRAY_SIZE(pata_resources
),
172 .resource
= pata_resources
,
174 .platform_data
= &pata_platform_data
,
178 static struct resource realview_i2c_resource
= {
179 .start
= REALVIEW_I2C_BASE
,
180 .end
= REALVIEW_I2C_BASE
+ SZ_4K
- 1,
181 .flags
= IORESOURCE_MEM
,
184 struct platform_device realview_i2c_device
= {
185 .name
= "versatile-i2c",
188 .resource
= &realview_i2c_resource
,
191 static struct i2c_board_info realview_i2c_board_info
[] = {
193 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
197 static int __init
realview_i2c_init(void)
199 return i2c_register_board_info(0, realview_i2c_board_info
,
200 ARRAY_SIZE(realview_i2c_board_info
));
202 arch_initcall(realview_i2c_init
);
204 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
207 * This is only used if GPIOLIB support is disabled
209 static unsigned int realview_mmc_status(struct device
*dev
)
211 struct amba_device
*adev
= container_of(dev
, struct amba_device
, dev
);
214 if (machine_is_realview_pb1176()) {
215 static bool inserted
= false;
218 * The PB1176 does not have the status register,
219 * assume it is inserted at startup, then invert
220 * for each call so card insertion/removal will
221 * be detected anyway. This will not be called if
222 * GPIO on PL061 is active, which is the proper
223 * way to do this on the PB1176.
225 inserted
= !inserted
;
226 return inserted
? 0 : 1;
229 if (adev
->res
.start
== REALVIEW_MMCI0_BASE
)
234 return readl(REALVIEW_SYSMCI
) & mask
;
237 struct mmci_platform_data realview_mmc0_plat_data
= {
238 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
239 .status
= realview_mmc_status
,
245 struct mmci_platform_data realview_mmc1_plat_data
= {
246 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
247 .status
= realview_mmc_status
,
256 static const struct icst_params realview_oscvco_params
= {
258 .vco_max
= ICST307_VCO_MAX
,
259 .vco_min
= ICST307_VCO_MIN
,
264 .s2div
= icst307_s2div
,
265 .idx2s
= icst307_idx2s
,
268 static void realview_oscvco_set(struct clk
*clk
, struct icst_vco vco
)
270 void __iomem
*sys_lock
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_LOCK_OFFSET
;
273 val
= readl(clk
->vcoreg
) & ~0x7ffff;
274 val
|= vco
.v
| (vco
.r
<< 9) | (vco
.s
<< 16);
276 writel(0xa05f, sys_lock
);
277 writel(val
, clk
->vcoreg
);
281 static const struct clk_ops oscvco_clk_ops
= {
282 .round
= icst_clk_round
,
284 .setvco
= realview_oscvco_set
,
287 static struct clk oscvco_clk
= {
288 .ops
= &oscvco_clk_ops
,
289 .params
= &realview_oscvco_params
,
293 * These are fixed clocks.
295 static struct clk ref24_clk
= {
299 static struct clk dummy_apb_pclk
;
301 static struct clk_lookup lookups
[] = {
303 .con_id
= "apb_pclk",
304 .clk
= &dummy_apb_pclk
,
306 .dev_id
= "dev:uart0",
309 .dev_id
= "dev:uart1",
312 .dev_id
= "dev:uart2",
315 .dev_id
= "fpga:uart3",
317 }, { /* UART3 is on the dev chip in PB1176 */
318 .dev_id
= "dev:uart3",
320 }, { /* UART4 only exists in PB1176 */
321 .dev_id
= "fpga:uart4",
324 .dev_id
= "fpga:kmi0",
327 .dev_id
= "fpga:kmi1",
330 .dev_id
= "fpga:mmc0",
332 }, { /* CLCD is in the PB1176 and EB DevChip */
333 .dev_id
= "dev:clcd",
336 .dev_id
= "issp:clcd",
339 .dev_id
= "dev:ssp0",
344 void __init
realview_init_early(void)
346 void __iomem
*sys
= __io_address(REALVIEW_SYS_BASE
);
348 if (machine_is_realview_pb1176())
349 oscvco_clk
.vcoreg
= sys
+ REALVIEW_SYS_OSC0_OFFSET
;
351 oscvco_clk
.vcoreg
= sys
+ REALVIEW_SYS_OSC4_OFFSET
;
353 clkdev_add_table(lookups
, ARRAY_SIZE(lookups
));
355 versatile_sched_clock_init(sys
+ REALVIEW_SYS_24MHz_OFFSET
, 24000000);
361 #define SYS_CLCD_NLCDIOON (1 << 2)
362 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
363 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
364 #define SYS_CLCD_ID_MASK (0x1f << 8)
365 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
366 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
367 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
368 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
369 #define SYS_CLCD_ID_VGA (0x1f << 8)
372 * Disable all display connectors on the interface module.
374 static void realview_clcd_disable(struct clcd_fb
*fb
)
376 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
379 val
= readl(sys_clcd
);
380 val
&= ~SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
381 writel(val
, sys_clcd
);
385 * Enable the relevant connector on the interface module.
387 static void realview_clcd_enable(struct clcd_fb
*fb
)
389 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
395 val
= readl(sys_clcd
);
396 val
|= SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
397 writel(val
, sys_clcd
);
401 * Detect which LCD panel is connected, and return the appropriate
402 * clcd_panel structure. Note: we do not have any information on
403 * the required timings for the 8.4in panel, so we presently assume
406 static int realview_clcd_setup(struct clcd_fb
*fb
)
408 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
409 const char *panel_name
, *vga_panel_name
;
410 unsigned long framesize
;
413 if (machine_is_realview_eb()) {
415 framesize
= 640 * 480 * 2;
416 vga_panel_name
= "VGA";
419 framesize
= 1024 * 768 * 2;
420 vga_panel_name
= "XVGA";
423 val
= readl(sys_clcd
) & SYS_CLCD_ID_MASK
;
424 if (val
== SYS_CLCD_ID_SANYO_3_8
)
425 panel_name
= "Sanyo TM38QV67A02A";
426 else if (val
== SYS_CLCD_ID_SANYO_2_5
)
427 panel_name
= "Sanyo QVGA Portrait";
428 else if (val
== SYS_CLCD_ID_EPSON_2_2
)
429 panel_name
= "Epson L2F50113T00";
430 else if (val
== SYS_CLCD_ID_VGA
)
431 panel_name
= vga_panel_name
;
433 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val
);
434 panel_name
= vga_panel_name
;
437 fb
->panel
= versatile_clcd_get_panel(panel_name
);
441 return versatile_clcd_setup_dma(fb
, framesize
);
444 struct clcd_board clcd_plat_data
= {
446 .caps
= CLCD_CAP_ALL
,
447 .check
= clcdfb_check
,
448 .decode
= clcdfb_decode
,
449 .disable
= realview_clcd_disable
,
450 .enable
= realview_clcd_enable
,
451 .setup
= realview_clcd_setup
,
452 .mmap
= versatile_clcd_mmap_dma
,
453 .remove
= versatile_clcd_remove_dma
,
457 #define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
459 void realview_leds_event(led_event_t ledevt
)
463 u32 led
= 1 << smp_processor_id();
465 local_irq_save(flags
);
466 val
= readl(VA_LEDS_BASE
);
478 val
= val
^ REALVIEW_SYS_LED7
;
489 writel(val
, VA_LEDS_BASE
);
490 local_irq_restore(flags
);
492 #endif /* CONFIG_LEDS */
495 * Where is the timer (VA)?
497 void __iomem
*timer0_va_base
;
498 void __iomem
*timer1_va_base
;
499 void __iomem
*timer2_va_base
;
500 void __iomem
*timer3_va_base
;
503 * Set up the clock source and clock events devices
505 void __init
realview_timer_init(unsigned int timer_irq
)
510 * set clock frequency:
511 * REALVIEW_REFCLK is 32KHz
512 * REALVIEW_TIMCLK is 1MHz
514 val
= readl(__io_address(REALVIEW_SCTL_BASE
));
515 writel((REALVIEW_TIMCLK
<< REALVIEW_TIMER1_EnSel
) |
516 (REALVIEW_TIMCLK
<< REALVIEW_TIMER2_EnSel
) |
517 (REALVIEW_TIMCLK
<< REALVIEW_TIMER3_EnSel
) |
518 (REALVIEW_TIMCLK
<< REALVIEW_TIMER4_EnSel
) | val
,
519 __io_address(REALVIEW_SCTL_BASE
));
522 * Initialise to a known state (all timers off)
524 writel(0, timer0_va_base
+ TIMER_CTRL
);
525 writel(0, timer1_va_base
+ TIMER_CTRL
);
526 writel(0, timer2_va_base
+ TIMER_CTRL
);
527 writel(0, timer3_va_base
+ TIMER_CTRL
);
529 sp804_clocksource_init(timer3_va_base
);
530 sp804_clockevents_init(timer0_va_base
, timer_irq
);
534 * Setup the memory banks.
536 void realview_fixup(struct machine_desc
*mdesc
, struct tag
*tags
, char **from
,
537 struct meminfo
*meminfo
)
540 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
541 * Half of this is mirrored at 0.
543 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
544 meminfo
->bank
[0].start
= 0x70000000;
545 meminfo
->bank
[0].size
= SZ_512M
;
546 meminfo
->nr_banks
= 1;
548 meminfo
->bank
[0].start
= 0;
549 meminfo
->bank
[0].size
= SZ_256M
;
550 meminfo
->nr_banks
= 1;