drivers/staging/iio/dds/ad9834.h

   1 /*
   2  * AD9833/AD9834/AD9837/AD9838 SPI DDS driver
   3  *
   4  * Copyright 2010-2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8 #ifndef IIO_DDS_AD9834_H_
   9 #define IIO_DDS_AD9834_H_
  10
  11 /* Registers */
  12
  13 #define AD9834_REG_CMD          (0 << 14)
  14 #define AD9834_REG_FREQ0        (1 << 14)
  15 #define AD9834_REG_FREQ1        (2 << 14)
  16 #define AD9834_REG_PHASE0       (6 << 13)
  17 #define AD9834_REG_PHASE1       (7 << 13)
  18
  19 /* Command Control Bits */
  20
  21 #define AD9834_B28              (1 << 13)
  22 #define AD9834_HLB              (1 << 12)
  23 #define AD9834_FSEL             (1 << 11)
  24 #define AD9834_PSEL             (1 << 10)
  25 #define AD9834_PIN_SW           (1 << 9)
  26 #define AD9834_RESET            (1 << 8)
  27 #define AD9834_SLEEP1           (1 << 7)
  28 #define AD9834_SLEEP12          (1 << 6)
  29 #define AD9834_OPBITEN          (1 << 5)
  30 #define AD9834_SIGN_PIB         (1 << 4)
  31 #define AD9834_DIV2             (1 << 3)
  32 #define AD9834_MODE             (1 << 1)
  33
  34 #define AD9834_FREQ_BITS        28
  35 #define AD9834_PHASE_BITS       12
  36
  37 #define RES_MASK(bits)  ((1 << (bits)) - 1)
  38
  39 /**
  40  * struct ad9834_state - driver instance specific data
  41  * @indio_dev:          the industrial I/O device
  42  * @spi:                spi_device
  43  * @reg:                supply regulator
  44  * @mclk:               external master clock
  45  * @control:            cached control word
  46  * @xfer:               default spi transfer
  47  * @msg:                default spi message
  48  * @freq_xfer:          tuning word spi transfer
  49  * @freq_msg:           tuning word spi message
  50  * @data:               spi transmit buffer
  51  * @freq_data:          tuning word spi transmit buffer
  52  */
  53
  54 struct ad9834_state {
  55         struct iio_dev                  *indio_dev;
  56         struct spi_device               *spi;
  57         struct regulator                *reg;
  58         unsigned int                    mclk;
  59         unsigned short                  control;
  60         unsigned short                  devid;
  61         struct spi_transfer             xfer;
  62         struct spi_message              msg;
  63         struct spi_transfer             freq_xfer[2];
  64         struct spi_message              freq_msg;
  65
  66         /*
  67          * DMA (thus cache coherency maintenance) requires the
  68          * transfer buffers to live in their own cache lines.
  69          */
  70         unsigned short                  data ____cacheline_aligned;
  71         unsigned short                  freq_data[2] ;
  72 };
  73
  74
  75 /*
  76  * TODO: struct ad7887_platform_data needs to go into include/linux/iio
  77  */
  78
  79 /**
  80  * struct ad9834_platform_data - platform specific information
  81  * @mclk:               master clock in Hz
  82  * @freq0:              power up freq0 tuning word in Hz
  83  * @freq1:              power up freq1 tuning word in Hz
  84  * @phase0:             power up phase0 value [0..4095] correlates with 0..2PI
  85  * @phase1:             power up phase1 value [0..4095] correlates with 0..2PI
  86  * @en_div2:            digital output/2 is passed to the SIGN BIT OUT pin
  87  * @en_signbit_msb_out: the MSB (or MSB/2) of the DAC data is connected to the
  88  *                      SIGN BIT OUT pin. en_div2 controls whether it is the MSB
  89  *                      or MSB/2 that is output. if en_signbit_msb_out=false,
  90  *                      the on-board comparator is connected to SIGN BIT OUT
  91  */
  92
  93 struct ad9834_platform_data {
  94         unsigned int            mclk;
  95         unsigned int            freq0;
  96         unsigned int            freq1;
  97         unsigned short          phase0;
  98         unsigned short          phase1;
  99         bool                    en_div2;
 100         bool                    en_signbit_msb_out;
 101 };
 102
 103 /**
 104  * ad9834_supported_device_ids:
 105  */
 106
 107 enum ad9834_supported_device_ids {
 108         ID_AD9833,
 109         ID_AD9834,
 110         ID_AD9837,
 111         ID_AD9838,
 112 };
 113
 114 #endif /* IIO_DDS_AD9834_H_ */