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drm/nouveau: fix __nouveau_fence_wait performance
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / atl1c / atl1c_main.c
blob3824382faecc1b1f18d42b9e9fac14094d5d2f95
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
52 /* required last entry */
53 { 0 }
54 };
55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
57 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
58 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(ATL1C_DRV_VERSION);
61
62 static int atl1c_stop_mac(struct atl1c_hw *hw);
63 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
64 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
65 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
66 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
67 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
68 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
69 int *work_done, int work_to_do);
70 static int atl1c_up(struct atl1c_adapter *adapter);
71 static void atl1c_down(struct atl1c_adapter *adapter);
72
73 static const u16 atl1c_pay_load_size[] = {
74 128, 256, 512, 1024, 2048, 4096,
75 };
76
77 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
78 {
79 REG_MB_RFD0_PROD_IDX,
80 REG_MB_RFD1_PROD_IDX,
81 REG_MB_RFD2_PROD_IDX,
82 REG_MB_RFD3_PROD_IDX
83 };
84
85 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
86 {
87 REG_RFD0_HEAD_ADDR_LO,
88 REG_RFD1_HEAD_ADDR_LO,
89 REG_RFD2_HEAD_ADDR_LO,
90 REG_RFD3_HEAD_ADDR_LO
91 };
92
93 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
94 {
95 REG_RRD0_HEAD_ADDR_LO,
96 REG_RRD1_HEAD_ADDR_LO,
97 REG_RRD2_HEAD_ADDR_LO,
98 REG_RRD3_HEAD_ADDR_LO
99 };
100
101 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
102 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
103 static void atl1c_pcie_patch(struct atl1c_hw *hw)
104 {
105 u32 data;
106
107 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
108 data |= PCIE_PHYMISC_FORCE_RCV_DET;
109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
110
111 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
112 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
113
114 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
115 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
116 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
117 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
118 PCIE_PHYMISC2_SERDES_TH_SHIFT);
119 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
120 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
121 }
122 }
123
124 /* FIXME: no need any more ? */
125 /*
126 * atl1c_init_pcie - init PCIE module
127 */
128 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
129 {
130 u32 data;
131 u32 pci_cmd;
132 struct pci_dev *pdev = hw->adapter->pdev;
133
134 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
135 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
136 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
137 PCI_COMMAND_IO);
138 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
139
140 /*
141 * Clear any PowerSaveing Settings
142 */
143 pci_enable_wake(pdev, PCI_D3hot, 0);
144 pci_enable_wake(pdev, PCI_D3cold, 0);
145
146 /*
147 * Mask some pcie error bits
148 */
149 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
150 data &= ~PCIE_UC_SERVRITY_DLP;
151 data &= ~PCIE_UC_SERVRITY_FCP;
152 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
153
154 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
155 data &= ~LTSSM_ID_EN_WRO;
156 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
157
158 atl1c_pcie_patch(hw);
159 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
160 atl1c_disable_l0s_l1(hw);
161 if (flag & ATL1C_PCIE_PHY_RESET)
162 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
163 else
164 AT_WRITE_REG(hw, REG_GPHY_CTRL,
165 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
166
167 msleep(5);
168 }
169
170 /*
171 * atl1c_irq_enable - Enable default interrupt generation settings
172 * @adapter: board private structure
173 */
174 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
175 {
176 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
177 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
178 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
179 AT_WRITE_FLUSH(&adapter->hw);
180 }
181 }
182
183 /*
184 * atl1c_irq_disable - Mask off interrupt generation on the NIC
185 * @adapter: board private structure
186 */
187 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
188 {
189 atomic_inc(&adapter->irq_sem);
190 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
191 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
192 AT_WRITE_FLUSH(&adapter->hw);
193 synchronize_irq(adapter->pdev->irq);
194 }
195
196 /*
197 * atl1c_irq_reset - reset interrupt confiure on the NIC
198 * @adapter: board private structure
199 */
200 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
201 {
202 atomic_set(&adapter->irq_sem, 1);
203 atl1c_irq_enable(adapter);
204 }
205
206 /*
207 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
208 * of the idle status register until the device is actually idle
209 */
210 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
211 {
212 int timeout;
213 u32 data;
214
215 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
216 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
217 if ((data & IDLE_STATUS_MASK) == 0)
218 return 0;
219 msleep(1);
220 }
221 return data;
222 }
223
224 /*
225 * atl1c_phy_config - Timer Call-back
226 * @data: pointer to netdev cast into an unsigned long
227 */
228 static void atl1c_phy_config(unsigned long data)
229 {
230 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
231 struct atl1c_hw *hw = &adapter->hw;
232 unsigned long flags;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 atl1c_restart_autoneg(hw);
236 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
237 }
238
239 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
240 {
241 WARN_ON(in_interrupt());
242 atl1c_down(adapter);
243 atl1c_up(adapter);
244 clear_bit(__AT_RESETTING, &adapter->flags);
245 }
246
247 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
248 {
249 struct atl1c_hw *hw = &adapter->hw;
250 struct net_device *netdev = adapter->netdev;
251 struct pci_dev *pdev = adapter->pdev;
252 int err;
253 unsigned long flags;
254 u16 speed, duplex, phy_data;
255
256 spin_lock_irqsave(&adapter->mdio_lock, flags);
257 /* MII_BMSR must read twise */
258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
260 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
261
262 if ((phy_data & BMSR_LSTATUS) == 0) {
263 /* link down */
264 hw->hibernate = true;
265 if (atl1c_stop_mac(hw) != 0)
266 if (netif_msg_hw(adapter))
267 dev_warn(&pdev->dev, "stop mac failed\n");
268 atl1c_set_aspm(hw, false);
269 netif_carrier_off(netdev);
270 netif_stop_queue(netdev);
271 atl1c_phy_reset(hw);
272 atl1c_phy_init(&adapter->hw);
273 } else {
274 /* Link Up */
275 hw->hibernate = false;
276 spin_lock_irqsave(&adapter->mdio_lock, flags);
277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
278 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
279 if (unlikely(err))
280 return;
281 /* link result is our setting */
282 if (adapter->link_speed != speed ||
283 adapter->link_duplex != duplex) {
284 adapter->link_speed = speed;
285 adapter->link_duplex = duplex;
286 atl1c_set_aspm(hw, true);
287 atl1c_enable_tx_ctrl(hw);
288 atl1c_enable_rx_ctrl(hw);
289 atl1c_setup_mac_ctrl(adapter);
290 if (netif_msg_link(adapter))
291 dev_info(&pdev->dev,
292 "%s: %s NIC Link is Up<%d Mbps %s>\n",
293 atl1c_driver_name, netdev->name,
294 adapter->link_speed,
295 adapter->link_duplex == FULL_DUPLEX ?
296 "Full Duplex" : "Half Duplex");
297 }
298 if (!netif_carrier_ok(netdev))
299 netif_carrier_on(netdev);
300 }
301 }
302
303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
304 {
305 struct net_device *netdev = adapter->netdev;
306 struct pci_dev *pdev = adapter->pdev;
307 u16 phy_data;
308 u16 link_up;
309
310 spin_lock(&adapter->mdio_lock);
311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
313 spin_unlock(&adapter->mdio_lock);
314 link_up = phy_data & BMSR_LSTATUS;
315 /* notify upper layer link down ASAP */
316 if (!link_up) {
317 if (netif_carrier_ok(netdev)) {
318 /* old link state: Up */
319 netif_carrier_off(netdev);
320 if (netif_msg_link(adapter))
321 dev_info(&pdev->dev,
322 "%s: %s NIC Link is Down\n",
323 atl1c_driver_name, netdev->name);
324 adapter->link_speed = SPEED_0;
325 }
326 }
327
328 adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
329 schedule_work(&adapter->common_task);
330 }
331
332 static void atl1c_common_task(struct work_struct *work)
333 {
334 struct atl1c_adapter *adapter;
335 struct net_device *netdev;
336
337 adapter = container_of(work, struct atl1c_adapter, common_task);
338 netdev = adapter->netdev;
339
340 if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
341 adapter->work_event &= ~ATL1C_WORK_EVENT_RESET;
342 netif_device_detach(netdev);
343 atl1c_down(adapter);
344 atl1c_up(adapter);
345 netif_device_attach(netdev);
346 return;
347 }
348
349 if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) {
350 adapter->work_event &= ~ATL1C_WORK_EVENT_LINK_CHANGE;
351 atl1c_check_link_status(adapter);
352 }
353 return;
354 }
355
356
357 static void atl1c_del_timer(struct atl1c_adapter *adapter)
358 {
359 del_timer_sync(&adapter->phy_config_timer);
360 }
361
362
363 /*
364 * atl1c_tx_timeout - Respond to a Tx Hang
365 * @netdev: network interface device structure
366 */
367 static void atl1c_tx_timeout(struct net_device *netdev)
368 {
369 struct atl1c_adapter *adapter = netdev_priv(netdev);
370
371 /* Do the reset outside of interrupt context */
372 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
373 schedule_work(&adapter->common_task);
374 }
375
376 /*
377 * atl1c_set_multi - Multicast and Promiscuous mode set
378 * @netdev: network interface device structure
379 *
380 * The set_multi entry point is called whenever the multicast address
381 * list or the network interface flags are updated. This routine is
382 * responsible for configuring the hardware for proper multicast,
383 * promiscuous mode, and all-multi behavior.
384 */
385 static void atl1c_set_multi(struct net_device *netdev)
386 {
387 struct atl1c_adapter *adapter = netdev_priv(netdev);
388 struct atl1c_hw *hw = &adapter->hw;
389 struct netdev_hw_addr *ha;
390 u32 mac_ctrl_data;
391 u32 hash_value;
392
393 /* Check for Promiscuous and All Multicast modes */
394 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
395
396 if (netdev->flags & IFF_PROMISC) {
397 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
398 } else if (netdev->flags & IFF_ALLMULTI) {
399 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
400 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
401 } else {
402 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
403 }
404
405 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
406
407 /* clear the old settings from the multicast hash table */
408 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
409 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
410
411 /* comoute mc addresses' hash value ,and put it into hash table */
412 netdev_for_each_mc_addr(ha, netdev) {
413 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
414 atl1c_hash_set(hw, hash_value);
415 }
416 }
417
418 static void atl1c_vlan_rx_register(struct net_device *netdev,
419 struct vlan_group *grp)
420 {
421 struct atl1c_adapter *adapter = netdev_priv(netdev);
422 struct pci_dev *pdev = adapter->pdev;
423 u32 mac_ctrl_data = 0;
424
425 if (netif_msg_pktdata(adapter))
426 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
427
428 atl1c_irq_disable(adapter);
429
430 adapter->vlgrp = grp;
431 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
432
433 if (grp) {
434 /* enable VLAN tag insert/strip */
435 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
436 } else {
437 /* disable VLAN tag insert/strip */
438 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
439 }
440
441 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
442 atl1c_irq_enable(adapter);
443 }
444
445 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
446 {
447 struct pci_dev *pdev = adapter->pdev;
448
449 if (netif_msg_pktdata(adapter))
450 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
451 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
452 }
453 /*
454 * atl1c_set_mac - Change the Ethernet Address of the NIC
455 * @netdev: network interface device structure
456 * @p: pointer to an address structure
457 *
458 * Returns 0 on success, negative on failure
459 */
460 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
461 {
462 struct atl1c_adapter *adapter = netdev_priv(netdev);
463 struct sockaddr *addr = p;
464
465 if (!is_valid_ether_addr(addr->sa_data))
466 return -EADDRNOTAVAIL;
467
468 if (netif_running(netdev))
469 return -EBUSY;
470
471 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
472 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
473
474 atl1c_hw_set_mac_addr(&adapter->hw);
475
476 return 0;
477 }
478
479 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
480 struct net_device *dev)
481 {
482 int mtu = dev->mtu;
483
484 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
485 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
486 }
487 /*
488 * atl1c_change_mtu - Change the Maximum Transfer Unit
489 * @netdev: network interface device structure
490 * @new_mtu: new value for maximum frame size
491 *
492 * Returns 0 on success, negative on failure
493 */
494 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
495 {
496 struct atl1c_adapter *adapter = netdev_priv(netdev);
497 int old_mtu = netdev->mtu;
498 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
499
500 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
501 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
502 if (netif_msg_link(adapter))
503 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
504 return -EINVAL;
505 }
506 /* set MTU */
507 if (old_mtu != new_mtu && netif_running(netdev)) {
508 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
509 msleep(1);
510 netdev->mtu = new_mtu;
511 adapter->hw.max_frame_size = new_mtu;
512 atl1c_set_rxbufsize(adapter, netdev);
513 if (new_mtu > MAX_TSO_FRAME_SIZE) {
514 adapter->netdev->features &= ~NETIF_F_TSO;
515 adapter->netdev->features &= ~NETIF_F_TSO6;
516 } else {
517 adapter->netdev->features |= NETIF_F_TSO;
518 adapter->netdev->features |= NETIF_F_TSO6;
519 }
520 atl1c_down(adapter);
521 atl1c_up(adapter);
522 clear_bit(__AT_RESETTING, &adapter->flags);
523 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
524 u32 phy_data;
525
526 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
527 phy_data |= 0x10000000;
528 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
529 }
530
531 }
532 return 0;
533 }
534
535 /*
536 * caller should hold mdio_lock
537 */
538 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
539 {
540 struct atl1c_adapter *adapter = netdev_priv(netdev);
541 u16 result;
542
543 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
544 return result;
545 }
546
547 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
548 int reg_num, int val)
549 {
550 struct atl1c_adapter *adapter = netdev_priv(netdev);
551
552 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
553 }
554
555 /*
556 * atl1c_mii_ioctl -
557 * @netdev:
558 * @ifreq:
559 * @cmd:
560 */
561 static int atl1c_mii_ioctl(struct net_device *netdev,
562 struct ifreq *ifr, int cmd)
563 {
564 struct atl1c_adapter *adapter = netdev_priv(netdev);
565 struct pci_dev *pdev = adapter->pdev;
566 struct mii_ioctl_data *data = if_mii(ifr);
567 unsigned long flags;
568 int retval = 0;
569
570 if (!netif_running(netdev))
571 return -EINVAL;
572
573 spin_lock_irqsave(&adapter->mdio_lock, flags);
574 switch (cmd) {
575 case SIOCGMIIPHY:
576 data->phy_id = 0;
577 break;
578
579 case SIOCGMIIREG:
580 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
581 &data->val_out)) {
582 retval = -EIO;
583 goto out;
584 }
585 break;
586
587 case SIOCSMIIREG:
588 if (data->reg_num & ~(0x1F)) {
589 retval = -EFAULT;
590 goto out;
591 }
592
593 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
594 data->reg_num, data->val_in);
595 if (atl1c_write_phy_reg(&adapter->hw,
596 data->reg_num, data->val_in)) {
597 retval = -EIO;
598 goto out;
599 }
600 break;
601
602 default:
603 retval = -EOPNOTSUPP;
604 break;
605 }
606 out:
607 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
608 return retval;
609 }
610
611 /*
612 * atl1c_ioctl -
613 * @netdev:
614 * @ifreq:
615 * @cmd:
616 */
617 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
618 {
619 switch (cmd) {
620 case SIOCGMIIPHY:
621 case SIOCGMIIREG:
622 case SIOCSMIIREG:
623 return atl1c_mii_ioctl(netdev, ifr, cmd);
624 default:
625 return -EOPNOTSUPP;
626 }
627 }
628
629 /*
630 * atl1c_alloc_queues - Allocate memory for all rings
631 * @adapter: board private structure to initialize
632 *
633 */
634 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
635 {
636 return 0;
637 }
638
639 static void atl1c_set_mac_type(struct atl1c_hw *hw)
640 {
641 switch (hw->device_id) {
642 case PCI_DEVICE_ID_ATTANSIC_L2C:
643 hw->nic_type = athr_l2c;
644 break;
645 case PCI_DEVICE_ID_ATTANSIC_L1C:
646 hw->nic_type = athr_l1c;
647 break;
648 case PCI_DEVICE_ID_ATHEROS_L2C_B:
649 hw->nic_type = athr_l2c_b;
650 break;
651 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
652 hw->nic_type = athr_l2c_b2;
653 break;
654 case PCI_DEVICE_ID_ATHEROS_L1D:
655 hw->nic_type = athr_l1d;
656 break;
657 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
658 hw->nic_type = athr_l1d_2;
659 break;
660 default:
661 break;
662 }
663 }
664
665 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
666 {
667 u32 phy_status_data;
668 u32 link_ctrl_data;
669
670 atl1c_set_mac_type(hw);
671 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
672 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
673
674 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
675 ATL1C_TXQ_MODE_ENHANCE;
676 if (link_ctrl_data & LINK_CTRL_L0S_EN)
677 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
678 if (link_ctrl_data & LINK_CTRL_L1_EN)
679 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
680 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
681 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
682 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
683
684 if (hw->nic_type == athr_l1c ||
685 hw->nic_type == athr_l1d ||
686 hw->nic_type == athr_l1d_2)
687 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
688 return 0;
689 }
690 /*
691 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
692 * @adapter: board private structure to initialize
693 *
694 * atl1c_sw_init initializes the Adapter private data structure.
695 * Fields are initialized based on PCI device information and
696 * OS network device settings (MTU size).
697 */
698 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
699 {
700 struct atl1c_hw *hw = &adapter->hw;
701 struct pci_dev *pdev = adapter->pdev;
702 u32 revision;
703
704
705 adapter->wol = 0;
706 device_set_wakeup_enable(&pdev->dev, false);
707 adapter->link_speed = SPEED_0;
708 adapter->link_duplex = FULL_DUPLEX;
709 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
710 adapter->tpd_ring[0].count = 1024;
711 adapter->rfd_ring[0].count = 512;
712
713 hw->vendor_id = pdev->vendor;
714 hw->device_id = pdev->device;
715 hw->subsystem_vendor_id = pdev->subsystem_vendor;
716 hw->subsystem_id = pdev->subsystem_device;
717 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
718 hw->revision_id = revision & 0xFF;
719 /* before link up, we assume hibernate is true */
720 hw->hibernate = true;
721 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
722 if (atl1c_setup_mac_funcs(hw) != 0) {
723 dev_err(&pdev->dev, "set mac function pointers failed\n");
724 return -1;
725 }
726 hw->intr_mask = IMR_NORMAL_MASK;
727 hw->phy_configured = false;
728 hw->preamble_len = 7;
729 hw->max_frame_size = adapter->netdev->mtu;
730 if (adapter->num_rx_queues < 2) {
731 hw->rss_type = atl1c_rss_disable;
732 hw->rss_mode = atl1c_rss_mode_disable;
733 } else {
734 hw->rss_type = atl1c_rss_ipv4;
735 hw->rss_mode = atl1c_rss_mul_que_mul_int;
736 hw->rss_hash_bits = 16;
737 }
738 hw->autoneg_advertised = ADVERTISED_Autoneg;
739 hw->indirect_tab = 0xE4E4E4E4;
740 hw->base_cpu = 0;
741
742 hw->ict = 50000; /* 100ms */
743 hw->smb_timer = 200000; /* 400ms */
744 hw->cmb_tpd = 4;
745 hw->cmb_tx_timer = 1; /* 2 us */
746 hw->rx_imt = 200;
747 hw->tx_imt = 1000;
748
749 hw->tpd_burst = 5;
750 hw->rfd_burst = 8;
751 hw->dma_order = atl1c_dma_ord_out;
752 hw->dmar_block = atl1c_dma_req_1024;
753 hw->dmaw_block = atl1c_dma_req_1024;
754 hw->dmar_dly_cnt = 15;
755 hw->dmaw_dly_cnt = 4;
756
757 if (atl1c_alloc_queues(adapter)) {
758 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
759 return -ENOMEM;
760 }
761 /* TODO */
762 atl1c_set_rxbufsize(adapter, adapter->netdev);
763 atomic_set(&adapter->irq_sem, 1);
764 spin_lock_init(&adapter->mdio_lock);
765 spin_lock_init(&adapter->tx_lock);
766 set_bit(__AT_DOWN, &adapter->flags);
767
768 return 0;
769 }
770
771 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
772 struct atl1c_buffer *buffer_info, int in_irq)
773 {
774 u16 pci_driection;
775 if (buffer_info->flags & ATL1C_BUFFER_FREE)
776 return;
777 if (buffer_info->dma) {
778 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
779 pci_driection = PCI_DMA_FROMDEVICE;
780 else
781 pci_driection = PCI_DMA_TODEVICE;
782
783 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
784 pci_unmap_single(pdev, buffer_info->dma,
785 buffer_info->length, pci_driection);
786 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
787 pci_unmap_page(pdev, buffer_info->dma,
788 buffer_info->length, pci_driection);
789 }
790 if (buffer_info->skb) {
791 if (in_irq)
792 dev_kfree_skb_irq(buffer_info->skb);
793 else
794 dev_kfree_skb(buffer_info->skb);
795 }
796 buffer_info->dma = 0;
797 buffer_info->skb = NULL;
798 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
799 }
800 /*
801 * atl1c_clean_tx_ring - Free Tx-skb
802 * @adapter: board private structure
803 */
804 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
805 enum atl1c_trans_queue type)
806 {
807 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
808 struct atl1c_buffer *buffer_info;
809 struct pci_dev *pdev = adapter->pdev;
810 u16 index, ring_count;
811
812 ring_count = tpd_ring->count;
813 for (index = 0; index < ring_count; index++) {
814 buffer_info = &tpd_ring->buffer_info[index];
815 atl1c_clean_buffer(pdev, buffer_info, 0);
816 }
817
818 /* Zero out Tx-buffers */
819 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
820 ring_count);
821 atomic_set(&tpd_ring->next_to_clean, 0);
822 tpd_ring->next_to_use = 0;
823 }
824
825 /*
826 * atl1c_clean_rx_ring - Free rx-reservation skbs
827 * @adapter: board private structure
828 */
829 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
830 {
831 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
832 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
833 struct atl1c_buffer *buffer_info;
834 struct pci_dev *pdev = adapter->pdev;
835 int i, j;
836
837 for (i = 0; i < adapter->num_rx_queues; i++) {
838 for (j = 0; j < rfd_ring[i].count; j++) {
839 buffer_info = &rfd_ring[i].buffer_info[j];
840 atl1c_clean_buffer(pdev, buffer_info, 0);
841 }
842 /* zero out the descriptor ring */
843 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
844 rfd_ring[i].next_to_clean = 0;
845 rfd_ring[i].next_to_use = 0;
846 rrd_ring[i].next_to_use = 0;
847 rrd_ring[i].next_to_clean = 0;
848 }
849 }
850
851 /*
852 * Read / Write Ptr Initialize:
853 */
854 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
855 {
856 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
857 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
858 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
859 struct atl1c_buffer *buffer_info;
860 int i, j;
861
862 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
863 tpd_ring[i].next_to_use = 0;
864 atomic_set(&tpd_ring[i].next_to_clean, 0);
865 buffer_info = tpd_ring[i].buffer_info;
866 for (j = 0; j < tpd_ring->count; j++)
867 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
868 ATL1C_BUFFER_FREE);
869 }
870 for (i = 0; i < adapter->num_rx_queues; i++) {
871 rfd_ring[i].next_to_use = 0;
872 rfd_ring[i].next_to_clean = 0;
873 rrd_ring[i].next_to_use = 0;
874 rrd_ring[i].next_to_clean = 0;
875 for (j = 0; j < rfd_ring[i].count; j++) {
876 buffer_info = &rfd_ring[i].buffer_info[j];
877 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
878 }
879 }
880 }
881
882 /*
883 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
884 * @adapter: board private structure
885 *
886 * Free all transmit software resources
887 */
888 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
889 {
890 struct pci_dev *pdev = adapter->pdev;
891
892 pci_free_consistent(pdev, adapter->ring_header.size,
893 adapter->ring_header.desc,
894 adapter->ring_header.dma);
895 adapter->ring_header.desc = NULL;
896
897 /* Note: just free tdp_ring.buffer_info,
898 * it contain rfd_ring.buffer_info, do not double free */
899 if (adapter->tpd_ring[0].buffer_info) {
900 kfree(adapter->tpd_ring[0].buffer_info);
901 adapter->tpd_ring[0].buffer_info = NULL;
902 }
903 }
904
905 /*
906 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
907 * @adapter: board private structure
908 *
909 * Return 0 on success, negative on failure
910 */
911 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
912 {
913 struct pci_dev *pdev = adapter->pdev;
914 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
915 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
916 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
917 struct atl1c_ring_header *ring_header = &adapter->ring_header;
918 int num_rx_queues = adapter->num_rx_queues;
919 int size;
920 int i;
921 int count = 0;
922 int rx_desc_count = 0;
923 u32 offset = 0;
924
925 rrd_ring[0].count = rfd_ring[0].count;
926 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
927 tpd_ring[i].count = tpd_ring[0].count;
928
929 for (i = 1; i < adapter->num_rx_queues; i++)
930 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
931
932 /* 2 tpd queue, one high priority queue,
933 * another normal priority queue */
934 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
935 rfd_ring->count * num_rx_queues);
936 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
937 if (unlikely(!tpd_ring->buffer_info)) {
938 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
939 size);
940 goto err_nomem;
941 }
942 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
943 tpd_ring[i].buffer_info =
944 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
945 count += tpd_ring[i].count;
946 }
947
948 for (i = 0; i < num_rx_queues; i++) {
949 rfd_ring[i].buffer_info =
950 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
951 count += rfd_ring[i].count;
952 rx_desc_count += rfd_ring[i].count;
953 }
954 /*
955 * real ring DMA buffer
956 * each ring/block may need up to 8 bytes for alignment, hence the
957 * additional bytes tacked onto the end.
958 */
959 ring_header->size = size =
960 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
961 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
962 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
963 sizeof(struct atl1c_hw_stats) +
964 8 * 4 + 8 * 2 * num_rx_queues;
965
966 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
967 &ring_header->dma);
968 if (unlikely(!ring_header->desc)) {
969 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
970 goto err_nomem;
971 }
972 memset(ring_header->desc, 0, ring_header->size);
973 /* init TPD ring */
974
975 tpd_ring[0].dma = roundup(ring_header->dma, 8);
976 offset = tpd_ring[0].dma - ring_header->dma;
977 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
978 tpd_ring[i].dma = ring_header->dma + offset;
979 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
980 tpd_ring[i].size =
981 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
982 offset += roundup(tpd_ring[i].size, 8);
983 }
984 /* init RFD ring */
985 for (i = 0; i < num_rx_queues; i++) {
986 rfd_ring[i].dma = ring_header->dma + offset;
987 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
988 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
989 rfd_ring[i].count;
990 offset += roundup(rfd_ring[i].size, 8);
991 }
992
993 /* init RRD ring */
994 for (i = 0; i < num_rx_queues; i++) {
995 rrd_ring[i].dma = ring_header->dma + offset;
996 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
997 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
998 rrd_ring[i].count;
999 offset += roundup(rrd_ring[i].size, 8);
1000 }
1001
1002 adapter->smb.dma = ring_header->dma + offset;
1003 adapter->smb.smb = (u8 *)ring_header->desc + offset;
1004 return 0;
1005
1006 err_nomem:
1007 kfree(tpd_ring->buffer_info);
1008 return -ENOMEM;
1009 }
1010
1011 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1012 {
1013 struct atl1c_hw *hw = &adapter->hw;
1014 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
1015 adapter->rfd_ring;
1016 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
1017 adapter->rrd_ring;
1018 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1019 adapter->tpd_ring;
1020 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
1021 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
1022 int i;
1023 u32 data;
1024
1025 /* TPD */
1026 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1027 (u32)((tpd_ring[atl1c_trans_normal].dma &
1028 AT_DMA_HI_ADDR_MASK) >> 32));
1029 /* just enable normal priority TX queue */
1030 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
1031 (u32)(tpd_ring[atl1c_trans_normal].dma &
1032 AT_DMA_LO_ADDR_MASK));
1033 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
1034 (u32)(tpd_ring[atl1c_trans_high].dma &
1035 AT_DMA_LO_ADDR_MASK));
1036 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1037 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1038
1039
1040 /* RFD */
1041 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1042 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1043 for (i = 0; i < adapter->num_rx_queues; i++)
1044 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
1045 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1046
1047 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1048 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1049 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1050 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1051
1052 /* RRD */
1053 for (i = 0; i < adapter->num_rx_queues; i++)
1054 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1055 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1056 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1057 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1058
1059 /* CMB */
1060 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1061
1062 /* SMB */
1063 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1064 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1065 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1066 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1067 if (hw->nic_type == athr_l2c_b) {
1068 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1069 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1070 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1071 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1072 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1073 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1074 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1075 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1076 }
1077 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1078 /* Power Saving for L2c_B */
1079 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1080 data |= SERDES_MAC_CLK_SLOWDOWN;
1081 data |= SERDES_PYH_CLK_SLOWDOWN;
1082 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1083 }
1084 /* Load all of base address above */
1085 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1086 }
1087
1088 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1089 {
1090 struct atl1c_hw *hw = &adapter->hw;
1091 u32 dev_ctrl_data;
1092 u32 max_pay_load;
1093 u16 tx_offload_thresh;
1094 u32 txq_ctrl_data;
1095 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
1096 u32 max_pay_load_data;
1097
1098 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1099 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1100 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1101 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1102 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1103 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1104 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1105 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1106 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1107 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1108 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1109
1110 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1111 TXQ_NUM_TPD_BURST_SHIFT;
1112 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1113 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1114 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
1115 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1116 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1117 max_pay_load_data >>= 1;
1118 txq_ctrl_data |= max_pay_load_data;
1119
1120 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1121 }
1122
1123 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1124 {
1125 struct atl1c_hw *hw = &adapter->hw;
1126 u32 rxq_ctrl_data;
1127
1128 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1129 RXQ_RFD_BURST_NUM_SHIFT;
1130
1131 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1132 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1133 if (hw->rss_type == atl1c_rss_ipv4)
1134 rxq_ctrl_data |= RSS_HASH_IPV4;
1135 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1136 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1137 if (hw->rss_type == atl1c_rss_ipv6)
1138 rxq_ctrl_data |= RSS_HASH_IPV6;
1139 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1140 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1141 if (hw->rss_type != atl1c_rss_disable)
1142 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1143
1144 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1145 RSS_MODE_SHIFT;
1146 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1147 RSS_HASH_BITS_SHIFT;
1148 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1149 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
1150 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1151
1152 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1153 }
1154
1155 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1156 {
1157 struct atl1c_hw *hw = &adapter->hw;
1158
1159 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1160 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1161 }
1162
1163 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1164 {
1165 struct atl1c_hw *hw = &adapter->hw;
1166 u32 dma_ctrl_data;
1167
1168 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1169 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1170 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1171 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1172 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1173 else
1174 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1175
1176 switch (hw->dma_order) {
1177 case atl1c_dma_ord_in:
1178 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1179 break;
1180 case atl1c_dma_ord_enh:
1181 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1182 break;
1183 case atl1c_dma_ord_out:
1184 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1185 break;
1186 default:
1187 break;
1188 }
1189
1190 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1191 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1192 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1193 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1194 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1195 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1196 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1197 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1198
1199 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1200 }
1201
1202 /*
1203 * Stop the mac, transmit and receive units
1204 * hw - Struct containing variables accessed by shared code
1205 * return : 0 or idle status (if error)
1206 */
1207 static int atl1c_stop_mac(struct atl1c_hw *hw)
1208 {
1209 u32 data;
1210
1211 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1212 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1213 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1214 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1215
1216 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1217 data &= ~TXQ_CTRL_EN;
1218 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1219
1220 atl1c_wait_until_idle(hw);
1221
1222 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1223 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1224 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1225
1226 return (int)atl1c_wait_until_idle(hw);
1227 }
1228
1229 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1230 {
1231 u32 data;
1232
1233 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1234 switch (hw->adapter->num_rx_queues) {
1235 case 4:
1236 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1237 break;
1238 case 3:
1239 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1240 break;
1241 case 2:
1242 data |= RXQ1_CTRL_EN;
1243 break;
1244 default:
1245 break;
1246 }
1247 data |= RXQ_CTRL_EN;
1248 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1249 }
1250
1251 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1252 {
1253 u32 data;
1254
1255 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1256 data |= TXQ_CTRL_EN;
1257 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1258 }
1259
1260 /*
1261 * Reset the transmit and receive units; mask and clear all interrupts.
1262 * hw - Struct containing variables accessed by shared code
1263 * return : 0 or idle status (if error)
1264 */
1265 static int atl1c_reset_mac(struct atl1c_hw *hw)
1266 {
1267 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1268 struct pci_dev *pdev = adapter->pdev;
1269 u32 master_ctrl_data = 0;
1270
1271 AT_WRITE_REG(hw, REG_IMR, 0);
1272 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1273
1274 atl1c_stop_mac(hw);
1275 /*
1276 * Issue Soft Reset to the MAC. This will reset the chip's
1277 * transmit, receive, DMA. It will not effect
1278 * the current PCI configuration. The global reset bit is self-
1279 * clearing, and should clear within a microsecond.
1280 */
1281 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1282 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1283 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1284 & 0xFFFF));
1285
1286 AT_WRITE_FLUSH(hw);
1287 msleep(10);
1288 /* Wait at least 10ms for All module to be Idle */
1289
1290 if (atl1c_wait_until_idle(hw)) {
1291 dev_err(&pdev->dev,
1292 "MAC state machine can't be idle since"
1293 " disabled for 10ms second\n");
1294 return -1;
1295 }
1296 return 0;
1297 }
1298
1299 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1300 {
1301 u32 pm_ctrl_data;
1302
1303 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1304 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1305 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1306 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1307 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1308 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1309 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1310 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1311
1312 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1313 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1314 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1315 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1316 }
1317
1318 /*
1319 * Set ASPM state.
1320 * Enable/disable L0s/L1 depend on link state.
1321 */
1322 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1323 {
1324 u32 pm_ctrl_data;
1325 u32 link_ctrl_data;
1326 u32 link_l1_timer = 0xF;
1327
1328 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1329 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1330
1331 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1332 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1333 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1334 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1335 PM_CTRL_LCKDET_TIMER_SHIFT);
1336 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
1337
1338 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1339 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1340 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1341 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1342 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
1343 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1344 }
1345
1346 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1347
1348 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1349 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1350 PM_CTRL_PM_REQ_TIMER_SHIFT);
1351 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1352 PM_CTRL_PM_REQ_TIMER_SHIFT;
1353 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1354 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1355 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1356 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1357 }
1358 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1359 if (linkup) {
1360 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1361 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1362 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1363 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1364 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1365 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1366
1367 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1368 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1369 if (hw->nic_type == athr_l2c_b)
1370 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1371 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1372 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1373 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1374 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1375 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1376 if (hw->adapter->link_speed == SPEED_100 ||
1377 hw->adapter->link_speed == SPEED_1000) {
1378 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1379 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1380 if (hw->nic_type == athr_l2c_b)
1381 link_l1_timer = 7;
1382 else if (hw->nic_type == athr_l2c_b2 ||
1383 hw->nic_type == athr_l1d_2)
1384 link_l1_timer = 4;
1385 pm_ctrl_data |= link_l1_timer <<
1386 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1387 }
1388 } else {
1389 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1390 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1391 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1392 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1393 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1394 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1395
1396 }
1397 } else {
1398 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1399 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1400 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1401 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1402
1403 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1404 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1405 else
1406 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1407 }
1408 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1409
1410 return;
1411 }
1412
1413 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1414 {
1415 struct atl1c_hw *hw = &adapter->hw;
1416 struct net_device *netdev = adapter->netdev;
1417 u32 mac_ctrl_data;
1418
1419 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1420 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1421
1422 if (adapter->link_duplex == FULL_DUPLEX) {
1423 hw->mac_duplex = true;
1424 mac_ctrl_data |= MAC_CTRL_DUPLX;
1425 }
1426
1427 if (adapter->link_speed == SPEED_1000)
1428 hw->mac_speed = atl1c_mac_speed_1000;
1429 else
1430 hw->mac_speed = atl1c_mac_speed_10_100;
1431
1432 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1433 MAC_CTRL_SPEED_SHIFT;
1434
1435 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1436 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1437 MAC_CTRL_PRMLEN_SHIFT);
1438
1439 if (adapter->vlgrp)
1440 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1441
1442 mac_ctrl_data |= MAC_CTRL_BC_EN;
1443 if (netdev->flags & IFF_PROMISC)
1444 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1445 if (netdev->flags & IFF_ALLMULTI)
1446 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1447
1448 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1449 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1450 hw->nic_type == athr_l1d_2) {
1451 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1452 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1453 }
1454 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1455 }
1456
1457 /*
1458 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1459 * @adapter: board private structure
1460 *
1461 * Configure the Tx /Rx unit of the MAC after a reset.
1462 */
1463 static int atl1c_configure(struct atl1c_adapter *adapter)
1464 {
1465 struct atl1c_hw *hw = &adapter->hw;
1466 u32 master_ctrl_data = 0;
1467 u32 intr_modrt_data;
1468 u32 data;
1469
1470 /* clear interrupt status */
1471 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1472 /* Clear any WOL status */
1473 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1474 /* set Interrupt Clear Timer
1475 * HW will enable self to assert interrupt event to system after
1476 * waiting x-time for software to notify it accept interrupt.
1477 */
1478
1479 data = CLK_GATING_EN_ALL;
1480 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1481 if (hw->nic_type == athr_l2c_b)
1482 data &= ~CLK_GATING_RXMAC_EN;
1483 } else
1484 data = 0;
1485 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1486
1487 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1488 hw->ict & INT_RETRIG_TIMER_MASK);
1489
1490 atl1c_configure_des_ring(adapter);
1491
1492 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1493 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1494 IRQ_MODRT_TX_TIMER_SHIFT;
1495 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1496 IRQ_MODRT_RX_TIMER_SHIFT;
1497 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1498 master_ctrl_data |=
1499 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1500 }
1501
1502 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1503 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1504
1505 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1506 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1507
1508 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1509 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1510 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1511 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1512 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1513 }
1514
1515 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1516 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1517 hw->smb_timer & SMB_STAT_TIMER_MASK);
1518 /* set MTU */
1519 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1520 VLAN_HLEN + ETH_FCS_LEN);
1521 /* HDS, disable */
1522 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1523
1524 atl1c_configure_tx(adapter);
1525 atl1c_configure_rx(adapter);
1526 atl1c_configure_rss(adapter);
1527 atl1c_configure_dma(adapter);
1528
1529 return 0;
1530 }
1531
1532 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1533 {
1534 u16 hw_reg_addr = 0;
1535 unsigned long *stats_item = NULL;
1536 u32 data;
1537
1538 /* update rx status */
1539 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1540 stats_item = &adapter->hw_stats.rx_ok;
1541 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1542 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1543 *stats_item += data;
1544 stats_item++;
1545 hw_reg_addr += 4;
1546 }
1547 /* update tx status */
1548 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1549 stats_item = &adapter->hw_stats.tx_ok;
1550 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1551 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1552 *stats_item += data;
1553 stats_item++;
1554 hw_reg_addr += 4;
1555 }
1556 }
1557
1558 /*
1559 * atl1c_get_stats - Get System Network Statistics
1560 * @netdev: network interface device structure
1561 *
1562 * Returns the address of the device statistics structure.
1563 * The statistics are actually updated from the timer callback.
1564 */
1565 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1566 {
1567 struct atl1c_adapter *adapter = netdev_priv(netdev);
1568 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1569 struct net_device_stats *net_stats = &netdev->stats;
1570
1571 atl1c_update_hw_stats(adapter);
1572 net_stats->rx_packets = hw_stats->rx_ok;
1573 net_stats->tx_packets = hw_stats->tx_ok;
1574 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1575 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1576 net_stats->multicast = hw_stats->rx_mcast;
1577 net_stats->collisions = hw_stats->tx_1_col +
1578 hw_stats->tx_2_col * 2 +
1579 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1580 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1581 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1582 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1583 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1584 net_stats->rx_length_errors = hw_stats->rx_len_err;
1585 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1586 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1587 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1588
1589 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1590
1591 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1592 hw_stats->tx_underrun + hw_stats->tx_trunc;
1593 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1594 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1595 net_stats->tx_window_errors = hw_stats->tx_late_col;
1596
1597 return net_stats;
1598 }
1599
1600 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1601 {
1602 u16 phy_data;
1603
1604 spin_lock(&adapter->mdio_lock);
1605 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1606 spin_unlock(&adapter->mdio_lock);
1607 }
1608
1609 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1610 enum atl1c_trans_queue type)
1611 {
1612 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1613 &adapter->tpd_ring[type];
1614 struct atl1c_buffer *buffer_info;
1615 struct pci_dev *pdev = adapter->pdev;
1616 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1617 u16 hw_next_to_clean;
1618 u16 shift;
1619 u32 data;
1620
1621 if (type == atl1c_trans_high)
1622 shift = MB_HTPD_CONS_IDX_SHIFT;
1623 else
1624 shift = MB_NTPD_CONS_IDX_SHIFT;
1625
1626 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1627 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1628
1629 while (next_to_clean != hw_next_to_clean) {
1630 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1631 atl1c_clean_buffer(pdev, buffer_info, 1);
1632 if (++next_to_clean == tpd_ring->count)
1633 next_to_clean = 0;
1634 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1635 }
1636
1637 if (netif_queue_stopped(adapter->netdev) &&
1638 netif_carrier_ok(adapter->netdev)) {
1639 netif_wake_queue(adapter->netdev);
1640 }
1641
1642 return true;
1643 }
1644
1645 /*
1646 * atl1c_intr - Interrupt Handler
1647 * @irq: interrupt number
1648 * @data: pointer to a network interface device structure
1649 * @pt_regs: CPU registers structure
1650 */
1651 static irqreturn_t atl1c_intr(int irq, void *data)
1652 {
1653 struct net_device *netdev = data;
1654 struct atl1c_adapter *adapter = netdev_priv(netdev);
1655 struct pci_dev *pdev = adapter->pdev;
1656 struct atl1c_hw *hw = &adapter->hw;
1657 int max_ints = AT_MAX_INT_WORK;
1658 int handled = IRQ_NONE;
1659 u32 status;
1660 u32 reg_data;
1661
1662 do {
1663 AT_READ_REG(hw, REG_ISR, &reg_data);
1664 status = reg_data & hw->intr_mask;
1665
1666 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1667 if (max_ints != AT_MAX_INT_WORK)
1668 handled = IRQ_HANDLED;
1669 break;
1670 }
1671 /* link event */
1672 if (status & ISR_GPHY)
1673 atl1c_clear_phy_int(adapter);
1674 /* Ack ISR */
1675 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1676 if (status & ISR_RX_PKT) {
1677 if (likely(napi_schedule_prep(&adapter->napi))) {
1678 hw->intr_mask &= ~ISR_RX_PKT;
1679 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1680 __napi_schedule(&adapter->napi);
1681 }
1682 }
1683 if (status & ISR_TX_PKT)
1684 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1685
1686 handled = IRQ_HANDLED;
1687 /* check if PCIE PHY Link down */
1688 if (status & ISR_ERROR) {
1689 if (netif_msg_hw(adapter))
1690 dev_err(&pdev->dev,
1691 "atl1c hardware error (status = 0x%x)\n",
1692 status & ISR_ERROR);
1693 /* reset MAC */
1694 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
1695 schedule_work(&adapter->common_task);
1696 return IRQ_HANDLED;
1697 }
1698
1699 if (status & ISR_OVER)
1700 if (netif_msg_intr(adapter))
1701 dev_warn(&pdev->dev,
1702 "TX/RX overflow (status = 0x%x)\n",
1703 status & ISR_OVER);
1704
1705 /* link event */
1706 if (status & (ISR_GPHY | ISR_MANUAL)) {
1707 netdev->stats.tx_carrier_errors++;
1708 atl1c_link_chg_event(adapter);
1709 break;
1710 }
1711
1712 } while (--max_ints > 0);
1713 /* re-enable Interrupt*/
1714 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1715 return handled;
1716 }
1717
1718 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1719 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1720 {
1721 /*
1722 * The pid field in RRS in not correct sometimes, so we
1723 * cannot figure out if the packet is fragmented or not,
1724 * so we tell the KERNEL CHECKSUM_NONE
1725 */
1726 skb_checksum_none_assert(skb);
1727 }
1728
1729 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1730 {
1731 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1732 struct pci_dev *pdev = adapter->pdev;
1733 struct atl1c_buffer *buffer_info, *next_info;
1734 struct sk_buff *skb;
1735 void *vir_addr = NULL;
1736 u16 num_alloc = 0;
1737 u16 rfd_next_to_use, next_next;
1738 struct atl1c_rx_free_desc *rfd_desc;
1739
1740 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1741 if (++next_next == rfd_ring->count)
1742 next_next = 0;
1743 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1744 next_info = &rfd_ring->buffer_info[next_next];
1745
1746 while (next_info->flags & ATL1C_BUFFER_FREE) {
1747 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1748
1749 skb = dev_alloc_skb(adapter->rx_buffer_len);
1750 if (unlikely(!skb)) {
1751 if (netif_msg_rx_err(adapter))
1752 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1753 break;
1754 }
1755
1756 /*
1757 * Make buffer alignment 2 beyond a 16 byte boundary
1758 * this will result in a 16 byte aligned IP header after
1759 * the 14 byte MAC header is removed
1760 */
1761 vir_addr = skb->data;
1762 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1763 buffer_info->skb = skb;
1764 buffer_info->length = adapter->rx_buffer_len;
1765 buffer_info->dma = pci_map_single(pdev, vir_addr,
1766 buffer_info->length,
1767 PCI_DMA_FROMDEVICE);
1768 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1769 ATL1C_PCIMAP_FROMDEVICE);
1770 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1771 rfd_next_to_use = next_next;
1772 if (++next_next == rfd_ring->count)
1773 next_next = 0;
1774 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1775 next_info = &rfd_ring->buffer_info[next_next];
1776 num_alloc++;
1777 }
1778
1779 if (num_alloc) {
1780 /* TODO: update mailbox here */
1781 wmb();
1782 rfd_ring->next_to_use = rfd_next_to_use;
1783 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1784 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1785 }
1786
1787 return num_alloc;
1788 }
1789
1790 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1791 struct atl1c_recv_ret_status *rrs, u16 num)
1792 {
1793 u16 i;
1794 /* the relationship between rrd and rfd is one map one */
1795 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1796 rrd_ring->next_to_clean)) {
1797 rrs->word3 &= ~RRS_RXD_UPDATED;
1798 if (++rrd_ring->next_to_clean == rrd_ring->count)
1799 rrd_ring->next_to_clean = 0;
1800 }
1801 }
1802
1803 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1804 struct atl1c_recv_ret_status *rrs, u16 num)
1805 {
1806 u16 i;
1807 u16 rfd_index;
1808 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1809
1810 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1811 RRS_RX_RFD_INDEX_MASK;
1812 for (i = 0; i < num; i++) {
1813 buffer_info[rfd_index].skb = NULL;
1814 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1815 ATL1C_BUFFER_FREE);
1816 if (++rfd_index == rfd_ring->count)
1817 rfd_index = 0;
1818 }
1819 rfd_ring->next_to_clean = rfd_index;
1820 }
1821
1822 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1823 int *work_done, int work_to_do)
1824 {
1825 u16 rfd_num, rfd_index;
1826 u16 count = 0;
1827 u16 length;
1828 struct pci_dev *pdev = adapter->pdev;
1829 struct net_device *netdev = adapter->netdev;
1830 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1831 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1832 struct sk_buff *skb;
1833 struct atl1c_recv_ret_status *rrs;
1834 struct atl1c_buffer *buffer_info;
1835
1836 while (1) {
1837 if (*work_done >= work_to_do)
1838 break;
1839 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1840 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1841 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1842 RRS_RX_RFD_CNT_MASK;
1843 if (unlikely(rfd_num != 1))
1844 /* TODO support mul rfd*/
1845 if (netif_msg_rx_err(adapter))
1846 dev_warn(&pdev->dev,
1847 "Multi rfd not support yet!\n");
1848 goto rrs_checked;
1849 } else {
1850 break;
1851 }
1852 rrs_checked:
1853 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1854 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1855 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1856 if (netif_msg_rx_err(adapter))
1857 dev_warn(&pdev->dev,
1858 "wrong packet! rrs word3 is %x\n",
1859 rrs->word3);
1860 continue;
1861 }
1862
1863 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1864 RRS_PKT_SIZE_MASK);
1865 /* Good Receive */
1866 if (likely(rfd_num == 1)) {
1867 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1868 RRS_RX_RFD_INDEX_MASK;
1869 buffer_info = &rfd_ring->buffer_info[rfd_index];
1870 pci_unmap_single(pdev, buffer_info->dma,
1871 buffer_info->length, PCI_DMA_FROMDEVICE);
1872 skb = buffer_info->skb;
1873 } else {
1874 /* TODO */
1875 if (netif_msg_rx_err(adapter))
1876 dev_warn(&pdev->dev,
1877 "Multi rfd not support yet!\n");
1878 break;
1879 }
1880 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1881 skb_put(skb, length - ETH_FCS_LEN);
1882 skb->protocol = eth_type_trans(skb, netdev);
1883 atl1c_rx_checksum(adapter, skb, rrs);
1884 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1885 u16 vlan;
1886
1887 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1888 vlan = le16_to_cpu(vlan);
1889 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1890 } else
1891 netif_receive_skb(skb);
1892
1893 (*work_done)++;
1894 count++;
1895 }
1896 if (count)
1897 atl1c_alloc_rx_buffer(adapter, que);
1898 }
1899
1900 /*
1901 * atl1c_clean - NAPI Rx polling callback
1902 * @adapter: board private structure
1903 */
1904 static int atl1c_clean(struct napi_struct *napi, int budget)
1905 {
1906 struct atl1c_adapter *adapter =
1907 container_of(napi, struct atl1c_adapter, napi);
1908 int work_done = 0;
1909
1910 /* Keep link state information with original netdev */
1911 if (!netif_carrier_ok(adapter->netdev))
1912 goto quit_polling;
1913 /* just enable one RXQ */
1914 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1915
1916 if (work_done < budget) {
1917 quit_polling:
1918 napi_complete(napi);
1919 adapter->hw.intr_mask |= ISR_RX_PKT;
1920 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1921 }
1922 return work_done;
1923 }
1924
1925 #ifdef CONFIG_NET_POLL_CONTROLLER
1926
1927 /*
1928 * Polling 'interrupt' - used by things like netconsole to send skbs
1929 * without having to re-enable interrupts. It's not called while
1930 * the interrupt routine is executing.
1931 */
1932 static void atl1c_netpoll(struct net_device *netdev)
1933 {
1934 struct atl1c_adapter *adapter = netdev_priv(netdev);
1935
1936 disable_irq(adapter->pdev->irq);
1937 atl1c_intr(adapter->pdev->irq, netdev);
1938 enable_irq(adapter->pdev->irq);
1939 }
1940 #endif
1941
1942 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1943 {
1944 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1945 u16 next_to_use = 0;
1946 u16 next_to_clean = 0;
1947
1948 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1949 next_to_use = tpd_ring->next_to_use;
1950
1951 return (u16)(next_to_clean > next_to_use) ?
1952 (next_to_clean - next_to_use - 1) :
1953 (tpd_ring->count + next_to_clean - next_to_use - 1);
1954 }
1955
1956 /*
1957 * get next usable tpd
1958 * Note: should call atl1c_tdp_avail to make sure
1959 * there is enough tpd to use
1960 */
1961 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1962 enum atl1c_trans_queue type)
1963 {
1964 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1965 struct atl1c_tpd_desc *tpd_desc;
1966 u16 next_to_use = 0;
1967
1968 next_to_use = tpd_ring->next_to_use;
1969 if (++tpd_ring->next_to_use == tpd_ring->count)
1970 tpd_ring->next_to_use = 0;
1971 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1972 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1973 return tpd_desc;
1974 }
1975
1976 static struct atl1c_buffer *
1977 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1978 {
1979 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1980
1981 return &tpd_ring->buffer_info[tpd -
1982 (struct atl1c_tpd_desc *)tpd_ring->desc];
1983 }
1984
1985 /* Calculate the transmit packet descript needed*/
1986 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1987 {
1988 u16 tpd_req;
1989 u16 proto_hdr_len = 0;
1990
1991 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1992
1993 if (skb_is_gso(skb)) {
1994 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1995 if (proto_hdr_len < skb_headlen(skb))
1996 tpd_req++;
1997 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1998 tpd_req++;
1999 }
2000 return tpd_req;
2001 }
2002
2003 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2004 struct sk_buff *skb,
2005 struct atl1c_tpd_desc **tpd,
2006 enum atl1c_trans_queue type)
2007 {
2008 struct pci_dev *pdev = adapter->pdev;
2009 u8 hdr_len;
2010 u32 real_len;
2011 unsigned short offload_type;
2012 int err;
2013
2014 if (skb_is_gso(skb)) {
2015 if (skb_header_cloned(skb)) {
2016 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2017 if (unlikely(err))
2018 return -1;
2019 }
2020 offload_type = skb_shinfo(skb)->gso_type;
2021
2022 if (offload_type & SKB_GSO_TCPV4) {
2023 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2024 + ntohs(ip_hdr(skb)->tot_len));
2025
2026 if (real_len < skb->len)
2027 pskb_trim(skb, real_len);
2028
2029 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2030 if (unlikely(skb->len == hdr_len)) {
2031 /* only xsum need */
2032 if (netif_msg_tx_queued(adapter))
2033 dev_warn(&pdev->dev,
2034 "IPV4 tso with zero data??\n");
2035 goto check_sum;
2036 } else {
2037 ip_hdr(skb)->check = 0;
2038 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2039 ip_hdr(skb)->saddr,
2040 ip_hdr(skb)->daddr,
2041 0, IPPROTO_TCP, 0);
2042 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2043 }
2044 }
2045
2046 if (offload_type & SKB_GSO_TCPV6) {
2047 struct atl1c_tpd_ext_desc *etpd =
2048 *(struct atl1c_tpd_ext_desc **)(tpd);
2049
2050 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2051 *tpd = atl1c_get_tpd(adapter, type);
2052 ipv6_hdr(skb)->payload_len = 0;
2053 /* check payload == 0 byte ? */
2054 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2055 if (unlikely(skb->len == hdr_len)) {
2056 /* only xsum need */
2057 if (netif_msg_tx_queued(adapter))
2058 dev_warn(&pdev->dev,
2059 "IPV6 tso with zero data??\n");
2060 goto check_sum;
2061 } else
2062 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2063 &ipv6_hdr(skb)->saddr,
2064 &ipv6_hdr(skb)->daddr,
2065 0, IPPROTO_TCP, 0);
2066 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2067 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2068 etpd->pkt_len = cpu_to_le32(skb->len);
2069 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2070 }
2071
2072 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2073 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2074 TPD_TCPHDR_OFFSET_SHIFT;
2075 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2076 TPD_MSS_SHIFT;
2077 return 0;
2078 }
2079
2080 check_sum:
2081 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2082 u8 css, cso;
2083 cso = skb_checksum_start_offset(skb);
2084
2085 if (unlikely(cso & 0x1)) {
2086 if (netif_msg_tx_err(adapter))
2087 dev_err(&adapter->pdev->dev,
2088 "payload offset should not an event number\n");
2089 return -1;
2090 } else {
2091 css = cso + skb->csum_offset;
2092
2093 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2094 TPD_PLOADOFFSET_SHIFT;
2095 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2096 TPD_CCSUM_OFFSET_SHIFT;
2097 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2098 }
2099 }
2100 return 0;
2101 }
2102
2103 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2104 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2105 enum atl1c_trans_queue type)
2106 {
2107 struct atl1c_tpd_desc *use_tpd = NULL;
2108 struct atl1c_buffer *buffer_info = NULL;
2109 u16 buf_len = skb_headlen(skb);
2110 u16 map_len = 0;
2111 u16 mapped_len = 0;
2112 u16 hdr_len = 0;
2113 u16 nr_frags;
2114 u16 f;
2115 int tso;
2116
2117 nr_frags = skb_shinfo(skb)->nr_frags;
2118 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2119 if (tso) {
2120 /* TSO */
2121 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2122 use_tpd = tpd;
2123
2124 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2125 buffer_info->length = map_len;
2126 buffer_info->dma = pci_map_single(adapter->pdev,
2127 skb->data, hdr_len, PCI_DMA_TODEVICE);
2128 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2129 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2130 ATL1C_PCIMAP_TODEVICE);
2131 mapped_len += map_len;
2132 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2133 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2134 }
2135
2136 if (mapped_len < buf_len) {
2137 /* mapped_len == 0, means we should use the first tpd,
2138 which is given by caller */
2139 if (mapped_len == 0)
2140 use_tpd = tpd;
2141 else {
2142 use_tpd = atl1c_get_tpd(adapter, type);
2143 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2144 }
2145 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2146 buffer_info->length = buf_len - mapped_len;
2147 buffer_info->dma =
2148 pci_map_single(adapter->pdev, skb->data + mapped_len,
2149 buffer_info->length, PCI_DMA_TODEVICE);
2150 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2151 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2152 ATL1C_PCIMAP_TODEVICE);
2153 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2154 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2155 }
2156
2157 for (f = 0; f < nr_frags; f++) {
2158 struct skb_frag_struct *frag;
2159
2160 frag = &skb_shinfo(skb)->frags[f];
2161
2162 use_tpd = atl1c_get_tpd(adapter, type);
2163 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2164
2165 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2166 buffer_info->length = frag->size;
2167 buffer_info->dma =
2168 pci_map_page(adapter->pdev, frag->page,
2169 frag->page_offset,
2170 buffer_info->length,
2171 PCI_DMA_TODEVICE);
2172 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2173 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2174 ATL1C_PCIMAP_TODEVICE);
2175 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2176 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2177 }
2178
2179 /* The last tpd */
2180 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2181 /* The last buffer info contain the skb address,
2182 so it will be free after unmap */
2183 buffer_info->skb = skb;
2184 }
2185
2186 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2187 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2188 {
2189 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2190 u32 prod_data;
2191
2192 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2193 switch (type) {
2194 case atl1c_trans_high:
2195 prod_data &= 0xFFFF0000;
2196 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2197 break;
2198 case atl1c_trans_normal:
2199 prod_data &= 0x0000FFFF;
2200 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2201 break;
2202 default:
2203 break;
2204 }
2205 wmb();
2206 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2207 }
2208
2209 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2210 struct net_device *netdev)
2211 {
2212 struct atl1c_adapter *adapter = netdev_priv(netdev);
2213 unsigned long flags;
2214 u16 tpd_req = 1;
2215 struct atl1c_tpd_desc *tpd;
2216 enum atl1c_trans_queue type = atl1c_trans_normal;
2217
2218 if (test_bit(__AT_DOWN, &adapter->flags)) {
2219 dev_kfree_skb_any(skb);
2220 return NETDEV_TX_OK;
2221 }
2222
2223 tpd_req = atl1c_cal_tpd_req(skb);
2224 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2225 if (netif_msg_pktdata(adapter))
2226 dev_info(&adapter->pdev->dev, "tx locked\n");
2227 return NETDEV_TX_LOCKED;
2228 }
2229 if (skb->mark == 0x01)
2230 type = atl1c_trans_high;
2231 else
2232 type = atl1c_trans_normal;
2233
2234 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2235 /* no enough descriptor, just stop queue */
2236 netif_stop_queue(netdev);
2237 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2238 return NETDEV_TX_BUSY;
2239 }
2240
2241 tpd = atl1c_get_tpd(adapter, type);
2242
2243 /* do TSO and check sum */
2244 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2245 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2246 dev_kfree_skb_any(skb);
2247 return NETDEV_TX_OK;
2248 }
2249
2250 if (unlikely(vlan_tx_tag_present(skb))) {
2251 u16 vlan = vlan_tx_tag_get(skb);
2252 __le16 tag;
2253
2254 vlan = cpu_to_le16(vlan);
2255 AT_VLAN_TO_TAG(vlan, tag);
2256 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2257 tpd->vlan_tag = tag;
2258 }
2259
2260 if (skb_network_offset(skb) != ETH_HLEN)
2261 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2262
2263 atl1c_tx_map(adapter, skb, tpd, type);
2264 atl1c_tx_queue(adapter, skb, tpd, type);
2265
2266 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2267 return NETDEV_TX_OK;
2268 }
2269
2270 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2271 {
2272 struct net_device *netdev = adapter->netdev;
2273
2274 free_irq(adapter->pdev->irq, netdev);
2275
2276 if (adapter->have_msi)
2277 pci_disable_msi(adapter->pdev);
2278 }
2279
2280 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2281 {
2282 struct pci_dev *pdev = adapter->pdev;
2283 struct net_device *netdev = adapter->netdev;
2284 int flags = 0;
2285 int err = 0;
2286
2287 adapter->have_msi = true;
2288 err = pci_enable_msi(adapter->pdev);
2289 if (err) {
2290 if (netif_msg_ifup(adapter))
2291 dev_err(&pdev->dev,
2292 "Unable to allocate MSI interrupt Error: %d\n",
2293 err);
2294 adapter->have_msi = false;
2295 } else
2296 netdev->irq = pdev->irq;
2297
2298 if (!adapter->have_msi)
2299 flags |= IRQF_SHARED;
2300 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2301 netdev->name, netdev);
2302 if (err) {
2303 if (netif_msg_ifup(adapter))
2304 dev_err(&pdev->dev,
2305 "Unable to allocate interrupt Error: %d\n",
2306 err);
2307 if (adapter->have_msi)
2308 pci_disable_msi(adapter->pdev);
2309 return err;
2310 }
2311 if (netif_msg_ifup(adapter))
2312 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2313 return err;
2314 }
2315
2316 static int atl1c_up(struct atl1c_adapter *adapter)
2317 {
2318 struct net_device *netdev = adapter->netdev;
2319 int num;
2320 int err;
2321 int i;
2322
2323 netif_carrier_off(netdev);
2324 atl1c_init_ring_ptrs(adapter);
2325 atl1c_set_multi(netdev);
2326 atl1c_restore_vlan(adapter);
2327
2328 for (i = 0; i < adapter->num_rx_queues; i++) {
2329 num = atl1c_alloc_rx_buffer(adapter, i);
2330 if (unlikely(num == 0)) {
2331 err = -ENOMEM;
2332 goto err_alloc_rx;
2333 }
2334 }
2335
2336 if (atl1c_configure(adapter)) {
2337 err = -EIO;
2338 goto err_up;
2339 }
2340
2341 err = atl1c_request_irq(adapter);
2342 if (unlikely(err))
2343 goto err_up;
2344
2345 clear_bit(__AT_DOWN, &adapter->flags);
2346 napi_enable(&adapter->napi);
2347 atl1c_irq_enable(adapter);
2348 atl1c_check_link_status(adapter);
2349 netif_start_queue(netdev);
2350 return err;
2351
2352 err_up:
2353 err_alloc_rx:
2354 atl1c_clean_rx_ring(adapter);
2355 return err;
2356 }
2357
2358 static void atl1c_down(struct atl1c_adapter *adapter)
2359 {
2360 struct net_device *netdev = adapter->netdev;
2361
2362 atl1c_del_timer(adapter);
2363 adapter->work_event = 0; /* clear all event */
2364 /* signal that we're down so the interrupt handler does not
2365 * reschedule our watchdog timer */
2366 set_bit(__AT_DOWN, &adapter->flags);
2367 netif_carrier_off(netdev);
2368 napi_disable(&adapter->napi);
2369 atl1c_irq_disable(adapter);
2370 atl1c_free_irq(adapter);
2371 /* reset MAC to disable all RX/TX */
2372 atl1c_reset_mac(&adapter->hw);
2373 msleep(1);
2374
2375 adapter->link_speed = SPEED_0;
2376 adapter->link_duplex = -1;
2377 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2378 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2379 atl1c_clean_rx_ring(adapter);
2380 }
2381
2382 /*
2383 * atl1c_open - Called when a network interface is made active
2384 * @netdev: network interface device structure
2385 *
2386 * Returns 0 on success, negative value on failure
2387 *
2388 * The open entry point is called when a network interface is made
2389 * active by the system (IFF_UP). At this point all resources needed
2390 * for transmit and receive operations are allocated, the interrupt
2391 * handler is registered with the OS, the watchdog timer is started,
2392 * and the stack is notified that the interface is ready.
2393 */
2394 static int atl1c_open(struct net_device *netdev)
2395 {
2396 struct atl1c_adapter *adapter = netdev_priv(netdev);
2397 int err;
2398
2399 /* disallow open during test */
2400 if (test_bit(__AT_TESTING, &adapter->flags))
2401 return -EBUSY;
2402
2403 /* allocate rx/tx dma buffer & descriptors */
2404 err = atl1c_setup_ring_resources(adapter);
2405 if (unlikely(err))
2406 return err;
2407
2408 err = atl1c_up(adapter);
2409 if (unlikely(err))
2410 goto err_up;
2411
2412 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2413 u32 phy_data;
2414
2415 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2416 phy_data |= MDIO_AP_EN;
2417 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2418 }
2419 return 0;
2420
2421 err_up:
2422 atl1c_free_irq(adapter);
2423 atl1c_free_ring_resources(adapter);
2424 atl1c_reset_mac(&adapter->hw);
2425 return err;
2426 }
2427
2428 /*
2429 * atl1c_close - Disables a network interface
2430 * @netdev: network interface device structure
2431 *
2432 * Returns 0, this is not allowed to fail
2433 *
2434 * The close entry point is called when an interface is de-activated
2435 * by the OS. The hardware is still under the drivers control, but
2436 * needs to be disabled. A global MAC reset is issued to stop the
2437 * hardware, and all transmit and receive resources are freed.
2438 */
2439 static int atl1c_close(struct net_device *netdev)
2440 {
2441 struct atl1c_adapter *adapter = netdev_priv(netdev);
2442
2443 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2444 atl1c_down(adapter);
2445 atl1c_free_ring_resources(adapter);
2446 return 0;
2447 }
2448
2449 static int atl1c_suspend(struct device *dev)
2450 {
2451 struct pci_dev *pdev = to_pci_dev(dev);
2452 struct net_device *netdev = pci_get_drvdata(pdev);
2453 struct atl1c_adapter *adapter = netdev_priv(netdev);
2454 struct atl1c_hw *hw = &adapter->hw;
2455 u32 mac_ctrl_data = 0;
2456 u32 master_ctrl_data = 0;
2457 u32 wol_ctrl_data = 0;
2458 u16 mii_intr_status_data = 0;
2459 u32 wufc = adapter->wol;
2460
2461 atl1c_disable_l0s_l1(hw);
2462 if (netif_running(netdev)) {
2463 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2464 atl1c_down(adapter);
2465 }
2466 netif_device_detach(netdev);
2467
2468 if (wufc)
2469 if (atl1c_phy_power_saving(hw) != 0)
2470 dev_dbg(&pdev->dev, "phy power saving failed");
2471
2472 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2473 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2474
2475 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2476 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2477 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2478 MAC_CTRL_PRMLEN_MASK) <<
2479 MAC_CTRL_PRMLEN_SHIFT);
2480 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2481 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2482
2483 if (wufc) {
2484 mac_ctrl_data |= MAC_CTRL_RX_EN;
2485 if (adapter->link_speed == SPEED_1000 ||
2486 adapter->link_speed == SPEED_0) {
2487 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2488 MAC_CTRL_SPEED_SHIFT;
2489 mac_ctrl_data |= MAC_CTRL_DUPLX;
2490 } else
2491 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2492 MAC_CTRL_SPEED_SHIFT;
2493
2494 if (adapter->link_duplex == DUPLEX_FULL)
2495 mac_ctrl_data |= MAC_CTRL_DUPLX;
2496
2497 /* turn on magic packet wol */
2498 if (wufc & AT_WUFC_MAG)
2499 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2500
2501 if (wufc & AT_WUFC_LNKC) {
2502 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2503 /* only link up can wake up */
2504 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2505 dev_dbg(&pdev->dev, "%s: read write phy "
2506 "register failed.\n",
2507 atl1c_driver_name);
2508 }
2509 }
2510 /* clear phy interrupt */
2511 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2512 /* Config MAC Ctrl register */
2513 if (adapter->vlgrp)
2514 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2515
2516 /* magic packet maybe Broadcast&multicast&Unicast frame */
2517 if (wufc & AT_WUFC_MAG)
2518 mac_ctrl_data |= MAC_CTRL_BC_EN;
2519
2520 dev_dbg(&pdev->dev,
2521 "%s: suspend MAC=0x%x\n",
2522 atl1c_driver_name, mac_ctrl_data);
2523 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2524 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2525 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2526
2527 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2528 GPHY_CTRL_EXT_RESET);
2529 } else {
2530 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2531 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2532 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2533 mac_ctrl_data |= MAC_CTRL_DUPLX;
2534 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2535 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2536 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2537 hw->phy_configured = false; /* re-init PHY when resume */
2538 }
2539
2540 return 0;
2541 }
2542
2543 static int atl1c_resume(struct device *dev)
2544 {
2545 struct pci_dev *pdev = to_pci_dev(dev);
2546 struct net_device *netdev = pci_get_drvdata(pdev);
2547 struct atl1c_adapter *adapter = netdev_priv(netdev);
2548
2549 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2550 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2551 ATL1C_PCIE_PHY_RESET);
2552
2553 atl1c_phy_reset(&adapter->hw);
2554 atl1c_reset_mac(&adapter->hw);
2555 atl1c_phy_init(&adapter->hw);
2556
2557 #if 0
2558 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2559 pm_data &= ~PM_CTRLSTAT_PME_EN;
2560 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2561 #endif
2562
2563 netif_device_attach(netdev);
2564 if (netif_running(netdev))
2565 atl1c_up(adapter);
2566
2567 return 0;
2568 }
2569
2570 static void atl1c_shutdown(struct pci_dev *pdev)
2571 {
2572 struct net_device *netdev = pci_get_drvdata(pdev);
2573 struct atl1c_adapter *adapter = netdev_priv(netdev);
2574
2575 atl1c_suspend(&pdev->dev);
2576 pci_wake_from_d3(pdev, adapter->wol);
2577 pci_set_power_state(pdev, PCI_D3hot);
2578 }
2579
2580 static const struct net_device_ops atl1c_netdev_ops = {
2581 .ndo_open = atl1c_open,
2582 .ndo_stop = atl1c_close,
2583 .ndo_validate_addr = eth_validate_addr,
2584 .ndo_start_xmit = atl1c_xmit_frame,
2585 .ndo_set_mac_address = atl1c_set_mac_addr,
2586 .ndo_set_multicast_list = atl1c_set_multi,
2587 .ndo_change_mtu = atl1c_change_mtu,
2588 .ndo_do_ioctl = atl1c_ioctl,
2589 .ndo_tx_timeout = atl1c_tx_timeout,
2590 .ndo_get_stats = atl1c_get_stats,
2591 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2592 #ifdef CONFIG_NET_POLL_CONTROLLER
2593 .ndo_poll_controller = atl1c_netpoll,
2594 #endif
2595 };
2596
2597 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2598 {
2599 SET_NETDEV_DEV(netdev, &pdev->dev);
2600 pci_set_drvdata(pdev, netdev);
2601
2602 netdev->irq = pdev->irq;
2603 netdev->netdev_ops = &atl1c_netdev_ops;
2604 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2605 atl1c_set_ethtool_ops(netdev);
2606
2607 /* TODO: add when ready */
2608 netdev->features = NETIF_F_SG |
2609 NETIF_F_HW_CSUM |
2610 NETIF_F_HW_VLAN_TX |
2611 NETIF_F_HW_VLAN_RX |
2612 NETIF_F_TSO |
2613 NETIF_F_TSO6;
2614 return 0;
2615 }
2616
2617 /*
2618 * atl1c_probe - Device Initialization Routine
2619 * @pdev: PCI device information struct
2620 * @ent: entry in atl1c_pci_tbl
2621 *
2622 * Returns 0 on success, negative on failure
2623 *
2624 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2625 * The OS initialization, configuring of the adapter private structure,
2626 * and a hardware reset occur.
2627 */
2628 static int __devinit atl1c_probe(struct pci_dev *pdev,
2629 const struct pci_device_id *ent)
2630 {
2631 struct net_device *netdev;
2632 struct atl1c_adapter *adapter;
2633 static int cards_found;
2634
2635 int err = 0;
2636
2637 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2638 err = pci_enable_device_mem(pdev);
2639 if (err) {
2640 dev_err(&pdev->dev, "cannot enable PCI device\n");
2641 return err;
2642 }
2643
2644 /*
2645 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2646 * shared register for the high 32 bits, so only a single, aligned,
2647 * 4 GB physical address range can be used at a time.
2648 *
2649 * Supporting 64-bit DMA on this hardware is more trouble than it's
2650 * worth. It is far easier to limit to 32-bit DMA than update
2651 * various kernel subsystems to support the mechanics required by a
2652 * fixed-high-32-bit system.
2653 */
2654 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2655 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2656 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2657 goto err_dma;
2658 }
2659
2660 err = pci_request_regions(pdev, atl1c_driver_name);
2661 if (err) {
2662 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2663 goto err_pci_reg;
2664 }
2665
2666 pci_set_master(pdev);
2667
2668 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2669 if (netdev == NULL) {
2670 err = -ENOMEM;
2671 dev_err(&pdev->dev, "etherdev alloc failed\n");
2672 goto err_alloc_etherdev;
2673 }
2674
2675 err = atl1c_init_netdev(netdev, pdev);
2676 if (err) {
2677 dev_err(&pdev->dev, "init netdevice failed\n");
2678 goto err_init_netdev;
2679 }
2680 adapter = netdev_priv(netdev);
2681 adapter->bd_number = cards_found;
2682 adapter->netdev = netdev;
2683 adapter->pdev = pdev;
2684 adapter->hw.adapter = adapter;
2685 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2686 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2687 if (!adapter->hw.hw_addr) {
2688 err = -EIO;
2689 dev_err(&pdev->dev, "cannot map device registers\n");
2690 goto err_ioremap;
2691 }
2692 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2693
2694 /* init mii data */
2695 adapter->mii.dev = netdev;
2696 adapter->mii.mdio_read = atl1c_mdio_read;
2697 adapter->mii.mdio_write = atl1c_mdio_write;
2698 adapter->mii.phy_id_mask = 0x1f;
2699 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2700 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2701 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2702 (unsigned long)adapter);
2703 /* setup the private structure */
2704 err = atl1c_sw_init(adapter);
2705 if (err) {
2706 dev_err(&pdev->dev, "net device private data init failed\n");
2707 goto err_sw_init;
2708 }
2709 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2710 ATL1C_PCIE_PHY_RESET);
2711
2712 /* Init GPHY as early as possible due to power saving issue */
2713 atl1c_phy_reset(&adapter->hw);
2714
2715 err = atl1c_reset_mac(&adapter->hw);
2716 if (err) {
2717 err = -EIO;
2718 goto err_reset;
2719 }
2720
2721 device_init_wakeup(&pdev->dev, 1);
2722 /* reset the controller to
2723 * put the device in a known good starting state */
2724 err = atl1c_phy_init(&adapter->hw);
2725 if (err) {
2726 err = -EIO;
2727 goto err_reset;
2728 }
2729 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2730 err = -EIO;
2731 dev_err(&pdev->dev, "get mac address failed\n");
2732 goto err_eeprom;
2733 }
2734 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2735 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2736 if (netif_msg_probe(adapter))
2737 dev_dbg(&pdev->dev, "mac address : %pM\n",
2738 adapter->hw.mac_addr);
2739
2740 atl1c_hw_set_mac_addr(&adapter->hw);
2741 INIT_WORK(&adapter->common_task, atl1c_common_task);
2742 adapter->work_event = 0;
2743 err = register_netdev(netdev);
2744 if (err) {
2745 dev_err(&pdev->dev, "register netdevice failed\n");
2746 goto err_register;
2747 }
2748
2749 if (netif_msg_probe(adapter))
2750 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2751 cards_found++;
2752 return 0;
2753
2754 err_reset:
2755 err_register:
2756 err_sw_init:
2757 err_eeprom:
2758 iounmap(adapter->hw.hw_addr);
2759 err_init_netdev:
2760 err_ioremap:
2761 free_netdev(netdev);
2762 err_alloc_etherdev:
2763 pci_release_regions(pdev);
2764 err_pci_reg:
2765 err_dma:
2766 pci_disable_device(pdev);
2767 return err;
2768 }
2769
2770 /*
2771 * atl1c_remove - Device Removal Routine
2772 * @pdev: PCI device information struct
2773 *
2774 * atl1c_remove is called by the PCI subsystem to alert the driver
2775 * that it should release a PCI device. The could be caused by a
2776 * Hot-Plug event, or because the driver is going to be removed from
2777 * memory.
2778 */
2779 static void __devexit atl1c_remove(struct pci_dev *pdev)
2780 {
2781 struct net_device *netdev = pci_get_drvdata(pdev);
2782 struct atl1c_adapter *adapter = netdev_priv(netdev);
2783
2784 unregister_netdev(netdev);
2785 atl1c_phy_disable(&adapter->hw);
2786
2787 iounmap(adapter->hw.hw_addr);
2788
2789 pci_release_regions(pdev);
2790 pci_disable_device(pdev);
2791 free_netdev(netdev);
2792 }
2793
2794 /*
2795 * atl1c_io_error_detected - called when PCI error is detected
2796 * @pdev: Pointer to PCI device
2797 * @state: The current pci connection state
2798 *
2799 * This function is called after a PCI bus error affecting
2800 * this device has been detected.
2801 */
2802 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2803 pci_channel_state_t state)
2804 {
2805 struct net_device *netdev = pci_get_drvdata(pdev);
2806 struct atl1c_adapter *adapter = netdev_priv(netdev);
2807
2808 netif_device_detach(netdev);
2809
2810 if (state == pci_channel_io_perm_failure)
2811 return PCI_ERS_RESULT_DISCONNECT;
2812
2813 if (netif_running(netdev))
2814 atl1c_down(adapter);
2815
2816 pci_disable_device(pdev);
2817
2818 /* Request a slot slot reset. */
2819 return PCI_ERS_RESULT_NEED_RESET;
2820 }
2821
2822 /*
2823 * atl1c_io_slot_reset - called after the pci bus has been reset.
2824 * @pdev: Pointer to PCI device
2825 *
2826 * Restart the card from scratch, as if from a cold-boot. Implementation
2827 * resembles the first-half of the e1000_resume routine.
2828 */
2829 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2830 {
2831 struct net_device *netdev = pci_get_drvdata(pdev);
2832 struct atl1c_adapter *adapter = netdev_priv(netdev);
2833
2834 if (pci_enable_device(pdev)) {
2835 if (netif_msg_hw(adapter))
2836 dev_err(&pdev->dev,
2837 "Cannot re-enable PCI device after reset\n");
2838 return PCI_ERS_RESULT_DISCONNECT;
2839 }
2840 pci_set_master(pdev);
2841
2842 pci_enable_wake(pdev, PCI_D3hot, 0);
2843 pci_enable_wake(pdev, PCI_D3cold, 0);
2844
2845 atl1c_reset_mac(&adapter->hw);
2846
2847 return PCI_ERS_RESULT_RECOVERED;
2848 }
2849
2850 /*
2851 * atl1c_io_resume - called when traffic can start flowing again.
2852 * @pdev: Pointer to PCI device
2853 *
2854 * This callback is called when the error recovery driver tells us that
2855 * its OK to resume normal operation. Implementation resembles the
2856 * second-half of the atl1c_resume routine.
2857 */
2858 static void atl1c_io_resume(struct pci_dev *pdev)
2859 {
2860 struct net_device *netdev = pci_get_drvdata(pdev);
2861 struct atl1c_adapter *adapter = netdev_priv(netdev);
2862
2863 if (netif_running(netdev)) {
2864 if (atl1c_up(adapter)) {
2865 if (netif_msg_hw(adapter))
2866 dev_err(&pdev->dev,
2867 "Cannot bring device back up after reset\n");
2868 return;
2869 }
2870 }
2871
2872 netif_device_attach(netdev);
2873 }
2874
2875 static struct pci_error_handlers atl1c_err_handler = {
2876 .error_detected = atl1c_io_error_detected,
2877 .slot_reset = atl1c_io_slot_reset,
2878 .resume = atl1c_io_resume,
2879 };
2880
2881 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2882
2883 static struct pci_driver atl1c_driver = {
2884 .name = atl1c_driver_name,
2885 .id_table = atl1c_pci_tbl,
2886 .probe = atl1c_probe,
2887 .remove = __devexit_p(atl1c_remove),
2888 .shutdown = atl1c_shutdown,
2889 .err_handler = &atl1c_err_handler,
2890 .driver.pm = &atl1c_pm_ops,
2891 };
2892
2893 /*
2894 * atl1c_init_module - Driver Registration Routine
2895 *
2896 * atl1c_init_module is the first routine called when the driver is
2897 * loaded. All it does is register with the PCI subsystem.
2898 */
2899 static int __init atl1c_init_module(void)
2900 {
2901 return pci_register_driver(&atl1c_driver);
2902 }
2903
2904 /*
2905 * atl1c_exit_module - Driver Exit Cleanup Routine
2906 *
2907 * atl1c_exit_module is called just before the driver is removed
2908 * from memory.
2909 */
2910 static void __exit atl1c_exit_module(void)
2911 {
2912 pci_unregister_driver(&atl1c_driver);
2913 }
2914
2915 module_init(atl1c_init_module);
2916 module_exit(atl1c_exit_module);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree