1 # arch/arm/plat-samsung/Kconfig
3 # Copyright 2009 Simtec Electronics
9 depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
11 select GENERIC_IRQ_CHIP
14 Base platform code for all Samsung SoC based systems
20 comment "Boot options"
22 config S3C_BOOT_WATCHDOG
23 bool "S3C Initialisation watchdog"
24 depends on S3C2410_WATCHDOG
26 Say y to enable the watchdog during the kernel decompression
27 stage. If the kernel fails to uncompress, then the watchdog
28 will trigger a reset and the system should restart.
30 config S3C_BOOT_ERROR_RESET
31 bool "S3C Reboot on decompression error"
33 Say y here to use the watchdog to reset the system if the
34 kernel decompressor detects an error during decompression.
36 config S3C_BOOT_UART_FORCE_FIFO
37 bool "Force UART FIFO on during boot process"
40 Say Y here to force the UART FIFOs on during the kernel
44 config S3C_LOWLEVEL_UART_PORT
45 int "S3C UART to use for low-level messages"
48 Choice of which UART port to use for the low-level messages,
49 such as the `Uncompressing...` at start time. The value of
50 this configuration should be between zero and two. The port
51 must have been initialised by the boot-loader before use.
58 Select the clock code for the clksrc implementation
59 used by newer systems such as the S3C64XX.
61 # options for IRQ support
63 config SAMSUNG_IRQ_VIC_TIMER
66 Internal configuration to build the VIC timer interrupt code.
68 # options for gpio configuration support
70 config SAMSUNG_GPIOLIB_4BIT
73 GPIOlib file contains the 4 bit modification functions for gpio
74 configuration. GPIOlib shall be compiled only for S3C64XX and S5P
77 config S3C_GPIO_CFG_S3C64XX
80 Internal configuration to enable S3C64XX style GPIO configuration
83 config S5P_GPIO_DRVSTR
86 Internal configuration to get and set correct GPIO driver strength
89 config SAMSUNG_GPIO_EXTRA
90 int "Number of additional GPIO pins"
93 Use additional GPIO space in addition to the GPIO's the SOC
94 provides. This allows expanding the GPIO space for use with
98 int "Space between gpio banks"
101 Add a number of spare GPIO entries between each bank for debugging
102 purposes. This allows any problems where an counter overflows from
103 one bank to another to be caught, at the expense of using a little
106 config S3C_GPIO_TRACK
109 Internal configuration option to enable the s3c specific gpio
110 chip tracking if the platform requires it.
115 bool "ADC common driver support"
117 Core support for the ADC block found in the Samsung SoC systems
118 for drivers such as the touchscreen and hwmon to use to share
121 # device definitions to compile in
126 Compile in platform device definitions for HSMMC code
128 config S3C_DEV_HSMMC1
131 Compile in platform device definitions for HSMMC channel 1
133 config S3C_DEV_HSMMC2
136 Compile in platform device definitions for HSMMC channel 2
138 config S3C_DEV_HSMMC3
141 Compile in platform device definitions for HSMMC channel 3
146 Compile in platform device definitions for HWMON
151 Compile in platform device definitions for I2C channel 1
156 Compile in platform device definitions for I2C channel 2
161 Compile in platform device definition for I2C controller 3
166 Compile in platform device definition for I2C controller 4
171 Compile in platform device definition for I2C controller 5
176 Compile in platform device definition for I2C controller 6
181 Compile in platform device definition for I2C controller 7
186 Compile in platform device definition for framebuffer
188 config S3C_DEV_USB_HOST
191 Compile in platform device definition for USB host.
193 config S3C_DEV_USB_HSOTG
196 Compile in platform device definition for USB high-speed OtG
200 default y if ARCH_S3C2410
202 Complie in platform device definition for Watchdog Timer
207 Compile in platform device definition for NAND controller
209 config S3C_DEV_ONENAND
212 Compile in platform device definition for OneNAND controller
217 Complie in platform device definition for RTC
219 config SAMSUNG_DEV_ADC
222 Compile in platform device definition for ADC controller
224 config SAMSUNG_DEV_IDE
227 Compile in platform device definitions for IDE
229 config S3C64XX_DEV_SPI
232 Compile in platform device definitions for S3C64XX's type
235 config SAMSUNG_DEV_TS
238 Common in platform device definitions for touchscreen device
240 config SAMSUNG_DEV_KEYPAD
243 Compile in platform device definitions for keypad
245 config SAMSUNG_DEV_PWM
247 default y if ARCH_S3C2410
249 Compile in platform device definition for PWM Timer
251 config SAMSUNG_DEV_BACKLIGHT
253 depends on SAMSUNG_DEV_PWM
255 Compile in platform device definition LCD backlight with PWM Timer
258 bool "PWM device support"
261 Support for exporting the PWM timer blocks via the pwm device
269 Internal configuration for S3C DMA core
271 config SAMSUNG_DMADEV
274 select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
275 CPU_S5P6450 || CPU_S5P6440)
278 Use DMA device engine for PL330 DMAC.
280 comment "Power management"
282 config SAMSUNG_PM_DEBUG
283 bool "S3C2410 PM Suspend debug"
286 Say Y here if you want verbose debugging from the PM Suspend and
287 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
288 for more information.
290 config S3C_PM_DEBUG_LED_SMDK
291 bool "SMDK LED suspend/resume debugging"
292 depends on PM && (MACH_SMDK6410)
294 Say Y here to enable the use of the SMDK LEDs on the baseboard
295 for debugging of the state of the suspend and resume process.
297 Note, this currently only works for S3C64XX based SMDK boards.
299 config SAMSUNG_PM_CHECK
300 bool "S3C2410 PM Suspend Memory CRC"
301 depends on PM && CRC32
303 Enable the PM code's memory area checksum over sleep. This option
304 will generate CRCs of all blocks of memory, and store them before
305 going to sleep. The blocks are then checked on resume for any
308 Note, this can take several seconds depending on memory size
311 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
313 config SAMSUNG_PM_CHECK_CHUNKSIZE
314 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
315 depends on PM && SAMSUNG_PM_CHECK
318 Set the chunksize in Kilobytes of the CRC for checking memory
319 corruption over suspend and resume. A smaller value will mean that
320 the CRC data block will take more memory, but wil identify any
321 faults with better precision.
323 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
325 config SAMSUNG_WAKEMASK
329 Compile support for wakeup-mask controls found on the S3C6400
330 and above. This code allows a set of interrupt to wakeup-mask
331 mappings. See <plat/wakeup-mask.h>
333 comment "Power Domain"
336 bool "Samsung Power Domain"
337 depends on PM_RUNTIME
339 Say Y here if you want to control Power Domain by Runtime PM.
341 config DEBUG_S3C_UART
342 depends on PLAT_SAMSUNG
344 default "0" if DEBUG_S3C_UART0
345 default "1" if DEBUG_S3C_UART1
346 default "2" if DEBUG_S3C_UART2