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TTY: serial, move locking in uart_close
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / input / keyboard / tegra-kbc.c
blobf270447ba9519cb9497eea8a02d9869eef58ba4b
1 /*
2 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
3 * keyboard controller
4 *
5 * Copyright (c) 2009-2011, NVIDIA Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/input.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/io.h>
28 #include <linux/interrupt.h>
29 #include <linux/clk.h>
30 #include <linux/slab.h>
31 #include <mach/clk.h>
32 #include <mach/kbc.h>
33
34 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
35
36 /* KBC row scan time and delay for beginning the row scan. */
37 #define KBC_ROW_SCAN_TIME 16
38 #define KBC_ROW_SCAN_DLY 5
39
40 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
41 #define KBC_CYCLE_MS 32
42
43 /* KBC Registers */
44
45 /* KBC Control Register */
46 #define KBC_CONTROL_0 0x0
47 #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
48 #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
49 #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
50 #define KBC_CONTROL_KBC_EN (1 << 0)
51
52 /* KBC Interrupt Register */
53 #define KBC_INT_0 0x4
54 #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
55
56 #define KBC_ROW_CFG0_0 0x8
57 #define KBC_COL_CFG0_0 0x18
58 #define KBC_INIT_DLY_0 0x28
59 #define KBC_RPT_DLY_0 0x2c
60 #define KBC_KP_ENT0_0 0x30
61 #define KBC_KP_ENT1_0 0x34
62 #define KBC_ROW0_MASK_0 0x38
63
64 #define KBC_ROW_SHIFT 3
65
66 struct tegra_kbc {
67 void __iomem *mmio;
68 struct input_dev *idev;
69 unsigned int irq;
70 spinlock_t lock;
71 unsigned int repoll_dly;
72 unsigned long cp_dly_jiffies;
73 bool use_fn_map;
74 bool use_ghost_filter;
75 const struct tegra_kbc_platform_data *pdata;
76 unsigned short keycode[KBC_MAX_KEY * 2];
77 unsigned short current_keys[KBC_MAX_KPENT];
78 unsigned int num_pressed_keys;
79 struct timer_list timer;
80 struct clk *clk;
81 };
82
83 static const u32 tegra_kbc_default_keymap[] = {
84 KEY(0, 2, KEY_W),
85 KEY(0, 3, KEY_S),
86 KEY(0, 4, KEY_A),
87 KEY(0, 5, KEY_Z),
88 KEY(0, 7, KEY_FN),
89
90 KEY(1, 7, KEY_LEFTMETA),
91
92 KEY(2, 6, KEY_RIGHTALT),
93 KEY(2, 7, KEY_LEFTALT),
94
95 KEY(3, 0, KEY_5),
96 KEY(3, 1, KEY_4),
97 KEY(3, 2, KEY_R),
98 KEY(3, 3, KEY_E),
99 KEY(3, 4, KEY_F),
100 KEY(3, 5, KEY_D),
101 KEY(3, 6, KEY_X),
102
103 KEY(4, 0, KEY_7),
104 KEY(4, 1, KEY_6),
105 KEY(4, 2, KEY_T),
106 KEY(4, 3, KEY_H),
107 KEY(4, 4, KEY_G),
108 KEY(4, 5, KEY_V),
109 KEY(4, 6, KEY_C),
110 KEY(4, 7, KEY_SPACE),
111
112 KEY(5, 0, KEY_9),
113 KEY(5, 1, KEY_8),
114 KEY(5, 2, KEY_U),
115 KEY(5, 3, KEY_Y),
116 KEY(5, 4, KEY_J),
117 KEY(5, 5, KEY_N),
118 KEY(5, 6, KEY_B),
119 KEY(5, 7, KEY_BACKSLASH),
120
121 KEY(6, 0, KEY_MINUS),
122 KEY(6, 1, KEY_0),
123 KEY(6, 2, KEY_O),
124 KEY(6, 3, KEY_I),
125 KEY(6, 4, KEY_L),
126 KEY(6, 5, KEY_K),
127 KEY(6, 6, KEY_COMMA),
128 KEY(6, 7, KEY_M),
129
130 KEY(7, 1, KEY_EQUAL),
131 KEY(7, 2, KEY_RIGHTBRACE),
132 KEY(7, 3, KEY_ENTER),
133 KEY(7, 7, KEY_MENU),
134
135 KEY(8, 4, KEY_RIGHTSHIFT),
136 KEY(8, 5, KEY_LEFTSHIFT),
137
138 KEY(9, 5, KEY_RIGHTCTRL),
139 KEY(9, 7, KEY_LEFTCTRL),
140
141 KEY(11, 0, KEY_LEFTBRACE),
142 KEY(11, 1, KEY_P),
143 KEY(11, 2, KEY_APOSTROPHE),
144 KEY(11, 3, KEY_SEMICOLON),
145 KEY(11, 4, KEY_SLASH),
146 KEY(11, 5, KEY_DOT),
147
148 KEY(12, 0, KEY_F10),
149 KEY(12, 1, KEY_F9),
150 KEY(12, 2, KEY_BACKSPACE),
151 KEY(12, 3, KEY_3),
152 KEY(12, 4, KEY_2),
153 KEY(12, 5, KEY_UP),
154 KEY(12, 6, KEY_PRINT),
155 KEY(12, 7, KEY_PAUSE),
156
157 KEY(13, 0, KEY_INSERT),
158 KEY(13, 1, KEY_DELETE),
159 KEY(13, 3, KEY_PAGEUP),
160 KEY(13, 4, KEY_PAGEDOWN),
161 KEY(13, 5, KEY_RIGHT),
162 KEY(13, 6, KEY_DOWN),
163 KEY(13, 7, KEY_LEFT),
164
165 KEY(14, 0, KEY_F11),
166 KEY(14, 1, KEY_F12),
167 KEY(14, 2, KEY_F8),
168 KEY(14, 3, KEY_Q),
169 KEY(14, 4, KEY_F4),
170 KEY(14, 5, KEY_F3),
171 KEY(14, 6, KEY_1),
172 KEY(14, 7, KEY_F7),
173
174 KEY(15, 0, KEY_ESC),
175 KEY(15, 1, KEY_GRAVE),
176 KEY(15, 2, KEY_F5),
177 KEY(15, 3, KEY_TAB),
178 KEY(15, 4, KEY_F1),
179 KEY(15, 5, KEY_F2),
180 KEY(15, 6, KEY_CAPSLOCK),
181 KEY(15, 7, KEY_F6),
182
183 /* Software Handled Function Keys */
184 KEY(20, 0, KEY_KP7),
185
186 KEY(21, 0, KEY_KP9),
187 KEY(21, 1, KEY_KP8),
188 KEY(21, 2, KEY_KP4),
189 KEY(21, 4, KEY_KP1),
190
191 KEY(22, 1, KEY_KPSLASH),
192 KEY(22, 2, KEY_KP6),
193 KEY(22, 3, KEY_KP5),
194 KEY(22, 4, KEY_KP3),
195 KEY(22, 5, KEY_KP2),
196 KEY(22, 7, KEY_KP0),
197
198 KEY(27, 1, KEY_KPASTERISK),
199 KEY(27, 3, KEY_KPMINUS),
200 KEY(27, 4, KEY_KPPLUS),
201 KEY(27, 5, KEY_KPDOT),
202
203 KEY(28, 5, KEY_VOLUMEUP),
204
205 KEY(29, 3, KEY_HOME),
206 KEY(29, 4, KEY_END),
207 KEY(29, 5, KEY_BRIGHTNESSDOWN),
208 KEY(29, 6, KEY_VOLUMEDOWN),
209 KEY(29, 7, KEY_BRIGHTNESSUP),
210
211 KEY(30, 0, KEY_NUMLOCK),
212 KEY(30, 1, KEY_SCROLLLOCK),
213 KEY(30, 2, KEY_MUTE),
214
215 KEY(31, 4, KEY_HELP),
216 };
217
218 static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
219 .keymap = tegra_kbc_default_keymap,
220 .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
221 };
222
223 static void tegra_kbc_report_released_keys(struct input_dev *input,
224 unsigned short old_keycodes[],
225 unsigned int old_num_keys,
226 unsigned short new_keycodes[],
227 unsigned int new_num_keys)
228 {
229 unsigned int i, j;
230
231 for (i = 0; i < old_num_keys; i++) {
232 for (j = 0; j < new_num_keys; j++)
233 if (old_keycodes[i] == new_keycodes[j])
234 break;
235
236 if (j == new_num_keys)
237 input_report_key(input, old_keycodes[i], 0);
238 }
239 }
240
241 static void tegra_kbc_report_pressed_keys(struct input_dev *input,
242 unsigned char scancodes[],
243 unsigned short keycodes[],
244 unsigned int num_pressed_keys)
245 {
246 unsigned int i;
247
248 for (i = 0; i < num_pressed_keys; i++) {
249 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
250 input_report_key(input, keycodes[i], 1);
251 }
252 }
253
254 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
255 {
256 unsigned char scancodes[KBC_MAX_KPENT];
257 unsigned short keycodes[KBC_MAX_KPENT];
258 u32 val = 0;
259 unsigned int i;
260 unsigned int num_down = 0;
261 unsigned long flags;
262 bool fn_keypress = false;
263 bool key_in_same_row = false;
264 bool key_in_same_col = false;
265
266 spin_lock_irqsave(&kbc->lock, flags);
267 for (i = 0; i < KBC_MAX_KPENT; i++) {
268 if ((i % 4) == 0)
269 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
270
271 if (val & 0x80) {
272 unsigned int col = val & 0x07;
273 unsigned int row = (val >> 3) & 0x0f;
274 unsigned char scancode =
275 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
276
277 scancodes[num_down] = scancode;
278 keycodes[num_down] = kbc->keycode[scancode];
279 /* If driver uses Fn map, do not report the Fn key. */
280 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
281 fn_keypress = true;
282 else
283 num_down++;
284 }
285
286 val >>= 8;
287 }
288
289 /*
290 * Matrix keyboard designs are prone to keyboard ghosting.
291 * Ghosting occurs if there are 3 keys such that -
292 * any 2 of the 3 keys share a row, and any 2 of them share a column.
293 * If so ignore the key presses for this iteration.
294 */
295 if ((kbc->use_ghost_filter) && (num_down >= 3)) {
296 for (i = 0; i < num_down; i++) {
297 unsigned int j;
298 u8 curr_col = scancodes[i] & 0x07;
299 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
300
301 /*
302 * Find 2 keys such that one key is in the same row
303 * and the other is in the same column as the i-th key.
304 */
305 for (j = i + 1; j < num_down; j++) {
306 u8 col = scancodes[j] & 0x07;
307 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
308
309 if (col == curr_col)
310 key_in_same_col = true;
311 if (row == curr_row)
312 key_in_same_row = true;
313 }
314 }
315 }
316
317 /*
318 * If the platform uses Fn keymaps, translate keys on a Fn keypress.
319 * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
320 */
321 if (fn_keypress) {
322 for (i = 0; i < num_down; i++) {
323 scancodes[i] += KBC_MAX_KEY;
324 keycodes[i] = kbc->keycode[scancodes[i]];
325 }
326 }
327
328 spin_unlock_irqrestore(&kbc->lock, flags);
329
330 /* Ignore the key presses for this iteration? */
331 if (key_in_same_col && key_in_same_row)
332 return;
333
334 tegra_kbc_report_released_keys(kbc->idev,
335 kbc->current_keys, kbc->num_pressed_keys,
336 keycodes, num_down);
337 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
338 input_sync(kbc->idev);
339
340 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
341 kbc->num_pressed_keys = num_down;
342 }
343
344 static void tegra_kbc_keypress_timer(unsigned long data)
345 {
346 struct tegra_kbc *kbc = (struct tegra_kbc *)data;
347 unsigned long flags;
348 u32 val;
349 unsigned int i;
350
351 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
352 if (val) {
353 unsigned long dly;
354
355 tegra_kbc_report_keys(kbc);
356
357 /*
358 * If more than one keys are pressed we need not wait
359 * for the repoll delay.
360 */
361 dly = (val == 1) ? kbc->repoll_dly : 1;
362 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
363 } else {
364 /* Release any pressed keys and exit the polling loop */
365 for (i = 0; i < kbc->num_pressed_keys; i++)
366 input_report_key(kbc->idev, kbc->current_keys[i], 0);
367 input_sync(kbc->idev);
368
369 kbc->num_pressed_keys = 0;
370
371 /* All keys are released so enable the keypress interrupt */
372 spin_lock_irqsave(&kbc->lock, flags);
373 val = readl(kbc->mmio + KBC_CONTROL_0);
374 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
375 writel(val, kbc->mmio + KBC_CONTROL_0);
376 spin_unlock_irqrestore(&kbc->lock, flags);
377 }
378 }
379
380 static irqreturn_t tegra_kbc_isr(int irq, void *args)
381 {
382 struct tegra_kbc *kbc = args;
383 u32 val, ctl;
384
385 /*
386 * Until all keys are released, defer further processing to
387 * the polling loop in tegra_kbc_keypress_timer
388 */
389 ctl = readl(kbc->mmio + KBC_CONTROL_0);
390 ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
391 writel(ctl, kbc->mmio + KBC_CONTROL_0);
392
393 /*
394 * Quickly bail out & reenable interrupts if the fifo threshold
395 * count interrupt wasn't the interrupt source
396 */
397 val = readl(kbc->mmio + KBC_INT_0);
398 writel(val, kbc->mmio + KBC_INT_0);
399
400 if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
401 /*
402 * Schedule timer to run when hardware is in continuous
403 * polling mode.
404 */
405 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
406 } else {
407 ctl |= KBC_CONTROL_FIFO_CNT_INT_EN;
408 writel(ctl, kbc->mmio + KBC_CONTROL_0);
409 }
410
411 return IRQ_HANDLED;
412 }
413
414 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
415 {
416 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
417 int i;
418 unsigned int rst_val;
419
420 /* Either mask all keys or none. */
421 rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
422
423 for (i = 0; i < KBC_MAX_ROW; i++)
424 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
425 }
426
427 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
428 {
429 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
430 int i;
431
432 for (i = 0; i < KBC_MAX_GPIO; i++) {
433 u32 r_shft = 5 * (i % 6);
434 u32 c_shft = 4 * (i % 8);
435 u32 r_mask = 0x1f << r_shft;
436 u32 c_mask = 0x0f << c_shft;
437 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
438 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
439 u32 row_cfg = readl(kbc->mmio + r_offs);
440 u32 col_cfg = readl(kbc->mmio + c_offs);
441
442 row_cfg &= ~r_mask;
443 col_cfg &= ~c_mask;
444
445 if (pdata->pin_cfg[i].is_row)
446 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
447 else
448 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
449
450 writel(row_cfg, kbc->mmio + r_offs);
451 writel(col_cfg, kbc->mmio + c_offs);
452 }
453 }
454
455 static int tegra_kbc_start(struct tegra_kbc *kbc)
456 {
457 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
458 unsigned long flags;
459 unsigned int debounce_cnt;
460 u32 val = 0;
461
462 clk_enable(kbc->clk);
463
464 /* Reset the KBC controller to clear all previous status.*/
465 tegra_periph_reset_assert(kbc->clk);
466 udelay(100);
467 tegra_periph_reset_deassert(kbc->clk);
468 udelay(100);
469
470 tegra_kbc_config_pins(kbc);
471 tegra_kbc_setup_wakekeys(kbc, false);
472
473 writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
474
475 /* Keyboard debounce count is maximum of 12 bits. */
476 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
477 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
478 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
479 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
480 val |= KBC_CONTROL_KBC_EN; /* enable */
481 writel(val, kbc->mmio + KBC_CONTROL_0);
482
483 /*
484 * Compute the delay(ns) from interrupt mode to continuous polling
485 * mode so the timer routine is scheduled appropriately.
486 */
487 val = readl(kbc->mmio + KBC_INIT_DLY_0);
488 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
489
490 kbc->num_pressed_keys = 0;
491
492 /*
493 * Atomically clear out any remaining entries in the key FIFO
494 * and enable keyboard interrupts.
495 */
496 spin_lock_irqsave(&kbc->lock, flags);
497 while (1) {
498 val = readl(kbc->mmio + KBC_INT_0);
499 val >>= 4;
500 if (!val)
501 break;
502
503 val = readl(kbc->mmio + KBC_KP_ENT0_0);
504 val = readl(kbc->mmio + KBC_KP_ENT1_0);
505 }
506 writel(0x7, kbc->mmio + KBC_INT_0);
507 spin_unlock_irqrestore(&kbc->lock, flags);
508
509 enable_irq(kbc->irq);
510
511 return 0;
512 }
513
514 static void tegra_kbc_stop(struct tegra_kbc *kbc)
515 {
516 unsigned long flags;
517 u32 val;
518
519 spin_lock_irqsave(&kbc->lock, flags);
520 val = readl(kbc->mmio + KBC_CONTROL_0);
521 val &= ~1;
522 writel(val, kbc->mmio + KBC_CONTROL_0);
523 spin_unlock_irqrestore(&kbc->lock, flags);
524
525 disable_irq(kbc->irq);
526 del_timer_sync(&kbc->timer);
527
528 clk_disable(kbc->clk);
529 }
530
531 static int tegra_kbc_open(struct input_dev *dev)
532 {
533 struct tegra_kbc *kbc = input_get_drvdata(dev);
534
535 return tegra_kbc_start(kbc);
536 }
537
538 static void tegra_kbc_close(struct input_dev *dev)
539 {
540 struct tegra_kbc *kbc = input_get_drvdata(dev);
541
542 return tegra_kbc_stop(kbc);
543 }
544
545 static bool __devinit
546 tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
547 struct device *dev, unsigned int *num_rows)
548 {
549 int i;
550
551 *num_rows = 0;
552
553 for (i = 0; i < KBC_MAX_GPIO; i++) {
554 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
555
556 if (pin_cfg->is_row) {
557 if (pin_cfg->num >= KBC_MAX_ROW) {
558 dev_err(dev,
559 "pin_cfg[%d]: invalid row number %d\n",
560 i, pin_cfg->num);
561 return false;
562 }
563 (*num_rows)++;
564 } else {
565 if (pin_cfg->num >= KBC_MAX_COL) {
566 dev_err(dev,
567 "pin_cfg[%d]: invalid column number %d\n",
568 i, pin_cfg->num);
569 return false;
570 }
571 }
572 }
573
574 return true;
575 }
576
577 static int __devinit tegra_kbc_probe(struct platform_device *pdev)
578 {
579 const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
580 const struct matrix_keymap_data *keymap_data;
581 struct tegra_kbc *kbc;
582 struct input_dev *input_dev;
583 struct resource *res;
584 int irq;
585 int err;
586 int num_rows = 0;
587 unsigned int debounce_cnt;
588 unsigned int scan_time_rows;
589
590 if (!pdata)
591 return -EINVAL;
592
593 if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
594 return -EINVAL;
595
596 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
597 if (!res) {
598 dev_err(&pdev->dev, "failed to get I/O memory\n");
599 return -ENXIO;
600 }
601
602 irq = platform_get_irq(pdev, 0);
603 if (irq < 0) {
604 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
605 return -ENXIO;
606 }
607
608 kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
609 input_dev = input_allocate_device();
610 if (!kbc || !input_dev) {
611 err = -ENOMEM;
612 goto err_free_mem;
613 }
614
615 kbc->pdata = pdata;
616 kbc->idev = input_dev;
617 kbc->irq = irq;
618 spin_lock_init(&kbc->lock);
619 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
620
621 res = request_mem_region(res->start, resource_size(res), pdev->name);
622 if (!res) {
623 dev_err(&pdev->dev, "failed to request I/O memory\n");
624 err = -EBUSY;
625 goto err_free_mem;
626 }
627
628 kbc->mmio = ioremap(res->start, resource_size(res));
629 if (!kbc->mmio) {
630 dev_err(&pdev->dev, "failed to remap I/O memory\n");
631 err = -ENXIO;
632 goto err_free_mem_region;
633 }
634
635 kbc->clk = clk_get(&pdev->dev, NULL);
636 if (IS_ERR(kbc->clk)) {
637 dev_err(&pdev->dev, "failed to get keyboard clock\n");
638 err = PTR_ERR(kbc->clk);
639 goto err_iounmap;
640 }
641
642 /*
643 * The time delay between two consecutive reads of the FIFO is
644 * the sum of the repeat time and the time taken for scanning
645 * the rows. There is an additional delay before the row scanning
646 * starts. The repoll delay is computed in milliseconds.
647 */
648 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
649 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
650 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
651 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
652
653 input_dev->name = pdev->name;
654 input_dev->id.bustype = BUS_HOST;
655 input_dev->dev.parent = &pdev->dev;
656 input_dev->open = tegra_kbc_open;
657 input_dev->close = tegra_kbc_close;
658
659 input_set_drvdata(input_dev, kbc);
660
661 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
662 input_set_capability(input_dev, EV_MSC, MSC_SCAN);
663
664 input_dev->keycode = kbc->keycode;
665 input_dev->keycodesize = sizeof(kbc->keycode[0]);
666 input_dev->keycodemax = KBC_MAX_KEY;
667 if (pdata->use_fn_map)
668 input_dev->keycodemax *= 2;
669
670 kbc->use_fn_map = pdata->use_fn_map;
671 kbc->use_ghost_filter = pdata->use_ghost_filter;
672 keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
673 matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
674 input_dev->keycode, input_dev->keybit);
675
676 err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
677 pdev->name, kbc);
678 if (err) {
679 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
680 goto err_put_clk;
681 }
682
683 disable_irq(kbc->irq);
684
685 err = input_register_device(kbc->idev);
686 if (err) {
687 dev_err(&pdev->dev, "failed to register input device\n");
688 goto err_free_irq;
689 }
690
691 platform_set_drvdata(pdev, kbc);
692 device_init_wakeup(&pdev->dev, pdata->wakeup);
693
694 return 0;
695
696 err_free_irq:
697 free_irq(kbc->irq, pdev);
698 err_put_clk:
699 clk_put(kbc->clk);
700 err_iounmap:
701 iounmap(kbc->mmio);
702 err_free_mem_region:
703 release_mem_region(res->start, resource_size(res));
704 err_free_mem:
705 input_free_device(kbc->idev);
706 kfree(kbc);
707
708 return err;
709 }
710
711 static int __devexit tegra_kbc_remove(struct platform_device *pdev)
712 {
713 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
714 struct resource *res;
715
716 free_irq(kbc->irq, pdev);
717 clk_put(kbc->clk);
718
719 input_unregister_device(kbc->idev);
720 iounmap(kbc->mmio);
721 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
722 release_mem_region(res->start, resource_size(res));
723
724 kfree(kbc);
725
726 platform_set_drvdata(pdev, NULL);
727
728 return 0;
729 }
730
731 #ifdef CONFIG_PM_SLEEP
732 static int tegra_kbc_suspend(struct device *dev)
733 {
734 struct platform_device *pdev = to_platform_device(dev);
735 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
736
737 if (device_may_wakeup(&pdev->dev)) {
738 tegra_kbc_setup_wakekeys(kbc, true);
739 enable_irq_wake(kbc->irq);
740 /* Forcefully clear the interrupt status */
741 writel(0x7, kbc->mmio + KBC_INT_0);
742 msleep(30);
743 } else {
744 mutex_lock(&kbc->idev->mutex);
745 if (kbc->idev->users)
746 tegra_kbc_stop(kbc);
747 mutex_unlock(&kbc->idev->mutex);
748 }
749
750 return 0;
751 }
752
753 static int tegra_kbc_resume(struct device *dev)
754 {
755 struct platform_device *pdev = to_platform_device(dev);
756 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
757 int err = 0;
758
759 if (device_may_wakeup(&pdev->dev)) {
760 disable_irq_wake(kbc->irq);
761 tegra_kbc_setup_wakekeys(kbc, false);
762 } else {
763 mutex_lock(&kbc->idev->mutex);
764 if (kbc->idev->users)
765 err = tegra_kbc_start(kbc);
766 mutex_unlock(&kbc->idev->mutex);
767 }
768
769 return err;
770 }
771 #endif
772
773 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
774
775 static struct platform_driver tegra_kbc_driver = {
776 .probe = tegra_kbc_probe,
777 .remove = __devexit_p(tegra_kbc_remove),
778 .driver = {
779 .name = "tegra-kbc",
780 .owner = THIS_MODULE,
781 .pm = &tegra_kbc_pm_ops,
782 },
783 };
784
785 static void __exit tegra_kbc_exit(void)
786 {
787 platform_driver_unregister(&tegra_kbc_driver);
788 }
789 module_exit(tegra_kbc_exit);
790
791 static int __init tegra_kbc_init(void)
792 {
793 return platform_driver_register(&tegra_kbc_driver);
794 }
795 module_init(tegra_kbc_init);
796
797 MODULE_LICENSE("GPL");
798 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
799 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
800 MODULE_ALIAS("platform:tegra-kbc");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree