arch/x86/pci/mmconfig-shared.c

   1 /*
   2  * mmconfig-shared.c - Low-level direct PCI config space access via
   3  *                     MMCONFIG - common code between i386 and x86-64.
   4  *
   5  * This code does:
   6  * - known chipset handling
   7  * - ACPI decoding and validation
   8  *
   9  * Per-architecture code takes care of the mappings and accesses
  10  * themselves.
  11  */
  12
  13 #include <linux/pci.h>
  14 #include <linux/init.h>
  15 #include <linux/acpi.h>
  16 #include <linux/sfi_acpi.h>
  17 #include <linux/bitmap.h>
  18 #include <linux/dmi.h>
  19 #include <asm/e820.h>
  20 #include <asm/pci_x86.h>
  21 #include <asm/acpi.h>
  22
  23 #define PREFIX "PCI: "
  24
  25 /* Indicate if the mmcfg resources have been placed into the resource table. */
  26 static int __initdata pci_mmcfg_resources_inserted;
  27
  28 LIST_HEAD(pci_mmcfg_list);
  29
  30 static __init void pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
  31 {
  32         if (cfg->res.parent)
  33                 release_resource(&cfg->res);
  34         list_del(&cfg->list);
  35         kfree(cfg);
  36 }
  37
  38 static __init void free_all_mmcfg(void)
  39 {
  40         struct pci_mmcfg_region *cfg, *tmp;
  41
  42         pci_mmcfg_arch_free();
  43         list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list)
  44                 pci_mmconfig_remove(cfg);
  45 }
  46
  47 static __init void list_add_sorted(struct pci_mmcfg_region *new)
  48 {
  49         struct pci_mmcfg_region *cfg;
  50
  51         /* keep list sorted by segment and starting bus number */
  52         list_for_each_entry(cfg, &pci_mmcfg_list, list) {
  53                 if (cfg->segment > new->segment ||
  54                     (cfg->segment == new->segment &&
  55                      cfg->start_bus >= new->start_bus)) {
  56                         list_add_tail(&new->list, &cfg->list);
  57                         return;
  58                 }
  59         }
  60         list_add_tail(&new->list, &pci_mmcfg_list);
  61 }
  62
  63 static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
  64                                                         int end, u64 addr)
  65 {
  66         struct pci_mmcfg_region *new;
  67         int num_buses;
  68         struct resource *res;
  69
  70         if (addr == 0)
  71                 return NULL;
  72
  73         new = kzalloc(sizeof(*new), GFP_KERNEL);
  74         if (!new)
  75                 return NULL;
  76
  77         new->address = addr;
  78         new->segment = segment;
  79         new->start_bus = start;
  80         new->end_bus = end;
  81
  82         list_add_sorted(new);
  83
  84         num_buses = end - start + 1;
  85         res = &new->res;
  86         res->start = addr + PCI_MMCFG_BUS_OFFSET(start);
  87         res->end = addr + PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
  88         res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  89         snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN,
  90                  "PCI MMCONFIG %04x [bus %02x-%02x]", segment, start, end);
  91         res->name = new->name;
  92
  93         return new;
  94 }
  95
  96 static const char __init *pci_mmcfg_e7520(void)
  97 {
  98         u32 win;
  99         raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0xce, 2, &win);
 100
 101         win = win & 0xf000;
 102         if (win == 0x0000 || win == 0xf000)
 103                 return NULL;
 104
 105         if (pci_mmconfig_add(0, 0, 255, win << 16) == NULL)
 106                 return NULL;
 107
 108         return "Intel Corporation E7520 Memory Controller Hub";
 109 }
 110
 111 static const char __init *pci_mmcfg_intel_945(void)
 112 {
 113         u32 pciexbar, mask = 0, len = 0;
 114
 115         raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0x48, 4, &pciexbar);
 116
 117         /* Enable bit */
 118         if (!(pciexbar & 1))
 119                 return NULL;
 120
 121         /* Size bits */
 122         switch ((pciexbar >> 1) & 3) {
 123         case 0:
 124                 mask = 0xf0000000U;
 125                 len  = 0x10000000U;
 126                 break;
 127         case 1:
 128                 mask = 0xf8000000U;
 129                 len  = 0x08000000U;
 130                 break;
 131         case 2:
 132                 mask = 0xfc000000U;
 133                 len  = 0x04000000U;
 134                 break;
 135         default:
 136                 return NULL;
 137         }
 138
 139         /* Errata #2, things break when not aligned on a 256Mb boundary */
 140         /* Can only happen in 64M/128M mode */
 141
 142         if ((pciexbar & mask) & 0x0fffffffU)
 143                 return NULL;
 144
 145         /* Don't hit the APIC registers and their friends */
 146         if ((pciexbar & mask) >= 0xf0000000U)
 147                 return NULL;
 148
 149         if (pci_mmconfig_add(0, 0, (len >> 20) - 1, pciexbar & mask) == NULL)
 150                 return NULL;
 151
 152         return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
 153 }
 154
 155 static const char __init *pci_mmcfg_amd_fam10h(void)
 156 {
 157         u32 low, high, address;
 158         u64 base, msr;
 159         int i;
 160         unsigned segnbits = 0, busnbits, end_bus;
 161
 162         if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
 163                 return NULL;
 164
 165         address = MSR_FAM10H_MMIO_CONF_BASE;
 166         if (rdmsr_safe(address, &low, &high))
 167                 return NULL;
 168
 169         msr = high;
 170         msr <<= 32;
 171         msr |= low;
 172
 173         /* mmconfig is not enable */
 174         if (!(msr & FAM10H_MMIO_CONF_ENABLE))
 175                 return NULL;
 176
 177         base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
 178
 179         busnbits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
 180                          FAM10H_MMIO_CONF_BUSRANGE_MASK;
 181
 182         /*
 183          * only handle bus 0 ?
 184          * need to skip it
 185          */
 186         if (!busnbits)
 187                 return NULL;
 188
 189         if (busnbits > 8) {
 190                 segnbits = busnbits - 8;
 191                 busnbits = 8;
 192         }
 193
 194         end_bus = (1 << busnbits) - 1;
 195         for (i = 0; i < (1 << segnbits); i++)
 196                 if (pci_mmconfig_add(i, 0, end_bus,
 197                                      base + (1<<28) * i) == NULL) {
 198                         free_all_mmcfg();
 199                         return NULL;
 200                 }
 201
 202         return "AMD Family 10h NB";
 203 }
 204
 205 static bool __initdata mcp55_checked;
 206 static const char __init *pci_mmcfg_nvidia_mcp55(void)
 207 {
 208         int bus;
 209         int mcp55_mmconf_found = 0;
 210
 211         static const u32 extcfg_regnum          = 0x90;
 212         static const u32 extcfg_regsize         = 4;
 213         static const u32 extcfg_enable_mask     = 1<<31;
 214         static const u32 extcfg_start_mask      = 0xff<<16;
 215         static const int extcfg_start_shift     = 16;
 216         static const u32 extcfg_size_mask       = 0x3<<28;
 217         static const int extcfg_size_shift      = 28;
 218         static const int extcfg_sizebus[]       = {0x100, 0x80, 0x40, 0x20};
 219         static const u32 extcfg_base_mask[]     = {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff};
 220         static const int extcfg_base_lshift     = 25;
 221
 222         /*
 223          * do check if amd fam10h already took over
 224          */
 225         if (!acpi_disabled || !list_empty(&pci_mmcfg_list) || mcp55_checked)
 226                 return NULL;
 227
 228         mcp55_checked = true;
 229         for (bus = 0; bus < 256; bus++) {
 230                 u64 base;
 231                 u32 l, extcfg;
 232                 u16 vendor, device;
 233                 int start, size_index, end;
 234
 235                 raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), 0, 4, &l);
 236                 vendor = l & 0xffff;
 237                 device = (l >> 16) & 0xffff;
 238
 239                 if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device)
 240                         continue;
 241
 242                 raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), extcfg_regnum,
 243                                   extcfg_regsize, &extcfg);
 244
 245                 if (!(extcfg & extcfg_enable_mask))
 246                         continue;
 247
 248                 size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift;
 249                 base = extcfg & extcfg_base_mask[size_index];
 250                 /* base could > 4G */
 251                 base <<= extcfg_base_lshift;
 252                 start = (extcfg & extcfg_start_mask) >> extcfg_start_shift;
 253                 end = start + extcfg_sizebus[size_index] - 1;
 254                 if (pci_mmconfig_add(0, start, end, base) == NULL)
 255                         continue;
 256                 mcp55_mmconf_found++;
 257         }
 258
 259         if (!mcp55_mmconf_found)
 260                 return NULL;
 261
 262         return "nVidia MCP55";
 263 }
 264
 265 struct pci_mmcfg_hostbridge_probe {
 266         u32 bus;
 267         u32 devfn;
 268         u32 vendor;
 269         u32 device;
 270         const char *(*probe)(void);
 271 };
 272
 273 static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
 274         { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
 275           PCI_DEVICE_ID_INTEL_E7520_MCH, pci_mmcfg_e7520 },
 276         { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
 277           PCI_DEVICE_ID_INTEL_82945G_HB, pci_mmcfg_intel_945 },
 278         { 0, PCI_DEVFN(0x18, 0), PCI_VENDOR_ID_AMD,
 279           0x1200, pci_mmcfg_amd_fam10h },
 280         { 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD,
 281           0x1200, pci_mmcfg_amd_fam10h },
 282         { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_NVIDIA,
 283           0x0369, pci_mmcfg_nvidia_mcp55 },
 284 };
 285
 286 static void __init pci_mmcfg_check_end_bus_number(void)
 287 {
 288         struct pci_mmcfg_region *cfg, *cfgx;
 289
 290         /* last one*/
 291         cfg = list_entry(pci_mmcfg_list.prev, typeof(*cfg), list);
 292         if (cfg)
 293                 if (cfg->end_bus < cfg->start_bus)
 294                         cfg->end_bus = 255;
 295
 296         if (list_is_singular(&pci_mmcfg_list))
 297                 return;
 298
 299         /* don't overlap please */
 300         list_for_each_entry(cfg, &pci_mmcfg_list, list) {
 301                 if (cfg->end_bus < cfg->start_bus)
 302                         cfg->end_bus = 255;
 303
 304                 cfgx = list_entry(cfg->list.next, typeof(*cfg), list);
 305                 if (cfg != cfgx && cfg->end_bus >= cfgx->start_bus)
 306                         cfg->end_bus = cfgx->start_bus - 1;
 307         }
 308 }
 309
 310 static int __init pci_mmcfg_check_hostbridge(void)
 311 {
 312         u32 l;
 313         u32 bus, devfn;
 314         u16 vendor, device;
 315         int i;
 316         const char *name;
 317
 318         if (!raw_pci_ops)
 319                 return 0;
 320
 321         free_all_mmcfg();
 322
 323         for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
 324                 bus =  pci_mmcfg_probes[i].bus;
 325                 devfn = pci_mmcfg_probes[i].devfn;
 326                 raw_pci_ops->read(0, bus, devfn, 0, 4, &l);
 327                 vendor = l & 0xffff;
 328                 device = (l >> 16) & 0xffff;
 329
 330                 name = NULL;
 331                 if (pci_mmcfg_probes[i].vendor == vendor &&
 332                     pci_mmcfg_probes[i].device == device)
 333                         name = pci_mmcfg_probes[i].probe();
 334
 335                 if (name)
 336                         printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n",
 337                                name);
 338         }
 339
 340         /* some end_bus_number is crazy, fix it */
 341         pci_mmcfg_check_end_bus_number();
 342
 343         return !list_empty(&pci_mmcfg_list);
 344 }
 345
 346 static void __init pci_mmcfg_insert_resources(void)
 347 {
 348         struct pci_mmcfg_region *cfg;
 349
 350         list_for_each_entry(cfg, &pci_mmcfg_list, list)
 351                 insert_resource(&iomem_resource, &cfg->res);
 352
 353         /* Mark that the resources have been inserted. */
 354         pci_mmcfg_resources_inserted = 1;
 355 }
 356
 357 static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
 358                                               void *data)
 359 {
 360         struct resource *mcfg_res = data;
 361         struct acpi_resource_address64 address;
 362         acpi_status status;
 363
 364         if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
 365                 struct acpi_resource_fixed_memory32 *fixmem32 =
 366                         &res->data.fixed_memory32;
 367                 if (!fixmem32)
 368                         return AE_OK;
 369                 if ((mcfg_res->start >= fixmem32->address) &&
 370                     (mcfg_res->end < (fixmem32->address +
 371                                       fixmem32->address_length))) {
 372                         mcfg_res->flags = 1;
 373                         return AE_CTRL_TERMINATE;
 374                 }
 375         }
 376         if ((res->type != ACPI_RESOURCE_TYPE_ADDRESS32) &&
 377             (res->type != ACPI_RESOURCE_TYPE_ADDRESS64))
 378                 return AE_OK;
 379
 380         status = acpi_resource_to_address64(res, &address);
 381         if (ACPI_FAILURE(status) ||
 382            (address.address_length <= 0) ||
 383            (address.resource_type != ACPI_MEMORY_RANGE))
 384                 return AE_OK;
 385
 386         if ((mcfg_res->start >= address.minimum) &&
 387             (mcfg_res->end < (address.minimum + address.address_length))) {
 388                 mcfg_res->flags = 1;
 389                 return AE_CTRL_TERMINATE;
 390         }
 391         return AE_OK;
 392 }
 393
 394 static acpi_status __init find_mboard_resource(acpi_handle handle, u32 lvl,
 395                 void *context, void **rv)
 396 {
 397         struct resource *mcfg_res = context;
 398
 399         acpi_walk_resources(handle, METHOD_NAME__CRS,
 400                             check_mcfg_resource, context);
 401
 402         if (mcfg_res->flags)
 403                 return AE_CTRL_TERMINATE;
 404
 405         return AE_OK;
 406 }
 407
 408 static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used)
 409 {
 410         struct resource mcfg_res;
 411
 412         mcfg_res.start = start;
 413         mcfg_res.end = end - 1;
 414         mcfg_res.flags = 0;
 415
 416         acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL);
 417
 418         if (!mcfg_res.flags)
 419                 acpi_get_devices("PNP0C02", find_mboard_resource, &mcfg_res,
 420                                  NULL);
 421
 422         return mcfg_res.flags;
 423 }
 424
 425 typedef int (*check_reserved_t)(u64 start, u64 end, unsigned type);
 426
 427 static int __init is_mmconf_reserved(check_reserved_t is_reserved,
 428                 int i, struct pci_mmcfg_region *cfg, int with_e820)
 429 {
 430         u64 addr = cfg->res.start;
 431         u64 size = resource_size(&cfg->res);
 432         u64 old_size = size;
 433         int valid = 0, num_buses;
 434
 435         while (!is_reserved(addr, addr + size, E820_RESERVED)) {
 436                 size >>= 1;
 437                 if (size < (16UL<<20))
 438                         break;
 439         }
 440
 441         if (size >= (16UL<<20) || size == old_size) {
 442                 printk(KERN_NOTICE
 443                        "PCI: MCFG area at %Lx reserved in %s\n",
 444                         addr, with_e820?"E820":"ACPI motherboard resources");
 445                 valid = 1;
 446
 447                 if (old_size != size) {
 448                         /* update end_bus */
 449                         cfg->end_bus = cfg->start_bus + ((size>>20) - 1);
 450                         num_buses = cfg->end_bus - cfg->start_bus + 1;
 451                         cfg->res.end = cfg->res.start +
 452                             PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
 453                         snprintf(cfg->name, PCI_MMCFG_RESOURCE_NAME_LEN,
 454                                  "PCI MMCONFIG %04x [bus %02x-%02x]",
 455                                  cfg->segment, cfg->start_bus, cfg->end_bus);
 456                         printk(KERN_NOTICE "PCI: updated MCFG configuration %d: base %lx "
 457                                "segment %hu buses %u - %u\n",
 458                                i, (unsigned long)cfg->address, cfg->segment,
 459                                (unsigned int)cfg->start_bus,
 460                                (unsigned int)cfg->end_bus);
 461                 }
 462         }
 463
 464         return valid;
 465 }
 466
 467 static void __init pci_mmcfg_reject_broken(int early)
 468 {
 469         struct pci_mmcfg_region *cfg;
 470         int i;
 471
 472         list_for_each_entry(cfg, &pci_mmcfg_list, list) {
 473                 int valid = 0;
 474
 475                 printk(KERN_NOTICE "PCI: MCFG configuration %d: base %lx "
 476                        "segment %hu buses %u - %u\n",
 477                        i, (unsigned long)cfg->address, cfg->segment,
 478                        (unsigned int)cfg->start_bus,
 479                        (unsigned int)cfg->end_bus);
 480                 i++;
 481
 482                 if (!early && !acpi_disabled)
 483                         valid = is_mmconf_reserved(is_acpi_reserved, i, cfg, 0);
 484
 485                 if (valid)
 486                         continue;
 487
 488                 if (!early)
 489                         printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %Lx is not"
 490                                " reserved in ACPI motherboard resources\n",
 491                                cfg->address);
 492
 493                 /* Don't try to do this check unless configuration
 494                    type 1 is available. how about type 2 ?*/
 495                 if (raw_pci_ops)
 496                         valid = is_mmconf_reserved(e820_all_mapped, i, cfg, 1);
 497
 498                 if (!valid)
 499                         goto reject;
 500         }
 501
 502         return;
 503
 504 reject:
 505         printk(KERN_INFO "PCI: Not using MMCONFIG.\n");
 506         free_all_mmcfg();
 507 }
 508
 509 static int __initdata known_bridge;
 510
 511 static int __init acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg,
 512                                         struct acpi_mcfg_allocation *cfg)
 513 {
 514         int year;
 515
 516         if (cfg->address < 0xFFFFFFFF)
 517                 return 0;
 518
 519         if (!strcmp(mcfg->header.oem_id, "SGI"))
 520                 return 0;
 521
 522         if (mcfg->header.revision >= 1) {
 523                 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) &&
 524                     year >= 2010)
 525                         return 0;
 526         }
 527
 528         printk(KERN_ERR PREFIX "MCFG region for %04x:%02x-%02x at %#llx "
 529                "is above 4GB, ignored\n", cfg->pci_segment,
 530                cfg->start_bus_number, cfg->end_bus_number, cfg->address);
 531         return -EINVAL;
 532 }
 533
 534 static int __init pci_parse_mcfg(struct acpi_table_header *header)
 535 {
 536         struct acpi_table_mcfg *mcfg;
 537         struct acpi_mcfg_allocation *cfg_table, *cfg;
 538         unsigned long i;
 539         int entries;
 540
 541         if (!header)
 542                 return -EINVAL;
 543
 544         mcfg = (struct acpi_table_mcfg *)header;
 545
 546         /* how many config structures do we have */
 547         free_all_mmcfg();
 548         entries = 0;
 549         i = header->length - sizeof(struct acpi_table_mcfg);
 550         while (i >= sizeof(struct acpi_mcfg_allocation)) {
 551                 entries++;
 552                 i -= sizeof(struct acpi_mcfg_allocation);
 553         };
 554         if (entries == 0) {
 555                 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
 556                 return -ENODEV;
 557         }
 558
 559         cfg_table = (struct acpi_mcfg_allocation *) &mcfg[1];
 560         for (i = 0; i < entries; i++) {
 561                 cfg = &cfg_table[i];
 562                 if (acpi_mcfg_check_entry(mcfg, cfg)) {
 563                         free_all_mmcfg();
 564                         return -ENODEV;
 565                 }
 566
 567                 if (pci_mmconfig_add(cfg->pci_segment, cfg->start_bus_number,
 568                                    cfg->end_bus_number, cfg->address) == NULL) {
 569                         printk(KERN_WARNING PREFIX
 570                                "no memory for MCFG entries\n");
 571                         free_all_mmcfg();
 572                         return -ENOMEM;
 573                 }
 574         }
 575
 576         return 0;
 577 }
 578
 579 static void __init __pci_mmcfg_init(int early)
 580 {
 581         /* MMCONFIG disabled */
 582         if ((pci_probe & PCI_PROBE_MMCONF) == 0)
 583                 return;
 584
 585         /* MMCONFIG already enabled */
 586         if (!early && !(pci_probe & PCI_PROBE_MASK & ~PCI_PROBE_MMCONF))
 587                 return;
 588
 589         /* for late to exit */
 590         if (known_bridge)
 591                 return;
 592
 593         if (early) {
 594                 if (pci_mmcfg_check_hostbridge())
 595                         known_bridge = 1;
 596         }
 597
 598         if (!known_bridge)
 599                 acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
 600
 601         pci_mmcfg_reject_broken(early);
 602
 603         if (list_empty(&pci_mmcfg_list))
 604                 return;
 605
 606         if (pci_mmcfg_arch_init())
 607                 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
 608         else {
 609                 /*
 610                  * Signal not to attempt to insert mmcfg resources because
 611                  * the architecture mmcfg setup could not initialize.
 612                  */
 613                 pci_mmcfg_resources_inserted = 1;
 614         }
 615 }
 616
 617 void __init pci_mmcfg_early_init(void)
 618 {
 619         __pci_mmcfg_init(1);
 620 }
 621
 622 void __init pci_mmcfg_late_init(void)
 623 {
 624         __pci_mmcfg_init(0);
 625 }
 626
 627 static int __init pci_mmcfg_late_insert_resources(void)
 628 {
 629         /*
 630          * If resources are already inserted or we are not using MMCONFIG,
 631          * don't insert the resources.
 632          */
 633         if ((pci_mmcfg_resources_inserted == 1) ||
 634             (pci_probe & PCI_PROBE_MMCONF) == 0 ||
 635             list_empty(&pci_mmcfg_list))
 636                 return 1;
 637
 638         /*
 639          * Attempt to insert the mmcfg resources but not with the busy flag
 640          * marked so it won't cause request errors when __request_region is
 641          * called.
 642          */
 643         pci_mmcfg_insert_resources();
 644
 645         return 0;
 646 }
 647
 648 /*
 649  * Perform MMCONFIG resource insertion after PCI initialization to allow for
 650  * misprogrammed MCFG tables that state larger sizes but actually conflict
 651  * with other system resources.
 652  */
 653 late_initcall(pci_mmcfg_late_insert_resources);