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ath9k: Fix memory leak due to failed PAPRD frames
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blob9040c2ff1909e0c82fc8d9983f81f3f14edbcf7f
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34 /*
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
44 */
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69 {
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105 /*
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
109 */
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217 {
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
226
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
229
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239 /*
240 * This is only performed if the channel settings have
241 * actually changed.
242 *
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
247 */
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
257
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
260
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
263
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
269
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 if (r) {
272 ath_err(common,
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
275 goto ps_restore;
276 }
277
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
280 r = -EIO;
281 goto ps_restore;
282 }
283
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
286
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 if (sc->sc_flags & SC_OP_BEACONS)
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
292 }
293
294 ps_restore:
295 spin_unlock_bh(&sc->sc_pcu_lock);
296
297 ath9k_ps_restore(sc);
298 return r;
299 }
300
301 static void ath_paprd_activate(struct ath_softc *sc)
302 {
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
306 int chain;
307
308 if (!caldata || !caldata->paprd_done)
309 return;
310
311 ath9k_ps_wakeup(sc);
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
315 continue;
316
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
318 }
319
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
322 }
323
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
325 {
326 struct ieee80211_hw *hw = sc->hw;
327 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328 struct ath_hw *ah = sc->sc_ah;
329 struct ath_common *common = ath9k_hw_common(ah);
330 struct ath_tx_control txctl;
331 int time_left;
332
333 memset(&txctl, 0, sizeof(txctl));
334 txctl.txq = sc->tx.txq_map[WME_AC_BE];
335
336 memset(tx_info, 0, sizeof(*tx_info));
337 tx_info->band = hw->conf.channel->band;
338 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
339 tx_info->control.rates[0].idx = 0;
340 tx_info->control.rates[0].count = 1;
341 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
342 tx_info->control.rates[1].idx = -1;
343
344 init_completion(&sc->paprd_complete);
345 sc->paprd_pending = true;
346 txctl.paprd = BIT(chain);
347
348 if (ath_tx_start(hw, skb, &txctl) != 0) {
349 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
350 dev_kfree_skb_any(skb);
351 return false;
352 }
353
354 time_left = wait_for_completion_timeout(&sc->paprd_complete,
355 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
356 sc->paprd_pending = false;
357
358 if (!time_left)
359 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
360 "Timeout waiting for paprd training on TX chain %d\n",
361 chain);
362
363 return !!time_left;
364 }
365
366 void ath_paprd_calibrate(struct work_struct *work)
367 {
368 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
369 struct ieee80211_hw *hw = sc->hw;
370 struct ath_hw *ah = sc->sc_ah;
371 struct ieee80211_hdr *hdr;
372 struct sk_buff *skb = NULL;
373 struct ath9k_hw_cal_data *caldata = ah->caldata;
374 struct ath_common *common = ath9k_hw_common(ah);
375 int ftype;
376 int chain_ok = 0;
377 int chain;
378 int len = 1800;
379
380 if (!caldata)
381 return;
382
383 if (ar9003_paprd_init_table(ah) < 0)
384 return;
385
386 skb = alloc_skb(len, GFP_KERNEL);
387 if (!skb)
388 return;
389
390 skb_put(skb, len);
391 memset(skb->data, 0, len);
392 hdr = (struct ieee80211_hdr *)skb->data;
393 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
394 hdr->frame_control = cpu_to_le16(ftype);
395 hdr->duration_id = cpu_to_le16(10);
396 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
397 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
398 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
399
400 ath9k_ps_wakeup(sc);
401 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
402 if (!(common->tx_chainmask & BIT(chain)))
403 continue;
404
405 chain_ok = 0;
406
407 ath_dbg(common, ATH_DBG_CALIBRATE,
408 "Sending PAPRD frame for thermal measurement "
409 "on chain %d\n", chain);
410 if (!ath_paprd_send_frame(sc, skb, chain))
411 goto fail_paprd;
412
413 ar9003_paprd_setup_gain_table(ah, chain);
414
415 ath_dbg(common, ATH_DBG_CALIBRATE,
416 "Sending PAPRD training frame on chain %d\n", chain);
417 if (!ath_paprd_send_frame(sc, skb, chain))
418 goto fail_paprd;
419
420 if (!ar9003_paprd_is_done(ah))
421 break;
422
423 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
424 break;
425
426 chain_ok = 1;
427 }
428 kfree_skb(skb);
429
430 if (chain_ok) {
431 caldata->paprd_done = true;
432 ath_paprd_activate(sc);
433 }
434
435 fail_paprd:
436 ath9k_ps_restore(sc);
437 }
438
439 /*
440 * This routine performs the periodic noise floor calibration function
441 * that is used to adjust and optimize the chip performance. This
442 * takes environmental changes (location, temperature) into account.
443 * When the task is complete, it reschedules itself depending on the
444 * appropriate interval that was calculated.
445 */
446 void ath_ani_calibrate(unsigned long data)
447 {
448 struct ath_softc *sc = (struct ath_softc *)data;
449 struct ath_hw *ah = sc->sc_ah;
450 struct ath_common *common = ath9k_hw_common(ah);
451 bool longcal = false;
452 bool shortcal = false;
453 bool aniflag = false;
454 unsigned int timestamp = jiffies_to_msecs(jiffies);
455 u32 cal_interval, short_cal_interval, long_cal_interval;
456 unsigned long flags;
457
458 if (ah->caldata && ah->caldata->nfcal_interference)
459 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
460 else
461 long_cal_interval = ATH_LONG_CALINTERVAL;
462
463 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
464 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
465
466 /* Only calibrate if awake */
467 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
468 goto set_timer;
469
470 ath9k_ps_wakeup(sc);
471
472 /* Long calibration runs independently of short calibration. */
473 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
474 longcal = true;
475 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
476 common->ani.longcal_timer = timestamp;
477 }
478
479 /* Short calibration applies only while caldone is false */
480 if (!common->ani.caldone) {
481 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
482 shortcal = true;
483 ath_dbg(common, ATH_DBG_ANI,
484 "shortcal @%lu\n", jiffies);
485 common->ani.shortcal_timer = timestamp;
486 common->ani.resetcal_timer = timestamp;
487 }
488 } else {
489 if ((timestamp - common->ani.resetcal_timer) >=
490 ATH_RESTART_CALINTERVAL) {
491 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
492 if (common->ani.caldone)
493 common->ani.resetcal_timer = timestamp;
494 }
495 }
496
497 /* Verify whether we must check ANI */
498 if ((timestamp - common->ani.checkani_timer) >=
499 ah->config.ani_poll_interval) {
500 aniflag = true;
501 common->ani.checkani_timer = timestamp;
502 }
503
504 /* Skip all processing if there's nothing to do. */
505 if (longcal || shortcal || aniflag) {
506 /* Call ANI routine if necessary */
507 if (aniflag) {
508 spin_lock_irqsave(&common->cc_lock, flags);
509 ath9k_hw_ani_monitor(ah, ah->curchan);
510 ath_update_survey_stats(sc);
511 spin_unlock_irqrestore(&common->cc_lock, flags);
512 }
513
514 /* Perform calibration if necessary */
515 if (longcal || shortcal) {
516 common->ani.caldone =
517 ath9k_hw_calibrate(ah,
518 ah->curchan,
519 common->rx_chainmask,
520 longcal);
521 }
522 }
523
524 ath9k_ps_restore(sc);
525
526 set_timer:
527 /*
528 * Set timer interval based on previous results.
529 * The interval must be the shortest necessary to satisfy ANI,
530 * short calibration and long calibration.
531 */
532 cal_interval = ATH_LONG_CALINTERVAL;
533 if (sc->sc_ah->config.enable_ani)
534 cal_interval = min(cal_interval,
535 (u32)ah->config.ani_poll_interval);
536 if (!common->ani.caldone)
537 cal_interval = min(cal_interval, (u32)short_cal_interval);
538
539 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
540 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
541 if (!ah->caldata->paprd_done)
542 ieee80211_queue_work(sc->hw, &sc->paprd_work);
543 else if (!ah->paprd_table_write_done)
544 ath_paprd_activate(sc);
545 }
546 }
547
548 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
549 {
550 struct ath_node *an;
551 struct ath_hw *ah = sc->sc_ah;
552 an = (struct ath_node *)sta->drv_priv;
553
554 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
555 sc->sc_flags |= SC_OP_ENABLE_APM;
556
557 if (sc->sc_flags & SC_OP_TXAGGR) {
558 ath_tx_node_init(sc, an);
559 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
560 sta->ht_cap.ampdu_factor);
561 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
562 }
563 }
564
565 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
566 {
567 struct ath_node *an = (struct ath_node *)sta->drv_priv;
568
569 if (sc->sc_flags & SC_OP_TXAGGR)
570 ath_tx_node_cleanup(sc, an);
571 }
572
573 void ath_hw_check(struct work_struct *work)
574 {
575 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
576 int i;
577
578 ath9k_ps_wakeup(sc);
579
580 for (i = 0; i < 3; i++) {
581 if (ath9k_hw_check_alive(sc->sc_ah))
582 goto out;
583
584 msleep(1);
585 }
586 ath_reset(sc, true);
587
588 out:
589 ath9k_ps_restore(sc);
590 }
591
592 void ath9k_tasklet(unsigned long data)
593 {
594 struct ath_softc *sc = (struct ath_softc *)data;
595 struct ath_hw *ah = sc->sc_ah;
596 struct ath_common *common = ath9k_hw_common(ah);
597
598 u32 status = sc->intrstatus;
599 u32 rxmask;
600
601 if (status & ATH9K_INT_FATAL) {
602 ath_reset(sc, true);
603 return;
604 }
605
606 ath9k_ps_wakeup(sc);
607 spin_lock(&sc->sc_pcu_lock);
608
609 if (!ath9k_hw_check_alive(ah))
610 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
611
612 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
613 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
614 ATH9K_INT_RXORN);
615 else
616 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
617
618 if (status & rxmask) {
619 /* Check for high priority Rx first */
620 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
621 (status & ATH9K_INT_RXHP))
622 ath_rx_tasklet(sc, 0, true);
623
624 ath_rx_tasklet(sc, 0, false);
625 }
626
627 if (status & ATH9K_INT_TX) {
628 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
629 ath_tx_edma_tasklet(sc);
630 else
631 ath_tx_tasklet(sc);
632 }
633
634 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
635 /*
636 * TSF sync does not look correct; remain awake to sync with
637 * the next Beacon.
638 */
639 ath_dbg(common, ATH_DBG_PS,
640 "TSFOOR - Sync with next Beacon\n");
641 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
642 }
643
644 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
645 if (status & ATH9K_INT_GENTIMER)
646 ath_gen_timer_isr(sc->sc_ah);
647
648 /* re-enable hardware interrupt */
649 ath9k_hw_enable_interrupts(ah);
650
651 spin_unlock(&sc->sc_pcu_lock);
652 ath9k_ps_restore(sc);
653 }
654
655 irqreturn_t ath_isr(int irq, void *dev)
656 {
657 #define SCHED_INTR ( \
658 ATH9K_INT_FATAL | \
659 ATH9K_INT_RXORN | \
660 ATH9K_INT_RXEOL | \
661 ATH9K_INT_RX | \
662 ATH9K_INT_RXLP | \
663 ATH9K_INT_RXHP | \
664 ATH9K_INT_TX | \
665 ATH9K_INT_BMISS | \
666 ATH9K_INT_CST | \
667 ATH9K_INT_TSFOOR | \
668 ATH9K_INT_GENTIMER)
669
670 struct ath_softc *sc = dev;
671 struct ath_hw *ah = sc->sc_ah;
672 struct ath_common *common = ath9k_hw_common(ah);
673 enum ath9k_int status;
674 bool sched = false;
675
676 /*
677 * The hardware is not ready/present, don't
678 * touch anything. Note this can happen early
679 * on if the IRQ is shared.
680 */
681 if (sc->sc_flags & SC_OP_INVALID)
682 return IRQ_NONE;
683
684
685 /* shared irq, not for us */
686
687 if (!ath9k_hw_intrpend(ah))
688 return IRQ_NONE;
689
690 /*
691 * Figure out the reason(s) for the interrupt. Note
692 * that the hal returns a pseudo-ISR that may include
693 * bits we haven't explicitly enabled so we mask the
694 * value to insure we only process bits we requested.
695 */
696 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
697 status &= ah->imask; /* discard unasked-for bits */
698
699 /*
700 * If there are no status bits set, then this interrupt was not
701 * for me (should have been caught above).
702 */
703 if (!status)
704 return IRQ_NONE;
705
706 /* Cache the status */
707 sc->intrstatus = status;
708
709 if (status & SCHED_INTR)
710 sched = true;
711
712 /*
713 * If a FATAL or RXORN interrupt is received, we have to reset the
714 * chip immediately.
715 */
716 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
717 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
718 goto chip_reset;
719
720 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
721 (status & ATH9K_INT_BB_WATCHDOG)) {
722
723 spin_lock(&common->cc_lock);
724 ath_hw_cycle_counters_update(common);
725 ar9003_hw_bb_watchdog_dbg_info(ah);
726 spin_unlock(&common->cc_lock);
727
728 goto chip_reset;
729 }
730
731 if (status & ATH9K_INT_SWBA)
732 tasklet_schedule(&sc->bcon_tasklet);
733
734 if (status & ATH9K_INT_TXURN)
735 ath9k_hw_updatetxtriglevel(ah, true);
736
737 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
738 if (status & ATH9K_INT_RXEOL) {
739 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
740 ath9k_hw_set_interrupts(ah, ah->imask);
741 }
742 }
743
744 if (status & ATH9K_INT_MIB) {
745 /*
746 * Disable interrupts until we service the MIB
747 * interrupt; otherwise it will continue to
748 * fire.
749 */
750 ath9k_hw_disable_interrupts(ah);
751 /*
752 * Let the hal handle the event. We assume
753 * it will clear whatever condition caused
754 * the interrupt.
755 */
756 spin_lock(&common->cc_lock);
757 ath9k_hw_proc_mib_event(ah);
758 spin_unlock(&common->cc_lock);
759 ath9k_hw_enable_interrupts(ah);
760 }
761
762 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
763 if (status & ATH9K_INT_TIM_TIMER) {
764 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
765 goto chip_reset;
766 /* Clear RxAbort bit so that we can
767 * receive frames */
768 ath9k_setpower(sc, ATH9K_PM_AWAKE);
769 ath9k_hw_setrxabort(sc->sc_ah, 0);
770 sc->ps_flags |= PS_WAIT_FOR_BEACON;
771 }
772
773 chip_reset:
774
775 ath_debug_stat_interrupt(sc, status);
776
777 if (sched) {
778 /* turn off every interrupt */
779 ath9k_hw_disable_interrupts(ah);
780 tasklet_schedule(&sc->intr_tq);
781 }
782
783 return IRQ_HANDLED;
784
785 #undef SCHED_INTR
786 }
787
788 static u32 ath_get_extchanmode(struct ath_softc *sc,
789 struct ieee80211_channel *chan,
790 enum nl80211_channel_type channel_type)
791 {
792 u32 chanmode = 0;
793
794 switch (chan->band) {
795 case IEEE80211_BAND_2GHZ:
796 switch(channel_type) {
797 case NL80211_CHAN_NO_HT:
798 case NL80211_CHAN_HT20:
799 chanmode = CHANNEL_G_HT20;
800 break;
801 case NL80211_CHAN_HT40PLUS:
802 chanmode = CHANNEL_G_HT40PLUS;
803 break;
804 case NL80211_CHAN_HT40MINUS:
805 chanmode = CHANNEL_G_HT40MINUS;
806 break;
807 }
808 break;
809 case IEEE80211_BAND_5GHZ:
810 switch(channel_type) {
811 case NL80211_CHAN_NO_HT:
812 case NL80211_CHAN_HT20:
813 chanmode = CHANNEL_A_HT20;
814 break;
815 case NL80211_CHAN_HT40PLUS:
816 chanmode = CHANNEL_A_HT40PLUS;
817 break;
818 case NL80211_CHAN_HT40MINUS:
819 chanmode = CHANNEL_A_HT40MINUS;
820 break;
821 }
822 break;
823 default:
824 break;
825 }
826
827 return chanmode;
828 }
829
830 static void ath9k_bss_assoc_info(struct ath_softc *sc,
831 struct ieee80211_hw *hw,
832 struct ieee80211_vif *vif,
833 struct ieee80211_bss_conf *bss_conf)
834 {
835 struct ath_wiphy *aphy = hw->priv;
836 struct ath_hw *ah = sc->sc_ah;
837 struct ath_common *common = ath9k_hw_common(ah);
838
839 if (bss_conf->assoc) {
840 ath_dbg(common, ATH_DBG_CONFIG,
841 "Bss Info ASSOC %d, bssid: %pM\n",
842 bss_conf->aid, common->curbssid);
843
844 /* New association, store aid */
845 common->curaid = bss_conf->aid;
846 ath9k_hw_write_associd(ah);
847
848 /*
849 * Request a re-configuration of Beacon related timers
850 * on the receipt of the first Beacon frame (i.e.,
851 * after time sync with the AP).
852 */
853 sc->ps_flags |= PS_BEACON_SYNC;
854
855 /* Configure the beacon */
856 ath_beacon_config(sc, vif);
857
858 /* Reset rssi stats */
859 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
860 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
861
862 sc->sc_flags |= SC_OP_ANI_RUN;
863 ath_start_ani(common);
864 } else {
865 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
866 common->curaid = 0;
867 /* Stop ANI */
868 sc->sc_flags &= ~SC_OP_ANI_RUN;
869 del_timer_sync(&common->ani.timer);
870 }
871 }
872
873 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
874 {
875 struct ath_hw *ah = sc->sc_ah;
876 struct ath_common *common = ath9k_hw_common(ah);
877 struct ieee80211_channel *channel = hw->conf.channel;
878 int r;
879
880 ath9k_ps_wakeup(sc);
881 spin_lock_bh(&sc->sc_pcu_lock);
882
883 ath9k_hw_configpcipowersave(ah, 0, 0);
884
885 if (!ah->curchan)
886 ah->curchan = ath_get_curchannel(sc, sc->hw);
887
888 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
889 if (r) {
890 ath_err(common,
891 "Unable to reset channel (%u MHz), reset status %d\n",
892 channel->center_freq, r);
893 }
894
895 ath_update_txpow(sc);
896 if (ath_startrecv(sc) != 0) {
897 ath_err(common, "Unable to restart recv logic\n");
898 goto out;
899 }
900 if (sc->sc_flags & SC_OP_BEACONS)
901 ath_beacon_config(sc, NULL); /* restart beacons */
902
903 /* Re-Enable interrupts */
904 ath9k_hw_set_interrupts(ah, ah->imask);
905
906 /* Enable LED */
907 ath9k_hw_cfg_output(ah, ah->led_pin,
908 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
909 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
910
911 ieee80211_wake_queues(hw);
912 out:
913 spin_unlock_bh(&sc->sc_pcu_lock);
914
915 ath9k_ps_restore(sc);
916 }
917
918 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
919 {
920 struct ath_hw *ah = sc->sc_ah;
921 struct ieee80211_channel *channel = hw->conf.channel;
922 int r;
923
924 ath9k_ps_wakeup(sc);
925 spin_lock_bh(&sc->sc_pcu_lock);
926
927 ieee80211_stop_queues(hw);
928
929 /*
930 * Keep the LED on when the radio is disabled
931 * during idle unassociated state.
932 */
933 if (!sc->ps_idle) {
934 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
935 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
936 }
937
938 /* Disable interrupts */
939 ath9k_hw_disable_interrupts(ah);
940
941 ath_drain_all_txq(sc, false); /* clear pending tx frames */
942
943 ath_stoprecv(sc); /* turn off frame recv */
944 ath_flushrecv(sc); /* flush recv queue */
945
946 if (!ah->curchan)
947 ah->curchan = ath_get_curchannel(sc, hw);
948
949 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
950 if (r) {
951 ath_err(ath9k_hw_common(sc->sc_ah),
952 "Unable to reset channel (%u MHz), reset status %d\n",
953 channel->center_freq, r);
954 }
955
956 ath9k_hw_phy_disable(ah);
957
958 ath9k_hw_configpcipowersave(ah, 1, 1);
959
960 spin_unlock_bh(&sc->sc_pcu_lock);
961 ath9k_ps_restore(sc);
962 }
963
964 int ath_reset(struct ath_softc *sc, bool retry_tx)
965 {
966 struct ath_hw *ah = sc->sc_ah;
967 struct ath_common *common = ath9k_hw_common(ah);
968 struct ieee80211_hw *hw = sc->hw;
969 int r;
970
971 /* Stop ANI */
972 del_timer_sync(&common->ani.timer);
973
974 ath9k_ps_wakeup(sc);
975 spin_lock_bh(&sc->sc_pcu_lock);
976
977 ieee80211_stop_queues(hw);
978
979 ath9k_hw_disable_interrupts(ah);
980 ath_drain_all_txq(sc, retry_tx);
981
982 ath_stoprecv(sc);
983 ath_flushrecv(sc);
984
985 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
986 if (r)
987 ath_err(common,
988 "Unable to reset hardware; reset status %d\n", r);
989
990 if (ath_startrecv(sc) != 0)
991 ath_err(common, "Unable to start recv logic\n");
992
993 /*
994 * We may be doing a reset in response to a request
995 * that changes the channel so update any state that
996 * might change as a result.
997 */
998 ath_update_txpow(sc);
999
1000 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1001 ath_beacon_config(sc, NULL); /* restart beacons */
1002
1003 ath9k_hw_set_interrupts(ah, ah->imask);
1004
1005 if (retry_tx) {
1006 int i;
1007 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1008 if (ATH_TXQ_SETUP(sc, i)) {
1009 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1010 ath_txq_schedule(sc, &sc->tx.txq[i]);
1011 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1012 }
1013 }
1014 }
1015
1016 ieee80211_wake_queues(hw);
1017 spin_unlock_bh(&sc->sc_pcu_lock);
1018
1019 /* Start ANI */
1020 ath_start_ani(common);
1021 ath9k_ps_restore(sc);
1022
1023 return r;
1024 }
1025
1026 /* XXX: Remove me once we don't depend on ath9k_channel for all
1027 * this redundant data */
1028 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1029 struct ath9k_channel *ichan)
1030 {
1031 struct ieee80211_channel *chan = hw->conf.channel;
1032 struct ieee80211_conf *conf = &hw->conf;
1033
1034 ichan->channel = chan->center_freq;
1035 ichan->chan = chan;
1036
1037 if (chan->band == IEEE80211_BAND_2GHZ) {
1038 ichan->chanmode = CHANNEL_G;
1039 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1040 } else {
1041 ichan->chanmode = CHANNEL_A;
1042 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1043 }
1044
1045 if (conf_is_ht(conf))
1046 ichan->chanmode = ath_get_extchanmode(sc, chan,
1047 conf->channel_type);
1048 }
1049
1050 /**********************/
1051 /* mac80211 callbacks */
1052 /**********************/
1053
1054 static int ath9k_start(struct ieee80211_hw *hw)
1055 {
1056 struct ath_wiphy *aphy = hw->priv;
1057 struct ath_softc *sc = aphy->sc;
1058 struct ath_hw *ah = sc->sc_ah;
1059 struct ath_common *common = ath9k_hw_common(ah);
1060 struct ieee80211_channel *curchan = hw->conf.channel;
1061 struct ath9k_channel *init_channel;
1062 int r;
1063
1064 ath_dbg(common, ATH_DBG_CONFIG,
1065 "Starting driver with initial channel: %d MHz\n",
1066 curchan->center_freq);
1067
1068 mutex_lock(&sc->mutex);
1069
1070 if (ath9k_wiphy_started(sc)) {
1071 if (sc->chan_idx == curchan->hw_value) {
1072 /*
1073 * Already on the operational channel, the new wiphy
1074 * can be marked active.
1075 */
1076 aphy->state = ATH_WIPHY_ACTIVE;
1077 ieee80211_wake_queues(hw);
1078 } else {
1079 /*
1080 * Another wiphy is on another channel, start the new
1081 * wiphy in paused state.
1082 */
1083 aphy->state = ATH_WIPHY_PAUSED;
1084 ieee80211_stop_queues(hw);
1085 }
1086 mutex_unlock(&sc->mutex);
1087 return 0;
1088 }
1089 aphy->state = ATH_WIPHY_ACTIVE;
1090
1091 /* setup initial channel */
1092
1093 sc->chan_idx = curchan->hw_value;
1094
1095 init_channel = ath_get_curchannel(sc, hw);
1096
1097 /* Reset SERDES registers */
1098 ath9k_hw_configpcipowersave(ah, 0, 0);
1099
1100 /*
1101 * The basic interface to setting the hardware in a good
1102 * state is ``reset''. On return the hardware is known to
1103 * be powered up and with interrupts disabled. This must
1104 * be followed by initialization of the appropriate bits
1105 * and then setup of the interrupt mask.
1106 */
1107 spin_lock_bh(&sc->sc_pcu_lock);
1108 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1109 if (r) {
1110 ath_err(common,
1111 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1112 r, curchan->center_freq);
1113 spin_unlock_bh(&sc->sc_pcu_lock);
1114 goto mutex_unlock;
1115 }
1116
1117 /*
1118 * This is needed only to setup initial state
1119 * but it's best done after a reset.
1120 */
1121 ath_update_txpow(sc);
1122
1123 /*
1124 * Setup the hardware after reset:
1125 * The receive engine is set going.
1126 * Frame transmit is handled entirely
1127 * in the frame output path; there's nothing to do
1128 * here except setup the interrupt mask.
1129 */
1130 if (ath_startrecv(sc) != 0) {
1131 ath_err(common, "Unable to start recv logic\n");
1132 r = -EIO;
1133 spin_unlock_bh(&sc->sc_pcu_lock);
1134 goto mutex_unlock;
1135 }
1136 spin_unlock_bh(&sc->sc_pcu_lock);
1137
1138 /* Setup our intr mask. */
1139 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1140 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1141 ATH9K_INT_GLOBAL;
1142
1143 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1144 ah->imask |= ATH9K_INT_RXHP |
1145 ATH9K_INT_RXLP |
1146 ATH9K_INT_BB_WATCHDOG;
1147 else
1148 ah->imask |= ATH9K_INT_RX;
1149
1150 ah->imask |= ATH9K_INT_GTT;
1151
1152 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1153 ah->imask |= ATH9K_INT_CST;
1154
1155 sc->sc_flags &= ~SC_OP_INVALID;
1156 sc->sc_ah->is_monitoring = false;
1157
1158 /* Disable BMISS interrupt when we're not associated */
1159 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1160 ath9k_hw_set_interrupts(ah, ah->imask);
1161
1162 ieee80211_wake_queues(hw);
1163
1164 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1165
1166 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1167 !ah->btcoex_hw.enabled) {
1168 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1169 AR_STOMP_LOW_WLAN_WGHT);
1170 ath9k_hw_btcoex_enable(ah);
1171
1172 if (common->bus_ops->bt_coex_prep)
1173 common->bus_ops->bt_coex_prep(common);
1174 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1175 ath9k_btcoex_timer_resume(sc);
1176 }
1177
1178 /* User has the option to provide pm-qos value as a module
1179 * parameter rather than using the default value of
1180 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1181 */
1182 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1183
1184 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1185 common->bus_ops->extn_synch_en(common);
1186
1187 mutex_unlock:
1188 mutex_unlock(&sc->mutex);
1189
1190 return r;
1191 }
1192
1193 static int ath9k_tx(struct ieee80211_hw *hw,
1194 struct sk_buff *skb)
1195 {
1196 struct ath_wiphy *aphy = hw->priv;
1197 struct ath_softc *sc = aphy->sc;
1198 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1199 struct ath_tx_control txctl;
1200 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1201
1202 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1203 ath_dbg(common, ATH_DBG_XMIT,
1204 "ath9k: %s: TX in unexpected wiphy state %d\n",
1205 wiphy_name(hw->wiphy), aphy->state);
1206 goto exit;
1207 }
1208
1209 if (sc->ps_enabled) {
1210 /*
1211 * mac80211 does not set PM field for normal data frames, so we
1212 * need to update that based on the current PS mode.
1213 */
1214 if (ieee80211_is_data(hdr->frame_control) &&
1215 !ieee80211_is_nullfunc(hdr->frame_control) &&
1216 !ieee80211_has_pm(hdr->frame_control)) {
1217 ath_dbg(common, ATH_DBG_PS,
1218 "Add PM=1 for a TX frame while in PS mode\n");
1219 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1220 }
1221 }
1222
1223 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1224 /*
1225 * We are using PS-Poll and mac80211 can request TX while in
1226 * power save mode. Need to wake up hardware for the TX to be
1227 * completed and if needed, also for RX of buffered frames.
1228 */
1229 ath9k_ps_wakeup(sc);
1230 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1231 ath9k_hw_setrxabort(sc->sc_ah, 0);
1232 if (ieee80211_is_pspoll(hdr->frame_control)) {
1233 ath_dbg(common, ATH_DBG_PS,
1234 "Sending PS-Poll to pick a buffered frame\n");
1235 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1236 } else {
1237 ath_dbg(common, ATH_DBG_PS,
1238 "Wake up to complete TX\n");
1239 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1240 }
1241 /*
1242 * The actual restore operation will happen only after
1243 * the sc_flags bit is cleared. We are just dropping
1244 * the ps_usecount here.
1245 */
1246 ath9k_ps_restore(sc);
1247 }
1248
1249 memset(&txctl, 0, sizeof(struct ath_tx_control));
1250 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1251
1252 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1253
1254 if (ath_tx_start(hw, skb, &txctl) != 0) {
1255 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1256 goto exit;
1257 }
1258
1259 return 0;
1260 exit:
1261 dev_kfree_skb_any(skb);
1262 return 0;
1263 }
1264
1265 static void ath9k_stop(struct ieee80211_hw *hw)
1266 {
1267 struct ath_wiphy *aphy = hw->priv;
1268 struct ath_softc *sc = aphy->sc;
1269 struct ath_hw *ah = sc->sc_ah;
1270 struct ath_common *common = ath9k_hw_common(ah);
1271 int i;
1272
1273 mutex_lock(&sc->mutex);
1274
1275 aphy->state = ATH_WIPHY_INACTIVE;
1276
1277 if (led_blink)
1278 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1279
1280 cancel_delayed_work_sync(&sc->tx_complete_work);
1281 cancel_work_sync(&sc->paprd_work);
1282 cancel_work_sync(&sc->hw_check_work);
1283
1284 for (i = 0; i < sc->num_sec_wiphy; i++) {
1285 if (sc->sec_wiphy[i])
1286 break;
1287 }
1288
1289 if (i == sc->num_sec_wiphy) {
1290 cancel_delayed_work_sync(&sc->wiphy_work);
1291 cancel_work_sync(&sc->chan_work);
1292 }
1293
1294 if (sc->sc_flags & SC_OP_INVALID) {
1295 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1296 mutex_unlock(&sc->mutex);
1297 return;
1298 }
1299
1300 if (ath9k_wiphy_started(sc)) {
1301 mutex_unlock(&sc->mutex);
1302 return; /* another wiphy still in use */
1303 }
1304
1305 /* Ensure HW is awake when we try to shut it down. */
1306 ath9k_ps_wakeup(sc);
1307
1308 if (ah->btcoex_hw.enabled) {
1309 ath9k_hw_btcoex_disable(ah);
1310 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1311 ath9k_btcoex_timer_pause(sc);
1312 }
1313
1314 spin_lock_bh(&sc->sc_pcu_lock);
1315
1316 /* prevent tasklets to enable interrupts once we disable them */
1317 ah->imask &= ~ATH9K_INT_GLOBAL;
1318
1319 /* make sure h/w will not generate any interrupt
1320 * before setting the invalid flag. */
1321 ath9k_hw_disable_interrupts(ah);
1322
1323 if (!(sc->sc_flags & SC_OP_INVALID)) {
1324 ath_drain_all_txq(sc, false);
1325 ath_stoprecv(sc);
1326 ath9k_hw_phy_disable(ah);
1327 } else
1328 sc->rx.rxlink = NULL;
1329
1330 /* disable HAL and put h/w to sleep */
1331 ath9k_hw_disable(ah);
1332 ath9k_hw_configpcipowersave(ah, 1, 1);
1333
1334 spin_unlock_bh(&sc->sc_pcu_lock);
1335
1336 /* we can now sync irq and kill any running tasklets, since we already
1337 * disabled interrupts and not holding a spin lock */
1338 synchronize_irq(sc->irq);
1339 tasklet_kill(&sc->intr_tq);
1340 tasklet_kill(&sc->bcon_tasklet);
1341
1342 ath9k_ps_restore(sc);
1343
1344 sc->ps_idle = true;
1345 ath9k_set_wiphy_idle(aphy, true);
1346 ath_radio_disable(sc, hw);
1347
1348 sc->sc_flags |= SC_OP_INVALID;
1349
1350 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1351
1352 mutex_unlock(&sc->mutex);
1353
1354 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1355 }
1356
1357 static int ath9k_add_interface(struct ieee80211_hw *hw,
1358 struct ieee80211_vif *vif)
1359 {
1360 struct ath_wiphy *aphy = hw->priv;
1361 struct ath_softc *sc = aphy->sc;
1362 struct ath_hw *ah = sc->sc_ah;
1363 struct ath_common *common = ath9k_hw_common(ah);
1364 struct ath_vif *avp = (void *)vif->drv_priv;
1365 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1366 int ret = 0;
1367
1368 mutex_lock(&sc->mutex);
1369
1370 switch (vif->type) {
1371 case NL80211_IFTYPE_STATION:
1372 ic_opmode = NL80211_IFTYPE_STATION;
1373 break;
1374 case NL80211_IFTYPE_WDS:
1375 ic_opmode = NL80211_IFTYPE_WDS;
1376 break;
1377 case NL80211_IFTYPE_ADHOC:
1378 case NL80211_IFTYPE_AP:
1379 case NL80211_IFTYPE_MESH_POINT:
1380 if (sc->nbcnvifs >= ATH_BCBUF) {
1381 ret = -ENOBUFS;
1382 goto out;
1383 }
1384 ic_opmode = vif->type;
1385 break;
1386 default:
1387 ath_err(common, "Interface type %d not yet supported\n",
1388 vif->type);
1389 ret = -EOPNOTSUPP;
1390 goto out;
1391 }
1392
1393 ath_dbg(common, ATH_DBG_CONFIG,
1394 "Attach a VIF of type: %d\n", ic_opmode);
1395
1396 /* Set the VIF opmode */
1397 avp->av_opmode = ic_opmode;
1398 avp->av_bslot = -1;
1399
1400 sc->nvifs++;
1401
1402 ath9k_set_bssid_mask(hw, vif);
1403
1404 if (sc->nvifs > 1)
1405 goto out; /* skip global settings for secondary vif */
1406
1407 if (ic_opmode == NL80211_IFTYPE_AP) {
1408 ath9k_hw_set_tsfadjust(ah, 1);
1409 sc->sc_flags |= SC_OP_TSF_RESET;
1410 }
1411
1412 /* Set the device opmode */
1413 ah->opmode = ic_opmode;
1414
1415 /*
1416 * Enable MIB interrupts when there are hardware phy counters.
1417 * Note we only do this (at the moment) for station mode.
1418 */
1419 if ((vif->type == NL80211_IFTYPE_STATION) ||
1420 (vif->type == NL80211_IFTYPE_ADHOC) ||
1421 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1422 if (ah->config.enable_ani)
1423 ah->imask |= ATH9K_INT_MIB;
1424 ah->imask |= ATH9K_INT_TSFOOR;
1425 }
1426
1427 ath9k_hw_set_interrupts(ah, ah->imask);
1428
1429 if (vif->type == NL80211_IFTYPE_AP ||
1430 vif->type == NL80211_IFTYPE_ADHOC) {
1431 sc->sc_flags |= SC_OP_ANI_RUN;
1432 ath_start_ani(common);
1433 }
1434
1435 out:
1436 mutex_unlock(&sc->mutex);
1437 return ret;
1438 }
1439
1440 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1441 struct ieee80211_vif *vif)
1442 {
1443 struct ath_vif *avp = (void *)vif->drv_priv;
1444
1445 /* Disable SWBA interrupt */
1446 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1447 ath9k_ps_wakeup(sc);
1448 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1449 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1450 tasklet_kill(&sc->bcon_tasklet);
1451 ath9k_ps_restore(sc);
1452
1453 ath_beacon_return(sc, avp);
1454 sc->sc_flags &= ~SC_OP_BEACONS;
1455
1456 if (sc->nbcnvifs > 0) {
1457 /* Re-enable beaconing */
1458 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1459 ath9k_ps_wakeup(sc);
1460 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1461 ath9k_ps_restore(sc);
1462 }
1463 }
1464
1465 static int ath9k_change_interface(struct ieee80211_hw *hw,
1466 struct ieee80211_vif *vif,
1467 enum nl80211_iftype new_type,
1468 bool p2p)
1469 {
1470 struct ath_wiphy *aphy = hw->priv;
1471 struct ath_softc *sc = aphy->sc;
1472 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1473 int ret = 0;
1474
1475 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1476 mutex_lock(&sc->mutex);
1477
1478 switch (new_type) {
1479 case NL80211_IFTYPE_AP:
1480 case NL80211_IFTYPE_ADHOC:
1481 if (sc->nbcnvifs >= ATH_BCBUF) {
1482 ath_err(common, "No beacon slot available\n");
1483 ret = -ENOBUFS;
1484 goto out;
1485 }
1486 break;
1487 case NL80211_IFTYPE_STATION:
1488 /* Stop ANI */
1489 sc->sc_flags &= ~SC_OP_ANI_RUN;
1490 del_timer_sync(&common->ani.timer);
1491 if ((vif->type == NL80211_IFTYPE_AP) ||
1492 (vif->type == NL80211_IFTYPE_ADHOC))
1493 ath9k_reclaim_beacon(sc, vif);
1494 break;
1495 default:
1496 ath_err(common, "Interface type %d not yet supported\n",
1497 vif->type);
1498 ret = -ENOTSUPP;
1499 goto out;
1500 }
1501 vif->type = new_type;
1502 vif->p2p = p2p;
1503
1504 out:
1505 mutex_unlock(&sc->mutex);
1506 return ret;
1507 }
1508
1509 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1510 struct ieee80211_vif *vif)
1511 {
1512 struct ath_wiphy *aphy = hw->priv;
1513 struct ath_softc *sc = aphy->sc;
1514 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1515
1516 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1517
1518 mutex_lock(&sc->mutex);
1519
1520 /* Stop ANI */
1521 sc->sc_flags &= ~SC_OP_ANI_RUN;
1522 del_timer_sync(&common->ani.timer);
1523
1524 /* Reclaim beacon resources */
1525 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1526 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1527 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1528 ath9k_reclaim_beacon(sc, vif);
1529
1530 sc->nvifs--;
1531
1532 mutex_unlock(&sc->mutex);
1533 }
1534
1535 static void ath9k_enable_ps(struct ath_softc *sc)
1536 {
1537 struct ath_hw *ah = sc->sc_ah;
1538
1539 sc->ps_enabled = true;
1540 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1541 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1542 ah->imask |= ATH9K_INT_TIM_TIMER;
1543 ath9k_hw_set_interrupts(ah, ah->imask);
1544 }
1545 ath9k_hw_setrxabort(ah, 1);
1546 }
1547 }
1548
1549 static void ath9k_disable_ps(struct ath_softc *sc)
1550 {
1551 struct ath_hw *ah = sc->sc_ah;
1552
1553 sc->ps_enabled = false;
1554 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1555 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1556 ath9k_hw_setrxabort(ah, 0);
1557 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1558 PS_WAIT_FOR_CAB |
1559 PS_WAIT_FOR_PSPOLL_DATA |
1560 PS_WAIT_FOR_TX_ACK);
1561 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1562 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1563 ath9k_hw_set_interrupts(ah, ah->imask);
1564 }
1565 }
1566
1567 }
1568
1569 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1570 {
1571 struct ath_wiphy *aphy = hw->priv;
1572 struct ath_softc *sc = aphy->sc;
1573 struct ath_hw *ah = sc->sc_ah;
1574 struct ath_common *common = ath9k_hw_common(ah);
1575 struct ieee80211_conf *conf = &hw->conf;
1576 bool disable_radio;
1577
1578 mutex_lock(&sc->mutex);
1579
1580 /*
1581 * Leave this as the first check because we need to turn on the
1582 * radio if it was disabled before prior to processing the rest
1583 * of the changes. Likewise we must only disable the radio towards
1584 * the end.
1585 */
1586 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1587 bool enable_radio;
1588 bool all_wiphys_idle;
1589 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1590
1591 spin_lock_bh(&sc->wiphy_lock);
1592 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1593 ath9k_set_wiphy_idle(aphy, idle);
1594
1595 enable_radio = (!idle && all_wiphys_idle);
1596
1597 /*
1598 * After we unlock here its possible another wiphy
1599 * can be re-renabled so to account for that we will
1600 * only disable the radio toward the end of this routine
1601 * if by then all wiphys are still idle.
1602 */
1603 spin_unlock_bh(&sc->wiphy_lock);
1604
1605 if (enable_radio) {
1606 sc->ps_idle = false;
1607 ath_radio_enable(sc, hw);
1608 ath_dbg(common, ATH_DBG_CONFIG,
1609 "not-idle: enabling radio\n");
1610 }
1611 }
1612
1613 /*
1614 * We just prepare to enable PS. We have to wait until our AP has
1615 * ACK'd our null data frame to disable RX otherwise we'll ignore
1616 * those ACKs and end up retransmitting the same null data frames.
1617 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1618 */
1619 if (changed & IEEE80211_CONF_CHANGE_PS) {
1620 unsigned long flags;
1621 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1622 if (conf->flags & IEEE80211_CONF_PS)
1623 ath9k_enable_ps(sc);
1624 else
1625 ath9k_disable_ps(sc);
1626 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1627 }
1628
1629 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1630 if (conf->flags & IEEE80211_CONF_MONITOR) {
1631 ath_dbg(common, ATH_DBG_CONFIG,
1632 "Monitor mode is enabled\n");
1633 sc->sc_ah->is_monitoring = true;
1634 } else {
1635 ath_dbg(common, ATH_DBG_CONFIG,
1636 "Monitor mode is disabled\n");
1637 sc->sc_ah->is_monitoring = false;
1638 }
1639 }
1640
1641 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1642 struct ieee80211_channel *curchan = hw->conf.channel;
1643 int pos = curchan->hw_value;
1644 int old_pos = -1;
1645 unsigned long flags;
1646
1647 if (ah->curchan)
1648 old_pos = ah->curchan - &ah->channels[0];
1649
1650 aphy->chan_idx = pos;
1651 aphy->chan_is_ht = conf_is_ht(conf);
1652 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1653 sc->sc_flags |= SC_OP_OFFCHANNEL;
1654 else
1655 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1656
1657 if (aphy->state == ATH_WIPHY_SCAN ||
1658 aphy->state == ATH_WIPHY_ACTIVE)
1659 ath9k_wiphy_pause_all_forced(sc, aphy);
1660 else {
1661 /*
1662 * Do not change operational channel based on a paused
1663 * wiphy changes.
1664 */
1665 goto skip_chan_change;
1666 }
1667
1668 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1669 curchan->center_freq);
1670
1671 /* XXX: remove me eventualy */
1672 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1673
1674 /* update survey stats for the old channel before switching */
1675 spin_lock_irqsave(&common->cc_lock, flags);
1676 ath_update_survey_stats(sc);
1677 spin_unlock_irqrestore(&common->cc_lock, flags);
1678
1679 /*
1680 * If the operating channel changes, change the survey in-use flags
1681 * along with it.
1682 * Reset the survey data for the new channel, unless we're switching
1683 * back to the operating channel from an off-channel operation.
1684 */
1685 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1686 sc->cur_survey != &sc->survey[pos]) {
1687
1688 if (sc->cur_survey)
1689 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1690
1691 sc->cur_survey = &sc->survey[pos];
1692
1693 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1694 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1695 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1696 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1697 }
1698
1699 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1700 ath_err(common, "Unable to set channel\n");
1701 mutex_unlock(&sc->mutex);
1702 return -EINVAL;
1703 }
1704
1705 /*
1706 * The most recent snapshot of channel->noisefloor for the old
1707 * channel is only available after the hardware reset. Copy it to
1708 * the survey stats now.
1709 */
1710 if (old_pos >= 0)
1711 ath_update_survey_nf(sc, old_pos);
1712 }
1713
1714 skip_chan_change:
1715 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1716 sc->config.txpowlimit = 2 * conf->power_level;
1717 ath9k_ps_wakeup(sc);
1718 ath_update_txpow(sc);
1719 ath9k_ps_restore(sc);
1720 }
1721
1722 spin_lock_bh(&sc->wiphy_lock);
1723 disable_radio = ath9k_all_wiphys_idle(sc);
1724 spin_unlock_bh(&sc->wiphy_lock);
1725
1726 if (disable_radio) {
1727 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1728 sc->ps_idle = true;
1729 ath_radio_disable(sc, hw);
1730 }
1731
1732 mutex_unlock(&sc->mutex);
1733
1734 return 0;
1735 }
1736
1737 #define SUPPORTED_FILTERS \
1738 (FIF_PROMISC_IN_BSS | \
1739 FIF_ALLMULTI | \
1740 FIF_CONTROL | \
1741 FIF_PSPOLL | \
1742 FIF_OTHER_BSS | \
1743 FIF_BCN_PRBRESP_PROMISC | \
1744 FIF_PROBE_REQ | \
1745 FIF_FCSFAIL)
1746
1747 /* FIXME: sc->sc_full_reset ? */
1748 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1749 unsigned int changed_flags,
1750 unsigned int *total_flags,
1751 u64 multicast)
1752 {
1753 struct ath_wiphy *aphy = hw->priv;
1754 struct ath_softc *sc = aphy->sc;
1755 u32 rfilt;
1756
1757 changed_flags &= SUPPORTED_FILTERS;
1758 *total_flags &= SUPPORTED_FILTERS;
1759
1760 sc->rx.rxfilter = *total_flags;
1761 ath9k_ps_wakeup(sc);
1762 rfilt = ath_calcrxfilter(sc);
1763 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1764 ath9k_ps_restore(sc);
1765
1766 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1767 "Set HW RX filter: 0x%x\n", rfilt);
1768 }
1769
1770 static int ath9k_sta_add(struct ieee80211_hw *hw,
1771 struct ieee80211_vif *vif,
1772 struct ieee80211_sta *sta)
1773 {
1774 struct ath_wiphy *aphy = hw->priv;
1775 struct ath_softc *sc = aphy->sc;
1776
1777 ath_node_attach(sc, sta);
1778
1779 return 0;
1780 }
1781
1782 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1783 struct ieee80211_vif *vif,
1784 struct ieee80211_sta *sta)
1785 {
1786 struct ath_wiphy *aphy = hw->priv;
1787 struct ath_softc *sc = aphy->sc;
1788
1789 ath_node_detach(sc, sta);
1790
1791 return 0;
1792 }
1793
1794 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1795 const struct ieee80211_tx_queue_params *params)
1796 {
1797 struct ath_wiphy *aphy = hw->priv;
1798 struct ath_softc *sc = aphy->sc;
1799 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1800 struct ath_txq *txq;
1801 struct ath9k_tx_queue_info qi;
1802 int ret = 0;
1803
1804 if (queue >= WME_NUM_AC)
1805 return 0;
1806
1807 txq = sc->tx.txq_map[queue];
1808
1809 mutex_lock(&sc->mutex);
1810
1811 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1812
1813 qi.tqi_aifs = params->aifs;
1814 qi.tqi_cwmin = params->cw_min;
1815 qi.tqi_cwmax = params->cw_max;
1816 qi.tqi_burstTime = params->txop;
1817
1818 ath_dbg(common, ATH_DBG_CONFIG,
1819 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1820 queue, txq->axq_qnum, params->aifs, params->cw_min,
1821 params->cw_max, params->txop);
1822
1823 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1824 if (ret)
1825 ath_err(common, "TXQ Update failed\n");
1826
1827 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1828 if (queue == WME_AC_BE && !ret)
1829 ath_beaconq_config(sc);
1830
1831 mutex_unlock(&sc->mutex);
1832
1833 return ret;
1834 }
1835
1836 static int ath9k_set_key(struct ieee80211_hw *hw,
1837 enum set_key_cmd cmd,
1838 struct ieee80211_vif *vif,
1839 struct ieee80211_sta *sta,
1840 struct ieee80211_key_conf *key)
1841 {
1842 struct ath_wiphy *aphy = hw->priv;
1843 struct ath_softc *sc = aphy->sc;
1844 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1845 int ret = 0;
1846
1847 if (ath9k_modparam_nohwcrypt)
1848 return -ENOSPC;
1849
1850 mutex_lock(&sc->mutex);
1851 ath9k_ps_wakeup(sc);
1852 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1853
1854 switch (cmd) {
1855 case SET_KEY:
1856 ret = ath_key_config(common, vif, sta, key);
1857 if (ret >= 0) {
1858 key->hw_key_idx = ret;
1859 /* push IV and Michael MIC generation to stack */
1860 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1861 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1862 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1863 if (sc->sc_ah->sw_mgmt_crypto &&
1864 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1865 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1866 ret = 0;
1867 }
1868 break;
1869 case DISABLE_KEY:
1870 ath_key_delete(common, key);
1871 break;
1872 default:
1873 ret = -EINVAL;
1874 }
1875
1876 ath9k_ps_restore(sc);
1877 mutex_unlock(&sc->mutex);
1878
1879 return ret;
1880 }
1881
1882 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1883 struct ieee80211_vif *vif,
1884 struct ieee80211_bss_conf *bss_conf,
1885 u32 changed)
1886 {
1887 struct ath_wiphy *aphy = hw->priv;
1888 struct ath_softc *sc = aphy->sc;
1889 struct ath_hw *ah = sc->sc_ah;
1890 struct ath_common *common = ath9k_hw_common(ah);
1891 struct ath_vif *avp = (void *)vif->drv_priv;
1892 int slottime;
1893 int error;
1894
1895 mutex_lock(&sc->mutex);
1896
1897 if (changed & BSS_CHANGED_BSSID) {
1898 /* Set BSSID */
1899 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1900 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1901 common->curaid = 0;
1902 ath9k_hw_write_associd(ah);
1903
1904 /* Set aggregation protection mode parameters */
1905 sc->config.ath_aggr_prot = 0;
1906
1907 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1908 common->curbssid, common->curaid);
1909
1910 /* need to reconfigure the beacon */
1911 sc->sc_flags &= ~SC_OP_BEACONS ;
1912 }
1913
1914 /* Enable transmission of beacons (AP, IBSS, MESH) */
1915 if ((changed & BSS_CHANGED_BEACON) ||
1916 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1917 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1918 error = ath_beacon_alloc(aphy, vif);
1919 if (!error)
1920 ath_beacon_config(sc, vif);
1921 }
1922
1923 if (changed & BSS_CHANGED_ERP_SLOT) {
1924 if (bss_conf->use_short_slot)
1925 slottime = 9;
1926 else
1927 slottime = 20;
1928 if (vif->type == NL80211_IFTYPE_AP) {
1929 /*
1930 * Defer update, so that connected stations can adjust
1931 * their settings at the same time.
1932 * See beacon.c for more details
1933 */
1934 sc->beacon.slottime = slottime;
1935 sc->beacon.updateslot = UPDATE;
1936 } else {
1937 ah->slottime = slottime;
1938 ath9k_hw_init_global_settings(ah);
1939 }
1940 }
1941
1942 /* Disable transmission of beacons */
1943 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1944 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1945
1946 if (changed & BSS_CHANGED_BEACON_INT) {
1947 sc->beacon_interval = bss_conf->beacon_int;
1948 /*
1949 * In case of AP mode, the HW TSF has to be reset
1950 * when the beacon interval changes.
1951 */
1952 if (vif->type == NL80211_IFTYPE_AP) {
1953 sc->sc_flags |= SC_OP_TSF_RESET;
1954 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1955 error = ath_beacon_alloc(aphy, vif);
1956 if (!error)
1957 ath_beacon_config(sc, vif);
1958 } else {
1959 ath_beacon_config(sc, vif);
1960 }
1961 }
1962
1963 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1964 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1965 bss_conf->use_short_preamble);
1966 if (bss_conf->use_short_preamble)
1967 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1968 else
1969 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1970 }
1971
1972 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1973 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1974 bss_conf->use_cts_prot);
1975 if (bss_conf->use_cts_prot &&
1976 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1977 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1978 else
1979 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1980 }
1981
1982 if (changed & BSS_CHANGED_ASSOC) {
1983 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1984 bss_conf->assoc);
1985 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1986 }
1987
1988 mutex_unlock(&sc->mutex);
1989 }
1990
1991 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1992 {
1993 u64 tsf;
1994 struct ath_wiphy *aphy = hw->priv;
1995 struct ath_softc *sc = aphy->sc;
1996
1997 mutex_lock(&sc->mutex);
1998 ath9k_ps_wakeup(sc);
1999 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2000 ath9k_ps_restore(sc);
2001 mutex_unlock(&sc->mutex);
2002
2003 return tsf;
2004 }
2005
2006 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2007 {
2008 struct ath_wiphy *aphy = hw->priv;
2009 struct ath_softc *sc = aphy->sc;
2010
2011 mutex_lock(&sc->mutex);
2012 ath9k_ps_wakeup(sc);
2013 ath9k_hw_settsf64(sc->sc_ah, tsf);
2014 ath9k_ps_restore(sc);
2015 mutex_unlock(&sc->mutex);
2016 }
2017
2018 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2019 {
2020 struct ath_wiphy *aphy = hw->priv;
2021 struct ath_softc *sc = aphy->sc;
2022
2023 mutex_lock(&sc->mutex);
2024
2025 ath9k_ps_wakeup(sc);
2026 ath9k_hw_reset_tsf(sc->sc_ah);
2027 ath9k_ps_restore(sc);
2028
2029 mutex_unlock(&sc->mutex);
2030 }
2031
2032 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2033 struct ieee80211_vif *vif,
2034 enum ieee80211_ampdu_mlme_action action,
2035 struct ieee80211_sta *sta,
2036 u16 tid, u16 *ssn)
2037 {
2038 struct ath_wiphy *aphy = hw->priv;
2039 struct ath_softc *sc = aphy->sc;
2040 int ret = 0;
2041
2042 local_bh_disable();
2043
2044 switch (action) {
2045 case IEEE80211_AMPDU_RX_START:
2046 if (!(sc->sc_flags & SC_OP_RXAGGR))
2047 ret = -ENOTSUPP;
2048 break;
2049 case IEEE80211_AMPDU_RX_STOP:
2050 break;
2051 case IEEE80211_AMPDU_TX_START:
2052 if (!(sc->sc_flags & SC_OP_TXAGGR))
2053 return -EOPNOTSUPP;
2054
2055 ath9k_ps_wakeup(sc);
2056 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2057 if (!ret)
2058 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2059 ath9k_ps_restore(sc);
2060 break;
2061 case IEEE80211_AMPDU_TX_STOP:
2062 ath9k_ps_wakeup(sc);
2063 ath_tx_aggr_stop(sc, sta, tid);
2064 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2065 ath9k_ps_restore(sc);
2066 break;
2067 case IEEE80211_AMPDU_TX_OPERATIONAL:
2068 ath9k_ps_wakeup(sc);
2069 ath_tx_aggr_resume(sc, sta, tid);
2070 ath9k_ps_restore(sc);
2071 break;
2072 default:
2073 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2074 }
2075
2076 local_bh_enable();
2077
2078 return ret;
2079 }
2080
2081 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2082 struct survey_info *survey)
2083 {
2084 struct ath_wiphy *aphy = hw->priv;
2085 struct ath_softc *sc = aphy->sc;
2086 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2087 struct ieee80211_supported_band *sband;
2088 struct ieee80211_channel *chan;
2089 unsigned long flags;
2090 int pos;
2091
2092 spin_lock_irqsave(&common->cc_lock, flags);
2093 if (idx == 0)
2094 ath_update_survey_stats(sc);
2095
2096 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2097 if (sband && idx >= sband->n_channels) {
2098 idx -= sband->n_channels;
2099 sband = NULL;
2100 }
2101
2102 if (!sband)
2103 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2104
2105 if (!sband || idx >= sband->n_channels) {
2106 spin_unlock_irqrestore(&common->cc_lock, flags);
2107 return -ENOENT;
2108 }
2109
2110 chan = &sband->channels[idx];
2111 pos = chan->hw_value;
2112 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2113 survey->channel = chan;
2114 spin_unlock_irqrestore(&common->cc_lock, flags);
2115
2116 return 0;
2117 }
2118
2119 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2120 {
2121 struct ath_wiphy *aphy = hw->priv;
2122 struct ath_softc *sc = aphy->sc;
2123
2124 mutex_lock(&sc->mutex);
2125 if (ath9k_wiphy_scanning(sc)) {
2126 /*
2127 * There is a race here in mac80211 but fixing it requires
2128 * we revisit how we handle the scan complete callback.
2129 * After mac80211 fixes we will not have configured hardware
2130 * to the home channel nor would we have configured the RX
2131 * filter yet.
2132 */
2133 mutex_unlock(&sc->mutex);
2134 return;
2135 }
2136
2137 aphy->state = ATH_WIPHY_SCAN;
2138 ath9k_wiphy_pause_all_forced(sc, aphy);
2139 mutex_unlock(&sc->mutex);
2140 }
2141
2142 /*
2143 * XXX: this requires a revisit after the driver
2144 * scan_complete gets moved to another place/removed in mac80211.
2145 */
2146 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2147 {
2148 struct ath_wiphy *aphy = hw->priv;
2149 struct ath_softc *sc = aphy->sc;
2150
2151 mutex_lock(&sc->mutex);
2152 aphy->state = ATH_WIPHY_ACTIVE;
2153 mutex_unlock(&sc->mutex);
2154 }
2155
2156 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2157 {
2158 struct ath_wiphy *aphy = hw->priv;
2159 struct ath_softc *sc = aphy->sc;
2160 struct ath_hw *ah = sc->sc_ah;
2161
2162 mutex_lock(&sc->mutex);
2163 ah->coverage_class = coverage_class;
2164 ath9k_hw_init_global_settings(ah);
2165 mutex_unlock(&sc->mutex);
2166 }
2167
2168 struct ieee80211_ops ath9k_ops = {
2169 .tx = ath9k_tx,
2170 .start = ath9k_start,
2171 .stop = ath9k_stop,
2172 .add_interface = ath9k_add_interface,
2173 .change_interface = ath9k_change_interface,
2174 .remove_interface = ath9k_remove_interface,
2175 .config = ath9k_config,
2176 .configure_filter = ath9k_configure_filter,
2177 .sta_add = ath9k_sta_add,
2178 .sta_remove = ath9k_sta_remove,
2179 .conf_tx = ath9k_conf_tx,
2180 .bss_info_changed = ath9k_bss_info_changed,
2181 .set_key = ath9k_set_key,
2182 .get_tsf = ath9k_get_tsf,
2183 .set_tsf = ath9k_set_tsf,
2184 .reset_tsf = ath9k_reset_tsf,
2185 .ampdu_action = ath9k_ampdu_action,
2186 .get_survey = ath9k_get_survey,
2187 .sw_scan_start = ath9k_sw_scan_start,
2188 .sw_scan_complete = ath9k_sw_scan_complete,
2189 .rfkill_poll = ath9k_rfkill_poll_state,
2190 .set_coverage_class = ath9k_set_coverage_class,
2191 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree