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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / rtc / rtc-s3c.c
blob637b012007aa7c0a54b51b06091f8fc78cc313a5
1 /* drivers/rtc/rtc-s3c.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
17 #include <linux/module.h>
18 #include <linux/fs.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/rtc.h>
24 #include <linux/bcd.h>
25 #include <linux/clk.h>
26 #include <linux/log2.h>
27 #include <linux/slab.h>
29 #include <mach/hardware.h>
30 #include <asm/uaccess.h>
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <plat/regs-rtc.h>
35 enum s3c_cpu_type {
36 TYPE_S3C2410,
37 TYPE_S3C64XX,
40 /* I have yet to find an S3C implementation with more than one
41 * of these rtc blocks in */
43 static struct resource *s3c_rtc_mem;
45 static struct clk *rtc_clk;
46 static void __iomem *s3c_rtc_base;
47 static int s3c_rtc_alarmno = NO_IRQ;
48 static int s3c_rtc_tickno = NO_IRQ;
49 static bool wake_en;
50 static enum s3c_cpu_type s3c_rtc_cpu_type;
52 static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
54 /* IRQ Handlers */
56 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
58 struct rtc_device *rdev = id;
60 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
62 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
63 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
65 return IRQ_HANDLED;
68 static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
70 struct rtc_device *rdev = id;
72 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
74 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
75 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
77 return IRQ_HANDLED;
80 /* Update control registers */
81 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
83 unsigned int tmp;
85 pr_debug("%s: aie=%d\n", __func__, enabled);
87 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
89 if (enabled)
90 tmp |= S3C2410_RTCALM_ALMEN;
92 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
94 return 0;
97 static int s3c_rtc_setpie(struct device *dev, int enabled)
99 unsigned int tmp;
101 pr_debug("%s: pie=%d\n", __func__, enabled);
103 spin_lock_irq(&s3c_rtc_pie_lock);
105 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
106 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
107 tmp &= ~S3C64XX_RTCCON_TICEN;
109 if (enabled)
110 tmp |= S3C64XX_RTCCON_TICEN;
112 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
113 } else {
114 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
115 tmp &= ~S3C2410_TICNT_ENABLE;
117 if (enabled)
118 tmp |= S3C2410_TICNT_ENABLE;
120 writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
123 spin_unlock_irq(&s3c_rtc_pie_lock);
125 return 0;
128 static int s3c_rtc_setfreq(struct device *dev, int freq)
130 struct platform_device *pdev = to_platform_device(dev);
131 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
132 unsigned int tmp = 0;
134 if (!is_power_of_2(freq))
135 return -EINVAL;
137 spin_lock_irq(&s3c_rtc_pie_lock);
139 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
140 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
141 tmp &= S3C2410_TICNT_ENABLE;
144 tmp |= (rtc_dev->max_user_freq / freq)-1;
146 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
147 spin_unlock_irq(&s3c_rtc_pie_lock);
149 return 0;
152 /* Time read/write */
154 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
156 unsigned int have_retried = 0;
157 void __iomem *base = s3c_rtc_base;
159 retry_get_time:
160 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
161 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
162 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
163 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
164 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
165 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
167 /* the only way to work out wether the system was mid-update
168 * when we read it is to check the second counter, and if it
169 * is zero, then we re-try the entire read
172 if (rtc_tm->tm_sec == 0 && !have_retried) {
173 have_retried = 1;
174 goto retry_get_time;
177 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
178 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
179 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
181 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
182 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
183 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
184 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
185 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
186 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
188 rtc_tm->tm_year += 100;
189 rtc_tm->tm_mon -= 1;
191 return rtc_valid_tm(rtc_tm);
194 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
196 void __iomem *base = s3c_rtc_base;
197 int year = tm->tm_year - 100;
199 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
200 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
201 tm->tm_hour, tm->tm_min, tm->tm_sec);
203 /* we get around y2k by simply not supporting it */
205 if (year < 0 || year >= 100) {
206 dev_err(dev, "rtc only supports 100 years\n");
207 return -EINVAL;
210 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
211 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
212 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
213 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
214 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
215 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
217 return 0;
220 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
222 struct rtc_time *alm_tm = &alrm->time;
223 void __iomem *base = s3c_rtc_base;
224 unsigned int alm_en;
226 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
227 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
228 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
229 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
230 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
231 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
233 alm_en = readb(base + S3C2410_RTCALM);
235 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
237 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
238 alm_en,
239 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
240 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
243 /* decode the alarm enable field */
245 if (alm_en & S3C2410_RTCALM_SECEN)
246 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
247 else
248 alm_tm->tm_sec = -1;
250 if (alm_en & S3C2410_RTCALM_MINEN)
251 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
252 else
253 alm_tm->tm_min = -1;
255 if (alm_en & S3C2410_RTCALM_HOUREN)
256 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
257 else
258 alm_tm->tm_hour = -1;
260 if (alm_en & S3C2410_RTCALM_DAYEN)
261 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
262 else
263 alm_tm->tm_mday = -1;
265 if (alm_en & S3C2410_RTCALM_MONEN) {
266 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
267 alm_tm->tm_mon -= 1;
268 } else {
269 alm_tm->tm_mon = -1;
272 if (alm_en & S3C2410_RTCALM_YEAREN)
273 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
274 else
275 alm_tm->tm_year = -1;
277 return 0;
280 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
282 struct rtc_time *tm = &alrm->time;
283 void __iomem *base = s3c_rtc_base;
284 unsigned int alrm_en;
286 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
287 alrm->enabled,
288 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
289 tm->tm_hour, tm->tm_min, tm->tm_sec);
292 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
293 writeb(0x00, base + S3C2410_RTCALM);
295 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
296 alrm_en |= S3C2410_RTCALM_SECEN;
297 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
300 if (tm->tm_min < 60 && tm->tm_min >= 0) {
301 alrm_en |= S3C2410_RTCALM_MINEN;
302 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
305 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
306 alrm_en |= S3C2410_RTCALM_HOUREN;
307 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
310 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
312 writeb(alrm_en, base + S3C2410_RTCALM);
314 s3c_rtc_setaie(dev, alrm->enabled);
316 return 0;
319 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
321 unsigned int ticnt;
323 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
324 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
325 ticnt &= S3C64XX_RTCCON_TICEN;
326 } else {
327 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
328 ticnt &= S3C2410_TICNT_ENABLE;
331 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
332 return 0;
335 static int s3c_rtc_open(struct device *dev)
337 struct platform_device *pdev = to_platform_device(dev);
338 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
339 int ret;
341 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
342 IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
344 if (ret) {
345 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
346 return ret;
349 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
350 IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
352 if (ret) {
353 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
354 goto tick_err;
357 return ret;
359 tick_err:
360 free_irq(s3c_rtc_alarmno, rtc_dev);
361 return ret;
364 static void s3c_rtc_release(struct device *dev)
366 struct platform_device *pdev = to_platform_device(dev);
367 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
369 /* do not clear AIE here, it may be needed for wake */
371 s3c_rtc_setpie(dev, 0);
372 free_irq(s3c_rtc_alarmno, rtc_dev);
373 free_irq(s3c_rtc_tickno, rtc_dev);
376 static const struct rtc_class_ops s3c_rtcops = {
377 .open = s3c_rtc_open,
378 .release = s3c_rtc_release,
379 .read_time = s3c_rtc_gettime,
380 .set_time = s3c_rtc_settime,
381 .read_alarm = s3c_rtc_getalarm,
382 .set_alarm = s3c_rtc_setalarm,
383 .irq_set_freq = s3c_rtc_setfreq,
384 .irq_set_state = s3c_rtc_setpie,
385 .proc = s3c_rtc_proc,
386 .alarm_irq_enable = s3c_rtc_setaie,
389 static void s3c_rtc_enable(struct platform_device *pdev, int en)
391 void __iomem *base = s3c_rtc_base;
392 unsigned int tmp;
394 if (s3c_rtc_base == NULL)
395 return;
397 if (!en) {
398 tmp = readw(base + S3C2410_RTCCON);
399 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
400 tmp &= ~S3C64XX_RTCCON_TICEN;
401 tmp &= ~S3C2410_RTCCON_RTCEN;
402 writew(tmp, base + S3C2410_RTCCON);
404 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
405 tmp = readb(base + S3C2410_TICNT);
406 tmp &= ~S3C2410_TICNT_ENABLE;
407 writeb(tmp, base + S3C2410_TICNT);
409 } else {
410 /* re-enable the device, and check it is ok */
412 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
413 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
415 tmp = readw(base + S3C2410_RTCCON);
416 writew(tmp | S3C2410_RTCCON_RTCEN,
417 base + S3C2410_RTCCON);
420 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
421 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
423 tmp = readw(base + S3C2410_RTCCON);
424 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
425 base + S3C2410_RTCCON);
428 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
429 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
431 tmp = readw(base + S3C2410_RTCCON);
432 writew(tmp & ~S3C2410_RTCCON_CLKRST,
433 base + S3C2410_RTCCON);
438 static int __devexit s3c_rtc_remove(struct platform_device *dev)
440 struct rtc_device *rtc = platform_get_drvdata(dev);
442 platform_set_drvdata(dev, NULL);
443 rtc_device_unregister(rtc);
445 s3c_rtc_setpie(&dev->dev, 0);
446 s3c_rtc_setaie(&dev->dev, 0);
448 clk_disable(rtc_clk);
449 clk_put(rtc_clk);
450 rtc_clk = NULL;
452 iounmap(s3c_rtc_base);
453 release_resource(s3c_rtc_mem);
454 kfree(s3c_rtc_mem);
456 return 0;
459 static int __devinit s3c_rtc_probe(struct platform_device *pdev)
461 struct rtc_device *rtc;
462 struct rtc_time rtc_tm;
463 struct resource *res;
464 int ret;
466 pr_debug("%s: probe=%p\n", __func__, pdev);
468 /* find the IRQs */
470 s3c_rtc_tickno = platform_get_irq(pdev, 1);
471 if (s3c_rtc_tickno < 0) {
472 dev_err(&pdev->dev, "no irq for rtc tick\n");
473 return -ENOENT;
476 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
477 if (s3c_rtc_alarmno < 0) {
478 dev_err(&pdev->dev, "no irq for alarm\n");
479 return -ENOENT;
482 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
483 s3c_rtc_tickno, s3c_rtc_alarmno);
485 /* get the memory region */
487 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
488 if (res == NULL) {
489 dev_err(&pdev->dev, "failed to get memory region resource\n");
490 return -ENOENT;
493 s3c_rtc_mem = request_mem_region(res->start,
494 res->end-res->start+1,
495 pdev->name);
497 if (s3c_rtc_mem == NULL) {
498 dev_err(&pdev->dev, "failed to reserve memory region\n");
499 ret = -ENOENT;
500 goto err_nores;
503 s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
504 if (s3c_rtc_base == NULL) {
505 dev_err(&pdev->dev, "failed ioremap()\n");
506 ret = -EINVAL;
507 goto err_nomap;
510 rtc_clk = clk_get(&pdev->dev, "rtc");
511 if (IS_ERR(rtc_clk)) {
512 dev_err(&pdev->dev, "failed to find rtc clock source\n");
513 ret = PTR_ERR(rtc_clk);
514 rtc_clk = NULL;
515 goto err_clk;
518 clk_enable(rtc_clk);
520 /* check to see if everything is setup correctly */
522 s3c_rtc_enable(pdev, 1);
524 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
525 readw(s3c_rtc_base + S3C2410_RTCCON));
527 device_init_wakeup(&pdev->dev, 1);
529 /* register RTC and exit */
531 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
532 THIS_MODULE);
534 if (IS_ERR(rtc)) {
535 dev_err(&pdev->dev, "cannot attach rtc\n");
536 ret = PTR_ERR(rtc);
537 goto err_nortc;
540 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
542 /* Check RTC Time */
544 s3c_rtc_gettime(NULL, &rtc_tm);
546 if (rtc_valid_tm(&rtc_tm)) {
547 rtc_tm.tm_year = 100;
548 rtc_tm.tm_mon = 0;
549 rtc_tm.tm_mday = 1;
550 rtc_tm.tm_hour = 0;
551 rtc_tm.tm_min = 0;
552 rtc_tm.tm_sec = 0;
554 s3c_rtc_settime(NULL, &rtc_tm);
556 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
559 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
560 rtc->max_user_freq = 32768;
561 else
562 rtc->max_user_freq = 128;
564 platform_set_drvdata(pdev, rtc);
566 s3c_rtc_setfreq(&pdev->dev, 1);
568 return 0;
570 err_nortc:
571 s3c_rtc_enable(pdev, 0);
572 clk_disable(rtc_clk);
573 clk_put(rtc_clk);
575 err_clk:
576 iounmap(s3c_rtc_base);
578 err_nomap:
579 release_resource(s3c_rtc_mem);
581 err_nores:
582 return ret;
585 #ifdef CONFIG_PM
587 /* RTC Power management control */
589 static int ticnt_save, ticnt_en_save;
591 static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
593 /* save TICNT for anyone using periodic interrupts */
594 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
595 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
596 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
597 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
599 s3c_rtc_enable(pdev, 0);
601 if (device_may_wakeup(&pdev->dev) && !wake_en) {
602 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
603 wake_en = true;
604 else
605 dev_err(&pdev->dev, "enable_irq_wake failed\n");
608 return 0;
611 static int s3c_rtc_resume(struct platform_device *pdev)
613 unsigned int tmp;
615 s3c_rtc_enable(pdev, 1);
616 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
617 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
618 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
619 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
622 if (device_may_wakeup(&pdev->dev) && wake_en) {
623 disable_irq_wake(s3c_rtc_alarmno);
624 wake_en = false;
627 return 0;
629 #else
630 #define s3c_rtc_suspend NULL
631 #define s3c_rtc_resume NULL
632 #endif
634 static struct platform_device_id s3c_rtc_driver_ids[] = {
636 .name = "s3c2410-rtc",
637 .driver_data = TYPE_S3C2410,
638 }, {
639 .name = "s3c64xx-rtc",
640 .driver_data = TYPE_S3C64XX,
645 MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
647 static struct platform_driver s3c_rtc_driver = {
648 .probe = s3c_rtc_probe,
649 .remove = __devexit_p(s3c_rtc_remove),
650 .suspend = s3c_rtc_suspend,
651 .resume = s3c_rtc_resume,
652 .id_table = s3c_rtc_driver_ids,
653 .driver = {
654 .name = "s3c-rtc",
655 .owner = THIS_MODULE,
659 static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
661 static int __init s3c_rtc_init(void)
663 printk(banner);
664 return platform_driver_register(&s3c_rtc_driver);
667 static void __exit s3c_rtc_exit(void)
669 platform_driver_unregister(&s3c_rtc_driver);
672 module_init(s3c_rtc_init);
673 module_exit(s3c_rtc_exit);
675 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
676 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
677 MODULE_LICENSE("GPL");
678 MODULE_ALIAS("platform:s3c2410-rtc");