Staging: arlan: arlan.h: more Checkpatch cleanup
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / arlan / arlan.h
blobffcd3ea048aada2dcf34d5476dc85c0b385ce2a9
1 /*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
4 * GNU General Public License applies
5 */
7 #include <linux/module.h>
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/skbuff.h>
11 #include <linux/if_ether.h> /* For the statistics structure. */
12 #include <linux/if_arp.h> /* For ARPHRD_ETHER */
13 #include <linux/ptrace.h>
14 #include <linux/ioport.h>
15 #include <linux/in.h>
16 #include <linux/slab.h>
17 #include <linux/string.h>
18 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/bitops.h>
22 #include <asm/system.h>
23 #include <linux/io.h>
24 #include <linux/errno.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
30 /* #define ARLAN_DEBUGGING 1 */
32 #define ARLAN_PROC_INTERFACE
33 #define MAX_ARLANS 4 /* not more than 4 ! */
34 #define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
36 #define ARLAN_MAX_MULTICAST_ADDRS 16
37 #define ARLAN_RCV_CLEAN 0
38 #define ARLAN_RCV_PROMISC 1
39 #define ARLAN_RCV_CONTROL 2
41 #ifdef CONFIG_PROC_FS
42 extern int init_arlan_proc(void);
43 extern void cleanup_arlan_proc(void);
44 #else
45 #define init_arlan_proc() ({ 0; })
46 #define cleanup_arlan_proc() do { } while (0)
47 #endif
49 extern struct net_device *arlan_device[MAX_ARLANS];
50 extern int arlan_debug;
51 extern int arlan_entry_debug;
52 extern int arlan_exit_debug;
53 extern int testMemory;
54 extern int arlan_command(struct net_device *dev, int command);
56 #define SIDUNKNOWN -1
57 #define radioNodeIdUNKNOWN -1
58 #define irqUNKNOWN 0
59 #define debugUNKNOWN 0
60 #define testMemoryUNKNOWN 1
61 #define spreadingCodeUNKNOWN 0
62 #define channelNumberUNKNOWN 0
63 #define channelSetUNKNOWN 0
64 #define systemIdUNKNOWN -1
65 #define registrationModeUNKNOWN -1
68 #define IFDEBUG(L) if ((L) & arlan_debug)
69 #define ARLAN_FAKE_HDR_LEN 12
71 #ifdef ARLAN_DEBUGGING
72 #define DEBUG 1
73 #define ARLAN_ENTRY_EXIT_DEBUGGING 1
74 #define ARLAN_DEBUG(a, b) printk(KERN_DEBUG a, b)
75 #else
76 #define ARLAN_DEBUG(a, b)
77 #endif
79 #define ARLAN_SHMEM_SIZE 0x2000
81 struct arlan_shmem {
82 /* Header Signature */
83 volatile char textRegion[48];
84 volatile u_char resetFlag;
85 volatile u_char diagnosticInfo;
86 volatile u_short diagnosticOffset;
87 volatile u_char _1[12];
88 volatile u_char lanCardNodeId[6];
89 volatile u_char broadcastAddress[6];
90 volatile u_char hardwareType;
91 volatile u_char majorHardwareVersion;
92 volatile u_char minorHardwareVersion;
93 volatile u_char radioModule;/* shows EEPROM, can be overridden at 0x111 */
94 volatile u_char defaultChannelSet; /* shows EEProm, can be overriiden at 0x10A */
95 volatile u_char _2[47];
97 /* Control/Status Block - 0x0080 */
98 volatile u_char interruptInProgress; /* not used by lancpu */
99 volatile u_char cntrlRegImage; /* not used by lancpu */
100 volatile u_char _3[13];
101 volatile u_char dumpByte;
102 volatile u_char commandByte; /* non-zero = active */
103 volatile u_char commandParameter[15];
105 /* Receive Status - 0x00a0 */
106 volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
107 volatile u_char rxFrmType;
108 volatile u_short rxOffset;
109 volatile u_short rxLength;
110 volatile u_char rxSrc[6];
111 volatile u_char rxBroadcastFlag;
112 volatile u_char rxQuality;
113 volatile u_char scrambled;
114 volatile u_char _4[1];
116 /* Transmit Status - 0x00b0 */
117 volatile u_char txStatus;
118 volatile u_char txAckQuality;
119 volatile u_char numRetries;
120 volatile u_char _5[14];
121 volatile u_char registeredRouter[6];
122 volatile u_char backboneRouter[6];
123 volatile u_char registrationStatus;
124 volatile u_char configuredStatusFlag;
125 volatile u_char _6[1];
126 volatile u_char ultimateDestAddress[6];
127 volatile u_char immedDestAddress[6];
128 volatile u_char immedSrcAddress[6];
129 volatile u_short rxSequenceNumber;
130 volatile u_char assignedLocaltalkAddress;
131 volatile u_char _7[27];
133 /* System Parameter Block */
135 /* - Driver Parameters (Novell Specific) */
137 volatile u_short txTimeout;
138 volatile u_short transportTime;
139 volatile u_char _8[4];
141 /* - Configuration Parameters */
142 volatile u_char irqLevel;
143 volatile u_char spreadingCode;
144 volatile u_char channelSet;
145 volatile u_char channelNumber;
146 volatile u_short radioNodeId;
147 volatile u_char _9[2];
148 volatile u_char scramblingDisable;
149 volatile u_char radioType;
150 volatile u_short routerId;
151 volatile u_char _10[9];
152 volatile u_char txAttenuation;
153 volatile u_char systemId[4];
154 volatile u_short globalChecksum;
155 volatile u_char _11[4];
156 volatile u_short maxDatagramSize;
157 volatile u_short maxFrameSize;
158 volatile u_char maxRetries;
159 volatile u_char receiveMode;
160 volatile u_char priority;
161 volatile u_char rootOrRepeater;
162 volatile u_char specifiedRouter[6];
163 volatile u_short fastPollPeriod;
164 volatile u_char pollDecay;
165 volatile u_char fastPollDelay[2];
166 volatile u_char arlThreshold;
167 volatile u_char arlDecay;
168 volatile u_char _12[1];
169 volatile u_short specRouterTimeout;
170 volatile u_char _13[5];
172 /* Scrambled Area */
173 volatile u_char SID[4];
174 volatile u_char encryptionKey[12];
175 volatile u_char _14[2];
176 volatile u_char waitTime[2];
177 volatile u_char lParameter[2];
178 volatile u_char _15[3];
179 volatile u_short headerSize;
180 volatile u_short sectionChecksum;
182 volatile u_char registrationMode;
183 volatile u_char registrationFill;
184 volatile u_short pollPeriod;
185 volatile u_short refreshPeriod;
186 volatile u_char name[16];
187 volatile u_char NID[6];
188 volatile u_char localTalkAddress;
189 volatile u_char codeFormat;
190 volatile u_char numChannels;
191 volatile u_char channel1;
192 volatile u_char channel2;
193 volatile u_char channel3;
194 volatile u_char channel4;
195 volatile u_char SSCode[59];
197 volatile u_char _16[0xC0];
198 volatile u_short auxCmd;
199 volatile u_char dumpPtr[4];
200 volatile u_char dumpVal;
201 volatile u_char _17[0x6A];
202 volatile u_char wireTest;
203 volatile u_char _18[14];
205 /* Statistics Block - 0x0300 */
206 volatile u_char hostcpuLock;
207 volatile u_char lancpuLock;
208 volatile u_char resetTime[18];
210 volatile u_char numDatagramsTransmitted[4];
211 volatile u_char numReTransmissions[4];
212 volatile u_char numFramesDiscarded[4];
213 volatile u_char numDatagramsReceived[4];
214 volatile u_char numDuplicateReceivedFrames[4];
215 volatile u_char numDatagramsDiscarded[4];
217 volatile u_short maxNumReTransmitDatagram;
218 volatile u_short maxNumReTransmitFrames;
219 volatile u_short maxNumConsecutiveDuplicateFrames;
220 /* misaligned here so we have to go to characters */
222 volatile u_char numBytesTransmitted[4];
223 volatile u_char numBytesReceived[4];
224 volatile u_char numCRCErrors[4];
225 volatile u_char numLengthErrors[4];
226 volatile u_char numAbortErrors[4];
227 volatile u_char numTXUnderruns[4];
228 volatile u_char numRXOverruns[4];
229 volatile u_char numHoldOffs[4];
230 volatile u_char numFramesTransmitted[4];
231 volatile u_char numFramesReceived[4];
232 volatile u_char numReceiveFramesLost[4];
233 volatile u_char numRXBufferOverflows[4];
234 volatile u_char numFramesDiscardedAddrMismatch[4];
235 volatile u_char numFramesDiscardedSIDMismatch[4];
236 volatile u_char numPollsTransmistted[4];
237 volatile u_char numPollAcknowledges[4];
238 volatile u_char numStatusTimeouts[4];
239 volatile u_char numNACKReceived[4];
241 volatile u_char _19[0x86];
243 volatile u_char txBuffer[0x800];
244 volatile u_char rxBuffer[0x800];
246 volatile u_char _20[0x800];
247 volatile u_char _21[0x3fb];
248 volatile u_char configStatus;
249 volatile u_char _22;
250 volatile u_char progIOCtrl;
251 volatile u_char shareMBase;
252 volatile u_char controlRegister;
255 struct arlan_conf_stru {
256 int spreadingCode;
257 int channelSet;
258 int channelNumber;
259 int scramblingDisable;
260 int txAttenuation;
261 int systemId;
262 int maxDatagramSize;
263 int maxFrameSize;
264 int maxRetries;
265 int receiveMode;
266 int priority;
267 int rootOrRepeater;
268 int SID;
269 int radioNodeId;
270 int registrationMode;
271 int registrationFill;
272 int localTalkAddress;
273 int codeFormat;
274 int numChannels;
275 int channel1;
276 int channel2;
277 int channel3;
278 int channel4;
279 int txClear;
280 int txRetries;
281 int txRouting;
282 int txScrambled;
283 int rxParameter;
284 int txTimeoutMs;
285 int txAckTimeoutMs;
286 int waitCardTimeout;
287 int waitTime;
288 int lParameter;
289 int _15;
290 int headerSize;
291 int retries;
292 int tx_delay_ms;
293 int waitReTransmitPacketMaxSize;
294 int ReTransmitPacketMaxSize;
295 int fastReTransCount;
296 int driverRetransmissions;
297 int registrationInterrupts;
298 int hardwareType;
299 int radioType;
300 int writeRadioType;
301 int writeEEPROM;
302 char siteName[17];
303 int measure_rate;
304 int in_speed;
305 int out_speed;
306 int in_speed10;
307 int out_speed10;
308 int in_speed_max;
309 int out_speed_max;
310 int pre_Command_Wait;
311 int rx_tweak1;
312 int rx_tweak2;
313 int tx_queue_len;
316 extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
318 struct TxParam {
319 volatile short offset;
320 volatile short length;
321 volatile u_char dest[6];
322 volatile unsigned char clear;
323 volatile unsigned char retries;
324 volatile unsigned char routing;
325 volatile unsigned char scrambled;
328 #define TX_RING_SIZE 2
329 /* Information that need to be kept for each board. */
330 struct arlan_private {
331 struct arlan_shmem __iomem *card;
332 struct arlan_shmem *conf;
334 struct arlan_conf_stru *Conf;
335 int bad;
336 int reset;
337 unsigned long lastReset;
338 struct timer_list timer;
339 struct timer_list tx_delay_timer;
340 struct timer_list tx_retry_timer;
341 struct timer_list rx_check_timer;
343 int registrationLostCount;
344 int reRegisterExp;
345 int irq_test_done;
347 struct TxParam txRing[TX_RING_SIZE];
348 char reTransmitBuff[0x800];
349 int txLast;
350 unsigned ReTransmitRequested;
351 unsigned long tx_done_delayed;
352 unsigned long registrationLastSeen;
354 unsigned long tx_last_sent;
355 unsigned long tx_last_cleared;
356 unsigned long retransmissions;
357 unsigned long interrupt_ack_requested;
358 spinlock_t lock;
359 unsigned long waiting_command_mask;
360 unsigned long card_polling_interval;
361 unsigned long last_command_buff_free_time;
363 int under_reset;
364 int under_config;
365 int rx_command_given;
366 int tx_command_given;
367 unsigned long interrupt_processing_active;
368 unsigned long last_rx_int_ack_time;
369 unsigned long in_bytes;
370 unsigned long out_bytes;
371 unsigned long in_time;
372 unsigned long out_time;
373 unsigned long in_time10;
374 unsigned long out_time10;
375 unsigned long in_bytes10;
376 unsigned long out_bytes10;
377 int init_etherdev_alloc;
382 #define ARLAN_CLEAR 0x00
383 #define ARLAN_RESET 0x01
384 #define ARLAN_CHANNEL_ATTENTION 0x02
385 #define ARLAN_INTERRUPT_ENABLE 0x04
386 #define ARLAN_CLEAR_INTERRUPT 0x08
387 #define ARLAN_POWER 0x40
388 #define ARLAN_ACCESS 0x80
390 #define ARLAN_COM_CONF 0x01
391 #define ARLAN_COM_RX_ENABLE 0x03
392 #define ARLAN_COM_RX_ABORT 0x04
393 #define ARLAN_COM_TX_ENABLE 0x05
394 #define ARLAN_COM_TX_ABORT 0x06
395 #define ARLAN_COM_NOP 0x07
396 #define ARLAN_COM_STANDBY 0x08
397 #define ARLAN_COM_ACTIVATE 0x09
398 #define ARLAN_COM_GOTO_SLOW_POLL 0x0a
399 #define ARLAN_COM_INT 0x80
402 #define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
403 #define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
404 #define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
406 #define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
407 #define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
409 #define READSHM(to, from, atype) {\
410 atype tmp;\
411 memcpy_fromio(&(tmp), &(from), sizeof(atype));\
412 to = tmp;\
415 #define READSHMEM(from, atype)\
416 atype from; \
417 READSHM(from, arlan->from, atype);
419 #define WRITESHM(to, from, atype) \
420 { atype tmpSHM = from;\
421 memcpy_toio(&(to), &tmpSHM, sizeof(atype));\
424 #define DEBUGSHM(levelSHM, stringSHM, stuff, atype) \
425 { atype tmpSHM; \
426 memcpy_fromio(&tmpSHM, &(stuff), sizeof(atype));\
427 IFDEBUG(levelSHM) printk(stringSHM, tmpSHM);\
430 #define WRITESHMB(to, val) \
431 writeb(val, &(to))
432 #define READSHMB(to) \
433 readb(&(to))
434 #define WRITESHMS(to, val) \
435 writew(val, &(to))
436 #define READSHMS(to) \
437 readw(&(to))
438 #define WRITESHMI(to, val) \
439 writel(val, &(to))
440 #define READSHMI(to) \
441 readl(&(to))
447 #define registrationBad(dev)\
448 (( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
449 ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))
452 #define readControlRegister(dev)\
453 READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
455 #define writeControlRegister(dev, v) {\
456 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage, ((v) & 0xF));\
457 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister, (v)); }
460 #define arlan_interrupt_lancpu(dev) {\
461 int cr; \
463 cr = readControlRegister(dev);\
464 if (cr & ARLAN_CHANNEL_ATTENTION) { \
465 writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
466 } else \
467 writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
470 #define clearChannelAttention(dev) { \
471 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION); }
472 #define setHardwareReset(dev) {\
473 writeControlRegister(dev, readControlRegister(dev) | ARLAN_RESET); }
474 #define clearHardwareReset(dev) {\
475 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_RESET); }
476 #define setInterruptEnable(dev) {\
477 writeControlRegister(dev, readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ; }
478 #define clearInterruptEnable(dev) {\
479 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ; }
480 #define setClearInterrupt(dev) {\
481 writeControlRegister(dev, readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ; }
482 #define clearClearInterrupt(dev) {\
483 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT); }
484 #define setPowerOff(dev) {\
485 writeControlRegister(dev, readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
486 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
487 #define setPowerOn(dev) {\
488 writeControlRegister(dev, readControlRegister(dev) & ~(ARLAN_POWER)); }
489 #define arlan_lock_card_access(dev) {\
490 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
491 #define arlan_unlock_card_access(dev) {\
492 writeControlRegister(dev, readControlRegister(dev) | ARLAN_ACCESS); }
497 #define ARLAN_COMMAND_RX 0x000001
498 #define ARLAN_COMMAND_NOOP 0x000002
499 #define ARLAN_COMMAND_NOOPINT 0x000004
500 #define ARLAN_COMMAND_TX 0x000008
501 #define ARLAN_COMMAND_CONF 0x000010
502 #define ARLAN_COMMAND_RESET 0x000020
503 #define ARLAN_COMMAND_TX_ABORT 0x000040
504 #define ARLAN_COMMAND_RX_ABORT 0x000080
505 #define ARLAN_COMMAND_POWERDOWN 0x000100
506 #define ARLAN_COMMAND_POWERUP 0x000200
507 #define ARLAN_COMMAND_SLOW_POLL 0x000400
508 #define ARLAN_COMMAND_ACTIVATE 0x000800
509 #define ARLAN_COMMAND_INT_ACK 0x001000
510 #define ARLAN_COMMAND_INT_ENABLE 0x002000
511 #define ARLAN_COMMAND_WAIT_NOW 0x004000
512 #define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
513 #define ARLAN_COMMAND_STANDBY 0x010000
514 #define ARLAN_COMMAND_INT_RACK 0x020000
515 #define ARLAN_COMMAND_INT_RENABLE 0x040000
516 #define ARLAN_COMMAND_CONF_WAIT 0x080000
517 #define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
518 #define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
519 | ARLAN_COMMAND_RX_ABORT\
520 | ARLAN_COMMAND_CONF)
521 #define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
522 | ARLAN_COMMAND_RX_ABORT\
523 | ARLAN_COMMAND_RESET)
526 #define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
527 #define ARLAN_DEBUG_RESET 0x00002
528 #define ARLAN_DEBUG_TIMING 0x00004
529 #define ARLAN_DEBUG_CARD_STATE 0x00008
530 #define ARLAN_DEBUG_TX_CHAIN 0x00010
531 #define ARLAN_DEBUG_MULTICAST 0x00020
532 #define ARLAN_DEBUG_HEADER_DUMP 0x00040
533 #define ARLAN_DEBUG_INTERRUPT 0x00080
534 #define ARLAN_DEBUG_STARTUP 0x00100
535 #define ARLAN_DEBUG_SHUTDOWN 0x00200