2 * Interrupt controller support for MAX8998
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/mfd/max8998-private.h>
19 struct max8998_irq_data
{
24 static struct max8998_irq_data max8998_irqs
[] = {
25 [MAX8998_IRQ_DCINF
] = {
27 .mask
= MAX8998_IRQ_DCINF_MASK
,
29 [MAX8998_IRQ_DCINR
] = {
31 .mask
= MAX8998_IRQ_DCINR_MASK
,
33 [MAX8998_IRQ_JIGF
] = {
35 .mask
= MAX8998_IRQ_JIGF_MASK
,
37 [MAX8998_IRQ_JIGR
] = {
39 .mask
= MAX8998_IRQ_JIGR_MASK
,
41 [MAX8998_IRQ_PWRONF
] = {
43 .mask
= MAX8998_IRQ_PWRONF_MASK
,
45 [MAX8998_IRQ_PWRONR
] = {
47 .mask
= MAX8998_IRQ_PWRONR_MASK
,
49 [MAX8998_IRQ_WTSREVNT
] = {
51 .mask
= MAX8998_IRQ_WTSREVNT_MASK
,
53 [MAX8998_IRQ_SMPLEVNT
] = {
55 .mask
= MAX8998_IRQ_SMPLEVNT_MASK
,
57 [MAX8998_IRQ_ALARM1
] = {
59 .mask
= MAX8998_IRQ_ALARM1_MASK
,
61 [MAX8998_IRQ_ALARM0
] = {
63 .mask
= MAX8998_IRQ_ALARM0_MASK
,
65 [MAX8998_IRQ_ONKEY1S
] = {
67 .mask
= MAX8998_IRQ_ONKEY1S_MASK
,
69 [MAX8998_IRQ_TOPOFFR
] = {
71 .mask
= MAX8998_IRQ_TOPOFFR_MASK
,
73 [MAX8998_IRQ_DCINOVPR
] = {
75 .mask
= MAX8998_IRQ_DCINOVPR_MASK
,
77 [MAX8998_IRQ_CHGRSTF
] = {
79 .mask
= MAX8998_IRQ_CHGRSTF_MASK
,
81 [MAX8998_IRQ_DONER
] = {
83 .mask
= MAX8998_IRQ_DONER_MASK
,
85 [MAX8998_IRQ_CHGFAULT
] = {
87 .mask
= MAX8998_IRQ_CHGFAULT_MASK
,
89 [MAX8998_IRQ_LOBAT1
] = {
91 .mask
= MAX8998_IRQ_LOBAT1_MASK
,
93 [MAX8998_IRQ_LOBAT2
] = {
95 .mask
= MAX8998_IRQ_LOBAT2_MASK
,
99 static inline struct max8998_irq_data
*
100 irq_to_max8998_irq(struct max8998_dev
*max8998
, int irq
)
102 return &max8998_irqs
[irq
- max8998
->irq_base
];
105 static void max8998_irq_lock(unsigned int irq
)
107 struct max8998_dev
*max8998
= get_irq_chip_data(irq
);
109 mutex_lock(&max8998
->irqlock
);
112 static void max8998_irq_sync_unlock(unsigned int irq
)
114 struct max8998_dev
*max8998
= get_irq_chip_data(irq
);
117 for (i
= 0; i
< ARRAY_SIZE(max8998
->irq_masks_cur
); i
++) {
119 * If there's been a change in the mask write it back
122 if (max8998
->irq_masks_cur
[i
] != max8998
->irq_masks_cache
[i
]) {
123 max8998
->irq_masks_cache
[i
] = max8998
->irq_masks_cur
[i
];
124 max8998_write_reg(max8998
->i2c
, MAX8998_REG_IRQM1
+ i
,
125 max8998
->irq_masks_cur
[i
]);
129 mutex_unlock(&max8998
->irqlock
);
132 static void max8998_irq_unmask(unsigned int irq
)
134 struct max8998_dev
*max8998
= get_irq_chip_data(irq
);
135 struct max8998_irq_data
*irq_data
= irq_to_max8998_irq(max8998
, irq
);
137 max8998
->irq_masks_cur
[irq_data
->reg
- 1] &= ~irq_data
->mask
;
140 static void max8998_irq_mask(unsigned int irq
)
142 struct max8998_dev
*max8998
= get_irq_chip_data(irq
);
143 struct max8998_irq_data
*irq_data
= irq_to_max8998_irq(max8998
, irq
);
145 max8998
->irq_masks_cur
[irq_data
->reg
- 1] |= irq_data
->mask
;
148 static struct irq_chip max8998_irq_chip
= {
150 .bus_lock
= max8998_irq_lock
,
151 .bus_sync_unlock
= max8998_irq_sync_unlock
,
152 .mask
= max8998_irq_mask
,
153 .unmask
= max8998_irq_unmask
,
156 static irqreturn_t
max8998_irq_thread(int irq
, void *data
)
158 struct max8998_dev
*max8998
= data
;
159 u8 irq_reg
[MAX8998_NUM_IRQ_REGS
];
163 ret
= max8998_bulk_read(max8998
->i2c
, MAX8998_REG_IRQ1
,
164 MAX8998_NUM_IRQ_REGS
, irq_reg
);
166 dev_err(max8998
->dev
, "Failed to read interrupt register: %d\n",
172 for (i
= 0; i
< MAX8998_NUM_IRQ_REGS
; i
++)
173 irq_reg
[i
] &= ~max8998
->irq_masks_cur
[i
];
176 for (i
= 0; i
< MAX8998_IRQ_NR
; i
++) {
177 if (irq_reg
[max8998_irqs
[i
].reg
- 1] & max8998_irqs
[i
].mask
)
178 handle_nested_irq(max8998
->irq_base
+ i
);
184 int max8998_irq_init(struct max8998_dev
*max8998
)
191 dev_warn(max8998
->dev
,
192 "No interrupt specified, no interrupts\n");
193 max8998
->irq_base
= 0;
197 if (!max8998
->irq_base
) {
198 dev_err(max8998
->dev
,
199 "No interrupt base specified, no interrupts\n");
203 mutex_init(&max8998
->irqlock
);
205 /* Mask the individual interrupt sources */
206 for (i
= 0; i
< MAX8998_NUM_IRQ_REGS
; i
++) {
207 max8998
->irq_masks_cur
[i
] = 0xff;
208 max8998
->irq_masks_cache
[i
] = 0xff;
209 max8998_write_reg(max8998
->i2c
, MAX8998_REG_IRQM1
+ i
, 0xff);
212 max8998_write_reg(max8998
->i2c
, MAX8998_REG_STATUSM1
, 0xff);
213 max8998_write_reg(max8998
->i2c
, MAX8998_REG_STATUSM2
, 0xff);
215 /* register with genirq */
216 for (i
= 0; i
< MAX8998_IRQ_NR
; i
++) {
217 cur_irq
= i
+ max8998
->irq_base
;
218 set_irq_chip_data(cur_irq
, max8998
);
219 set_irq_chip_and_handler(cur_irq
, &max8998_irq_chip
,
221 set_irq_nested_thread(cur_irq
, 1);
223 set_irq_flags(cur_irq
, IRQF_VALID
);
225 set_irq_noprobe(cur_irq
);
229 ret
= request_threaded_irq(max8998
->irq
, NULL
, max8998_irq_thread
,
230 IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
,
231 "max8998-irq", max8998
);
233 dev_err(max8998
->dev
, "Failed to request IRQ %d: %d\n",
241 ret
= request_threaded_irq(max8998
->ono
, NULL
, max8998_irq_thread
,
242 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
|
243 IRQF_ONESHOT
, "max8998-ono", max8998
);
245 dev_err(max8998
->dev
, "Failed to request IRQ %d: %d\n",
251 void max8998_irq_exit(struct max8998_dev
*max8998
)
254 free_irq(max8998
->ono
, max8998
);
257 free_irq(max8998
->irq
, max8998
);