2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/mmc/sdio_func.h>
21 #include <linux/slab.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue
);
33 /* List if running buses */
34 static LIST_HEAD(buses
);
35 /* Software ID counter */
36 static unsigned int next_busnumber
;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex
);
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot
= 1;
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus
*ssb_pci_dev_to_bus(struct pci_dev
*pdev
)
59 list_for_each_entry(bus
, &buses
, list
) {
60 if (bus
->bustype
== SSB_BUSTYPE_PCI
&&
61 bus
->host_pci
== pdev
)
70 #endif /* CONFIG_SSB_PCIHOST */
72 #ifdef CONFIG_SSB_PCMCIAHOST
73 struct ssb_bus
*ssb_pcmcia_dev_to_bus(struct pcmcia_device
*pdev
)
78 list_for_each_entry(bus
, &buses
, list
) {
79 if (bus
->bustype
== SSB_BUSTYPE_PCMCIA
&&
80 bus
->host_pcmcia
== pdev
)
89 #endif /* CONFIG_SSB_PCMCIAHOST */
91 #ifdef CONFIG_SSB_SDIOHOST
92 struct ssb_bus
*ssb_sdio_func_to_bus(struct sdio_func
*func
)
97 list_for_each_entry(bus
, &buses
, list
) {
98 if (bus
->bustype
== SSB_BUSTYPE_SDIO
&&
99 bus
->host_sdio
== func
)
108 #endif /* CONFIG_SSB_SDIOHOST */
110 int ssb_for_each_bus_call(unsigned long data
,
111 int (*func
)(struct ssb_bus
*bus
, unsigned long data
))
117 list_for_each_entry(bus
, &buses
, list
) {
118 res
= func(bus
, data
);
129 static struct ssb_device
*ssb_device_get(struct ssb_device
*dev
)
132 get_device(dev
->dev
);
136 static void ssb_device_put(struct ssb_device
*dev
)
139 put_device(dev
->dev
);
142 static inline struct ssb_driver
*ssb_driver_get(struct ssb_driver
*drv
)
145 get_driver(&drv
->drv
);
149 static inline void ssb_driver_put(struct ssb_driver
*drv
)
152 put_driver(&drv
->drv
);
155 static int ssb_device_resume(struct device
*dev
)
157 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
158 struct ssb_driver
*ssb_drv
;
162 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
163 if (ssb_drv
&& ssb_drv
->resume
)
164 err
= ssb_drv
->resume(ssb_dev
);
172 static int ssb_device_suspend(struct device
*dev
, pm_message_t state
)
174 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
175 struct ssb_driver
*ssb_drv
;
179 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
180 if (ssb_drv
&& ssb_drv
->suspend
)
181 err
= ssb_drv
->suspend(ssb_dev
, state
);
189 int ssb_bus_resume(struct ssb_bus
*bus
)
193 /* Reset HW state information in memory, so that HW is
194 * completely reinitialized. */
195 bus
->mapped_device
= NULL
;
196 #ifdef CONFIG_SSB_DRIVER_PCICORE
197 bus
->pcicore
.setup_done
= 0;
200 err
= ssb_bus_powerup(bus
, 0);
203 err
= ssb_pcmcia_hardware_setup(bus
);
205 ssb_bus_may_powerdown(bus
);
208 ssb_chipco_resume(&bus
->chipco
);
209 ssb_bus_may_powerdown(bus
);
213 EXPORT_SYMBOL(ssb_bus_resume
);
215 int ssb_bus_suspend(struct ssb_bus
*bus
)
217 ssb_chipco_suspend(&bus
->chipco
);
218 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
222 EXPORT_SYMBOL(ssb_bus_suspend
);
224 #ifdef CONFIG_SSB_SPROM
225 /** ssb_devices_freeze - Freeze all devices on the bus.
227 * After freezing no device driver will be handling a device
228 * on this bus anymore. ssb_devices_thaw() must be called after
229 * a successful freeze to reactivate the devices.
232 * @ctx: Context structure. Pass this to ssb_devices_thaw().
234 int ssb_devices_freeze(struct ssb_bus
*bus
, struct ssb_freeze_context
*ctx
)
236 struct ssb_device
*sdev
;
237 struct ssb_driver
*sdrv
;
240 memset(ctx
, 0, sizeof(*ctx
));
242 SSB_WARN_ON(bus
->nr_devices
> ARRAY_SIZE(ctx
->device_frozen
));
244 for (i
= 0; i
< bus
->nr_devices
; i
++) {
245 sdev
= ssb_device_get(&bus
->devices
[i
]);
247 if (!sdev
->dev
|| !sdev
->dev
->driver
||
248 !device_is_registered(sdev
->dev
)) {
249 ssb_device_put(sdev
);
252 sdrv
= ssb_driver_get(drv_to_ssb_drv(sdev
->dev
->driver
));
253 if (!sdrv
|| SSB_WARN_ON(!sdrv
->remove
)) {
254 ssb_device_put(sdev
);
258 ctx
->device_frozen
[i
] = 1;
264 /** ssb_devices_thaw - Unfreeze all devices on the bus.
266 * This will re-attach the device drivers and re-init the devices.
268 * @ctx: The context structure from ssb_devices_freeze()
270 int ssb_devices_thaw(struct ssb_freeze_context
*ctx
)
272 struct ssb_bus
*bus
= ctx
->bus
;
273 struct ssb_device
*sdev
;
274 struct ssb_driver
*sdrv
;
278 for (i
= 0; i
< bus
->nr_devices
; i
++) {
279 if (!ctx
->device_frozen
[i
])
281 sdev
= &bus
->devices
[i
];
283 if (SSB_WARN_ON(!sdev
->dev
|| !sdev
->dev
->driver
))
285 sdrv
= drv_to_ssb_drv(sdev
->dev
->driver
);
286 if (SSB_WARN_ON(!sdrv
|| !sdrv
->probe
))
289 err
= sdrv
->probe(sdev
, &sdev
->id
);
291 ssb_printk(KERN_ERR PFX
"Failed to thaw device %s\n",
292 dev_name(sdev
->dev
));
295 ssb_driver_put(sdrv
);
296 ssb_device_put(sdev
);
301 #endif /* CONFIG_SSB_SPROM */
303 static void ssb_device_shutdown(struct device
*dev
)
305 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
306 struct ssb_driver
*ssb_drv
;
310 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
311 if (ssb_drv
&& ssb_drv
->shutdown
)
312 ssb_drv
->shutdown(ssb_dev
);
315 static int ssb_device_remove(struct device
*dev
)
317 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
318 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
320 if (ssb_drv
&& ssb_drv
->remove
)
321 ssb_drv
->remove(ssb_dev
);
322 ssb_device_put(ssb_dev
);
327 static int ssb_device_probe(struct device
*dev
)
329 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
330 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
333 ssb_device_get(ssb_dev
);
334 if (ssb_drv
&& ssb_drv
->probe
)
335 err
= ssb_drv
->probe(ssb_dev
, &ssb_dev
->id
);
337 ssb_device_put(ssb_dev
);
342 static int ssb_match_devid(const struct ssb_device_id
*tabid
,
343 const struct ssb_device_id
*devid
)
345 if ((tabid
->vendor
!= devid
->vendor
) &&
346 tabid
->vendor
!= SSB_ANY_VENDOR
)
348 if ((tabid
->coreid
!= devid
->coreid
) &&
349 tabid
->coreid
!= SSB_ANY_ID
)
351 if ((tabid
->revision
!= devid
->revision
) &&
352 tabid
->revision
!= SSB_ANY_REV
)
357 static int ssb_bus_match(struct device
*dev
, struct device_driver
*drv
)
359 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
360 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(drv
);
361 const struct ssb_device_id
*id
;
363 for (id
= ssb_drv
->id_table
;
364 id
->vendor
|| id
->coreid
|| id
->revision
;
366 if (ssb_match_devid(id
, &ssb_dev
->id
))
367 return 1; /* found */
373 static int ssb_device_uevent(struct device
*dev
, struct kobj_uevent_env
*env
)
375 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
380 return add_uevent_var(env
,
381 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
382 ssb_dev
->id
.vendor
, ssb_dev
->id
.coreid
,
383 ssb_dev
->id
.revision
);
386 static struct bus_type ssb_bustype
= {
388 .match
= ssb_bus_match
,
389 .probe
= ssb_device_probe
,
390 .remove
= ssb_device_remove
,
391 .shutdown
= ssb_device_shutdown
,
392 .suspend
= ssb_device_suspend
,
393 .resume
= ssb_device_resume
,
394 .uevent
= ssb_device_uevent
,
397 static void ssb_buses_lock(void)
399 /* See the comment at the ssb_is_early_boot definition */
400 if (!ssb_is_early_boot
)
401 mutex_lock(&buses_mutex
);
404 static void ssb_buses_unlock(void)
406 /* See the comment at the ssb_is_early_boot definition */
407 if (!ssb_is_early_boot
)
408 mutex_unlock(&buses_mutex
);
411 static void ssb_devices_unregister(struct ssb_bus
*bus
)
413 struct ssb_device
*sdev
;
416 for (i
= bus
->nr_devices
- 1; i
>= 0; i
--) {
417 sdev
= &(bus
->devices
[i
]);
419 device_unregister(sdev
->dev
);
423 void ssb_bus_unregister(struct ssb_bus
*bus
)
426 ssb_devices_unregister(bus
);
427 list_del(&bus
->list
);
430 ssb_pcmcia_exit(bus
);
434 EXPORT_SYMBOL(ssb_bus_unregister
);
436 static void ssb_release_dev(struct device
*dev
)
438 struct __ssb_dev_wrapper
*devwrap
;
440 devwrap
= container_of(dev
, struct __ssb_dev_wrapper
, dev
);
444 static int ssb_devices_register(struct ssb_bus
*bus
)
446 struct ssb_device
*sdev
;
448 struct __ssb_dev_wrapper
*devwrap
;
452 for (i
= 0; i
< bus
->nr_devices
; i
++) {
453 sdev
= &(bus
->devices
[i
]);
455 /* We don't register SSB-system devices to the kernel,
456 * as the drivers for them are built into SSB. */
457 switch (sdev
->id
.coreid
) {
458 case SSB_DEV_CHIPCOMMON
:
463 case SSB_DEV_MIPS_3302
:
468 devwrap
= kzalloc(sizeof(*devwrap
), GFP_KERNEL
);
470 ssb_printk(KERN_ERR PFX
471 "Could not allocate device\n");
476 devwrap
->sdev
= sdev
;
478 dev
->release
= ssb_release_dev
;
479 dev
->bus
= &ssb_bustype
;
480 dev_set_name(dev
, "ssb%u:%d", bus
->busnumber
, dev_idx
);
482 switch (bus
->bustype
) {
483 case SSB_BUSTYPE_PCI
:
484 #ifdef CONFIG_SSB_PCIHOST
485 sdev
->irq
= bus
->host_pci
->irq
;
486 dev
->parent
= &bus
->host_pci
->dev
;
487 sdev
->dma_dev
= dev
->parent
;
490 case SSB_BUSTYPE_PCMCIA
:
491 #ifdef CONFIG_SSB_PCMCIAHOST
492 sdev
->irq
= bus
->host_pcmcia
->irq
;
493 dev
->parent
= &bus
->host_pcmcia
->dev
;
496 case SSB_BUSTYPE_SDIO
:
497 #ifdef CONFIG_SSB_SDIOHOST
498 dev
->parent
= &bus
->host_sdio
->dev
;
501 case SSB_BUSTYPE_SSB
:
502 dev
->dma_mask
= &dev
->coherent_dma_mask
;
508 err
= device_register(dev
);
510 ssb_printk(KERN_ERR PFX
511 "Could not register %s\n",
513 /* Set dev to NULL to not unregister
514 * dev on error unwinding. */
524 /* Unwind the already registered devices. */
525 ssb_devices_unregister(bus
);
529 /* Needs ssb_buses_lock() */
530 static int ssb_attach_queued_buses(void)
532 struct ssb_bus
*bus
, *n
;
534 int drop_them_all
= 0;
536 list_for_each_entry_safe(bus
, n
, &attach_queue
, list
) {
538 list_del(&bus
->list
);
541 /* Can't init the PCIcore in ssb_bus_register(), as that
542 * is too early in boot for embedded systems
543 * (no udelay() available). So do it here in attach stage.
545 err
= ssb_bus_powerup(bus
, 0);
548 ssb_pcicore_init(&bus
->pcicore
);
549 ssb_bus_may_powerdown(bus
);
551 err
= ssb_devices_register(bus
);
555 list_del(&bus
->list
);
558 list_move_tail(&bus
->list
, &buses
);
564 static u8
ssb_ssb_read8(struct ssb_device
*dev
, u16 offset
)
566 struct ssb_bus
*bus
= dev
->bus
;
568 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
569 return readb(bus
->mmio
+ offset
);
572 static u16
ssb_ssb_read16(struct ssb_device
*dev
, u16 offset
)
574 struct ssb_bus
*bus
= dev
->bus
;
576 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
577 return readw(bus
->mmio
+ offset
);
580 static u32
ssb_ssb_read32(struct ssb_device
*dev
, u16 offset
)
582 struct ssb_bus
*bus
= dev
->bus
;
584 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
585 return readl(bus
->mmio
+ offset
);
588 #ifdef CONFIG_SSB_BLOCKIO
589 static void ssb_ssb_block_read(struct ssb_device
*dev
, void *buffer
,
590 size_t count
, u16 offset
, u8 reg_width
)
592 struct ssb_bus
*bus
= dev
->bus
;
595 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
596 addr
= bus
->mmio
+ offset
;
603 *buf
= __raw_readb(addr
);
610 __le16
*buf
= buffer
;
612 SSB_WARN_ON(count
& 1);
614 *buf
= (__force __le16
)__raw_readw(addr
);
621 __le32
*buf
= buffer
;
623 SSB_WARN_ON(count
& 3);
625 *buf
= (__force __le32
)__raw_readl(addr
);
635 #endif /* CONFIG_SSB_BLOCKIO */
637 static void ssb_ssb_write8(struct ssb_device
*dev
, u16 offset
, u8 value
)
639 struct ssb_bus
*bus
= dev
->bus
;
641 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
642 writeb(value
, bus
->mmio
+ offset
);
645 static void ssb_ssb_write16(struct ssb_device
*dev
, u16 offset
, u16 value
)
647 struct ssb_bus
*bus
= dev
->bus
;
649 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
650 writew(value
, bus
->mmio
+ offset
);
653 static void ssb_ssb_write32(struct ssb_device
*dev
, u16 offset
, u32 value
)
655 struct ssb_bus
*bus
= dev
->bus
;
657 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
658 writel(value
, bus
->mmio
+ offset
);
661 #ifdef CONFIG_SSB_BLOCKIO
662 static void ssb_ssb_block_write(struct ssb_device
*dev
, const void *buffer
,
663 size_t count
, u16 offset
, u8 reg_width
)
665 struct ssb_bus
*bus
= dev
->bus
;
668 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
669 addr
= bus
->mmio
+ offset
;
673 const u8
*buf
= buffer
;
676 __raw_writeb(*buf
, addr
);
683 const __le16
*buf
= buffer
;
685 SSB_WARN_ON(count
& 1);
687 __raw_writew((__force u16
)(*buf
), addr
);
694 const __le32
*buf
= buffer
;
696 SSB_WARN_ON(count
& 3);
698 __raw_writel((__force u32
)(*buf
), addr
);
708 #endif /* CONFIG_SSB_BLOCKIO */
710 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
711 static const struct ssb_bus_ops ssb_ssb_ops
= {
712 .read8
= ssb_ssb_read8
,
713 .read16
= ssb_ssb_read16
,
714 .read32
= ssb_ssb_read32
,
715 .write8
= ssb_ssb_write8
,
716 .write16
= ssb_ssb_write16
,
717 .write32
= ssb_ssb_write32
,
718 #ifdef CONFIG_SSB_BLOCKIO
719 .block_read
= ssb_ssb_block_read
,
720 .block_write
= ssb_ssb_block_write
,
724 static int ssb_fetch_invariants(struct ssb_bus
*bus
,
725 ssb_invariants_func_t get_invariants
)
727 struct ssb_init_invariants iv
;
730 memset(&iv
, 0, sizeof(iv
));
731 err
= get_invariants(bus
, &iv
);
734 memcpy(&bus
->boardinfo
, &iv
.boardinfo
, sizeof(iv
.boardinfo
));
735 memcpy(&bus
->sprom
, &iv
.sprom
, sizeof(iv
.sprom
));
736 bus
->has_cardbus_slot
= iv
.has_cardbus_slot
;
741 static int ssb_bus_register(struct ssb_bus
*bus
,
742 ssb_invariants_func_t get_invariants
,
743 unsigned long baseaddr
)
747 spin_lock_init(&bus
->bar_lock
);
748 INIT_LIST_HEAD(&bus
->list
);
749 #ifdef CONFIG_SSB_EMBEDDED
750 spin_lock_init(&bus
->gpio_lock
);
753 /* Powerup the bus */
754 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
758 /* Init SDIO-host device (if any), before the scan */
759 err
= ssb_sdio_init(bus
);
761 goto err_disable_xtal
;
764 bus
->busnumber
= next_busnumber
;
765 /* Scan for devices (cores) */
766 err
= ssb_bus_scan(bus
, baseaddr
);
770 /* Init PCI-host device (if any) */
771 err
= ssb_pci_init(bus
);
774 /* Init PCMCIA-host device (if any) */
775 err
= ssb_pcmcia_init(bus
);
779 /* Initialize basic system devices (if available) */
780 err
= ssb_bus_powerup(bus
, 0);
782 goto err_pcmcia_exit
;
783 ssb_chipcommon_init(&bus
->chipco
);
784 ssb_mipscore_init(&bus
->mipscore
);
785 err
= ssb_fetch_invariants(bus
, get_invariants
);
787 ssb_bus_may_powerdown(bus
);
788 goto err_pcmcia_exit
;
790 ssb_bus_may_powerdown(bus
);
792 /* Queue it for attach.
793 * See the comment at the ssb_is_early_boot definition. */
794 list_add_tail(&bus
->list
, &attach_queue
);
795 if (!ssb_is_early_boot
) {
796 /* This is not early boot, so we must attach the bus now */
797 err
= ssb_attach_queued_buses();
808 list_del(&bus
->list
);
810 ssb_pcmcia_exit(bus
);
819 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
823 #ifdef CONFIG_SSB_PCIHOST
824 int ssb_bus_pcibus_register(struct ssb_bus
*bus
,
825 struct pci_dev
*host_pci
)
829 bus
->bustype
= SSB_BUSTYPE_PCI
;
830 bus
->host_pci
= host_pci
;
831 bus
->ops
= &ssb_pci_ops
;
833 err
= ssb_bus_register(bus
, ssb_pci_get_invariants
, 0);
835 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
836 "PCI device %s\n", dev_name(&host_pci
->dev
));
838 ssb_printk(KERN_ERR PFX
"Failed to register PCI version"
839 " of SSB with error %d\n", err
);
844 EXPORT_SYMBOL(ssb_bus_pcibus_register
);
845 #endif /* CONFIG_SSB_PCIHOST */
847 #ifdef CONFIG_SSB_PCMCIAHOST
848 int ssb_bus_pcmciabus_register(struct ssb_bus
*bus
,
849 struct pcmcia_device
*pcmcia_dev
,
850 unsigned long baseaddr
)
854 bus
->bustype
= SSB_BUSTYPE_PCMCIA
;
855 bus
->host_pcmcia
= pcmcia_dev
;
856 bus
->ops
= &ssb_pcmcia_ops
;
858 err
= ssb_bus_register(bus
, ssb_pcmcia_get_invariants
, baseaddr
);
860 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
861 "PCMCIA device %s\n", pcmcia_dev
->devname
);
866 EXPORT_SYMBOL(ssb_bus_pcmciabus_register
);
867 #endif /* CONFIG_SSB_PCMCIAHOST */
869 #ifdef CONFIG_SSB_SDIOHOST
870 int ssb_bus_sdiobus_register(struct ssb_bus
*bus
, struct sdio_func
*func
,
875 bus
->bustype
= SSB_BUSTYPE_SDIO
;
876 bus
->host_sdio
= func
;
877 bus
->ops
= &ssb_sdio_ops
;
878 bus
->quirks
= quirks
;
880 err
= ssb_bus_register(bus
, ssb_sdio_get_invariants
, ~0);
882 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
883 "SDIO device %s\n", sdio_func_id(func
));
888 EXPORT_SYMBOL(ssb_bus_sdiobus_register
);
889 #endif /* CONFIG_SSB_PCMCIAHOST */
891 int ssb_bus_ssbbus_register(struct ssb_bus
*bus
,
892 unsigned long baseaddr
,
893 ssb_invariants_func_t get_invariants
)
897 bus
->bustype
= SSB_BUSTYPE_SSB
;
898 bus
->ops
= &ssb_ssb_ops
;
900 err
= ssb_bus_register(bus
, get_invariants
, baseaddr
);
902 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found at "
903 "address 0x%08lX\n", baseaddr
);
909 int __ssb_driver_register(struct ssb_driver
*drv
, struct module
*owner
)
911 drv
->drv
.name
= drv
->name
;
912 drv
->drv
.bus
= &ssb_bustype
;
913 drv
->drv
.owner
= owner
;
915 return driver_register(&drv
->drv
);
917 EXPORT_SYMBOL(__ssb_driver_register
);
919 void ssb_driver_unregister(struct ssb_driver
*drv
)
921 driver_unregister(&drv
->drv
);
923 EXPORT_SYMBOL(ssb_driver_unregister
);
925 void ssb_set_devtypedata(struct ssb_device
*dev
, void *data
)
927 struct ssb_bus
*bus
= dev
->bus
;
928 struct ssb_device
*ent
;
931 for (i
= 0; i
< bus
->nr_devices
; i
++) {
932 ent
= &(bus
->devices
[i
]);
933 if (ent
->id
.vendor
!= dev
->id
.vendor
)
935 if (ent
->id
.coreid
!= dev
->id
.coreid
)
938 ent
->devtypedata
= data
;
941 EXPORT_SYMBOL(ssb_set_devtypedata
);
943 static u32
clkfactor_f6_resolve(u32 v
)
945 /* map the magic values */
947 case SSB_CHIPCO_CLK_F6_2
:
949 case SSB_CHIPCO_CLK_F6_3
:
951 case SSB_CHIPCO_CLK_F6_4
:
953 case SSB_CHIPCO_CLK_F6_5
:
955 case SSB_CHIPCO_CLK_F6_6
:
957 case SSB_CHIPCO_CLK_F6_7
:
963 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
964 u32
ssb_calc_clock_rate(u32 plltype
, u32 n
, u32 m
)
966 u32 n1
, n2
, clock
, m1
, m2
, m3
, mc
;
968 n1
= (n
& SSB_CHIPCO_CLK_N1
);
969 n2
= ((n
& SSB_CHIPCO_CLK_N2
) >> SSB_CHIPCO_CLK_N2_SHIFT
);
972 case SSB_PLLTYPE_6
: /* 100/200 or 120/240 only */
973 if (m
& SSB_CHIPCO_CLK_T6_MMASK
)
974 return SSB_CHIPCO_CLK_T6_M0
;
975 return SSB_CHIPCO_CLK_T6_M1
;
976 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
977 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
978 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
979 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
980 n1
= clkfactor_f6_resolve(n1
);
981 n2
+= SSB_CHIPCO_CLK_F5_BIAS
;
983 case SSB_PLLTYPE_2
: /* 48Mhz, 4 dividers */
984 n1
+= SSB_CHIPCO_CLK_T2_BIAS
;
985 n2
+= SSB_CHIPCO_CLK_T2_BIAS
;
986 SSB_WARN_ON(!((n1
>= 2) && (n1
<= 7)));
987 SSB_WARN_ON(!((n2
>= 5) && (n2
<= 23)));
989 case SSB_PLLTYPE_5
: /* 25Mhz, 4 dividers */
996 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
997 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
998 clock
= SSB_CHIPCO_CLK_BASE2
* n1
* n2
;
1001 clock
= SSB_CHIPCO_CLK_BASE1
* n1
* n2
;
1006 m1
= (m
& SSB_CHIPCO_CLK_M1
);
1007 m2
= ((m
& SSB_CHIPCO_CLK_M2
) >> SSB_CHIPCO_CLK_M2_SHIFT
);
1008 m3
= ((m
& SSB_CHIPCO_CLK_M3
) >> SSB_CHIPCO_CLK_M3_SHIFT
);
1009 mc
= ((m
& SSB_CHIPCO_CLK_MC
) >> SSB_CHIPCO_CLK_MC_SHIFT
);
1012 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
1013 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
1014 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
1015 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
1016 m1
= clkfactor_f6_resolve(m1
);
1017 if ((plltype
== SSB_PLLTYPE_1
) ||
1018 (plltype
== SSB_PLLTYPE_3
))
1019 m2
+= SSB_CHIPCO_CLK_F5_BIAS
;
1021 m2
= clkfactor_f6_resolve(m2
);
1022 m3
= clkfactor_f6_resolve(m3
);
1025 case SSB_CHIPCO_CLK_MC_BYPASS
:
1027 case SSB_CHIPCO_CLK_MC_M1
:
1028 return (clock
/ m1
);
1029 case SSB_CHIPCO_CLK_MC_M1M2
:
1030 return (clock
/ (m1
* m2
));
1031 case SSB_CHIPCO_CLK_MC_M1M2M3
:
1032 return (clock
/ (m1
* m2
* m3
));
1033 case SSB_CHIPCO_CLK_MC_M1M3
:
1034 return (clock
/ (m1
* m3
));
1038 m1
+= SSB_CHIPCO_CLK_T2_BIAS
;
1039 m2
+= SSB_CHIPCO_CLK_T2M2_BIAS
;
1040 m3
+= SSB_CHIPCO_CLK_T2_BIAS
;
1041 SSB_WARN_ON(!((m1
>= 2) && (m1
<= 7)));
1042 SSB_WARN_ON(!((m2
>= 3) && (m2
<= 10)));
1043 SSB_WARN_ON(!((m3
>= 2) && (m3
<= 7)));
1045 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M1BYP
))
1047 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M2BYP
))
1049 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M3BYP
))
1058 /* Get the current speed the backplane is running at */
1059 u32
ssb_clockspeed(struct ssb_bus
*bus
)
1063 u32 clkctl_n
, clkctl_m
;
1065 if (ssb_extif_available(&bus
->extif
))
1066 ssb_extif_get_clockcontrol(&bus
->extif
, &plltype
,
1067 &clkctl_n
, &clkctl_m
);
1068 else if (bus
->chipco
.dev
)
1069 ssb_chipco_get_clockcontrol(&bus
->chipco
, &plltype
,
1070 &clkctl_n
, &clkctl_m
);
1074 if (bus
->chip_id
== 0x5365) {
1077 rate
= ssb_calc_clock_rate(plltype
, clkctl_n
, clkctl_m
);
1078 if (plltype
== SSB_PLLTYPE_3
) /* 25Mhz, 2 dividers */
1084 EXPORT_SYMBOL(ssb_clockspeed
);
1086 static u32
ssb_tmslow_reject_bitmask(struct ssb_device
*dev
)
1088 u32 rev
= ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_SSBREV
;
1090 /* The REJECT bit changed position in TMSLOW between
1091 * Backplane revisions. */
1093 case SSB_IDLOW_SSBREV_22
:
1094 return SSB_TMSLOW_REJECT_22
;
1095 case SSB_IDLOW_SSBREV_23
:
1096 return SSB_TMSLOW_REJECT_23
;
1097 case SSB_IDLOW_SSBREV_24
: /* TODO - find the proper REJECT bits */
1098 case SSB_IDLOW_SSBREV_25
: /* same here */
1099 case SSB_IDLOW_SSBREV_26
: /* same here */
1100 case SSB_IDLOW_SSBREV_27
: /* same here */
1101 return SSB_TMSLOW_REJECT_23
; /* this is a guess */
1103 printk(KERN_INFO
"ssb: Backplane Revision 0x%.8X\n", rev
);
1106 return (SSB_TMSLOW_REJECT_22
| SSB_TMSLOW_REJECT_23
);
1109 int ssb_device_is_enabled(struct ssb_device
*dev
)
1114 reject
= ssb_tmslow_reject_bitmask(dev
);
1115 val
= ssb_read32(dev
, SSB_TMSLOW
);
1116 val
&= SSB_TMSLOW_CLOCK
| SSB_TMSLOW_RESET
| reject
;
1118 return (val
== SSB_TMSLOW_CLOCK
);
1120 EXPORT_SYMBOL(ssb_device_is_enabled
);
1122 static void ssb_flush_tmslow(struct ssb_device
*dev
)
1124 /* Make _really_ sure the device has finished the TMSLOW
1125 * register write transaction, as we risk running into
1126 * a machine check exception otherwise.
1127 * Do this by reading the register back to commit the
1128 * PCI write and delay an additional usec for the device
1129 * to react to the change. */
1130 ssb_read32(dev
, SSB_TMSLOW
);
1134 void ssb_device_enable(struct ssb_device
*dev
, u32 core_specific_flags
)
1138 ssb_device_disable(dev
, core_specific_flags
);
1139 ssb_write32(dev
, SSB_TMSLOW
,
1140 SSB_TMSLOW_RESET
| SSB_TMSLOW_CLOCK
|
1141 SSB_TMSLOW_FGC
| core_specific_flags
);
1142 ssb_flush_tmslow(dev
);
1144 /* Clear SERR if set. This is a hw bug workaround. */
1145 if (ssb_read32(dev
, SSB_TMSHIGH
) & SSB_TMSHIGH_SERR
)
1146 ssb_write32(dev
, SSB_TMSHIGH
, 0);
1148 val
= ssb_read32(dev
, SSB_IMSTATE
);
1149 if (val
& (SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
)) {
1150 val
&= ~(SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
);
1151 ssb_write32(dev
, SSB_IMSTATE
, val
);
1154 ssb_write32(dev
, SSB_TMSLOW
,
1155 SSB_TMSLOW_CLOCK
| SSB_TMSLOW_FGC
|
1156 core_specific_flags
);
1157 ssb_flush_tmslow(dev
);
1159 ssb_write32(dev
, SSB_TMSLOW
, SSB_TMSLOW_CLOCK
|
1160 core_specific_flags
);
1161 ssb_flush_tmslow(dev
);
1163 EXPORT_SYMBOL(ssb_device_enable
);
1165 /* Wait for a bit in a register to get set or unset.
1166 * timeout is in units of ten-microseconds */
1167 static int ssb_wait_bit(struct ssb_device
*dev
, u16 reg
, u32 bitmask
,
1168 int timeout
, int set
)
1173 for (i
= 0; i
< timeout
; i
++) {
1174 val
= ssb_read32(dev
, reg
);
1179 if (!(val
& bitmask
))
1184 printk(KERN_ERR PFX
"Timeout waiting for bitmask %08X on "
1185 "register %04X to %s.\n",
1186 bitmask
, reg
, (set
? "set" : "clear"));
1191 void ssb_device_disable(struct ssb_device
*dev
, u32 core_specific_flags
)
1195 if (ssb_read32(dev
, SSB_TMSLOW
) & SSB_TMSLOW_RESET
)
1198 reject
= ssb_tmslow_reject_bitmask(dev
);
1199 ssb_write32(dev
, SSB_TMSLOW
, reject
| SSB_TMSLOW_CLOCK
);
1200 ssb_wait_bit(dev
, SSB_TMSLOW
, reject
, 1000, 1);
1201 ssb_wait_bit(dev
, SSB_TMSHIGH
, SSB_TMSHIGH_BUSY
, 1000, 0);
1202 ssb_write32(dev
, SSB_TMSLOW
,
1203 SSB_TMSLOW_FGC
| SSB_TMSLOW_CLOCK
|
1204 reject
| SSB_TMSLOW_RESET
|
1205 core_specific_flags
);
1206 ssb_flush_tmslow(dev
);
1208 ssb_write32(dev
, SSB_TMSLOW
,
1209 reject
| SSB_TMSLOW_RESET
|
1210 core_specific_flags
);
1211 ssb_flush_tmslow(dev
);
1213 EXPORT_SYMBOL(ssb_device_disable
);
1215 u32
ssb_dma_translation(struct ssb_device
*dev
)
1217 switch (dev
->bus
->bustype
) {
1218 case SSB_BUSTYPE_SSB
:
1220 case SSB_BUSTYPE_PCI
:
1223 __ssb_dma_not_implemented(dev
);
1227 EXPORT_SYMBOL(ssb_dma_translation
);
1229 int ssb_bus_may_powerdown(struct ssb_bus
*bus
)
1231 struct ssb_chipcommon
*cc
;
1234 /* On buses where more than one core may be working
1235 * at a time, we must not powerdown stuff if there are
1236 * still cores that may want to run. */
1237 if (bus
->bustype
== SSB_BUSTYPE_SSB
)
1244 if (cc
->dev
->id
.revision
< 5)
1247 ssb_chipco_set_clockmode(cc
, SSB_CLKMODE_SLOW
);
1248 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
1252 #ifdef CONFIG_SSB_DEBUG
1253 bus
->powered_up
= 0;
1257 ssb_printk(KERN_ERR PFX
"Bus powerdown failed\n");
1260 EXPORT_SYMBOL(ssb_bus_may_powerdown
);
1262 int ssb_bus_powerup(struct ssb_bus
*bus
, bool dynamic_pctl
)
1264 struct ssb_chipcommon
*cc
;
1266 enum ssb_clkmode mode
;
1268 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
1272 mode
= dynamic_pctl
? SSB_CLKMODE_DYNAMIC
: SSB_CLKMODE_FAST
;
1273 ssb_chipco_set_clockmode(cc
, mode
);
1275 #ifdef CONFIG_SSB_DEBUG
1276 bus
->powered_up
= 1;
1280 ssb_printk(KERN_ERR PFX
"Bus powerup failed\n");
1283 EXPORT_SYMBOL(ssb_bus_powerup
);
1285 u32
ssb_admatch_base(u32 adm
)
1289 switch (adm
& SSB_ADM_TYPE
) {
1291 base
= (adm
& SSB_ADM_BASE0
);
1294 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1295 base
= (adm
& SSB_ADM_BASE1
);
1298 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1299 base
= (adm
& SSB_ADM_BASE2
);
1307 EXPORT_SYMBOL(ssb_admatch_base
);
1309 u32
ssb_admatch_size(u32 adm
)
1313 switch (adm
& SSB_ADM_TYPE
) {
1315 size
= ((adm
& SSB_ADM_SZ0
) >> SSB_ADM_SZ0_SHIFT
);
1318 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1319 size
= ((adm
& SSB_ADM_SZ1
) >> SSB_ADM_SZ1_SHIFT
);
1322 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1323 size
= ((adm
& SSB_ADM_SZ2
) >> SSB_ADM_SZ2_SHIFT
);
1328 size
= (1 << (size
+ 1));
1332 EXPORT_SYMBOL(ssb_admatch_size
);
1334 static int __init
ssb_modinit(void)
1338 /* See the comment at the ssb_is_early_boot definition */
1339 ssb_is_early_boot
= 0;
1340 err
= bus_register(&ssb_bustype
);
1344 /* Maybe we already registered some buses at early boot.
1345 * Check for this and attach them
1348 err
= ssb_attach_queued_buses();
1351 bus_unregister(&ssb_bustype
);
1355 err
= b43_pci_ssb_bridge_init();
1357 ssb_printk(KERN_ERR
"Broadcom 43xx PCI-SSB-bridge "
1358 "initialization failed\n");
1359 /* don't fail SSB init because of this */
1362 err
= ssb_gige_init();
1364 ssb_printk(KERN_ERR
"SSB Broadcom Gigabit Ethernet "
1365 "driver initialization failed\n");
1366 /* don't fail SSB init because of this */
1372 /* ssb must be initialized after PCI but before the ssb drivers.
1373 * That means we must use some initcall between subsys_initcall
1374 * and device_initcall. */
1375 fs_initcall(ssb_modinit
);
1377 static void __exit
ssb_modexit(void)
1380 b43_pci_ssb_bridge_exit();
1381 bus_unregister(&ssb_bustype
);
1383 module_exit(ssb_modexit
)