2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * This is a generic driver for ARM AMBA-type serial ports. They
26 * have a lot of 16550-like features, but are not register compatible.
27 * Note that although they do have CTS, DCD and DSR inputs, they do
28 * not have an RI input, nor do they have DTR or RTS outputs. If
29 * required, these have to be supplied via some other means (eg, GPIO)
30 * and hooked into this driver.
33 #if defined(CONFIG_SERIAL_AMBA_PL011_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
37 #include <linux/module.h>
38 #include <linux/ioport.h>
39 #include <linux/init.h>
40 #include <linux/console.h>
41 #include <linux/sysrq.h>
42 #include <linux/device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
46 #include <linux/serial.h>
47 #include <linux/amba/bus.h>
48 #include <linux/amba/serial.h>
49 #include <linux/clk.h>
50 #include <linux/slab.h>
53 #include <asm/sizes.h>
57 #define SERIAL_AMBA_MAJOR 204
58 #define SERIAL_AMBA_MINOR 64
59 #define SERIAL_AMBA_NR UART_NR
61 #define AMBA_ISR_PASS_LIMIT 256
63 #define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
64 #define UART_DUMMY_DR_RX (1 << 16)
67 * We wrap our port structure around the generic uart_port.
69 struct uart_amba_port
{
70 struct uart_port port
;
72 unsigned int im
; /* interrupt mask */
73 unsigned int old_status
;
74 unsigned int ifls
; /* vendor-specific */
78 /* There is by now at least one vendor with differing details, so handle it */
81 unsigned int fifosize
;
84 static struct vendor_data vendor_arm
= {
85 .ifls
= UART011_IFLS_RX4_8
|UART011_IFLS_TX4_8
,
89 static struct vendor_data vendor_st
= {
90 .ifls
= UART011_IFLS_RX_HALF
|UART011_IFLS_TX_HALF
,
94 static void pl011_stop_tx(struct uart_port
*port
)
96 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
98 uap
->im
&= ~UART011_TXIM
;
99 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
102 static void pl011_start_tx(struct uart_port
*port
)
104 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
106 uap
->im
|= UART011_TXIM
;
107 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
110 static void pl011_stop_rx(struct uart_port
*port
)
112 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
114 uap
->im
&= ~(UART011_RXIM
|UART011_RTIM
|UART011_FEIM
|
115 UART011_PEIM
|UART011_BEIM
|UART011_OEIM
);
116 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
119 static void pl011_enable_ms(struct uart_port
*port
)
121 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
123 uap
->im
|= UART011_RIMIM
|UART011_CTSMIM
|UART011_DCDMIM
|UART011_DSRMIM
;
124 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
127 static void pl011_rx_chars(struct uart_amba_port
*uap
)
129 struct tty_struct
*tty
= uap
->port
.state
->port
.tty
;
130 unsigned int status
, ch
, flag
, max_count
= 256;
132 status
= readw(uap
->port
.membase
+ UART01x_FR
);
133 while ((status
& UART01x_FR_RXFE
) == 0 && max_count
--) {
134 ch
= readw(uap
->port
.membase
+ UART01x_DR
) | UART_DUMMY_DR_RX
;
136 uap
->port
.icount
.rx
++;
139 * Note that the error handling code is
140 * out of the main execution path
142 if (unlikely(ch
& UART_DR_ERROR
)) {
143 if (ch
& UART011_DR_BE
) {
144 ch
&= ~(UART011_DR_FE
| UART011_DR_PE
);
145 uap
->port
.icount
.brk
++;
146 if (uart_handle_break(&uap
->port
))
148 } else if (ch
& UART011_DR_PE
)
149 uap
->port
.icount
.parity
++;
150 else if (ch
& UART011_DR_FE
)
151 uap
->port
.icount
.frame
++;
152 if (ch
& UART011_DR_OE
)
153 uap
->port
.icount
.overrun
++;
155 ch
&= uap
->port
.read_status_mask
;
157 if (ch
& UART011_DR_BE
)
159 else if (ch
& UART011_DR_PE
)
161 else if (ch
& UART011_DR_FE
)
165 if (uart_handle_sysrq_char(&uap
->port
, ch
& 255))
168 uart_insert_char(&uap
->port
, ch
, UART011_DR_OE
, ch
, flag
);
171 status
= readw(uap
->port
.membase
+ UART01x_FR
);
173 spin_unlock(&uap
->port
.lock
);
174 tty_flip_buffer_push(tty
);
175 spin_lock(&uap
->port
.lock
);
178 static void pl011_tx_chars(struct uart_amba_port
*uap
)
180 struct circ_buf
*xmit
= &uap
->port
.state
->xmit
;
183 if (uap
->port
.x_char
) {
184 writew(uap
->port
.x_char
, uap
->port
.membase
+ UART01x_DR
);
185 uap
->port
.icount
.tx
++;
186 uap
->port
.x_char
= 0;
189 if (uart_circ_empty(xmit
) || uart_tx_stopped(&uap
->port
)) {
190 pl011_stop_tx(&uap
->port
);
194 count
= uap
->port
.fifosize
>> 1;
196 writew(xmit
->buf
[xmit
->tail
], uap
->port
.membase
+ UART01x_DR
);
197 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
198 uap
->port
.icount
.tx
++;
199 if (uart_circ_empty(xmit
))
201 } while (--count
> 0);
203 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
204 uart_write_wakeup(&uap
->port
);
206 if (uart_circ_empty(xmit
))
207 pl011_stop_tx(&uap
->port
);
210 static void pl011_modem_status(struct uart_amba_port
*uap
)
212 unsigned int status
, delta
;
214 status
= readw(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
216 delta
= status
^ uap
->old_status
;
217 uap
->old_status
= status
;
222 if (delta
& UART01x_FR_DCD
)
223 uart_handle_dcd_change(&uap
->port
, status
& UART01x_FR_DCD
);
225 if (delta
& UART01x_FR_DSR
)
226 uap
->port
.icount
.dsr
++;
228 if (delta
& UART01x_FR_CTS
)
229 uart_handle_cts_change(&uap
->port
, status
& UART01x_FR_CTS
);
231 wake_up_interruptible(&uap
->port
.state
->port
.delta_msr_wait
);
234 static irqreturn_t
pl011_int(int irq
, void *dev_id
)
236 struct uart_amba_port
*uap
= dev_id
;
237 unsigned int status
, pass_counter
= AMBA_ISR_PASS_LIMIT
;
240 spin_lock(&uap
->port
.lock
);
242 status
= readw(uap
->port
.membase
+ UART011_MIS
);
245 writew(status
& ~(UART011_TXIS
|UART011_RTIS
|
247 uap
->port
.membase
+ UART011_ICR
);
249 if (status
& (UART011_RTIS
|UART011_RXIS
))
251 if (status
& (UART011_DSRMIS
|UART011_DCDMIS
|
252 UART011_CTSMIS
|UART011_RIMIS
))
253 pl011_modem_status(uap
);
254 if (status
& UART011_TXIS
)
257 if (pass_counter
-- == 0)
260 status
= readw(uap
->port
.membase
+ UART011_MIS
);
261 } while (status
!= 0);
265 spin_unlock(&uap
->port
.lock
);
267 return IRQ_RETVAL(handled
);
270 static unsigned int pl01x_tx_empty(struct uart_port
*port
)
272 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
273 unsigned int status
= readw(uap
->port
.membase
+ UART01x_FR
);
274 return status
& (UART01x_FR_BUSY
|UART01x_FR_TXFF
) ? 0 : TIOCSER_TEMT
;
277 static unsigned int pl01x_get_mctrl(struct uart_port
*port
)
279 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
280 unsigned int result
= 0;
281 unsigned int status
= readw(uap
->port
.membase
+ UART01x_FR
);
283 #define TIOCMBIT(uartbit, tiocmbit) \
284 if (status & uartbit) \
287 TIOCMBIT(UART01x_FR_DCD
, TIOCM_CAR
);
288 TIOCMBIT(UART01x_FR_DSR
, TIOCM_DSR
);
289 TIOCMBIT(UART01x_FR_CTS
, TIOCM_CTS
);
290 TIOCMBIT(UART011_FR_RI
, TIOCM_RNG
);
295 static void pl011_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
297 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
300 cr
= readw(uap
->port
.membase
+ UART011_CR
);
302 #define TIOCMBIT(tiocmbit, uartbit) \
303 if (mctrl & tiocmbit) \
308 TIOCMBIT(TIOCM_RTS
, UART011_CR_RTS
);
309 TIOCMBIT(TIOCM_DTR
, UART011_CR_DTR
);
310 TIOCMBIT(TIOCM_OUT1
, UART011_CR_OUT1
);
311 TIOCMBIT(TIOCM_OUT2
, UART011_CR_OUT2
);
312 TIOCMBIT(TIOCM_LOOP
, UART011_CR_LBE
);
315 /* We need to disable auto-RTS if we want to turn RTS off */
316 TIOCMBIT(TIOCM_RTS
, UART011_CR_RTSEN
);
320 writew(cr
, uap
->port
.membase
+ UART011_CR
);
323 static void pl011_break_ctl(struct uart_port
*port
, int break_state
)
325 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
329 spin_lock_irqsave(&uap
->port
.lock
, flags
);
330 lcr_h
= readw(uap
->port
.membase
+ UART011_LCRH
);
331 if (break_state
== -1)
332 lcr_h
|= UART01x_LCRH_BRK
;
334 lcr_h
&= ~UART01x_LCRH_BRK
;
335 writew(lcr_h
, uap
->port
.membase
+ UART011_LCRH
);
336 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
339 #ifdef CONFIG_CONSOLE_POLL
340 static int pl010_get_poll_char(struct uart_port
*port
)
342 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
346 status
= readw(uap
->port
.membase
+ UART01x_FR
);
347 } while (status
& UART01x_FR_RXFE
);
349 return readw(uap
->port
.membase
+ UART01x_DR
);
352 static void pl010_put_poll_char(struct uart_port
*port
,
355 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
357 while (readw(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_TXFF
)
360 writew(ch
, uap
->port
.membase
+ UART01x_DR
);
363 #endif /* CONFIG_CONSOLE_POLL */
365 static int pl011_startup(struct uart_port
*port
)
367 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
372 * Try to enable the clock producer.
374 retval
= clk_enable(uap
->clk
);
378 uap
->port
.uartclk
= clk_get_rate(uap
->clk
);
383 retval
= request_irq(uap
->port
.irq
, pl011_int
, 0, "uart-pl011", uap
);
387 writew(uap
->ifls
, uap
->port
.membase
+ UART011_IFLS
);
390 * Provoke TX FIFO interrupt into asserting.
392 cr
= UART01x_CR_UARTEN
| UART011_CR_TXE
| UART011_CR_LBE
;
393 writew(cr
, uap
->port
.membase
+ UART011_CR
);
394 writew(0, uap
->port
.membase
+ UART011_FBRD
);
395 writew(1, uap
->port
.membase
+ UART011_IBRD
);
396 writew(0, uap
->port
.membase
+ UART011_LCRH
);
397 writew(0, uap
->port
.membase
+ UART01x_DR
);
398 while (readw(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_BUSY
)
401 cr
= UART01x_CR_UARTEN
| UART011_CR_RXE
| UART011_CR_TXE
;
402 writew(cr
, uap
->port
.membase
+ UART011_CR
);
405 * initialise the old status of the modem signals
407 uap
->old_status
= readw(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
410 * Finally, enable interrupts
412 spin_lock_irq(&uap
->port
.lock
);
413 uap
->im
= UART011_RXIM
| UART011_RTIM
;
414 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
415 spin_unlock_irq(&uap
->port
.lock
);
420 clk_disable(uap
->clk
);
425 static void pl011_shutdown(struct uart_port
*port
)
427 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
431 * disable all interrupts
433 spin_lock_irq(&uap
->port
.lock
);
435 writew(uap
->im
, uap
->port
.membase
+ UART011_IMSC
);
436 writew(0xffff, uap
->port
.membase
+ UART011_ICR
);
437 spin_unlock_irq(&uap
->port
.lock
);
442 free_irq(uap
->port
.irq
, uap
);
447 uap
->autorts
= false;
448 writew(UART01x_CR_UARTEN
| UART011_CR_TXE
, uap
->port
.membase
+ UART011_CR
);
451 * disable break condition and fifos
453 val
= readw(uap
->port
.membase
+ UART011_LCRH
);
454 val
&= ~(UART01x_LCRH_BRK
| UART01x_LCRH_FEN
);
455 writew(val
, uap
->port
.membase
+ UART011_LCRH
);
458 * Shut down the clock producer
460 clk_disable(uap
->clk
);
464 pl011_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
465 struct ktermios
*old
)
467 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
468 unsigned int lcr_h
, old_cr
;
470 unsigned int baud
, quot
;
473 * Ask the core to calculate the divisor for us.
475 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
476 quot
= port
->uartclk
* 4 / baud
;
478 switch (termios
->c_cflag
& CSIZE
) {
480 lcr_h
= UART01x_LCRH_WLEN_5
;
483 lcr_h
= UART01x_LCRH_WLEN_6
;
486 lcr_h
= UART01x_LCRH_WLEN_7
;
489 lcr_h
= UART01x_LCRH_WLEN_8
;
492 if (termios
->c_cflag
& CSTOPB
)
493 lcr_h
|= UART01x_LCRH_STP2
;
494 if (termios
->c_cflag
& PARENB
) {
495 lcr_h
|= UART01x_LCRH_PEN
;
496 if (!(termios
->c_cflag
& PARODD
))
497 lcr_h
|= UART01x_LCRH_EPS
;
499 if (port
->fifosize
> 1)
500 lcr_h
|= UART01x_LCRH_FEN
;
502 spin_lock_irqsave(&port
->lock
, flags
);
505 * Update the per-port timeout.
507 uart_update_timeout(port
, termios
->c_cflag
, baud
);
509 port
->read_status_mask
= UART011_DR_OE
| 255;
510 if (termios
->c_iflag
& INPCK
)
511 port
->read_status_mask
|= UART011_DR_FE
| UART011_DR_PE
;
512 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
513 port
->read_status_mask
|= UART011_DR_BE
;
516 * Characters to ignore
518 port
->ignore_status_mask
= 0;
519 if (termios
->c_iflag
& IGNPAR
)
520 port
->ignore_status_mask
|= UART011_DR_FE
| UART011_DR_PE
;
521 if (termios
->c_iflag
& IGNBRK
) {
522 port
->ignore_status_mask
|= UART011_DR_BE
;
524 * If we're ignoring parity and break indicators,
525 * ignore overruns too (for real raw support).
527 if (termios
->c_iflag
& IGNPAR
)
528 port
->ignore_status_mask
|= UART011_DR_OE
;
532 * Ignore all characters if CREAD is not set.
534 if ((termios
->c_cflag
& CREAD
) == 0)
535 port
->ignore_status_mask
|= UART_DUMMY_DR_RX
;
537 if (UART_ENABLE_MS(port
, termios
->c_cflag
))
538 pl011_enable_ms(port
);
540 /* first, disable everything */
541 old_cr
= readw(port
->membase
+ UART011_CR
);
542 writew(0, port
->membase
+ UART011_CR
);
544 if (termios
->c_cflag
& CRTSCTS
) {
545 if (old_cr
& UART011_CR_RTS
)
546 old_cr
|= UART011_CR_RTSEN
;
548 old_cr
|= UART011_CR_CTSEN
;
551 old_cr
&= ~(UART011_CR_CTSEN
| UART011_CR_RTSEN
);
552 uap
->autorts
= false;
556 writew(quot
& 0x3f, port
->membase
+ UART011_FBRD
);
557 writew(quot
>> 6, port
->membase
+ UART011_IBRD
);
560 * ----------v----------v----------v----------v-----
561 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
562 * ----------^----------^----------^----------^-----
564 writew(lcr_h
, port
->membase
+ UART011_LCRH
);
565 writew(old_cr
, port
->membase
+ UART011_CR
);
567 spin_unlock_irqrestore(&port
->lock
, flags
);
570 static const char *pl011_type(struct uart_port
*port
)
572 return port
->type
== PORT_AMBA
? "AMBA/PL011" : NULL
;
576 * Release the memory region(s) being used by 'port'
578 static void pl010_release_port(struct uart_port
*port
)
580 release_mem_region(port
->mapbase
, SZ_4K
);
584 * Request the memory region(s) being used by 'port'
586 static int pl010_request_port(struct uart_port
*port
)
588 return request_mem_region(port
->mapbase
, SZ_4K
, "uart-pl011")
589 != NULL
? 0 : -EBUSY
;
593 * Configure/autoconfigure the port.
595 static void pl010_config_port(struct uart_port
*port
, int flags
)
597 if (flags
& UART_CONFIG_TYPE
) {
598 port
->type
= PORT_AMBA
;
599 pl010_request_port(port
);
604 * verify the new serial_struct (for TIOCSSERIAL).
606 static int pl010_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
609 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_AMBA
)
611 if (ser
->irq
< 0 || ser
->irq
>= nr_irqs
)
613 if (ser
->baud_base
< 9600)
618 static struct uart_ops amba_pl011_pops
= {
619 .tx_empty
= pl01x_tx_empty
,
620 .set_mctrl
= pl011_set_mctrl
,
621 .get_mctrl
= pl01x_get_mctrl
,
622 .stop_tx
= pl011_stop_tx
,
623 .start_tx
= pl011_start_tx
,
624 .stop_rx
= pl011_stop_rx
,
625 .enable_ms
= pl011_enable_ms
,
626 .break_ctl
= pl011_break_ctl
,
627 .startup
= pl011_startup
,
628 .shutdown
= pl011_shutdown
,
629 .set_termios
= pl011_set_termios
,
631 .release_port
= pl010_release_port
,
632 .request_port
= pl010_request_port
,
633 .config_port
= pl010_config_port
,
634 .verify_port
= pl010_verify_port
,
635 #ifdef CONFIG_CONSOLE_POLL
636 .poll_get_char
= pl010_get_poll_char
,
637 .poll_put_char
= pl010_put_poll_char
,
641 static struct uart_amba_port
*amba_ports
[UART_NR
];
643 #ifdef CONFIG_SERIAL_AMBA_PL011_CONSOLE
645 static void pl011_console_putchar(struct uart_port
*port
, int ch
)
647 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
649 while (readw(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_TXFF
)
651 writew(ch
, uap
->port
.membase
+ UART01x_DR
);
655 pl011_console_write(struct console
*co
, const char *s
, unsigned int count
)
657 struct uart_amba_port
*uap
= amba_ports
[co
->index
];
658 unsigned int status
, old_cr
, new_cr
;
660 clk_enable(uap
->clk
);
663 * First save the CR then disable the interrupts
665 old_cr
= readw(uap
->port
.membase
+ UART011_CR
);
666 new_cr
= old_cr
& ~UART011_CR_CTSEN
;
667 new_cr
|= UART01x_CR_UARTEN
| UART011_CR_TXE
;
668 writew(new_cr
, uap
->port
.membase
+ UART011_CR
);
670 uart_console_write(&uap
->port
, s
, count
, pl011_console_putchar
);
673 * Finally, wait for transmitter to become empty
674 * and restore the TCR
677 status
= readw(uap
->port
.membase
+ UART01x_FR
);
678 } while (status
& UART01x_FR_BUSY
);
679 writew(old_cr
, uap
->port
.membase
+ UART011_CR
);
681 clk_disable(uap
->clk
);
685 pl011_console_get_options(struct uart_amba_port
*uap
, int *baud
,
686 int *parity
, int *bits
)
688 if (readw(uap
->port
.membase
+ UART011_CR
) & UART01x_CR_UARTEN
) {
689 unsigned int lcr_h
, ibrd
, fbrd
;
691 lcr_h
= readw(uap
->port
.membase
+ UART011_LCRH
);
694 if (lcr_h
& UART01x_LCRH_PEN
) {
695 if (lcr_h
& UART01x_LCRH_EPS
)
701 if ((lcr_h
& 0x60) == UART01x_LCRH_WLEN_7
)
706 ibrd
= readw(uap
->port
.membase
+ UART011_IBRD
);
707 fbrd
= readw(uap
->port
.membase
+ UART011_FBRD
);
709 *baud
= uap
->port
.uartclk
* 4 / (64 * ibrd
+ fbrd
);
713 static int __init
pl011_console_setup(struct console
*co
, char *options
)
715 struct uart_amba_port
*uap
;
722 * Check whether an invalid uart number has been specified, and
723 * if so, search for the first available port that does have
726 if (co
->index
>= UART_NR
)
728 uap
= amba_ports
[co
->index
];
732 uap
->port
.uartclk
= clk_get_rate(uap
->clk
);
735 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
737 pl011_console_get_options(uap
, &baud
, &parity
, &bits
);
739 return uart_set_options(&uap
->port
, co
, baud
, parity
, bits
, flow
);
742 static struct uart_driver amba_reg
;
743 static struct console amba_console
= {
745 .write
= pl011_console_write
,
746 .device
= uart_console_device
,
747 .setup
= pl011_console_setup
,
748 .flags
= CON_PRINTBUFFER
,
753 #define AMBA_CONSOLE (&amba_console)
755 #define AMBA_CONSOLE NULL
758 static struct uart_driver amba_reg
= {
759 .owner
= THIS_MODULE
,
760 .driver_name
= "ttyAMA",
761 .dev_name
= "ttyAMA",
762 .major
= SERIAL_AMBA_MAJOR
,
763 .minor
= SERIAL_AMBA_MINOR
,
765 .cons
= AMBA_CONSOLE
,
768 static int pl011_probe(struct amba_device
*dev
, struct amba_id
*id
)
770 struct uart_amba_port
*uap
;
771 struct vendor_data
*vendor
= id
->data
;
775 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
776 if (amba_ports
[i
] == NULL
)
779 if (i
== ARRAY_SIZE(amba_ports
)) {
784 uap
= kzalloc(sizeof(struct uart_amba_port
), GFP_KERNEL
);
790 base
= ioremap(dev
->res
.start
, resource_size(&dev
->res
));
796 uap
->clk
= clk_get(&dev
->dev
, NULL
);
797 if (IS_ERR(uap
->clk
)) {
798 ret
= PTR_ERR(uap
->clk
);
802 uap
->ifls
= vendor
->ifls
;
803 uap
->port
.dev
= &dev
->dev
;
804 uap
->port
.mapbase
= dev
->res
.start
;
805 uap
->port
.membase
= base
;
806 uap
->port
.iotype
= UPIO_MEM
;
807 uap
->port
.irq
= dev
->irq
[0];
808 uap
->port
.fifosize
= vendor
->fifosize
;
809 uap
->port
.ops
= &amba_pl011_pops
;
810 uap
->port
.flags
= UPF_BOOT_AUTOCONF
;
815 amba_set_drvdata(dev
, uap
);
816 ret
= uart_add_one_port(&amba_reg
, &uap
->port
);
818 amba_set_drvdata(dev
, NULL
);
819 amba_ports
[i
] = NULL
;
830 static int pl011_remove(struct amba_device
*dev
)
832 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
835 amba_set_drvdata(dev
, NULL
);
837 uart_remove_one_port(&amba_reg
, &uap
->port
);
839 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
840 if (amba_ports
[i
] == uap
)
841 amba_ports
[i
] = NULL
;
843 iounmap(uap
->port
.membase
);
850 static int pl011_suspend(struct amba_device
*dev
, pm_message_t state
)
852 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
857 return uart_suspend_port(&amba_reg
, &uap
->port
);
860 static int pl011_resume(struct amba_device
*dev
)
862 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
867 return uart_resume_port(&amba_reg
, &uap
->port
);
871 static struct amba_id pl011_ids
[] __initdata
= {
885 static struct amba_driver pl011_driver
= {
887 .name
= "uart-pl011",
889 .id_table
= pl011_ids
,
890 .probe
= pl011_probe
,
891 .remove
= pl011_remove
,
893 .suspend
= pl011_suspend
,
894 .resume
= pl011_resume
,
898 static int __init
pl011_init(void)
901 printk(KERN_INFO
"Serial: AMBA PL011 UART driver\n");
903 ret
= uart_register_driver(&amba_reg
);
905 ret
= amba_driver_register(&pl011_driver
);
907 uart_unregister_driver(&amba_reg
);
912 static void __exit
pl011_exit(void)
914 amba_driver_unregister(&pl011_driver
);
915 uart_unregister_driver(&amba_reg
);
919 * While this can be a module, if builtin it's most likely the console
920 * So let's leave module_exit but move module_init to an earlier place
922 arch_initcall(pl011_init
);
923 module_exit(pl011_exit
);
925 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
926 MODULE_DESCRIPTION("ARM AMBA serial port driver");
927 MODULE_LICENSE("GPL");