5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/gfp.h>
21 #include <linux/irqreturn.h>
22 #include <linux/irqnr.h>
23 #include <linux/errno.h>
24 #include <linux/topology.h>
25 #include <linux/wait.h>
26 #include <linux/module.h>
29 #include <asm/ptrace.h>
30 #include <asm/irq_regs.h>
35 typedef void (*irq_flow_handler_t
)(unsigned int irq
,
36 struct irq_desc
*desc
);
37 typedef void (*irq_preflow_handler_t
)(struct irq_data
*data
);
42 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
44 * IRQ_TYPE_NONE - default, unspecified type
45 * IRQ_TYPE_EDGE_RISING - rising edge triggered
46 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
47 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
48 * IRQ_TYPE_LEVEL_HIGH - high level triggered
49 * IRQ_TYPE_LEVEL_LOW - low level triggered
50 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
51 * IRQ_TYPE_SENSE_MASK - Mask for all the above bits
52 * IRQ_TYPE_PROBE - Special flag for probing in progress
54 * Bits which can be modified via irq_set/clear/modify_status_flags()
55 * IRQ_LEVEL - Interrupt is level type. Will be also
56 * updated in the code when the above trigger
57 * bits are modified via irq_set_irq_type()
58 * IRQ_PER_CPU - Mark an interrupt PER_CPU. Will protect
59 * it from affinity setting
60 * IRQ_NOPROBE - Interrupt cannot be probed by autoprobing
61 * IRQ_NOREQUEST - Interrupt cannot be requested via
63 * IRQ_NOTHREAD - Interrupt cannot be threaded
64 * IRQ_NOAUTOEN - Interrupt is not automatically enabled in
66 * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set)
67 * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context
68 * IRQ_NESTED_TRHEAD - Interrupt nests into another thread
71 IRQ_TYPE_NONE
= 0x00000000,
72 IRQ_TYPE_EDGE_RISING
= 0x00000001,
73 IRQ_TYPE_EDGE_FALLING
= 0x00000002,
74 IRQ_TYPE_EDGE_BOTH
= (IRQ_TYPE_EDGE_FALLING
| IRQ_TYPE_EDGE_RISING
),
75 IRQ_TYPE_LEVEL_HIGH
= 0x00000004,
76 IRQ_TYPE_LEVEL_LOW
= 0x00000008,
77 IRQ_TYPE_LEVEL_MASK
= (IRQ_TYPE_LEVEL_LOW
| IRQ_TYPE_LEVEL_HIGH
),
78 IRQ_TYPE_SENSE_MASK
= 0x0000000f,
80 IRQ_TYPE_PROBE
= 0x00000010,
83 IRQ_PER_CPU
= (1 << 9),
84 IRQ_NOPROBE
= (1 << 10),
85 IRQ_NOREQUEST
= (1 << 11),
86 IRQ_NOAUTOEN
= (1 << 12),
87 IRQ_NO_BALANCING
= (1 << 13),
88 IRQ_MOVE_PCNTXT
= (1 << 14),
89 IRQ_NESTED_THREAD
= (1 << 15),
90 IRQ_NOTHREAD
= (1 << 16),
93 #define IRQF_MODIFY_MASK \
94 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
95 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
96 IRQ_PER_CPU | IRQ_NESTED_THREAD)
98 #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
100 static inline __deprecated
bool CHECK_IRQ_PER_CPU(unsigned int status
)
102 return status
& IRQ_PER_CPU
;
106 * Return value for chip->irq_set_affinity()
108 * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity
109 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity
113 IRQ_SET_MASK_OK_NOCOPY
,
119 * struct irq_data - per irq and irq chip data passed down to chip functions
120 * @irq: interrupt number
121 * @node: node index useful for balancing
122 * @state_use_accessors: status information for irq chip functions.
123 * Use accessor functions to deal with it
124 * @chip: low level interrupt hardware access
125 * @handler_data: per-IRQ data for the irq_chip methods
126 * @chip_data: platform-specific per-chip private data for the chip
127 * methods, to allow shared chip implementations
128 * @msi_desc: MSI descriptor
129 * @affinity: IRQ affinity on SMP
131 * The fields here need to overlay the ones in irq_desc until we
132 * cleaned up the direct references and switched everything over to
138 unsigned int state_use_accessors
;
139 struct irq_chip
*chip
;
142 struct msi_desc
*msi_desc
;
144 cpumask_var_t affinity
;
149 * Bit masks for irq_data.state
151 * IRQD_TRIGGER_MASK - Mask for the trigger type bits
152 * IRQD_SETAFFINITY_PENDING - Affinity setting is pending
153 * IRQD_NO_BALANCING - Balancing disabled for this IRQ
154 * IRQD_PER_CPU - Interrupt is per cpu
155 * IRQD_AFFINITY_SET - Interrupt affinity was set
156 * IRQD_LEVEL - Interrupt is level triggered
157 * IRQD_WAKEUP_STATE - Interrupt is configured for wakeup
159 * IRDQ_MOVE_PCNTXT - Interrupt can be moved in process
161 * IRQD_IRQ_DISABLED - Disabled state of the interrupt
162 * IRQD_IRQ_MASKED - Masked state of the interrupt
163 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
166 IRQD_TRIGGER_MASK
= 0xf,
167 IRQD_SETAFFINITY_PENDING
= (1 << 8),
168 IRQD_NO_BALANCING
= (1 << 10),
169 IRQD_PER_CPU
= (1 << 11),
170 IRQD_AFFINITY_SET
= (1 << 12),
171 IRQD_LEVEL
= (1 << 13),
172 IRQD_WAKEUP_STATE
= (1 << 14),
173 IRQD_MOVE_PCNTXT
= (1 << 15),
174 IRQD_IRQ_DISABLED
= (1 << 16),
175 IRQD_IRQ_MASKED
= (1 << 17),
176 IRQD_IRQ_INPROGRESS
= (1 << 18),
179 static inline bool irqd_is_setaffinity_pending(struct irq_data
*d
)
181 return d
->state_use_accessors
& IRQD_SETAFFINITY_PENDING
;
184 static inline bool irqd_is_per_cpu(struct irq_data
*d
)
186 return d
->state_use_accessors
& IRQD_PER_CPU
;
189 static inline bool irqd_can_balance(struct irq_data
*d
)
191 return !(d
->state_use_accessors
& (IRQD_PER_CPU
| IRQD_NO_BALANCING
));
194 static inline bool irqd_affinity_was_set(struct irq_data
*d
)
196 return d
->state_use_accessors
& IRQD_AFFINITY_SET
;
199 static inline void irqd_mark_affinity_was_set(struct irq_data
*d
)
201 d
->state_use_accessors
|= IRQD_AFFINITY_SET
;
204 static inline u32
irqd_get_trigger_type(struct irq_data
*d
)
206 return d
->state_use_accessors
& IRQD_TRIGGER_MASK
;
210 * Must only be called inside irq_chip.irq_set_type() functions.
212 static inline void irqd_set_trigger_type(struct irq_data
*d
, u32 type
)
214 d
->state_use_accessors
&= ~IRQD_TRIGGER_MASK
;
215 d
->state_use_accessors
|= type
& IRQD_TRIGGER_MASK
;
218 static inline bool irqd_is_level_type(struct irq_data
*d
)
220 return d
->state_use_accessors
& IRQD_LEVEL
;
223 static inline bool irqd_is_wakeup_set(struct irq_data
*d
)
225 return d
->state_use_accessors
& IRQD_WAKEUP_STATE
;
228 static inline bool irqd_can_move_in_process_context(struct irq_data
*d
)
230 return d
->state_use_accessors
& IRQD_MOVE_PCNTXT
;
233 static inline bool irqd_irq_disabled(struct irq_data
*d
)
235 return d
->state_use_accessors
& IRQD_IRQ_DISABLED
;
238 static inline bool irqd_irq_masked(struct irq_data
*d
)
240 return d
->state_use_accessors
& IRQD_IRQ_MASKED
;
243 static inline bool irqd_irq_inprogress(struct irq_data
*d
)
245 return d
->state_use_accessors
& IRQD_IRQ_INPROGRESS
;
249 * Functions for chained handlers which can be enabled/disabled by the
250 * standard disable_irq/enable_irq calls. Must be called with
251 * irq_desc->lock held.
253 static inline void irqd_set_chained_irq_inprogress(struct irq_data
*d
)
255 d
->state_use_accessors
|= IRQD_IRQ_INPROGRESS
;
258 static inline void irqd_clr_chained_irq_inprogress(struct irq_data
*d
)
260 d
->state_use_accessors
&= ~IRQD_IRQ_INPROGRESS
;
264 * struct irq_chip - hardware interrupt chip descriptor
266 * @name: name for /proc/interrupts
267 * @irq_startup: start up the interrupt (defaults to ->enable if NULL)
268 * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL)
269 * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL)
270 * @irq_disable: disable the interrupt
271 * @irq_ack: start of a new interrupt
272 * @irq_mask: mask an interrupt source
273 * @irq_mask_ack: ack and mask an interrupt source
274 * @irq_unmask: unmask an interrupt source
275 * @irq_eoi: end of interrupt
276 * @irq_set_affinity: set the CPU affinity on SMP machines
277 * @irq_retrigger: resend an IRQ to the CPU
278 * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
279 * @irq_set_wake: enable/disable power-management wake-on of an IRQ
280 * @irq_bus_lock: function to lock access to slow bus (i2c) chips
281 * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
282 * @irq_cpu_online: configure an interrupt source for a secondary CPU
283 * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
284 * @irq_suspend: function called from core code on suspend once per chip
285 * @irq_resume: function called from core code on resume once per chip
286 * @irq_pm_shutdown: function called from core code on shutdown once per chip
287 * @irq_print_chip: optional to print special chip info in show_interrupts
288 * @flags: chip specific flags
290 * @release: release function solely used by UML
294 unsigned int (*irq_startup
)(struct irq_data
*data
);
295 void (*irq_shutdown
)(struct irq_data
*data
);
296 void (*irq_enable
)(struct irq_data
*data
);
297 void (*irq_disable
)(struct irq_data
*data
);
299 void (*irq_ack
)(struct irq_data
*data
);
300 void (*irq_mask
)(struct irq_data
*data
);
301 void (*irq_mask_ack
)(struct irq_data
*data
);
302 void (*irq_unmask
)(struct irq_data
*data
);
303 void (*irq_eoi
)(struct irq_data
*data
);
305 int (*irq_set_affinity
)(struct irq_data
*data
, const struct cpumask
*dest
, bool force
);
306 int (*irq_retrigger
)(struct irq_data
*data
);
307 int (*irq_set_type
)(struct irq_data
*data
, unsigned int flow_type
);
308 int (*irq_set_wake
)(struct irq_data
*data
, unsigned int on
);
310 void (*irq_bus_lock
)(struct irq_data
*data
);
311 void (*irq_bus_sync_unlock
)(struct irq_data
*data
);
313 void (*irq_cpu_online
)(struct irq_data
*data
);
314 void (*irq_cpu_offline
)(struct irq_data
*data
);
316 void (*irq_suspend
)(struct irq_data
*data
);
317 void (*irq_resume
)(struct irq_data
*data
);
318 void (*irq_pm_shutdown
)(struct irq_data
*data
);
320 void (*irq_print_chip
)(struct irq_data
*data
, struct seq_file
*p
);
324 /* Currently used only by UML, might disappear one day.*/
325 #ifdef CONFIG_IRQ_RELEASE_METHOD
326 void (*release
)(unsigned int irq
, void *dev_id
);
331 * irq_chip specific flags
333 * IRQCHIP_SET_TYPE_MASKED: Mask before calling chip.irq_set_type()
334 * IRQCHIP_EOI_IF_HANDLED: Only issue irq_eoi() when irq was handled
335 * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path
336 * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
340 IRQCHIP_SET_TYPE_MASKED
= (1 << 0),
341 IRQCHIP_EOI_IF_HANDLED
= (1 << 1),
342 IRQCHIP_MASK_ON_SUSPEND
= (1 << 2),
343 IRQCHIP_ONOFFLINE_ENABLED
= (1 << 3),
346 /* This include will go away once we isolated irq_desc usage to core code */
347 #include <linux/irqdesc.h>
350 * Pick up the arch-dependent methods:
352 #include <asm/hw_irq.h>
354 #ifndef NR_IRQS_LEGACY
355 # define NR_IRQS_LEGACY 0
358 #ifndef ARCH_IRQ_INIT_FLAGS
359 # define ARCH_IRQ_INIT_FLAGS 0
362 #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
365 extern int setup_irq(unsigned int irq
, struct irqaction
*new);
366 extern void remove_irq(unsigned int irq
, struct irqaction
*act
);
368 extern void irq_cpu_online(void);
369 extern void irq_cpu_offline(void);
370 extern int __irq_set_affinity_locked(struct irq_data
*data
, const struct cpumask
*cpumask
);
372 #ifdef CONFIG_GENERIC_HARDIRQS
374 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
375 void irq_move_irq(struct irq_data
*data
);
376 void irq_move_masked_irq(struct irq_data
*data
);
378 static inline void irq_move_irq(struct irq_data
*data
) { }
379 static inline void irq_move_masked_irq(struct irq_data
*data
) { }
382 extern int no_irq_affinity
;
385 * Built-in IRQ handlers for various IRQ types,
386 * callable via desc->handle_irq()
388 extern void handle_level_irq(unsigned int irq
, struct irq_desc
*desc
);
389 extern void handle_fasteoi_irq(unsigned int irq
, struct irq_desc
*desc
);
390 extern void handle_edge_irq(unsigned int irq
, struct irq_desc
*desc
);
391 extern void handle_edge_eoi_irq(unsigned int irq
, struct irq_desc
*desc
);
392 extern void handle_simple_irq(unsigned int irq
, struct irq_desc
*desc
);
393 extern void handle_percpu_irq(unsigned int irq
, struct irq_desc
*desc
);
394 extern void handle_bad_irq(unsigned int irq
, struct irq_desc
*desc
);
395 extern void handle_nested_irq(unsigned int irq
);
397 /* Handling of unhandled and spurious interrupts: */
398 extern void note_interrupt(unsigned int irq
, struct irq_desc
*desc
,
399 irqreturn_t action_ret
);
402 /* Enable/disable irq debugging output: */
403 extern int noirqdebug_setup(char *str
);
405 /* Checks whether the interrupt can be requested by request_irq(): */
406 extern int can_request_irq(unsigned int irq
, unsigned long irqflags
);
408 /* Dummy irq-chip implementations: */
409 extern struct irq_chip no_irq_chip
;
410 extern struct irq_chip dummy_irq_chip
;
413 irq_set_chip_and_handler_name(unsigned int irq
, struct irq_chip
*chip
,
414 irq_flow_handler_t handle
, const char *name
);
416 static inline void irq_set_chip_and_handler(unsigned int irq
, struct irq_chip
*chip
,
417 irq_flow_handler_t handle
)
419 irq_set_chip_and_handler_name(irq
, chip
, handle
, NULL
);
423 __irq_set_handler(unsigned int irq
, irq_flow_handler_t handle
, int is_chained
,
427 irq_set_handler(unsigned int irq
, irq_flow_handler_t handle
)
429 __irq_set_handler(irq
, handle
, 0, NULL
);
433 * Set a highlevel chained flow handler for a given IRQ.
434 * (a chained handler is automatically enabled and set to
435 * IRQ_NOREQUEST, IRQ_NOPROBE, and IRQ_NOTHREAD)
438 irq_set_chained_handler(unsigned int irq
, irq_flow_handler_t handle
)
440 __irq_set_handler(irq
, handle
, 1, NULL
);
443 void irq_modify_status(unsigned int irq
, unsigned long clr
, unsigned long set
);
445 static inline void irq_set_status_flags(unsigned int irq
, unsigned long set
)
447 irq_modify_status(irq
, 0, set
);
450 static inline void irq_clear_status_flags(unsigned int irq
, unsigned long clr
)
452 irq_modify_status(irq
, clr
, 0);
455 static inline void irq_set_noprobe(unsigned int irq
)
457 irq_modify_status(irq
, 0, IRQ_NOPROBE
);
460 static inline void irq_set_probe(unsigned int irq
)
462 irq_modify_status(irq
, IRQ_NOPROBE
, 0);
465 static inline void irq_set_nothread(unsigned int irq
)
467 irq_modify_status(irq
, 0, IRQ_NOTHREAD
);
470 static inline void irq_set_thread(unsigned int irq
)
472 irq_modify_status(irq
, IRQ_NOTHREAD
, 0);
475 static inline void irq_set_nested_thread(unsigned int irq
, bool nest
)
478 irq_set_status_flags(irq
, IRQ_NESTED_THREAD
);
480 irq_clear_status_flags(irq
, IRQ_NESTED_THREAD
);
483 /* Handle dynamic irq creation and destruction */
484 extern unsigned int create_irq_nr(unsigned int irq_want
, int node
);
485 extern int create_irq(void);
486 extern void destroy_irq(unsigned int irq
);
489 * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
490 * irq_free_desc instead.
492 extern void dynamic_irq_cleanup(unsigned int irq
);
493 static inline void dynamic_irq_init(unsigned int irq
)
495 dynamic_irq_cleanup(irq
);
498 /* Set/get chip/data for an IRQ: */
499 extern int irq_set_chip(unsigned int irq
, struct irq_chip
*chip
);
500 extern int irq_set_handler_data(unsigned int irq
, void *data
);
501 extern int irq_set_chip_data(unsigned int irq
, void *data
);
502 extern int irq_set_irq_type(unsigned int irq
, unsigned int type
);
503 extern int irq_set_msi_desc(unsigned int irq
, struct msi_desc
*entry
);
504 extern struct irq_data
*irq_get_irq_data(unsigned int irq
);
506 static inline struct irq_chip
*irq_get_chip(unsigned int irq
)
508 struct irq_data
*d
= irq_get_irq_data(irq
);
509 return d
? d
->chip
: NULL
;
512 static inline struct irq_chip
*irq_data_get_irq_chip(struct irq_data
*d
)
517 static inline void *irq_get_chip_data(unsigned int irq
)
519 struct irq_data
*d
= irq_get_irq_data(irq
);
520 return d
? d
->chip_data
: NULL
;
523 static inline void *irq_data_get_irq_chip_data(struct irq_data
*d
)
528 static inline void *irq_get_handler_data(unsigned int irq
)
530 struct irq_data
*d
= irq_get_irq_data(irq
);
531 return d
? d
->handler_data
: NULL
;
534 static inline void *irq_data_get_irq_handler_data(struct irq_data
*d
)
536 return d
->handler_data
;
539 static inline struct msi_desc
*irq_get_msi_desc(unsigned int irq
)
541 struct irq_data
*d
= irq_get_irq_data(irq
);
542 return d
? d
->msi_desc
: NULL
;
545 static inline struct msi_desc
*irq_data_get_msi(struct irq_data
*d
)
550 int __irq_alloc_descs(int irq
, unsigned int from
, unsigned int cnt
, int node
,
551 struct module
*owner
);
553 static inline int irq_alloc_descs(int irq
, unsigned int from
, unsigned int cnt
,
556 return __irq_alloc_descs(irq
, from
, cnt
, node
, THIS_MODULE
);
559 void irq_free_descs(unsigned int irq
, unsigned int cnt
);
560 int irq_reserve_irqs(unsigned int from
, unsigned int cnt
);
562 static inline int irq_alloc_desc(int node
)
564 return irq_alloc_descs(-1, 0, 1, node
);
567 static inline int irq_alloc_desc_at(unsigned int at
, int node
)
569 return irq_alloc_descs(at
, at
, 1, node
);
572 static inline int irq_alloc_desc_from(unsigned int from
, int node
)
574 return irq_alloc_descs(-1, from
, 1, node
);
577 static inline void irq_free_desc(unsigned int irq
)
579 irq_free_descs(irq
, 1);
582 static inline int irq_reserve_irq(unsigned int irq
)
584 return irq_reserve_irqs(irq
, 1);
587 #ifndef irq_reg_writel
588 # define irq_reg_writel(val, addr) writel(val, addr)
590 #ifndef irq_reg_readl
591 # define irq_reg_readl(addr) readl(addr)
595 * struct irq_chip_regs - register offsets for struct irq_gci
596 * @enable: Enable register offset to reg_base
597 * @disable: Disable register offset to reg_base
598 * @mask: Mask register offset to reg_base
599 * @ack: Ack register offset to reg_base
600 * @eoi: Eoi register offset to reg_base
601 * @type: Type configuration register offset to reg_base
602 * @polarity: Polarity configuration register offset to reg_base
604 struct irq_chip_regs
{
605 unsigned long enable
;
606 unsigned long disable
;
611 unsigned long polarity
;
615 * struct irq_chip_type - Generic interrupt chip instance for a flow type
616 * @chip: The real interrupt chip which provides the callbacks
617 * @regs: Register offsets for this chip
618 * @handler: Flow handler associated with this chip
619 * @type: Chip can handle these flow types
621 * A irq_generic_chip can have several instances of irq_chip_type when
622 * it requires different functions and register offsets for different
625 struct irq_chip_type
{
626 struct irq_chip chip
;
627 struct irq_chip_regs regs
;
628 irq_flow_handler_t handler
;
633 * struct irq_chip_generic - Generic irq chip data structure
634 * @lock: Lock to protect register and cache data access
635 * @reg_base: Register base address (virtual)
636 * @irq_base: Interrupt base nr for this chip
637 * @irq_cnt: Number of interrupts handled by this chip
638 * @mask_cache: Cached mask register
639 * @type_cache: Cached type register
640 * @polarity_cache: Cached polarity register
641 * @wake_enabled: Interrupt can wakeup from suspend
642 * @wake_active: Interrupt is marked as an wakeup from suspend source
643 * @num_ct: Number of available irq_chip_type instances (usually 1)
644 * @private: Private data for non generic chip callbacks
645 * @list: List head for keeping track of instances
646 * @chip_types: Array of interrupt irq_chip_types
648 * Note, that irq_chip_generic can have multiple irq_chip_type
649 * implementations which can be associated to a particular irq line of
650 * an irq_chip_generic instance. That allows to share and protect
651 * state in an irq_chip_generic instance when we need to implement
652 * different flow mechanisms (level/edge) for it.
654 struct irq_chip_generic
{
656 void __iomem
*reg_base
;
657 unsigned int irq_base
;
658 unsigned int irq_cnt
;
666 struct list_head list
;
667 struct irq_chip_type chip_types
[0];
671 * enum irq_gc_flags - Initialization flags for generic irq chips
672 * @IRQ_GC_INIT_MASK_CACHE: Initialize the mask_cache by reading mask reg
673 * @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for
674 * irq chips which need to call irq_set_wake() on
675 * the parent irq. Usually GPIO implementations
678 IRQ_GC_INIT_MASK_CACHE
= 1 << 0,
679 IRQ_GC_INIT_NESTED_LOCK
= 1 << 1,
682 /* Generic chip callback functions */
683 void irq_gc_noop(struct irq_data
*d
);
684 void irq_gc_mask_disable_reg(struct irq_data
*d
);
685 void irq_gc_mask_set_bit(struct irq_data
*d
);
686 void irq_gc_mask_clr_bit(struct irq_data
*d
);
687 void irq_gc_unmask_enable_reg(struct irq_data
*d
);
688 void irq_gc_ack_set_bit(struct irq_data
*d
);
689 void irq_gc_ack_clr_bit(struct irq_data
*d
);
690 void irq_gc_mask_disable_reg_and_ack(struct irq_data
*d
);
691 void irq_gc_eoi(struct irq_data
*d
);
692 int irq_gc_set_wake(struct irq_data
*d
, unsigned int on
);
694 /* Setup functions for irq_chip_generic */
695 struct irq_chip_generic
*
696 irq_alloc_generic_chip(const char *name
, int nr_ct
, unsigned int irq_base
,
697 void __iomem
*reg_base
, irq_flow_handler_t handler
);
698 void irq_setup_generic_chip(struct irq_chip_generic
*gc
, u32 msk
,
699 enum irq_gc_flags flags
, unsigned int clr
,
701 int irq_setup_alt_chip(struct irq_data
*d
, unsigned int type
);
702 void irq_remove_generic_chip(struct irq_chip_generic
*gc
, u32 msk
,
703 unsigned int clr
, unsigned int set
);
705 static inline struct irq_chip_type
*irq_data_get_chip_type(struct irq_data
*d
)
707 return container_of(d
->chip
, struct irq_chip_type
, chip
);
710 #define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
713 static inline void irq_gc_lock(struct irq_chip_generic
*gc
)
715 raw_spin_lock(&gc
->lock
);
718 static inline void irq_gc_unlock(struct irq_chip_generic
*gc
)
720 raw_spin_unlock(&gc
->lock
);
723 static inline void irq_gc_lock(struct irq_chip_generic
*gc
) { }
724 static inline void irq_gc_unlock(struct irq_chip_generic
*gc
) { }
727 #endif /* CONFIG_GENERIC_HARDIRQS */
729 #endif /* !CONFIG_S390 */
731 #endif /* _LINUX_IRQ_H */