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mwl8k: basic AP interface support
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / mwl8k.c
blob759c94fb8e77cd5fdad155eaf77cabbd66847055
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
26
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
30
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
51
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
68
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
79
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
82
83 struct rxd_ops {
84 int rxd_size;
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
88 __le16 *qos);
89 };
90
91 struct mwl8k_device_info {
92 char *part_name;
93 char *helper_image;
94 char *fw_image;
95 struct rxd_ops *ap_rxd_ops;
96 };
97
98 struct mwl8k_rx_queue {
99 int rxd_count;
100
101 /* hw receives here */
102 int head;
103
104 /* refill descs here */
105 int tail;
106
107 void *rxd;
108 dma_addr_t rxd_dma;
109 struct {
110 struct sk_buff *skb;
111 DECLARE_PCI_UNMAP_ADDR(dma)
112 } *buf;
113 };
114
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
117 int head;
118
119 /* sw appends here */
120 int tail;
121
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
124 dma_addr_t txd_dma;
125 struct sk_buff **skb;
126 };
127
128 struct mwl8k_priv {
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
131
132 struct mwl8k_device_info *device_info;
133
134 void __iomem *sram;
135 void __iomem *regs;
136
137 /* firmware */
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
140
141 /* hardware/firmware parameters */
142 bool ap_fw;
143 struct rxd_ops *rxd_ops;
144
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
148 int fw_mutex_depth;
149 struct completion *hostcmd_wait;
150
151 /* lock held over TX and TX reap */
152 spinlock_t tx_lock;
153
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
156
157 struct ieee80211_vif *vif;
158
159 struct ieee80211_channel *current_channel;
160
161 /* power management status cookie from firmware */
162 u32 *cookie;
163 dma_addr_t cookie_dma;
164
165 u16 num_mcaddrs;
166 u8 hw_rev;
167 u32 fw_rev;
168
169 /*
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
172 */
173 int pending_tx_pkts;
174
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
177
178 /* PHY parameters */
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
182
183 bool radio_on;
184 bool radio_short_preamble;
185 bool sniffer_enabled;
186 bool wmm_enabled;
187
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to reclaim TX descriptors and buffers after tx */
206 struct tasklet_struct tx_reclaim_task;
207 };
208
209 /* Per interface specific private data */
210 struct mwl8k_vif {
211 /* Non AMPDU sequence number assigned by driver. */
212 u16 seqno;
213 };
214 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
215
216 struct mwl8k_sta {
217 /* Index into station database. Returned by UPDATE_STADB. */
218 u8 peer_id;
219 };
220 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
221
222 static const struct ieee80211_channel mwl8k_channels[] = {
223 { .center_freq = 2412, .hw_value = 1, },
224 { .center_freq = 2417, .hw_value = 2, },
225 { .center_freq = 2422, .hw_value = 3, },
226 { .center_freq = 2427, .hw_value = 4, },
227 { .center_freq = 2432, .hw_value = 5, },
228 { .center_freq = 2437, .hw_value = 6, },
229 { .center_freq = 2442, .hw_value = 7, },
230 { .center_freq = 2447, .hw_value = 8, },
231 { .center_freq = 2452, .hw_value = 9, },
232 { .center_freq = 2457, .hw_value = 10, },
233 { .center_freq = 2462, .hw_value = 11, },
234 { .center_freq = 2467, .hw_value = 12, },
235 { .center_freq = 2472, .hw_value = 13, },
236 { .center_freq = 2484, .hw_value = 14, },
237 };
238
239 static const struct ieee80211_rate mwl8k_rates[] = {
240 { .bitrate = 10, .hw_value = 2, },
241 { .bitrate = 20, .hw_value = 4, },
242 { .bitrate = 55, .hw_value = 11, },
243 { .bitrate = 110, .hw_value = 22, },
244 { .bitrate = 220, .hw_value = 44, },
245 { .bitrate = 60, .hw_value = 12, },
246 { .bitrate = 90, .hw_value = 18, },
247 { .bitrate = 120, .hw_value = 24, },
248 { .bitrate = 180, .hw_value = 36, },
249 { .bitrate = 240, .hw_value = 48, },
250 { .bitrate = 360, .hw_value = 72, },
251 { .bitrate = 480, .hw_value = 96, },
252 { .bitrate = 540, .hw_value = 108, },
253 { .bitrate = 720, .hw_value = 144, },
254 };
255
256 /* Set or get info from Firmware */
257 #define MWL8K_CMD_SET 0x0001
258 #define MWL8K_CMD_GET 0x0000
259
260 /* Firmware command codes */
261 #define MWL8K_CMD_CODE_DNLD 0x0001
262 #define MWL8K_CMD_GET_HW_SPEC 0x0003
263 #define MWL8K_CMD_SET_HW_SPEC 0x0004
264 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
265 #define MWL8K_CMD_GET_STAT 0x0014
266 #define MWL8K_CMD_RADIO_CONTROL 0x001c
267 #define MWL8K_CMD_RF_TX_POWER 0x001e
268 #define MWL8K_CMD_RF_ANTENNA 0x0020
269 #define MWL8K_CMD_SET_BEACON 0x0100
270 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
271 #define MWL8K_CMD_SET_POST_SCAN 0x0108
272 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
273 #define MWL8K_CMD_SET_AID 0x010d
274 #define MWL8K_CMD_SET_RATE 0x0110
275 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
276 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
277 #define MWL8K_CMD_SET_SLOT 0x0114
278 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
279 #define MWL8K_CMD_SET_WMM_MODE 0x0123
280 #define MWL8K_CMD_MIMO_CONFIG 0x0125
281 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
282 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
283 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
284 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
285 #define MWL8K_CMD_BSS_START 0x1100
286 #define MWL8K_CMD_SET_NEW_STN 0x1111
287 #define MWL8K_CMD_UPDATE_STADB 0x1123
288
289 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
290 {
291 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
292 snprintf(buf, bufsize, "%s", #x);\
293 return buf;\
294 } while (0)
295 switch (cmd & ~0x8000) {
296 MWL8K_CMDNAME(CODE_DNLD);
297 MWL8K_CMDNAME(GET_HW_SPEC);
298 MWL8K_CMDNAME(SET_HW_SPEC);
299 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
300 MWL8K_CMDNAME(GET_STAT);
301 MWL8K_CMDNAME(RADIO_CONTROL);
302 MWL8K_CMDNAME(RF_TX_POWER);
303 MWL8K_CMDNAME(RF_ANTENNA);
304 MWL8K_CMDNAME(SET_BEACON);
305 MWL8K_CMDNAME(SET_PRE_SCAN);
306 MWL8K_CMDNAME(SET_POST_SCAN);
307 MWL8K_CMDNAME(SET_RF_CHANNEL);
308 MWL8K_CMDNAME(SET_AID);
309 MWL8K_CMDNAME(SET_RATE);
310 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
311 MWL8K_CMDNAME(RTS_THRESHOLD);
312 MWL8K_CMDNAME(SET_SLOT);
313 MWL8K_CMDNAME(SET_EDCA_PARAMS);
314 MWL8K_CMDNAME(SET_WMM_MODE);
315 MWL8K_CMDNAME(MIMO_CONFIG);
316 MWL8K_CMDNAME(USE_FIXED_RATE);
317 MWL8K_CMDNAME(ENABLE_SNIFFER);
318 MWL8K_CMDNAME(SET_MAC_ADDR);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
320 MWL8K_CMDNAME(BSS_START);
321 MWL8K_CMDNAME(SET_NEW_STN);
322 MWL8K_CMDNAME(UPDATE_STADB);
323 default:
324 snprintf(buf, bufsize, "0x%x", cmd);
325 }
326 #undef MWL8K_CMDNAME
327
328 return buf;
329 }
330
331 /* Hardware and firmware reset */
332 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
333 {
334 iowrite32(MWL8K_H2A_INT_RESET,
335 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
336 iowrite32(MWL8K_H2A_INT_RESET,
337 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
338 msleep(20);
339 }
340
341 /* Release fw image */
342 static void mwl8k_release_fw(struct firmware **fw)
343 {
344 if (*fw == NULL)
345 return;
346 release_firmware(*fw);
347 *fw = NULL;
348 }
349
350 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
351 {
352 mwl8k_release_fw(&priv->fw_ucode);
353 mwl8k_release_fw(&priv->fw_helper);
354 }
355
356 /* Request fw image */
357 static int mwl8k_request_fw(struct mwl8k_priv *priv,
358 const char *fname, struct firmware **fw)
359 {
360 /* release current image */
361 if (*fw != NULL)
362 mwl8k_release_fw(fw);
363
364 return request_firmware((const struct firmware **)fw,
365 fname, &priv->pdev->dev);
366 }
367
368 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
369 {
370 struct mwl8k_device_info *di = priv->device_info;
371 int rc;
372
373 if (di->helper_image != NULL) {
374 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
375 if (rc) {
376 printk(KERN_ERR "%s: Error requesting helper "
377 "firmware file %s\n", pci_name(priv->pdev),
378 di->helper_image);
379 return rc;
380 }
381 }
382
383 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
384 if (rc) {
385 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
386 pci_name(priv->pdev), di->fw_image);
387 mwl8k_release_fw(&priv->fw_helper);
388 return rc;
389 }
390
391 return 0;
392 }
393
394 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
395 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
396
397 struct mwl8k_cmd_pkt {
398 __le16 code;
399 __le16 length;
400 __le16 seq_num;
401 __le16 result;
402 char payload[0];
403 } __attribute__((packed));
404
405 /*
406 * Firmware loading.
407 */
408 static int
409 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
410 {
411 void __iomem *regs = priv->regs;
412 dma_addr_t dma_addr;
413 int loops;
414
415 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
416 if (pci_dma_mapping_error(priv->pdev, dma_addr))
417 return -ENOMEM;
418
419 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
420 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
421 iowrite32(MWL8K_H2A_INT_DOORBELL,
422 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
423 iowrite32(MWL8K_H2A_INT_DUMMY,
424 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
425
426 loops = 1000;
427 do {
428 u32 int_code;
429
430 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
431 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
432 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
433 break;
434 }
435
436 cond_resched();
437 udelay(1);
438 } while (--loops);
439
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
441
442 return loops ? 0 : -ETIMEDOUT;
443 }
444
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
447 {
448 struct mwl8k_cmd_pkt *cmd;
449 int done;
450 int rc = 0;
451
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 if (cmd == NULL)
454 return -ENOMEM;
455
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
457 cmd->seq_num = 0;
458 cmd->result = 0;
459
460 done = 0;
461 while (length) {
462 int block_size = length > 256 ? 256 : length;
463
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
466
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
469 if (rc)
470 break;
471
472 done += block_size;
473 length -= block_size;
474 }
475
476 if (!rc) {
477 cmd->length = 0;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
479 }
480
481 kfree(cmd);
482
483 return rc;
484 }
485
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
488 {
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
492
493 buffer = kmalloc(1024, GFP_KERNEL);
494 if (buffer == NULL)
495 return -ENOMEM;
496
497 done = 0;
498 prev_block_size = 0;
499 may_continue = 1000;
500 while (may_continue > 0) {
501 u32 block_size;
502
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
505 block_size &= ~1;
506 may_continue--;
507 } else {
508 done += prev_block_size;
509 length -= prev_block_size;
510 }
511
512 if (block_size > 1024 || block_size > length) {
513 rc = -EOVERFLOW;
514 break;
515 }
516
517 if (length == 0) {
518 rc = 0;
519 break;
520 }
521
522 if (block_size == 0) {
523 rc = -EPROTO;
524 may_continue--;
525 udelay(1);
526 continue;
527 }
528
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
531
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
533 if (rc)
534 break;
535 }
536
537 if (!rc && length != 0)
538 rc = -EREMOTEIO;
539
540 kfree(buffer);
541
542 return rc;
543 }
544
545 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
546 {
547 struct mwl8k_priv *priv = hw->priv;
548 struct firmware *fw = priv->fw_ucode;
549 int rc;
550 int loops;
551
552 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
553 struct firmware *helper = priv->fw_helper;
554
555 if (helper == NULL) {
556 printk(KERN_ERR "%s: helper image needed but none "
557 "given\n", pci_name(priv->pdev));
558 return -EINVAL;
559 }
560
561 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
562 if (rc) {
563 printk(KERN_ERR "%s: unable to load firmware "
564 "helper image\n", pci_name(priv->pdev));
565 return rc;
566 }
567 msleep(5);
568
569 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
570 } else {
571 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
572 }
573
574 if (rc) {
575 printk(KERN_ERR "%s: unable to load firmware image\n",
576 pci_name(priv->pdev));
577 return rc;
578 }
579
580 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
581
582 loops = 500000;
583 do {
584 u32 ready_code;
585
586 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
587 if (ready_code == MWL8K_FWAP_READY) {
588 priv->ap_fw = 1;
589 break;
590 } else if (ready_code == MWL8K_FWSTA_READY) {
591 priv->ap_fw = 0;
592 break;
593 }
594
595 cond_resched();
596 udelay(1);
597 } while (--loops);
598
599 return loops ? 0 : -ETIMEDOUT;
600 }
601
602
603 /* DMA header used by firmware and hardware. */
604 struct mwl8k_dma_data {
605 __le16 fwlen;
606 struct ieee80211_hdr wh;
607 char data[0];
608 } __attribute__((packed));
609
610 /* Routines to add/remove DMA header from skb. */
611 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
612 {
613 struct mwl8k_dma_data *tr;
614 int hdrlen;
615
616 tr = (struct mwl8k_dma_data *)skb->data;
617 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
618
619 if (hdrlen != sizeof(tr->wh)) {
620 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
621 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
622 *((__le16 *)(tr->data - 2)) = qos;
623 } else {
624 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
625 }
626 }
627
628 if (hdrlen != sizeof(*tr))
629 skb_pull(skb, sizeof(*tr) - hdrlen);
630 }
631
632 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
633 {
634 struct ieee80211_hdr *wh;
635 int hdrlen;
636 struct mwl8k_dma_data *tr;
637
638 /*
639 * Add a firmware DMA header; the firmware requires that we
640 * present a 2-byte payload length followed by a 4-address
641 * header (without QoS field), followed (optionally) by any
642 * WEP/ExtIV header (but only filled in for CCMP).
643 */
644 wh = (struct ieee80211_hdr *)skb->data;
645
646 hdrlen = ieee80211_hdrlen(wh->frame_control);
647 if (hdrlen != sizeof(*tr))
648 skb_push(skb, sizeof(*tr) - hdrlen);
649
650 if (ieee80211_is_data_qos(wh->frame_control))
651 hdrlen -= 2;
652
653 tr = (struct mwl8k_dma_data *)skb->data;
654 if (wh != &tr->wh)
655 memmove(&tr->wh, wh, hdrlen);
656 if (hdrlen != sizeof(tr->wh))
657 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
658
659 /*
660 * Firmware length is the length of the fully formed "802.11
661 * payload". That is, everything except for the 802.11 header.
662 * This includes all crypto material including the MIC.
663 */
664 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
665 }
666
667
668 /*
669 * Packet reception for 88w8366 AP firmware.
670 */
671 struct mwl8k_rxd_8366_ap {
672 __le16 pkt_len;
673 __u8 sq2;
674 __u8 rate;
675 __le32 pkt_phys_addr;
676 __le32 next_rxd_phys_addr;
677 __le16 qos_control;
678 __le16 htsig2;
679 __le32 hw_rssi_info;
680 __le32 hw_noise_floor_info;
681 __u8 noise_floor;
682 __u8 pad0[3];
683 __u8 rssi;
684 __u8 rx_status;
685 __u8 channel;
686 __u8 rx_ctrl;
687 } __attribute__((packed));
688
689 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
690 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
691 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
692
693 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
694
695 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
696 {
697 struct mwl8k_rxd_8366_ap *rxd = _rxd;
698
699 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
700 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
701 }
702
703 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
704 {
705 struct mwl8k_rxd_8366_ap *rxd = _rxd;
706
707 rxd->pkt_len = cpu_to_le16(len);
708 rxd->pkt_phys_addr = cpu_to_le32(addr);
709 wmb();
710 rxd->rx_ctrl = 0;
711 }
712
713 static int
714 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
715 __le16 *qos)
716 {
717 struct mwl8k_rxd_8366_ap *rxd = _rxd;
718
719 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
720 return -1;
721 rmb();
722
723 memset(status, 0, sizeof(*status));
724
725 status->signal = -rxd->rssi;
726 status->noise = -rxd->noise_floor;
727
728 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
729 status->flag |= RX_FLAG_HT;
730 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
731 status->flag |= RX_FLAG_40MHZ;
732 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
733 } else {
734 int i;
735
736 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
737 if (mwl8k_rates[i].hw_value == rxd->rate) {
738 status->rate_idx = i;
739 break;
740 }
741 }
742 }
743
744 status->band = IEEE80211_BAND_2GHZ;
745 status->freq = ieee80211_channel_to_frequency(rxd->channel);
746
747 *qos = rxd->qos_control;
748
749 return le16_to_cpu(rxd->pkt_len);
750 }
751
752 static struct rxd_ops rxd_8366_ap_ops = {
753 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
754 .rxd_init = mwl8k_rxd_8366_ap_init,
755 .rxd_refill = mwl8k_rxd_8366_ap_refill,
756 .rxd_process = mwl8k_rxd_8366_ap_process,
757 };
758
759 /*
760 * Packet reception for STA firmware.
761 */
762 struct mwl8k_rxd_sta {
763 __le16 pkt_len;
764 __u8 link_quality;
765 __u8 noise_level;
766 __le32 pkt_phys_addr;
767 __le32 next_rxd_phys_addr;
768 __le16 qos_control;
769 __le16 rate_info;
770 __le32 pad0[4];
771 __u8 rssi;
772 __u8 channel;
773 __le16 pad1;
774 __u8 rx_ctrl;
775 __u8 rx_status;
776 __u8 pad2[2];
777 } __attribute__((packed));
778
779 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
780 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
781 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
782 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
783 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
784 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
785
786 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
787
788 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
789 {
790 struct mwl8k_rxd_sta *rxd = _rxd;
791
792 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
793 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
794 }
795
796 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
797 {
798 struct mwl8k_rxd_sta *rxd = _rxd;
799
800 rxd->pkt_len = cpu_to_le16(len);
801 rxd->pkt_phys_addr = cpu_to_le32(addr);
802 wmb();
803 rxd->rx_ctrl = 0;
804 }
805
806 static int
807 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
808 __le16 *qos)
809 {
810 struct mwl8k_rxd_sta *rxd = _rxd;
811 u16 rate_info;
812
813 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
814 return -1;
815 rmb();
816
817 rate_info = le16_to_cpu(rxd->rate_info);
818
819 memset(status, 0, sizeof(*status));
820
821 status->signal = -rxd->rssi;
822 status->noise = -rxd->noise_level;
823 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
824 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
825
826 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
827 status->flag |= RX_FLAG_SHORTPRE;
828 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
829 status->flag |= RX_FLAG_40MHZ;
830 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
831 status->flag |= RX_FLAG_SHORT_GI;
832 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
833 status->flag |= RX_FLAG_HT;
834
835 status->band = IEEE80211_BAND_2GHZ;
836 status->freq = ieee80211_channel_to_frequency(rxd->channel);
837
838 *qos = rxd->qos_control;
839
840 return le16_to_cpu(rxd->pkt_len);
841 }
842
843 static struct rxd_ops rxd_sta_ops = {
844 .rxd_size = sizeof(struct mwl8k_rxd_sta),
845 .rxd_init = mwl8k_rxd_sta_init,
846 .rxd_refill = mwl8k_rxd_sta_refill,
847 .rxd_process = mwl8k_rxd_sta_process,
848 };
849
850
851 #define MWL8K_RX_DESCS 256
852 #define MWL8K_RX_MAXSZ 3800
853
854 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
855 {
856 struct mwl8k_priv *priv = hw->priv;
857 struct mwl8k_rx_queue *rxq = priv->rxq + index;
858 int size;
859 int i;
860
861 rxq->rxd_count = 0;
862 rxq->head = 0;
863 rxq->tail = 0;
864
865 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
866
867 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
868 if (rxq->rxd == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
870 wiphy_name(hw->wiphy));
871 return -ENOMEM;
872 }
873 memset(rxq->rxd, 0, size);
874
875 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
876 if (rxq->buf == NULL) {
877 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
878 wiphy_name(hw->wiphy));
879 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
880 return -ENOMEM;
881 }
882 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
883
884 for (i = 0; i < MWL8K_RX_DESCS; i++) {
885 int desc_size;
886 void *rxd;
887 int nexti;
888 dma_addr_t next_dma_addr;
889
890 desc_size = priv->rxd_ops->rxd_size;
891 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
892
893 nexti = i + 1;
894 if (nexti == MWL8K_RX_DESCS)
895 nexti = 0;
896 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
897
898 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
899 }
900
901 return 0;
902 }
903
904 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
905 {
906 struct mwl8k_priv *priv = hw->priv;
907 struct mwl8k_rx_queue *rxq = priv->rxq + index;
908 int refilled;
909
910 refilled = 0;
911 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
912 struct sk_buff *skb;
913 dma_addr_t addr;
914 int rx;
915 void *rxd;
916
917 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
918 if (skb == NULL)
919 break;
920
921 addr = pci_map_single(priv->pdev, skb->data,
922 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
923
924 rxq->rxd_count++;
925 rx = rxq->tail++;
926 if (rxq->tail == MWL8K_RX_DESCS)
927 rxq->tail = 0;
928 rxq->buf[rx].skb = skb;
929 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
930
931 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
932 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
933
934 refilled++;
935 }
936
937 return refilled;
938 }
939
940 /* Must be called only when the card's reception is completely halted */
941 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
942 {
943 struct mwl8k_priv *priv = hw->priv;
944 struct mwl8k_rx_queue *rxq = priv->rxq + index;
945 int i;
946
947 for (i = 0; i < MWL8K_RX_DESCS; i++) {
948 if (rxq->buf[i].skb != NULL) {
949 pci_unmap_single(priv->pdev,
950 pci_unmap_addr(&rxq->buf[i], dma),
951 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
952 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
953
954 kfree_skb(rxq->buf[i].skb);
955 rxq->buf[i].skb = NULL;
956 }
957 }
958
959 kfree(rxq->buf);
960 rxq->buf = NULL;
961
962 pci_free_consistent(priv->pdev,
963 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
964 rxq->rxd, rxq->rxd_dma);
965 rxq->rxd = NULL;
966 }
967
968
969 /*
970 * Scan a list of BSSIDs to process for finalize join.
971 * Allows for extension to process multiple BSSIDs.
972 */
973 static inline int
974 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
975 {
976 return priv->capture_beacon &&
977 ieee80211_is_beacon(wh->frame_control) &&
978 !compare_ether_addr(wh->addr3, priv->capture_bssid);
979 }
980
981 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
982 struct sk_buff *skb)
983 {
984 struct mwl8k_priv *priv = hw->priv;
985
986 priv->capture_beacon = false;
987 memset(priv->capture_bssid, 0, ETH_ALEN);
988
989 /*
990 * Use GFP_ATOMIC as rxq_process is called from
991 * the primary interrupt handler, memory allocation call
992 * must not sleep.
993 */
994 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
995 if (priv->beacon_skb != NULL)
996 ieee80211_queue_work(hw, &priv->finalize_join_worker);
997 }
998
999 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1000 {
1001 struct mwl8k_priv *priv = hw->priv;
1002 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1003 int processed;
1004
1005 processed = 0;
1006 while (rxq->rxd_count && limit--) {
1007 struct sk_buff *skb;
1008 void *rxd;
1009 int pkt_len;
1010 struct ieee80211_rx_status status;
1011 __le16 qos;
1012
1013 skb = rxq->buf[rxq->head].skb;
1014 if (skb == NULL)
1015 break;
1016
1017 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1018
1019 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1020 if (pkt_len < 0)
1021 break;
1022
1023 rxq->buf[rxq->head].skb = NULL;
1024
1025 pci_unmap_single(priv->pdev,
1026 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1027 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1028 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1029
1030 rxq->head++;
1031 if (rxq->head == MWL8K_RX_DESCS)
1032 rxq->head = 0;
1033
1034 rxq->rxd_count--;
1035
1036 skb_put(skb, pkt_len);
1037 mwl8k_remove_dma_header(skb, qos);
1038
1039 /*
1040 * Check for a pending join operation. Save a
1041 * copy of the beacon and schedule a tasklet to
1042 * send a FINALIZE_JOIN command to the firmware.
1043 */
1044 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1045 mwl8k_save_beacon(hw, skb);
1046
1047 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1048 ieee80211_rx_irqsafe(hw, skb);
1049
1050 processed++;
1051 }
1052
1053 return processed;
1054 }
1055
1056
1057 /*
1058 * Packet transmission.
1059 */
1060
1061 #define MWL8K_TXD_STATUS_OK 0x00000001
1062 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1063 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1064 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1065 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1066
1067 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1068 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1069 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1070 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1071 #define MWL8K_QOS_EOSP 0x0010
1072
1073 struct mwl8k_tx_desc {
1074 __le32 status;
1075 __u8 data_rate;
1076 __u8 tx_priority;
1077 __le16 qos_control;
1078 __le32 pkt_phys_addr;
1079 __le16 pkt_len;
1080 __u8 dest_MAC_addr[ETH_ALEN];
1081 __le32 next_txd_phys_addr;
1082 __le32 reserved;
1083 __le16 rate_info;
1084 __u8 peer_id;
1085 __u8 tx_frag_cnt;
1086 } __attribute__((packed));
1087
1088 #define MWL8K_TX_DESCS 128
1089
1090 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1091 {
1092 struct mwl8k_priv *priv = hw->priv;
1093 struct mwl8k_tx_queue *txq = priv->txq + index;
1094 int size;
1095 int i;
1096
1097 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1098 txq->stats.limit = MWL8K_TX_DESCS;
1099 txq->head = 0;
1100 txq->tail = 0;
1101
1102 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1103
1104 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1105 if (txq->txd == NULL) {
1106 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1107 wiphy_name(hw->wiphy));
1108 return -ENOMEM;
1109 }
1110 memset(txq->txd, 0, size);
1111
1112 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1113 if (txq->skb == NULL) {
1114 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1115 wiphy_name(hw->wiphy));
1116 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1117 return -ENOMEM;
1118 }
1119 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1120
1121 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1122 struct mwl8k_tx_desc *tx_desc;
1123 int nexti;
1124
1125 tx_desc = txq->txd + i;
1126 nexti = (i + 1) % MWL8K_TX_DESCS;
1127
1128 tx_desc->status = 0;
1129 tx_desc->next_txd_phys_addr =
1130 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1131 }
1132
1133 return 0;
1134 }
1135
1136 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1137 {
1138 iowrite32(MWL8K_H2A_INT_PPA_READY,
1139 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1140 iowrite32(MWL8K_H2A_INT_DUMMY,
1141 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1142 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1143 }
1144
1145 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1146 {
1147 struct mwl8k_priv *priv = hw->priv;
1148 int i;
1149
1150 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1151 struct mwl8k_tx_queue *txq = priv->txq + i;
1152 int fw_owned = 0;
1153 int drv_owned = 0;
1154 int unused = 0;
1155 int desc;
1156
1157 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1158 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1159 u32 status;
1160
1161 status = le32_to_cpu(tx_desc->status);
1162 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1163 fw_owned++;
1164 else
1165 drv_owned++;
1166
1167 if (tx_desc->pkt_len == 0)
1168 unused++;
1169 }
1170
1171 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1172 "fw_owned=%d drv_owned=%d unused=%d\n",
1173 wiphy_name(hw->wiphy), i,
1174 txq->stats.len, txq->head, txq->tail,
1175 fw_owned, drv_owned, unused);
1176 }
1177 }
1178
1179 /*
1180 * Must be called with priv->fw_mutex held and tx queues stopped.
1181 */
1182 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1183
1184 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1185 {
1186 struct mwl8k_priv *priv = hw->priv;
1187 DECLARE_COMPLETION_ONSTACK(tx_wait);
1188 int retry;
1189 int rc;
1190
1191 might_sleep();
1192
1193 /*
1194 * The TX queues are stopped at this point, so this test
1195 * doesn't need to take ->tx_lock.
1196 */
1197 if (!priv->pending_tx_pkts)
1198 return 0;
1199
1200 retry = 0;
1201 rc = 0;
1202
1203 spin_lock_bh(&priv->tx_lock);
1204 priv->tx_wait = &tx_wait;
1205 while (!rc) {
1206 int oldcount;
1207 unsigned long timeout;
1208
1209 oldcount = priv->pending_tx_pkts;
1210
1211 spin_unlock_bh(&priv->tx_lock);
1212 timeout = wait_for_completion_timeout(&tx_wait,
1213 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1214 spin_lock_bh(&priv->tx_lock);
1215
1216 if (timeout) {
1217 WARN_ON(priv->pending_tx_pkts);
1218 if (retry) {
1219 printk(KERN_NOTICE "%s: tx rings drained\n",
1220 wiphy_name(hw->wiphy));
1221 }
1222 break;
1223 }
1224
1225 if (priv->pending_tx_pkts < oldcount) {
1226 printk(KERN_NOTICE "%s: waiting for tx rings "
1227 "to drain (%d -> %d pkts)\n",
1228 wiphy_name(hw->wiphy), oldcount,
1229 priv->pending_tx_pkts);
1230 retry = 1;
1231 continue;
1232 }
1233
1234 priv->tx_wait = NULL;
1235
1236 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1237 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1238 mwl8k_dump_tx_rings(hw);
1239
1240 rc = -ETIMEDOUT;
1241 }
1242 spin_unlock_bh(&priv->tx_lock);
1243
1244 return rc;
1245 }
1246
1247 #define MWL8K_TXD_SUCCESS(status) \
1248 ((status) & (MWL8K_TXD_STATUS_OK | \
1249 MWL8K_TXD_STATUS_OK_RETRY | \
1250 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1251
1252 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1253 {
1254 struct mwl8k_priv *priv = hw->priv;
1255 struct mwl8k_tx_queue *txq = priv->txq + index;
1256 int wake = 0;
1257
1258 while (txq->stats.len > 0) {
1259 int tx;
1260 struct mwl8k_tx_desc *tx_desc;
1261 unsigned long addr;
1262 int size;
1263 struct sk_buff *skb;
1264 struct ieee80211_tx_info *info;
1265 u32 status;
1266
1267 tx = txq->head;
1268 tx_desc = txq->txd + tx;
1269
1270 status = le32_to_cpu(tx_desc->status);
1271
1272 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1273 if (!force)
1274 break;
1275 tx_desc->status &=
1276 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1277 }
1278
1279 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1280 BUG_ON(txq->stats.len == 0);
1281 txq->stats.len--;
1282 priv->pending_tx_pkts--;
1283
1284 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1285 size = le16_to_cpu(tx_desc->pkt_len);
1286 skb = txq->skb[tx];
1287 txq->skb[tx] = NULL;
1288
1289 BUG_ON(skb == NULL);
1290 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1291
1292 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1293
1294 /* Mark descriptor as unused */
1295 tx_desc->pkt_phys_addr = 0;
1296 tx_desc->pkt_len = 0;
1297
1298 info = IEEE80211_SKB_CB(skb);
1299 ieee80211_tx_info_clear_status(info);
1300 if (MWL8K_TXD_SUCCESS(status))
1301 info->flags |= IEEE80211_TX_STAT_ACK;
1302
1303 ieee80211_tx_status_irqsafe(hw, skb);
1304
1305 wake = 1;
1306 }
1307
1308 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1309 ieee80211_wake_queue(hw, index);
1310 }
1311
1312 /* must be called only when the card's transmit is completely halted */
1313 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1314 {
1315 struct mwl8k_priv *priv = hw->priv;
1316 struct mwl8k_tx_queue *txq = priv->txq + index;
1317
1318 mwl8k_txq_reclaim(hw, index, 1);
1319
1320 kfree(txq->skb);
1321 txq->skb = NULL;
1322
1323 pci_free_consistent(priv->pdev,
1324 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1325 txq->txd, txq->txd_dma);
1326 txq->txd = NULL;
1327 }
1328
1329 static int
1330 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1331 {
1332 struct mwl8k_priv *priv = hw->priv;
1333 struct ieee80211_tx_info *tx_info;
1334 struct mwl8k_vif *mwl8k_vif;
1335 struct ieee80211_hdr *wh;
1336 struct mwl8k_tx_queue *txq;
1337 struct mwl8k_tx_desc *tx;
1338 dma_addr_t dma;
1339 u32 txstatus;
1340 u8 txdatarate;
1341 u16 qos;
1342
1343 wh = (struct ieee80211_hdr *)skb->data;
1344 if (ieee80211_is_data_qos(wh->frame_control))
1345 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1346 else
1347 qos = 0;
1348
1349 mwl8k_add_dma_header(skb);
1350 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1351
1352 tx_info = IEEE80211_SKB_CB(skb);
1353 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1354
1355 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1356 u16 seqno = mwl8k_vif->seqno;
1357
1358 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1359 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1360 mwl8k_vif->seqno = seqno++ % 4096;
1361 }
1362
1363 /* Setup firmware control bit fields for each frame type. */
1364 txstatus = 0;
1365 txdatarate = 0;
1366 if (ieee80211_is_mgmt(wh->frame_control) ||
1367 ieee80211_is_ctl(wh->frame_control)) {
1368 txdatarate = 0;
1369 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1370 } else if (ieee80211_is_data(wh->frame_control)) {
1371 txdatarate = 1;
1372 if (is_multicast_ether_addr(wh->addr1))
1373 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1374
1375 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1376 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1377 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1378 else
1379 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1380 }
1381
1382 dma = pci_map_single(priv->pdev, skb->data,
1383 skb->len, PCI_DMA_TODEVICE);
1384
1385 if (pci_dma_mapping_error(priv->pdev, dma)) {
1386 printk(KERN_DEBUG "%s: failed to dma map skb, "
1387 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1388 dev_kfree_skb(skb);
1389 return NETDEV_TX_OK;
1390 }
1391
1392 spin_lock_bh(&priv->tx_lock);
1393
1394 txq = priv->txq + index;
1395
1396 BUG_ON(txq->skb[txq->tail] != NULL);
1397 txq->skb[txq->tail] = skb;
1398
1399 tx = txq->txd + txq->tail;
1400 tx->data_rate = txdatarate;
1401 tx->tx_priority = index;
1402 tx->qos_control = cpu_to_le16(qos);
1403 tx->pkt_phys_addr = cpu_to_le32(dma);
1404 tx->pkt_len = cpu_to_le16(skb->len);
1405 tx->rate_info = 0;
1406 if (!priv->ap_fw && tx_info->control.sta != NULL)
1407 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1408 else
1409 tx->peer_id = 0;
1410 wmb();
1411 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1412
1413 txq->stats.count++;
1414 txq->stats.len++;
1415 priv->pending_tx_pkts++;
1416
1417 txq->tail++;
1418 if (txq->tail == MWL8K_TX_DESCS)
1419 txq->tail = 0;
1420
1421 if (txq->head == txq->tail)
1422 ieee80211_stop_queue(hw, index);
1423
1424 mwl8k_tx_start(priv);
1425
1426 spin_unlock_bh(&priv->tx_lock);
1427
1428 return NETDEV_TX_OK;
1429 }
1430
1431
1432 /*
1433 * Firmware access.
1434 *
1435 * We have the following requirements for issuing firmware commands:
1436 * - Some commands require that the packet transmit path is idle when
1437 * the command is issued. (For simplicity, we'll just quiesce the
1438 * transmit path for every command.)
1439 * - There are certain sequences of commands that need to be issued to
1440 * the hardware sequentially, with no other intervening commands.
1441 *
1442 * This leads to an implementation of a "firmware lock" as a mutex that
1443 * can be taken recursively, and which is taken by both the low-level
1444 * command submission function (mwl8k_post_cmd) as well as any users of
1445 * that function that require issuing of an atomic sequence of commands,
1446 * and quiesces the transmit path whenever it's taken.
1447 */
1448 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1449 {
1450 struct mwl8k_priv *priv = hw->priv;
1451
1452 if (priv->fw_mutex_owner != current) {
1453 int rc;
1454
1455 mutex_lock(&priv->fw_mutex);
1456 ieee80211_stop_queues(hw);
1457
1458 rc = mwl8k_tx_wait_empty(hw);
1459 if (rc) {
1460 ieee80211_wake_queues(hw);
1461 mutex_unlock(&priv->fw_mutex);
1462
1463 return rc;
1464 }
1465
1466 priv->fw_mutex_owner = current;
1467 }
1468
1469 priv->fw_mutex_depth++;
1470
1471 return 0;
1472 }
1473
1474 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1475 {
1476 struct mwl8k_priv *priv = hw->priv;
1477
1478 if (!--priv->fw_mutex_depth) {
1479 ieee80211_wake_queues(hw);
1480 priv->fw_mutex_owner = NULL;
1481 mutex_unlock(&priv->fw_mutex);
1482 }
1483 }
1484
1485
1486 /*
1487 * Command processing.
1488 */
1489
1490 /* Timeout firmware commands after 10s */
1491 #define MWL8K_CMD_TIMEOUT_MS 10000
1492
1493 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1494 {
1495 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1496 struct mwl8k_priv *priv = hw->priv;
1497 void __iomem *regs = priv->regs;
1498 dma_addr_t dma_addr;
1499 unsigned int dma_size;
1500 int rc;
1501 unsigned long timeout = 0;
1502 u8 buf[32];
1503
1504 cmd->result = 0xffff;
1505 dma_size = le16_to_cpu(cmd->length);
1506 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1507 PCI_DMA_BIDIRECTIONAL);
1508 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1509 return -ENOMEM;
1510
1511 rc = mwl8k_fw_lock(hw);
1512 if (rc) {
1513 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1514 PCI_DMA_BIDIRECTIONAL);
1515 return rc;
1516 }
1517
1518 priv->hostcmd_wait = &cmd_wait;
1519 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1520 iowrite32(MWL8K_H2A_INT_DOORBELL,
1521 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1522 iowrite32(MWL8K_H2A_INT_DUMMY,
1523 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1524
1525 timeout = wait_for_completion_timeout(&cmd_wait,
1526 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1527
1528 priv->hostcmd_wait = NULL;
1529
1530 mwl8k_fw_unlock(hw);
1531
1532 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1533 PCI_DMA_BIDIRECTIONAL);
1534
1535 if (!timeout) {
1536 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1537 wiphy_name(hw->wiphy),
1538 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1539 MWL8K_CMD_TIMEOUT_MS);
1540 rc = -ETIMEDOUT;
1541 } else {
1542 int ms;
1543
1544 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1545
1546 rc = cmd->result ? -EINVAL : 0;
1547 if (rc)
1548 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1549 wiphy_name(hw->wiphy),
1550 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1551 le16_to_cpu(cmd->result));
1552 else if (ms > 2000)
1553 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1554 wiphy_name(hw->wiphy),
1555 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1556 ms);
1557 }
1558
1559 return rc;
1560 }
1561
1562 /*
1563 * CMD_GET_HW_SPEC (STA version).
1564 */
1565 struct mwl8k_cmd_get_hw_spec_sta {
1566 struct mwl8k_cmd_pkt header;
1567 __u8 hw_rev;
1568 __u8 host_interface;
1569 __le16 num_mcaddrs;
1570 __u8 perm_addr[ETH_ALEN];
1571 __le16 region_code;
1572 __le32 fw_rev;
1573 __le32 ps_cookie;
1574 __le32 caps;
1575 __u8 mcs_bitmap[16];
1576 __le32 rx_queue_ptr;
1577 __le32 num_tx_queues;
1578 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1579 __le32 caps2;
1580 __le32 num_tx_desc_per_queue;
1581 __le32 total_rxd;
1582 } __attribute__((packed));
1583
1584 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1585 #define MWL8K_CAP_GREENFIELD 0x08000000
1586 #define MWL8K_CAP_AMPDU 0x04000000
1587 #define MWL8K_CAP_RX_STBC 0x01000000
1588 #define MWL8K_CAP_TX_STBC 0x00800000
1589 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1590 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1591 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1592 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1593 #define MWL8K_CAP_DELAY_BA 0x00003000
1594 #define MWL8K_CAP_MIMO 0x00000200
1595 #define MWL8K_CAP_40MHZ 0x00000100
1596
1597 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1598 {
1599 struct mwl8k_priv *priv = hw->priv;
1600 int rx_streams;
1601 int tx_streams;
1602
1603 priv->band.ht_cap.ht_supported = 1;
1604
1605 if (cap & MWL8K_CAP_MAX_AMSDU)
1606 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1607 if (cap & MWL8K_CAP_GREENFIELD)
1608 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1609 if (cap & MWL8K_CAP_AMPDU) {
1610 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1611 priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1612 priv->band.ht_cap.ampdu_density =
1613 IEEE80211_HT_MPDU_DENSITY_NONE;
1614 }
1615 if (cap & MWL8K_CAP_RX_STBC)
1616 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1617 if (cap & MWL8K_CAP_TX_STBC)
1618 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1619 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1620 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1621 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1622 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1623 if (cap & MWL8K_CAP_DELAY_BA)
1624 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1625 if (cap & MWL8K_CAP_40MHZ)
1626 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1627
1628 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1629 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1630
1631 priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
1632 if (rx_streams >= 2)
1633 priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
1634 if (rx_streams >= 3)
1635 priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
1636 priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
1637 priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1638
1639 if (rx_streams != tx_streams) {
1640 priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1641 priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1642 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1643 }
1644 }
1645
1646 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1647 {
1648 struct mwl8k_priv *priv = hw->priv;
1649 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1650 int rc;
1651 int i;
1652
1653 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1654 if (cmd == NULL)
1655 return -ENOMEM;
1656
1657 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1658 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1659
1660 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1661 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1662 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1663 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1664 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1665 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1666 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1667 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1668
1669 rc = mwl8k_post_cmd(hw, &cmd->header);
1670
1671 if (!rc) {
1672 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1673 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1674 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1675 priv->hw_rev = cmd->hw_rev;
1676 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1677 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1678 }
1679
1680 kfree(cmd);
1681 return rc;
1682 }
1683
1684 /*
1685 * CMD_GET_HW_SPEC (AP version).
1686 */
1687 struct mwl8k_cmd_get_hw_spec_ap {
1688 struct mwl8k_cmd_pkt header;
1689 __u8 hw_rev;
1690 __u8 host_interface;
1691 __le16 num_wcb;
1692 __le16 num_mcaddrs;
1693 __u8 perm_addr[ETH_ALEN];
1694 __le16 region_code;
1695 __le16 num_antenna;
1696 __le32 fw_rev;
1697 __le32 wcbbase0;
1698 __le32 rxwrptr;
1699 __le32 rxrdptr;
1700 __le32 ps_cookie;
1701 __le32 wcbbase1;
1702 __le32 wcbbase2;
1703 __le32 wcbbase3;
1704 } __attribute__((packed));
1705
1706 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1707 {
1708 struct mwl8k_priv *priv = hw->priv;
1709 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1710 int rc;
1711
1712 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1713 if (cmd == NULL)
1714 return -ENOMEM;
1715
1716 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1717 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1718
1719 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1720 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1721
1722 rc = mwl8k_post_cmd(hw, &cmd->header);
1723
1724 if (!rc) {
1725 int off;
1726
1727 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1728 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1729 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1730 priv->hw_rev = cmd->hw_rev;
1731
1732 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1733 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1734
1735 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1736 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1737
1738 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1739 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1740
1741 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1742 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1743
1744 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1745 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1746
1747 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1748 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1749 }
1750
1751 kfree(cmd);
1752 return rc;
1753 }
1754
1755 /*
1756 * CMD_SET_HW_SPEC.
1757 */
1758 struct mwl8k_cmd_set_hw_spec {
1759 struct mwl8k_cmd_pkt header;
1760 __u8 hw_rev;
1761 __u8 host_interface;
1762 __le16 num_mcaddrs;
1763 __u8 perm_addr[ETH_ALEN];
1764 __le16 region_code;
1765 __le32 fw_rev;
1766 __le32 ps_cookie;
1767 __le32 caps;
1768 __le32 rx_queue_ptr;
1769 __le32 num_tx_queues;
1770 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1771 __le32 flags;
1772 __le32 num_tx_desc_per_queue;
1773 __le32 total_rxd;
1774 } __attribute__((packed));
1775
1776 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1777 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1778 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1779
1780 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1781 {
1782 struct mwl8k_priv *priv = hw->priv;
1783 struct mwl8k_cmd_set_hw_spec *cmd;
1784 int rc;
1785 int i;
1786
1787 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1788 if (cmd == NULL)
1789 return -ENOMEM;
1790
1791 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1792 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1793
1794 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1795 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1796 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1797 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1798 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1799 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1800 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1801 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1802 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1803 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1804
1805 rc = mwl8k_post_cmd(hw, &cmd->header);
1806 kfree(cmd);
1807
1808 return rc;
1809 }
1810
1811 /*
1812 * CMD_MAC_MULTICAST_ADR.
1813 */
1814 struct mwl8k_cmd_mac_multicast_adr {
1815 struct mwl8k_cmd_pkt header;
1816 __le16 action;
1817 __le16 numaddr;
1818 __u8 addr[0][ETH_ALEN];
1819 };
1820
1821 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1822 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1823 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1824 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1825
1826 static struct mwl8k_cmd_pkt *
1827 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1828 int mc_count, struct dev_addr_list *mclist)
1829 {
1830 struct mwl8k_priv *priv = hw->priv;
1831 struct mwl8k_cmd_mac_multicast_adr *cmd;
1832 int size;
1833
1834 if (allmulti || mc_count > priv->num_mcaddrs) {
1835 allmulti = 1;
1836 mc_count = 0;
1837 }
1838
1839 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1840
1841 cmd = kzalloc(size, GFP_ATOMIC);
1842 if (cmd == NULL)
1843 return NULL;
1844
1845 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1846 cmd->header.length = cpu_to_le16(size);
1847 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1848 MWL8K_ENABLE_RX_BROADCAST);
1849
1850 if (allmulti) {
1851 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1852 } else if (mc_count) {
1853 int i;
1854
1855 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1856 cmd->numaddr = cpu_to_le16(mc_count);
1857 for (i = 0; i < mc_count && mclist; i++) {
1858 if (mclist->da_addrlen != ETH_ALEN) {
1859 kfree(cmd);
1860 return NULL;
1861 }
1862 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1863 mclist = mclist->next;
1864 }
1865 }
1866
1867 return &cmd->header;
1868 }
1869
1870 /*
1871 * CMD_GET_STAT.
1872 */
1873 struct mwl8k_cmd_get_stat {
1874 struct mwl8k_cmd_pkt header;
1875 __le32 stats[64];
1876 } __attribute__((packed));
1877
1878 #define MWL8K_STAT_ACK_FAILURE 9
1879 #define MWL8K_STAT_RTS_FAILURE 12
1880 #define MWL8K_STAT_FCS_ERROR 24
1881 #define MWL8K_STAT_RTS_SUCCESS 11
1882
1883 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1884 struct ieee80211_low_level_stats *stats)
1885 {
1886 struct mwl8k_cmd_get_stat *cmd;
1887 int rc;
1888
1889 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1890 if (cmd == NULL)
1891 return -ENOMEM;
1892
1893 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1894 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1895
1896 rc = mwl8k_post_cmd(hw, &cmd->header);
1897 if (!rc) {
1898 stats->dot11ACKFailureCount =
1899 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1900 stats->dot11RTSFailureCount =
1901 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1902 stats->dot11FCSErrorCount =
1903 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1904 stats->dot11RTSSuccessCount =
1905 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1906 }
1907 kfree(cmd);
1908
1909 return rc;
1910 }
1911
1912 /*
1913 * CMD_RADIO_CONTROL.
1914 */
1915 struct mwl8k_cmd_radio_control {
1916 struct mwl8k_cmd_pkt header;
1917 __le16 action;
1918 __le16 control;
1919 __le16 radio_on;
1920 } __attribute__((packed));
1921
1922 static int
1923 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1924 {
1925 struct mwl8k_priv *priv = hw->priv;
1926 struct mwl8k_cmd_radio_control *cmd;
1927 int rc;
1928
1929 if (enable == priv->radio_on && !force)
1930 return 0;
1931
1932 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1933 if (cmd == NULL)
1934 return -ENOMEM;
1935
1936 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1937 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1938 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1939 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1940 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1941
1942 rc = mwl8k_post_cmd(hw, &cmd->header);
1943 kfree(cmd);
1944
1945 if (!rc)
1946 priv->radio_on = enable;
1947
1948 return rc;
1949 }
1950
1951 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1952 {
1953 return mwl8k_cmd_radio_control(hw, 0, 0);
1954 }
1955
1956 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1957 {
1958 return mwl8k_cmd_radio_control(hw, 1, 0);
1959 }
1960
1961 static int
1962 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1963 {
1964 struct mwl8k_priv *priv = hw->priv;
1965
1966 priv->radio_short_preamble = short_preamble;
1967
1968 return mwl8k_cmd_radio_control(hw, 1, 1);
1969 }
1970
1971 /*
1972 * CMD_RF_TX_POWER.
1973 */
1974 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1975
1976 struct mwl8k_cmd_rf_tx_power {
1977 struct mwl8k_cmd_pkt header;
1978 __le16 action;
1979 __le16 support_level;
1980 __le16 current_level;
1981 __le16 reserved;
1982 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1983 } __attribute__((packed));
1984
1985 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1986 {
1987 struct mwl8k_cmd_rf_tx_power *cmd;
1988 int rc;
1989
1990 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1991 if (cmd == NULL)
1992 return -ENOMEM;
1993
1994 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1995 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1996 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1997 cmd->support_level = cpu_to_le16(dBm);
1998
1999 rc = mwl8k_post_cmd(hw, &cmd->header);
2000 kfree(cmd);
2001
2002 return rc;
2003 }
2004
2005 /*
2006 * CMD_RF_ANTENNA.
2007 */
2008 struct mwl8k_cmd_rf_antenna {
2009 struct mwl8k_cmd_pkt header;
2010 __le16 antenna;
2011 __le16 mode;
2012 } __attribute__((packed));
2013
2014 #define MWL8K_RF_ANTENNA_RX 1
2015 #define MWL8K_RF_ANTENNA_TX 2
2016
2017 static int
2018 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2019 {
2020 struct mwl8k_cmd_rf_antenna *cmd;
2021 int rc;
2022
2023 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2024 if (cmd == NULL)
2025 return -ENOMEM;
2026
2027 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2028 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2029 cmd->antenna = cpu_to_le16(antenna);
2030 cmd->mode = cpu_to_le16(mask);
2031
2032 rc = mwl8k_post_cmd(hw, &cmd->header);
2033 kfree(cmd);
2034
2035 return rc;
2036 }
2037
2038 /*
2039 * CMD_SET_BEACON.
2040 */
2041 struct mwl8k_cmd_set_beacon {
2042 struct mwl8k_cmd_pkt header;
2043 __le16 beacon_len;
2044 __u8 beacon[0];
2045 };
2046
2047 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2048 {
2049 struct mwl8k_cmd_set_beacon *cmd;
2050 int rc;
2051
2052 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2053 if (cmd == NULL)
2054 return -ENOMEM;
2055
2056 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2057 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2058 cmd->beacon_len = cpu_to_le16(len);
2059 memcpy(cmd->beacon, beacon, len);
2060
2061 rc = mwl8k_post_cmd(hw, &cmd->header);
2062 kfree(cmd);
2063
2064 return rc;
2065 }
2066
2067 /*
2068 * CMD_SET_PRE_SCAN.
2069 */
2070 struct mwl8k_cmd_set_pre_scan {
2071 struct mwl8k_cmd_pkt header;
2072 } __attribute__((packed));
2073
2074 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2075 {
2076 struct mwl8k_cmd_set_pre_scan *cmd;
2077 int rc;
2078
2079 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2080 if (cmd == NULL)
2081 return -ENOMEM;
2082
2083 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2084 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2085
2086 rc = mwl8k_post_cmd(hw, &cmd->header);
2087 kfree(cmd);
2088
2089 return rc;
2090 }
2091
2092 /*
2093 * CMD_SET_POST_SCAN.
2094 */
2095 struct mwl8k_cmd_set_post_scan {
2096 struct mwl8k_cmd_pkt header;
2097 __le32 isibss;
2098 __u8 bssid[ETH_ALEN];
2099 } __attribute__((packed));
2100
2101 static int
2102 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2103 {
2104 struct mwl8k_cmd_set_post_scan *cmd;
2105 int rc;
2106
2107 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2108 if (cmd == NULL)
2109 return -ENOMEM;
2110
2111 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2112 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2113 cmd->isibss = 0;
2114 memcpy(cmd->bssid, mac, ETH_ALEN);
2115
2116 rc = mwl8k_post_cmd(hw, &cmd->header);
2117 kfree(cmd);
2118
2119 return rc;
2120 }
2121
2122 /*
2123 * CMD_SET_RF_CHANNEL.
2124 */
2125 struct mwl8k_cmd_set_rf_channel {
2126 struct mwl8k_cmd_pkt header;
2127 __le16 action;
2128 __u8 current_channel;
2129 __le32 channel_flags;
2130 } __attribute__((packed));
2131
2132 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2133 struct ieee80211_conf *conf)
2134 {
2135 struct ieee80211_channel *channel = conf->channel;
2136 struct mwl8k_cmd_set_rf_channel *cmd;
2137 int rc;
2138
2139 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2140 if (cmd == NULL)
2141 return -ENOMEM;
2142
2143 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2144 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2145 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2146 cmd->current_channel = channel->hw_value;
2147
2148 if (channel->band == IEEE80211_BAND_2GHZ)
2149 cmd->channel_flags |= cpu_to_le32(0x00000001);
2150
2151 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2152 conf->channel_type == NL80211_CHAN_HT20)
2153 cmd->channel_flags |= cpu_to_le32(0x00000080);
2154 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2155 cmd->channel_flags |= cpu_to_le32(0x000001900);
2156 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2157 cmd->channel_flags |= cpu_to_le32(0x000000900);
2158
2159 rc = mwl8k_post_cmd(hw, &cmd->header);
2160 kfree(cmd);
2161
2162 return rc;
2163 }
2164
2165 /*
2166 * CMD_SET_AID.
2167 */
2168 #define MWL8K_FRAME_PROT_DISABLED 0x00
2169 #define MWL8K_FRAME_PROT_11G 0x07
2170 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2171 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2172
2173 struct mwl8k_cmd_update_set_aid {
2174 struct mwl8k_cmd_pkt header;
2175 __le16 aid;
2176
2177 /* AP's MAC address (BSSID) */
2178 __u8 bssid[ETH_ALEN];
2179 __le16 protection_mode;
2180 __u8 supp_rates[14];
2181 } __attribute__((packed));
2182
2183 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2184 {
2185 int i;
2186 int j;
2187
2188 /*
2189 * Clear nonstandard rates 4 and 13.
2190 */
2191 mask &= 0x1fef;
2192
2193 for (i = 0, j = 0; i < 14; i++) {
2194 if (mask & (1 << i))
2195 rates[j++] = mwl8k_rates[i].hw_value;
2196 }
2197 }
2198
2199 static int
2200 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2201 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2202 {
2203 struct mwl8k_cmd_update_set_aid *cmd;
2204 u16 prot_mode;
2205 int rc;
2206
2207 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2208 if (cmd == NULL)
2209 return -ENOMEM;
2210
2211 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2212 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2213 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2214 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2215
2216 if (vif->bss_conf.use_cts_prot) {
2217 prot_mode = MWL8K_FRAME_PROT_11G;
2218 } else {
2219 switch (vif->bss_conf.ht_operation_mode &
2220 IEEE80211_HT_OP_MODE_PROTECTION) {
2221 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2222 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2223 break;
2224 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2225 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2226 break;
2227 default:
2228 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2229 break;
2230 }
2231 }
2232 cmd->protection_mode = cpu_to_le16(prot_mode);
2233
2234 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2235
2236 rc = mwl8k_post_cmd(hw, &cmd->header);
2237 kfree(cmd);
2238
2239 return rc;
2240 }
2241
2242 /*
2243 * CMD_SET_RATE.
2244 */
2245 struct mwl8k_cmd_set_rate {
2246 struct mwl8k_cmd_pkt header;
2247 __u8 legacy_rates[14];
2248
2249 /* Bitmap for supported MCS codes. */
2250 __u8 mcs_set[16];
2251 __u8 reserved[16];
2252 } __attribute__((packed));
2253
2254 static int
2255 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2256 u32 legacy_rate_mask, u8 *mcs_rates)
2257 {
2258 struct mwl8k_cmd_set_rate *cmd;
2259 int rc;
2260
2261 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2262 if (cmd == NULL)
2263 return -ENOMEM;
2264
2265 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2266 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2267 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2268 memcpy(cmd->mcs_set, mcs_rates, 16);
2269
2270 rc = mwl8k_post_cmd(hw, &cmd->header);
2271 kfree(cmd);
2272
2273 return rc;
2274 }
2275
2276 /*
2277 * CMD_FINALIZE_JOIN.
2278 */
2279 #define MWL8K_FJ_BEACON_MAXLEN 128
2280
2281 struct mwl8k_cmd_finalize_join {
2282 struct mwl8k_cmd_pkt header;
2283 __le32 sleep_interval; /* Number of beacon periods to sleep */
2284 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2285 } __attribute__((packed));
2286
2287 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2288 int framelen, int dtim)
2289 {
2290 struct mwl8k_cmd_finalize_join *cmd;
2291 struct ieee80211_mgmt *payload = frame;
2292 int payload_len;
2293 int rc;
2294
2295 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2296 if (cmd == NULL)
2297 return -ENOMEM;
2298
2299 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2300 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2301 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2302
2303 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2304 if (payload_len < 0)
2305 payload_len = 0;
2306 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2307 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2308
2309 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2310
2311 rc = mwl8k_post_cmd(hw, &cmd->header);
2312 kfree(cmd);
2313
2314 return rc;
2315 }
2316
2317 /*
2318 * CMD_SET_RTS_THRESHOLD.
2319 */
2320 struct mwl8k_cmd_set_rts_threshold {
2321 struct mwl8k_cmd_pkt header;
2322 __le16 action;
2323 __le16 threshold;
2324 } __attribute__((packed));
2325
2326 static int
2327 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2328 {
2329 struct mwl8k_cmd_set_rts_threshold *cmd;
2330 int rc;
2331
2332 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2333 if (cmd == NULL)
2334 return -ENOMEM;
2335
2336 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2337 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2338 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2339 cmd->threshold = cpu_to_le16(rts_thresh);
2340
2341 rc = mwl8k_post_cmd(hw, &cmd->header);
2342 kfree(cmd);
2343
2344 return rc;
2345 }
2346
2347 /*
2348 * CMD_SET_SLOT.
2349 */
2350 struct mwl8k_cmd_set_slot {
2351 struct mwl8k_cmd_pkt header;
2352 __le16 action;
2353 __u8 short_slot;
2354 } __attribute__((packed));
2355
2356 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2357 {
2358 struct mwl8k_cmd_set_slot *cmd;
2359 int rc;
2360
2361 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2362 if (cmd == NULL)
2363 return -ENOMEM;
2364
2365 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2366 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2367 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2368 cmd->short_slot = short_slot_time;
2369
2370 rc = mwl8k_post_cmd(hw, &cmd->header);
2371 kfree(cmd);
2372
2373 return rc;
2374 }
2375
2376 /*
2377 * CMD_SET_EDCA_PARAMS.
2378 */
2379 struct mwl8k_cmd_set_edca_params {
2380 struct mwl8k_cmd_pkt header;
2381
2382 /* See MWL8K_SET_EDCA_XXX below */
2383 __le16 action;
2384
2385 /* TX opportunity in units of 32 us */
2386 __le16 txop;
2387
2388 union {
2389 struct {
2390 /* Log exponent of max contention period: 0...15 */
2391 __le32 log_cw_max;
2392
2393 /* Log exponent of min contention period: 0...15 */
2394 __le32 log_cw_min;
2395
2396 /* Adaptive interframe spacing in units of 32us */
2397 __u8 aifs;
2398
2399 /* TX queue to configure */
2400 __u8 txq;
2401 } ap;
2402 struct {
2403 /* Log exponent of max contention period: 0...15 */
2404 __u8 log_cw_max;
2405
2406 /* Log exponent of min contention period: 0...15 */
2407 __u8 log_cw_min;
2408
2409 /* Adaptive interframe spacing in units of 32us */
2410 __u8 aifs;
2411
2412 /* TX queue to configure */
2413 __u8 txq;
2414 } sta;
2415 };
2416 } __attribute__((packed));
2417
2418 #define MWL8K_SET_EDCA_CW 0x01
2419 #define MWL8K_SET_EDCA_TXOP 0x02
2420 #define MWL8K_SET_EDCA_AIFS 0x04
2421
2422 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2423 MWL8K_SET_EDCA_TXOP | \
2424 MWL8K_SET_EDCA_AIFS)
2425
2426 static int
2427 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2428 __u16 cw_min, __u16 cw_max,
2429 __u8 aifs, __u16 txop)
2430 {
2431 struct mwl8k_priv *priv = hw->priv;
2432 struct mwl8k_cmd_set_edca_params *cmd;
2433 int rc;
2434
2435 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2436 if (cmd == NULL)
2437 return -ENOMEM;
2438
2439 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2440 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2441 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2442 cmd->txop = cpu_to_le16(txop);
2443 if (priv->ap_fw) {
2444 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2445 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2446 cmd->ap.aifs = aifs;
2447 cmd->ap.txq = qnum;
2448 } else {
2449 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2450 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2451 cmd->sta.aifs = aifs;
2452 cmd->sta.txq = qnum;
2453 }
2454
2455 rc = mwl8k_post_cmd(hw, &cmd->header);
2456 kfree(cmd);
2457
2458 return rc;
2459 }
2460
2461 /*
2462 * CMD_SET_WMM_MODE.
2463 */
2464 struct mwl8k_cmd_set_wmm_mode {
2465 struct mwl8k_cmd_pkt header;
2466 __le16 action;
2467 } __attribute__((packed));
2468
2469 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2470 {
2471 struct mwl8k_priv *priv = hw->priv;
2472 struct mwl8k_cmd_set_wmm_mode *cmd;
2473 int rc;
2474
2475 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2476 if (cmd == NULL)
2477 return -ENOMEM;
2478
2479 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2480 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2481 cmd->action = cpu_to_le16(!!enable);
2482
2483 rc = mwl8k_post_cmd(hw, &cmd->header);
2484 kfree(cmd);
2485
2486 if (!rc)
2487 priv->wmm_enabled = enable;
2488
2489 return rc;
2490 }
2491
2492 /*
2493 * CMD_MIMO_CONFIG.
2494 */
2495 struct mwl8k_cmd_mimo_config {
2496 struct mwl8k_cmd_pkt header;
2497 __le32 action;
2498 __u8 rx_antenna_map;
2499 __u8 tx_antenna_map;
2500 } __attribute__((packed));
2501
2502 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2503 {
2504 struct mwl8k_cmd_mimo_config *cmd;
2505 int rc;
2506
2507 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2508 if (cmd == NULL)
2509 return -ENOMEM;
2510
2511 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2512 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2513 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2514 cmd->rx_antenna_map = rx;
2515 cmd->tx_antenna_map = tx;
2516
2517 rc = mwl8k_post_cmd(hw, &cmd->header);
2518 kfree(cmd);
2519
2520 return rc;
2521 }
2522
2523 /*
2524 * CMD_USE_FIXED_RATE (STA version).
2525 */
2526 struct mwl8k_cmd_use_fixed_rate_sta {
2527 struct mwl8k_cmd_pkt header;
2528 __le32 action;
2529 __le32 allow_rate_drop;
2530 __le32 num_rates;
2531 struct {
2532 __le32 is_ht_rate;
2533 __le32 enable_retry;
2534 __le32 rate;
2535 __le32 retry_count;
2536 } rate_entry[8];
2537 __le32 rate_type;
2538 __le32 reserved1;
2539 __le32 reserved2;
2540 } __attribute__((packed));
2541
2542 #define MWL8K_USE_AUTO_RATE 0x0002
2543 #define MWL8K_UCAST_RATE 0
2544
2545 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2546 {
2547 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2548 int rc;
2549
2550 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2551 if (cmd == NULL)
2552 return -ENOMEM;
2553
2554 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2555 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2556 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2557 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2558
2559 rc = mwl8k_post_cmd(hw, &cmd->header);
2560 kfree(cmd);
2561
2562 return rc;
2563 }
2564
2565 /*
2566 * CMD_USE_FIXED_RATE (AP version).
2567 */
2568 struct mwl8k_cmd_use_fixed_rate_ap {
2569 struct mwl8k_cmd_pkt header;
2570 __le32 action;
2571 __le32 allow_rate_drop;
2572 __le32 num_rates;
2573 struct mwl8k_rate_entry_ap {
2574 __le32 is_ht_rate;
2575 __le32 enable_retry;
2576 __le32 rate;
2577 __le32 retry_count;
2578 } rate_entry[4];
2579 u8 multicast_rate;
2580 u8 multicast_rate_type;
2581 u8 management_rate;
2582 } __attribute__((packed));
2583
2584 static int
2585 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2586 {
2587 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2588 int rc;
2589
2590 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2591 if (cmd == NULL)
2592 return -ENOMEM;
2593
2594 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2595 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2596 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2597 cmd->multicast_rate = mcast;
2598 cmd->management_rate = mgmt;
2599
2600 rc = mwl8k_post_cmd(hw, &cmd->header);
2601 kfree(cmd);
2602
2603 return rc;
2604 }
2605
2606 /*
2607 * CMD_ENABLE_SNIFFER.
2608 */
2609 struct mwl8k_cmd_enable_sniffer {
2610 struct mwl8k_cmd_pkt header;
2611 __le32 action;
2612 } __attribute__((packed));
2613
2614 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2615 {
2616 struct mwl8k_cmd_enable_sniffer *cmd;
2617 int rc;
2618
2619 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2620 if (cmd == NULL)
2621 return -ENOMEM;
2622
2623 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2624 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2625 cmd->action = cpu_to_le32(!!enable);
2626
2627 rc = mwl8k_post_cmd(hw, &cmd->header);
2628 kfree(cmd);
2629
2630 return rc;
2631 }
2632
2633 /*
2634 * CMD_SET_MAC_ADDR.
2635 */
2636 struct mwl8k_cmd_set_mac_addr {
2637 struct mwl8k_cmd_pkt header;
2638 union {
2639 struct {
2640 __le16 mac_type;
2641 __u8 mac_addr[ETH_ALEN];
2642 } mbss;
2643 __u8 mac_addr[ETH_ALEN];
2644 };
2645 } __attribute__((packed));
2646
2647 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2648 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2649
2650 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2651 {
2652 struct mwl8k_priv *priv = hw->priv;
2653 struct mwl8k_cmd_set_mac_addr *cmd;
2654 int rc;
2655
2656 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2657 if (cmd == NULL)
2658 return -ENOMEM;
2659
2660 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2661 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2662 if (priv->ap_fw) {
2663 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2664 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2665 } else {
2666 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2667 }
2668
2669 rc = mwl8k_post_cmd(hw, &cmd->header);
2670 kfree(cmd);
2671
2672 return rc;
2673 }
2674
2675 /*
2676 * CMD_SET_RATEADAPT_MODE.
2677 */
2678 struct mwl8k_cmd_set_rate_adapt_mode {
2679 struct mwl8k_cmd_pkt header;
2680 __le16 action;
2681 __le16 mode;
2682 } __attribute__((packed));
2683
2684 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2685 {
2686 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2687 int rc;
2688
2689 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2690 if (cmd == NULL)
2691 return -ENOMEM;
2692
2693 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2694 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2695 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2696 cmd->mode = cpu_to_le16(mode);
2697
2698 rc = mwl8k_post_cmd(hw, &cmd->header);
2699 kfree(cmd);
2700
2701 return rc;
2702 }
2703
2704 /*
2705 * CMD_BSS_START.
2706 */
2707 struct mwl8k_cmd_bss_start {
2708 struct mwl8k_cmd_pkt header;
2709 __le32 enable;
2710 } __attribute__((packed));
2711
2712 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2713 {
2714 struct mwl8k_cmd_bss_start *cmd;
2715 int rc;
2716
2717 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2718 if (cmd == NULL)
2719 return -ENOMEM;
2720
2721 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2722 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2723 cmd->enable = cpu_to_le32(enable);
2724
2725 rc = mwl8k_post_cmd(hw, &cmd->header);
2726 kfree(cmd);
2727
2728 return rc;
2729 }
2730
2731 /*
2732 * CMD_SET_NEW_STN.
2733 */
2734 struct mwl8k_cmd_set_new_stn {
2735 struct mwl8k_cmd_pkt header;
2736 __le16 aid;
2737 __u8 mac_addr[6];
2738 __le16 stn_id;
2739 __le16 action;
2740 __le16 rsvd;
2741 __le32 legacy_rates;
2742 __u8 ht_rates[4];
2743 __le16 cap_info;
2744 __le16 ht_capabilities_info;
2745 __u8 mac_ht_param_info;
2746 __u8 rev;
2747 __u8 control_channel;
2748 __u8 add_channel;
2749 __le16 op_mode;
2750 __le16 stbc;
2751 __u8 add_qos_info;
2752 __u8 is_qos_sta;
2753 __le32 fw_sta_ptr;
2754 } __attribute__((packed));
2755
2756 #define MWL8K_STA_ACTION_ADD 0
2757 #define MWL8K_STA_ACTION_REMOVE 2
2758
2759 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2760 struct ieee80211_vif *vif,
2761 struct ieee80211_sta *sta)
2762 {
2763 struct mwl8k_cmd_set_new_stn *cmd;
2764 int rc;
2765
2766 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2767 if (cmd == NULL)
2768 return -ENOMEM;
2769
2770 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2771 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2772 cmd->aid = cpu_to_le16(sta->aid);
2773 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2774 cmd->stn_id = cpu_to_le16(sta->aid);
2775 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2776 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2777 if (sta->ht_cap.ht_supported) {
2778 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2779 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2780 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2781 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2782 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2783 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2784 ((sta->ht_cap.ampdu_density & 7) << 2);
2785 cmd->is_qos_sta = 1;
2786 }
2787
2788 rc = mwl8k_post_cmd(hw, &cmd->header);
2789 kfree(cmd);
2790
2791 return rc;
2792 }
2793
2794 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2795 struct ieee80211_vif *vif)
2796 {
2797 struct mwl8k_cmd_set_new_stn *cmd;
2798 int rc;
2799
2800 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2801 if (cmd == NULL)
2802 return -ENOMEM;
2803
2804 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2805 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2806 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2807
2808 rc = mwl8k_post_cmd(hw, &cmd->header);
2809 kfree(cmd);
2810
2811 return rc;
2812 }
2813
2814 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2815 struct ieee80211_vif *vif, u8 *addr)
2816 {
2817 struct mwl8k_cmd_set_new_stn *cmd;
2818 int rc;
2819
2820 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2821 if (cmd == NULL)
2822 return -ENOMEM;
2823
2824 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2825 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2826 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2827 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2828
2829 rc = mwl8k_post_cmd(hw, &cmd->header);
2830 kfree(cmd);
2831
2832 return rc;
2833 }
2834
2835 /*
2836 * CMD_UPDATE_STADB.
2837 */
2838 struct ewc_ht_info {
2839 __le16 control1;
2840 __le16 control2;
2841 __le16 control3;
2842 } __attribute__((packed));
2843
2844 struct peer_capability_info {
2845 /* Peer type - AP vs. STA. */
2846 __u8 peer_type;
2847
2848 /* Basic 802.11 capabilities from assoc resp. */
2849 __le16 basic_caps;
2850
2851 /* Set if peer supports 802.11n high throughput (HT). */
2852 __u8 ht_support;
2853
2854 /* Valid if HT is supported. */
2855 __le16 ht_caps;
2856 __u8 extended_ht_caps;
2857 struct ewc_ht_info ewc_info;
2858
2859 /* Legacy rate table. Intersection of our rates and peer rates. */
2860 __u8 legacy_rates[12];
2861
2862 /* HT rate table. Intersection of our rates and peer rates. */
2863 __u8 ht_rates[16];
2864 __u8 pad[16];
2865
2866 /* If set, interoperability mode, no proprietary extensions. */
2867 __u8 interop;
2868 __u8 pad2;
2869 __u8 station_id;
2870 __le16 amsdu_enabled;
2871 } __attribute__((packed));
2872
2873 struct mwl8k_cmd_update_stadb {
2874 struct mwl8k_cmd_pkt header;
2875
2876 /* See STADB_ACTION_TYPE */
2877 __le32 action;
2878
2879 /* Peer MAC address */
2880 __u8 peer_addr[ETH_ALEN];
2881
2882 __le32 reserved;
2883
2884 /* Peer info - valid during add/update. */
2885 struct peer_capability_info peer_info;
2886 } __attribute__((packed));
2887
2888 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2889 #define MWL8K_STA_DB_DEL_ENTRY 2
2890
2891 /* Peer Entry flags - used to define the type of the peer node */
2892 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2893
2894 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif,
2896 struct ieee80211_sta *sta)
2897 {
2898 struct mwl8k_cmd_update_stadb *cmd;
2899 struct peer_capability_info *p;
2900 int rc;
2901
2902 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2903 if (cmd == NULL)
2904 return -ENOMEM;
2905
2906 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2907 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2908 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2909 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2910
2911 p = &cmd->peer_info;
2912 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2913 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2914 p->ht_support = sta->ht_cap.ht_supported;
2915 p->ht_caps = sta->ht_cap.cap;
2916 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2917 ((sta->ht_cap.ampdu_density & 7) << 2);
2918 legacy_rate_mask_to_array(p->legacy_rates,
2919 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2920 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2921 p->interop = 1;
2922 p->amsdu_enabled = 0;
2923
2924 rc = mwl8k_post_cmd(hw, &cmd->header);
2925 kfree(cmd);
2926
2927 return rc ? rc : p->station_id;
2928 }
2929
2930 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2931 struct ieee80211_vif *vif, u8 *addr)
2932 {
2933 struct mwl8k_cmd_update_stadb *cmd;
2934 int rc;
2935
2936 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2937 if (cmd == NULL)
2938 return -ENOMEM;
2939
2940 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2941 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2942 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2943 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2944
2945 rc = mwl8k_post_cmd(hw, &cmd->header);
2946 kfree(cmd);
2947
2948 return rc;
2949 }
2950
2951
2952 /*
2953 * Interrupt handling.
2954 */
2955 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2956 {
2957 struct ieee80211_hw *hw = dev_id;
2958 struct mwl8k_priv *priv = hw->priv;
2959 u32 status;
2960
2961 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2962 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2963
2964 if (!status)
2965 return IRQ_NONE;
2966
2967 if (status & MWL8K_A2H_INT_TX_DONE)
2968 tasklet_schedule(&priv->tx_reclaim_task);
2969
2970 if (status & MWL8K_A2H_INT_RX_READY) {
2971 while (rxq_process(hw, 0, 1))
2972 rxq_refill(hw, 0, 1);
2973 }
2974
2975 if (status & MWL8K_A2H_INT_OPC_DONE) {
2976 if (priv->hostcmd_wait != NULL)
2977 complete(priv->hostcmd_wait);
2978 }
2979
2980 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2981 if (!mutex_is_locked(&priv->fw_mutex) &&
2982 priv->radio_on && priv->pending_tx_pkts)
2983 mwl8k_tx_start(priv);
2984 }
2985
2986 return IRQ_HANDLED;
2987 }
2988
2989
2990 /*
2991 * Core driver operations.
2992 */
2993 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2994 {
2995 struct mwl8k_priv *priv = hw->priv;
2996 int index = skb_get_queue_mapping(skb);
2997 int rc;
2998
2999 if (priv->current_channel == NULL) {
3000 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3001 "disabled\n", wiphy_name(hw->wiphy));
3002 dev_kfree_skb(skb);
3003 return NETDEV_TX_OK;
3004 }
3005
3006 rc = mwl8k_txq_xmit(hw, index, skb);
3007
3008 return rc;
3009 }
3010
3011 static int mwl8k_start(struct ieee80211_hw *hw)
3012 {
3013 struct mwl8k_priv *priv = hw->priv;
3014 int rc;
3015
3016 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3017 IRQF_SHARED, MWL8K_NAME, hw);
3018 if (rc) {
3019 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3020 wiphy_name(hw->wiphy));
3021 return -EIO;
3022 }
3023
3024 /* Enable tx reclaim tasklet */
3025 tasklet_enable(&priv->tx_reclaim_task);
3026
3027 /* Enable interrupts */
3028 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3029
3030 rc = mwl8k_fw_lock(hw);
3031 if (!rc) {
3032 rc = mwl8k_cmd_radio_enable(hw);
3033
3034 if (!priv->ap_fw) {
3035 if (!rc)
3036 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3037
3038 if (!rc)
3039 rc = mwl8k_cmd_set_pre_scan(hw);
3040
3041 if (!rc)
3042 rc = mwl8k_cmd_set_post_scan(hw,
3043 "\x00\x00\x00\x00\x00\x00");
3044 }
3045
3046 if (!rc)
3047 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3048
3049 if (!rc)
3050 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3051
3052 mwl8k_fw_unlock(hw);
3053 }
3054
3055 if (rc) {
3056 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3057 free_irq(priv->pdev->irq, hw);
3058 tasklet_disable(&priv->tx_reclaim_task);
3059 }
3060
3061 return rc;
3062 }
3063
3064 static void mwl8k_stop(struct ieee80211_hw *hw)
3065 {
3066 struct mwl8k_priv *priv = hw->priv;
3067 int i;
3068
3069 mwl8k_cmd_radio_disable(hw);
3070
3071 ieee80211_stop_queues(hw);
3072
3073 /* Disable interrupts */
3074 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3075 free_irq(priv->pdev->irq, hw);
3076
3077 /* Stop finalize join worker */
3078 cancel_work_sync(&priv->finalize_join_worker);
3079 if (priv->beacon_skb != NULL)
3080 dev_kfree_skb(priv->beacon_skb);
3081
3082 /* Stop tx reclaim tasklet */
3083 tasklet_disable(&priv->tx_reclaim_task);
3084
3085 /* Return all skbs to mac80211 */
3086 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3087 mwl8k_txq_reclaim(hw, i, 1);
3088 }
3089
3090 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3091 struct ieee80211_vif *vif)
3092 {
3093 struct mwl8k_priv *priv = hw->priv;
3094 struct mwl8k_vif *mwl8k_vif;
3095
3096 /*
3097 * We only support one active interface at a time.
3098 */
3099 if (priv->vif != NULL)
3100 return -EBUSY;
3101
3102 /*
3103 * Reject interface creation if sniffer mode is active, as
3104 * STA operation is mutually exclusive with hardware sniffer
3105 * mode. (Sniffer mode is only used on STA firmware.)
3106 */
3107 if (priv->sniffer_enabled) {
3108 printk(KERN_INFO "%s: unable to create STA "
3109 "interface due to sniffer mode being enabled\n",
3110 wiphy_name(hw->wiphy));
3111 return -EINVAL;
3112 }
3113
3114 /* Set the mac address. */
3115 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3116
3117 if (priv->ap_fw)
3118 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3119
3120 /* Clean out driver private area */
3121 mwl8k_vif = MWL8K_VIF(vif);
3122 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3123
3124 /* Set Initial sequence number to zero */
3125 mwl8k_vif->seqno = 0;
3126
3127 priv->vif = vif;
3128 priv->current_channel = NULL;
3129
3130 return 0;
3131 }
3132
3133 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3134 struct ieee80211_vif *vif)
3135 {
3136 struct mwl8k_priv *priv = hw->priv;
3137
3138 if (priv->ap_fw)
3139 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3140
3141 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3142
3143 priv->vif = NULL;
3144 }
3145
3146 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3147 {
3148 struct ieee80211_conf *conf = &hw->conf;
3149 struct mwl8k_priv *priv = hw->priv;
3150 int rc;
3151
3152 if (conf->flags & IEEE80211_CONF_IDLE) {
3153 mwl8k_cmd_radio_disable(hw);
3154 priv->current_channel = NULL;
3155 return 0;
3156 }
3157
3158 rc = mwl8k_fw_lock(hw);
3159 if (rc)
3160 return rc;
3161
3162 rc = mwl8k_cmd_radio_enable(hw);
3163 if (rc)
3164 goto out;
3165
3166 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3167 if (rc)
3168 goto out;
3169
3170 priv->current_channel = conf->channel;
3171
3172 if (conf->power_level > 18)
3173 conf->power_level = 18;
3174 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3175 if (rc)
3176 goto out;
3177
3178 if (priv->ap_fw) {
3179 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3180 if (!rc)
3181 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3182 } else {
3183 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3184 }
3185
3186 out:
3187 mwl8k_fw_unlock(hw);
3188
3189 return rc;
3190 }
3191
3192 static void
3193 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3194 struct ieee80211_bss_conf *info, u32 changed)
3195 {
3196 struct mwl8k_priv *priv = hw->priv;
3197 u32 ap_legacy_rates;
3198 u8 ap_mcs_rates[16];
3199 int rc;
3200
3201 if (mwl8k_fw_lock(hw))
3202 return;
3203
3204 /*
3205 * No need to capture a beacon if we're no longer associated.
3206 */
3207 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3208 priv->capture_beacon = false;
3209
3210 /*
3211 * Get the AP's legacy and MCS rates.
3212 */
3213 ap_legacy_rates = 0;
3214 if (vif->bss_conf.assoc) {
3215 struct ieee80211_sta *ap;
3216 rcu_read_lock();
3217
3218 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3219 if (ap == NULL) {
3220 rcu_read_unlock();
3221 goto out;
3222 }
3223
3224 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3225 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3226
3227 rcu_read_unlock();
3228 }
3229
3230 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3231 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3232 if (rc)
3233 goto out;
3234
3235 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3236 if (rc)
3237 goto out;
3238 }
3239
3240 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3241 rc = mwl8k_set_radio_preamble(hw,
3242 vif->bss_conf.use_short_preamble);
3243 if (rc)
3244 goto out;
3245 }
3246
3247 if (changed & BSS_CHANGED_ERP_SLOT) {
3248 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3249 if (rc)
3250 goto out;
3251 }
3252
3253 if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
3254 (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
3255 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3256 if (rc)
3257 goto out;
3258 }
3259
3260 if (vif->bss_conf.assoc &&
3261 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3262 /*
3263 * Finalize the join. Tell rx handler to process
3264 * next beacon from our BSSID.
3265 */
3266 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3267 priv->capture_beacon = true;
3268 }
3269
3270 out:
3271 mwl8k_fw_unlock(hw);
3272 }
3273
3274 static void
3275 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3276 struct ieee80211_bss_conf *info, u32 changed)
3277 {
3278 int rc;
3279
3280 if (mwl8k_fw_lock(hw))
3281 return;
3282
3283 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3284 rc = mwl8k_set_radio_preamble(hw,
3285 vif->bss_conf.use_short_preamble);
3286 if (rc)
3287 goto out;
3288 }
3289
3290 if (changed & BSS_CHANGED_BASIC_RATES) {
3291 int idx;
3292 int rate;
3293
3294 /*
3295 * Use lowest supported basic rate for multicasts
3296 * and management frames (such as probe responses --
3297 * beacons will always go out at 1 Mb/s).
3298 */
3299 idx = ffs(vif->bss_conf.basic_rates);
3300 rate = idx ? mwl8k_rates[idx - 1].hw_value : 2;
3301
3302 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3303 }
3304
3305 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3306 struct sk_buff *skb;
3307
3308 skb = ieee80211_beacon_get(hw, vif);
3309 if (skb != NULL) {
3310 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3311 kfree_skb(skb);
3312 }
3313 }
3314
3315 if (changed & BSS_CHANGED_BEACON_ENABLED)
3316 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3317
3318 out:
3319 mwl8k_fw_unlock(hw);
3320 }
3321
3322 static void
3323 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3324 struct ieee80211_bss_conf *info, u32 changed)
3325 {
3326 struct mwl8k_priv *priv = hw->priv;
3327
3328 if (!priv->ap_fw)
3329 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3330 else
3331 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3332 }
3333
3334 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3335 int mc_count, struct dev_addr_list *mclist)
3336 {
3337 struct mwl8k_cmd_pkt *cmd;
3338
3339 /*
3340 * Synthesize and return a command packet that programs the
3341 * hardware multicast address filter. At this point we don't
3342 * know whether FIF_ALLMULTI is being requested, but if it is,
3343 * we'll end up throwing this packet away and creating a new
3344 * one in mwl8k_configure_filter().
3345 */
3346 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3347
3348 return (unsigned long)cmd;
3349 }
3350
3351 static int
3352 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3353 unsigned int changed_flags,
3354 unsigned int *total_flags)
3355 {
3356 struct mwl8k_priv *priv = hw->priv;
3357
3358 /*
3359 * Hardware sniffer mode is mutually exclusive with STA
3360 * operation, so refuse to enable sniffer mode if a STA
3361 * interface is active.
3362 */
3363 if (priv->vif != NULL) {
3364 if (net_ratelimit())
3365 printk(KERN_INFO "%s: not enabling sniffer "
3366 "mode because STA interface is active\n",
3367 wiphy_name(hw->wiphy));
3368 return 0;
3369 }
3370
3371 if (!priv->sniffer_enabled) {
3372 if (mwl8k_cmd_enable_sniffer(hw, 1))
3373 return 0;
3374 priv->sniffer_enabled = true;
3375 }
3376
3377 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3378 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3379 FIF_OTHER_BSS;
3380
3381 return 1;
3382 }
3383
3384 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3385 unsigned int changed_flags,
3386 unsigned int *total_flags,
3387 u64 multicast)
3388 {
3389 struct mwl8k_priv *priv = hw->priv;
3390 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3391
3392 /*
3393 * AP firmware doesn't allow fine-grained control over
3394 * the receive filter.
3395 */
3396 if (priv->ap_fw) {
3397 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3398 kfree(cmd);
3399 return;
3400 }
3401
3402 /*
3403 * Enable hardware sniffer mode if FIF_CONTROL or
3404 * FIF_OTHER_BSS is requested.
3405 */
3406 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3407 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3408 kfree(cmd);
3409 return;
3410 }
3411
3412 /* Clear unsupported feature flags */
3413 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3414
3415 if (mwl8k_fw_lock(hw)) {
3416 kfree(cmd);
3417 return;
3418 }
3419
3420 if (priv->sniffer_enabled) {
3421 mwl8k_cmd_enable_sniffer(hw, 0);
3422 priv->sniffer_enabled = false;
3423 }
3424
3425 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3426 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3427 /*
3428 * Disable the BSS filter.
3429 */
3430 mwl8k_cmd_set_pre_scan(hw);
3431 } else {
3432 const u8 *bssid;
3433
3434 /*
3435 * Enable the BSS filter.
3436 *
3437 * If there is an active STA interface, use that
3438 * interface's BSSID, otherwise use a dummy one
3439 * (where the OUI part needs to be nonzero for
3440 * the BSSID to be accepted by POST_SCAN).
3441 */
3442 bssid = "\x01\x00\x00\x00\x00\x00";
3443 if (priv->vif != NULL)
3444 bssid = priv->vif->bss_conf.bssid;
3445
3446 mwl8k_cmd_set_post_scan(hw, bssid);
3447 }
3448 }
3449
3450 /*
3451 * If FIF_ALLMULTI is being requested, throw away the command
3452 * packet that ->prepare_multicast() built and replace it with
3453 * a command packet that enables reception of all multicast
3454 * packets.
3455 */
3456 if (*total_flags & FIF_ALLMULTI) {
3457 kfree(cmd);
3458 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3459 }
3460
3461 if (cmd != NULL) {
3462 mwl8k_post_cmd(hw, cmd);
3463 kfree(cmd);
3464 }
3465
3466 mwl8k_fw_unlock(hw);
3467 }
3468
3469 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3470 {
3471 return mwl8k_cmd_set_rts_threshold(hw, value);
3472 }
3473
3474 struct mwl8k_sta_notify_item
3475 {
3476 struct list_head list;
3477 struct ieee80211_vif *vif;
3478 enum sta_notify_cmd cmd;
3479 struct ieee80211_sta sta;
3480 };
3481
3482 static void
3483 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3484 {
3485 struct mwl8k_priv *priv = hw->priv;
3486
3487 /*
3488 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3489 */
3490 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3491 int rc;
3492
3493 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3494 if (rc >= 0) {
3495 struct ieee80211_sta *sta;
3496
3497 rcu_read_lock();
3498 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3499 if (sta != NULL)
3500 MWL8K_STA(sta)->peer_id = rc;
3501 rcu_read_unlock();
3502 }
3503 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3504 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3505 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3506 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3507 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3508 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3509 }
3510 }
3511
3512 static void mwl8k_sta_notify_worker(struct work_struct *work)
3513 {
3514 struct mwl8k_priv *priv =
3515 container_of(work, struct mwl8k_priv, sta_notify_worker);
3516 struct ieee80211_hw *hw = priv->hw;
3517
3518 spin_lock_bh(&priv->sta_notify_list_lock);
3519 while (!list_empty(&priv->sta_notify_list)) {
3520 struct mwl8k_sta_notify_item *s;
3521
3522 s = list_entry(priv->sta_notify_list.next,
3523 struct mwl8k_sta_notify_item, list);
3524 list_del(&s->list);
3525
3526 spin_unlock_bh(&priv->sta_notify_list_lock);
3527
3528 mwl8k_do_sta_notify(hw, s);
3529 kfree(s);
3530
3531 spin_lock_bh(&priv->sta_notify_list_lock);
3532 }
3533 spin_unlock_bh(&priv->sta_notify_list_lock);
3534 }
3535
3536 static void
3537 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3538 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3539 {
3540 struct mwl8k_priv *priv = hw->priv;
3541 struct mwl8k_sta_notify_item *s;
3542
3543 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3544 return;
3545
3546 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3547 if (s != NULL) {
3548 s->vif = vif;
3549 s->cmd = cmd;
3550 s->sta = *sta;
3551
3552 spin_lock(&priv->sta_notify_list_lock);
3553 list_add_tail(&s->list, &priv->sta_notify_list);
3554 spin_unlock(&priv->sta_notify_list_lock);
3555
3556 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3557 }
3558 }
3559
3560 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3561 const struct ieee80211_tx_queue_params *params)
3562 {
3563 struct mwl8k_priv *priv = hw->priv;
3564 int rc;
3565
3566 rc = mwl8k_fw_lock(hw);
3567 if (!rc) {
3568 if (!priv->wmm_enabled)
3569 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3570
3571 if (!rc)
3572 rc = mwl8k_cmd_set_edca_params(hw, queue,
3573 params->cw_min,
3574 params->cw_max,
3575 params->aifs,
3576 params->txop);
3577
3578 mwl8k_fw_unlock(hw);
3579 }
3580
3581 return rc;
3582 }
3583
3584 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3585 struct ieee80211_tx_queue_stats *stats)
3586 {
3587 struct mwl8k_priv *priv = hw->priv;
3588 struct mwl8k_tx_queue *txq;
3589 int index;
3590
3591 spin_lock_bh(&priv->tx_lock);
3592 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3593 txq = priv->txq + index;
3594 memcpy(&stats[index], &txq->stats,
3595 sizeof(struct ieee80211_tx_queue_stats));
3596 }
3597 spin_unlock_bh(&priv->tx_lock);
3598
3599 return 0;
3600 }
3601
3602 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3603 struct ieee80211_low_level_stats *stats)
3604 {
3605 return mwl8k_cmd_get_stat(hw, stats);
3606 }
3607
3608 static int
3609 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3610 enum ieee80211_ampdu_mlme_action action,
3611 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3612 {
3613 switch (action) {
3614 case IEEE80211_AMPDU_RX_START:
3615 case IEEE80211_AMPDU_RX_STOP:
3616 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3617 return -ENOTSUPP;
3618 return 0;
3619 default:
3620 return -ENOTSUPP;
3621 }
3622 }
3623
3624 static const struct ieee80211_ops mwl8k_ops = {
3625 .tx = mwl8k_tx,
3626 .start = mwl8k_start,
3627 .stop = mwl8k_stop,
3628 .add_interface = mwl8k_add_interface,
3629 .remove_interface = mwl8k_remove_interface,
3630 .config = mwl8k_config,
3631 .bss_info_changed = mwl8k_bss_info_changed,
3632 .prepare_multicast = mwl8k_prepare_multicast,
3633 .configure_filter = mwl8k_configure_filter,
3634 .set_rts_threshold = mwl8k_set_rts_threshold,
3635 .sta_notify = mwl8k_sta_notify,
3636 .conf_tx = mwl8k_conf_tx,
3637 .get_tx_stats = mwl8k_get_tx_stats,
3638 .get_stats = mwl8k_get_stats,
3639 .ampdu_action = mwl8k_ampdu_action,
3640 };
3641
3642 static void mwl8k_tx_reclaim_handler(unsigned long data)
3643 {
3644 int i;
3645 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3646 struct mwl8k_priv *priv = hw->priv;
3647
3648 spin_lock_bh(&priv->tx_lock);
3649 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3650 mwl8k_txq_reclaim(hw, i, 0);
3651
3652 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3653 complete(priv->tx_wait);
3654 priv->tx_wait = NULL;
3655 }
3656 spin_unlock_bh(&priv->tx_lock);
3657 }
3658
3659 static void mwl8k_finalize_join_worker(struct work_struct *work)
3660 {
3661 struct mwl8k_priv *priv =
3662 container_of(work, struct mwl8k_priv, finalize_join_worker);
3663 struct sk_buff *skb = priv->beacon_skb;
3664
3665 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3666 priv->vif->bss_conf.dtim_period);
3667 dev_kfree_skb(skb);
3668
3669 priv->beacon_skb = NULL;
3670 }
3671
3672 enum {
3673 MWL8363 = 0,
3674 MWL8687,
3675 MWL8366,
3676 };
3677
3678 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3679 [MWL8363] = {
3680 .part_name = "88w8363",
3681 .helper_image = "mwl8k/helper_8363.fw",
3682 .fw_image = "mwl8k/fmimage_8363.fw",
3683 },
3684 [MWL8687] = {
3685 .part_name = "88w8687",
3686 .helper_image = "mwl8k/helper_8687.fw",
3687 .fw_image = "mwl8k/fmimage_8687.fw",
3688 },
3689 [MWL8366] = {
3690 .part_name = "88w8366",
3691 .helper_image = "mwl8k/helper_8366.fw",
3692 .fw_image = "mwl8k/fmimage_8366.fw",
3693 .ap_rxd_ops = &rxd_8366_ap_ops,
3694 },
3695 };
3696
3697 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3698 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3699 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3700 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3701 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3702 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3703 { },
3704 };
3705 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3706
3707 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3708 const struct pci_device_id *id)
3709 {
3710 static int printed_version = 0;
3711 struct ieee80211_hw *hw;
3712 struct mwl8k_priv *priv;
3713 int rc;
3714 int i;
3715
3716 if (!printed_version) {
3717 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3718 printed_version = 1;
3719 }
3720
3721
3722 rc = pci_enable_device(pdev);
3723 if (rc) {
3724 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3725 MWL8K_NAME);
3726 return rc;
3727 }
3728
3729 rc = pci_request_regions(pdev, MWL8K_NAME);
3730 if (rc) {
3731 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3732 MWL8K_NAME);
3733 goto err_disable_device;
3734 }
3735
3736 pci_set_master(pdev);
3737
3738
3739 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3740 if (hw == NULL) {
3741 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3742 rc = -ENOMEM;
3743 goto err_free_reg;
3744 }
3745
3746 SET_IEEE80211_DEV(hw, &pdev->dev);
3747 pci_set_drvdata(pdev, hw);
3748
3749 priv = hw->priv;
3750 priv->hw = hw;
3751 priv->pdev = pdev;
3752 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3753
3754
3755 priv->sram = pci_iomap(pdev, 0, 0x10000);
3756 if (priv->sram == NULL) {
3757 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3758 wiphy_name(hw->wiphy));
3759 goto err_iounmap;
3760 }
3761
3762 /*
3763 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3764 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3765 */
3766 priv->regs = pci_iomap(pdev, 1, 0x10000);
3767 if (priv->regs == NULL) {
3768 priv->regs = pci_iomap(pdev, 2, 0x10000);
3769 if (priv->regs == NULL) {
3770 printk(KERN_ERR "%s: Cannot map device registers\n",
3771 wiphy_name(hw->wiphy));
3772 goto err_iounmap;
3773 }
3774 }
3775
3776
3777 /* Reset firmware and hardware */
3778 mwl8k_hw_reset(priv);
3779
3780 /* Ask userland hotplug daemon for the device firmware */
3781 rc = mwl8k_request_firmware(priv);
3782 if (rc) {
3783 printk(KERN_ERR "%s: Firmware files not found\n",
3784 wiphy_name(hw->wiphy));
3785 goto err_stop_firmware;
3786 }
3787
3788 /* Load firmware into hardware */
3789 rc = mwl8k_load_firmware(hw);
3790 if (rc) {
3791 printk(KERN_ERR "%s: Cannot start firmware\n",
3792 wiphy_name(hw->wiphy));
3793 goto err_stop_firmware;
3794 }
3795
3796 /* Reclaim memory once firmware is successfully loaded */
3797 mwl8k_release_firmware(priv);
3798
3799
3800 if (priv->ap_fw) {
3801 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3802 if (priv->rxd_ops == NULL) {
3803 printk(KERN_ERR "%s: Driver does not have AP "
3804 "firmware image support for this hardware\n",
3805 wiphy_name(hw->wiphy));
3806 goto err_stop_firmware;
3807 }
3808 } else {
3809 priv->rxd_ops = &rxd_sta_ops;
3810 }
3811
3812 priv->sniffer_enabled = false;
3813 priv->wmm_enabled = false;
3814 priv->pending_tx_pkts = 0;
3815
3816
3817 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3818 priv->band.band = IEEE80211_BAND_2GHZ;
3819 priv->band.channels = priv->channels;
3820 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3821 priv->band.bitrates = priv->rates;
3822 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3823 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3824
3825 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3826 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3827
3828 /*
3829 * Extra headroom is the size of the required DMA header
3830 * minus the size of the smallest 802.11 frame (CTS frame).
3831 */
3832 hw->extra_tx_headroom =
3833 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3834
3835 hw->channel_change_time = 10;
3836
3837 hw->queues = MWL8K_TX_QUEUES;
3838
3839 /* Set rssi and noise values to dBm */
3840 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3841 hw->vif_data_size = sizeof(struct mwl8k_vif);
3842 hw->sta_data_size = sizeof(struct mwl8k_sta);
3843 priv->vif = NULL;
3844
3845 /* Set default radio state and preamble */
3846 priv->radio_on = 0;
3847 priv->radio_short_preamble = 0;
3848
3849 /* Station database handling */
3850 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3851 spin_lock_init(&priv->sta_notify_list_lock);
3852 INIT_LIST_HEAD(&priv->sta_notify_list);
3853
3854 /* Finalize join worker */
3855 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3856
3857 /* TX reclaim tasklet */
3858 tasklet_init(&priv->tx_reclaim_task,
3859 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3860 tasklet_disable(&priv->tx_reclaim_task);
3861
3862 /* Power management cookie */
3863 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3864 if (priv->cookie == NULL)
3865 goto err_stop_firmware;
3866
3867 rc = mwl8k_rxq_init(hw, 0);
3868 if (rc)
3869 goto err_free_cookie;
3870 rxq_refill(hw, 0, INT_MAX);
3871
3872 mutex_init(&priv->fw_mutex);
3873 priv->fw_mutex_owner = NULL;
3874 priv->fw_mutex_depth = 0;
3875 priv->hostcmd_wait = NULL;
3876
3877 spin_lock_init(&priv->tx_lock);
3878
3879 priv->tx_wait = NULL;
3880
3881 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3882 rc = mwl8k_txq_init(hw, i);
3883 if (rc)
3884 goto err_free_queues;
3885 }
3886
3887 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3888 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3889 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3890 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3891
3892 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3893 IRQF_SHARED, MWL8K_NAME, hw);
3894 if (rc) {
3895 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3896 wiphy_name(hw->wiphy));
3897 goto err_free_queues;
3898 }
3899
3900 /*
3901 * Temporarily enable interrupts. Initial firmware host
3902 * commands use interrupts and avoid polling. Disable
3903 * interrupts when done.
3904 */
3905 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3906
3907 /* Get config data, mac addrs etc */
3908 if (priv->ap_fw) {
3909 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3910 if (!rc)
3911 rc = mwl8k_cmd_set_hw_spec(hw);
3912
3913 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
3914 } else {
3915 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3916
3917 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3918 }
3919 if (rc) {
3920 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3921 wiphy_name(hw->wiphy));
3922 goto err_free_irq;
3923 }
3924
3925 /* Turn radio off */
3926 rc = mwl8k_cmd_radio_disable(hw);
3927 if (rc) {
3928 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3929 goto err_free_irq;
3930 }
3931
3932 /* Clear MAC address */
3933 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3934 if (rc) {
3935 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3936 wiphy_name(hw->wiphy));
3937 goto err_free_irq;
3938 }
3939
3940 /* Disable interrupts */
3941 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3942 free_irq(priv->pdev->irq, hw);
3943
3944 rc = ieee80211_register_hw(hw);
3945 if (rc) {
3946 printk(KERN_ERR "%s: Cannot register device\n",
3947 wiphy_name(hw->wiphy));
3948 goto err_free_queues;
3949 }
3950
3951 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3952 wiphy_name(hw->wiphy), priv->device_info->part_name,
3953 priv->hw_rev, hw->wiphy->perm_addr,
3954 priv->ap_fw ? "AP" : "STA",
3955 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3956 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3957
3958 return 0;
3959
3960 err_free_irq:
3961 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3962 free_irq(priv->pdev->irq, hw);
3963
3964 err_free_queues:
3965 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3966 mwl8k_txq_deinit(hw, i);
3967 mwl8k_rxq_deinit(hw, 0);
3968
3969 err_free_cookie:
3970 if (priv->cookie != NULL)
3971 pci_free_consistent(priv->pdev, 4,
3972 priv->cookie, priv->cookie_dma);
3973
3974 err_stop_firmware:
3975 mwl8k_hw_reset(priv);
3976 mwl8k_release_firmware(priv);
3977
3978 err_iounmap:
3979 if (priv->regs != NULL)
3980 pci_iounmap(pdev, priv->regs);
3981
3982 if (priv->sram != NULL)
3983 pci_iounmap(pdev, priv->sram);
3984
3985 pci_set_drvdata(pdev, NULL);
3986 ieee80211_free_hw(hw);
3987
3988 err_free_reg:
3989 pci_release_regions(pdev);
3990
3991 err_disable_device:
3992 pci_disable_device(pdev);
3993
3994 return rc;
3995 }
3996
3997 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3998 {
3999 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4000 }
4001
4002 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4003 {
4004 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4005 struct mwl8k_priv *priv;
4006 int i;
4007
4008 if (hw == NULL)
4009 return;
4010 priv = hw->priv;
4011
4012 ieee80211_stop_queues(hw);
4013
4014 ieee80211_unregister_hw(hw);
4015
4016 /* Remove tx reclaim tasklet */
4017 tasklet_kill(&priv->tx_reclaim_task);
4018
4019 /* Stop hardware */
4020 mwl8k_hw_reset(priv);
4021
4022 /* Return all skbs to mac80211 */
4023 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4024 mwl8k_txq_reclaim(hw, i, 1);
4025
4026 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4027 mwl8k_txq_deinit(hw, i);
4028
4029 mwl8k_rxq_deinit(hw, 0);
4030
4031 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4032
4033 pci_iounmap(pdev, priv->regs);
4034 pci_iounmap(pdev, priv->sram);
4035 pci_set_drvdata(pdev, NULL);
4036 ieee80211_free_hw(hw);
4037 pci_release_regions(pdev);
4038 pci_disable_device(pdev);
4039 }
4040
4041 static struct pci_driver mwl8k_driver = {
4042 .name = MWL8K_NAME,
4043 .id_table = mwl8k_pci_id_table,
4044 .probe = mwl8k_probe,
4045 .remove = __devexit_p(mwl8k_remove),
4046 .shutdown = __devexit_p(mwl8k_shutdown),
4047 };
4048
4049 static int __init mwl8k_init(void)
4050 {
4051 return pci_register_driver(&mwl8k_driver);
4052 }
4053
4054 static void __exit mwl8k_exit(void)
4055 {
4056 pci_unregister_driver(&mwl8k_driver);
4057 }
4058
4059 module_init(mwl8k_init);
4060 module_exit(mwl8k_exit);
4061
4062 MODULE_DESCRIPTION(MWL8K_DESC);
4063 MODULE_VERSION(MWL8K_VERSION);
4064 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4065 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree