2 * linux/arch/arm/mach-realview/core.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sysdev.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
34 #include <asm/clkdev.h>
35 #include <asm/system.h>
36 #include <mach/hardware.h>
39 #include <asm/mach-types.h>
40 #include <asm/hardware/arm_timer.h>
41 #include <asm/hardware/icst.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/flash.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
48 #include <asm/hardware/gic.h>
50 #include <mach/clkdev.h>
51 #include <mach/platform.h>
52 #include <mach/irqs.h>
53 #include <plat/timer-sp.h>
57 /* used by entry-macro.S and platsmp.c */
58 void __iomem
*gic_cpu_base_addr
;
60 #ifdef CONFIG_ZONE_DMA
62 * Adjust the zones if there are restrictions for DMA access.
64 void __init
realview_adjust_zones(unsigned long *size
, unsigned long *hole
)
66 unsigned long dma_size
= SZ_256M
>> PAGE_SHIFT
;
68 if (!machine_is_realview_pbx() || size
[0] <= dma_size
)
71 size
[ZONE_NORMAL
] = size
[0] - dma_size
;
72 size
[ZONE_DMA
] = dma_size
;
73 hole
[ZONE_NORMAL
] = hole
[0];
79 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
81 static int realview_flash_init(void)
85 val
= __raw_readl(REALVIEW_FLASHCTRL
);
86 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
87 __raw_writel(val
, REALVIEW_FLASHCTRL
);
92 static void realview_flash_exit(void)
96 val
= __raw_readl(REALVIEW_FLASHCTRL
);
97 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
98 __raw_writel(val
, REALVIEW_FLASHCTRL
);
101 static void realview_flash_set_vpp(int on
)
105 val
= __raw_readl(REALVIEW_FLASHCTRL
);
107 val
|= REALVIEW_FLASHPROG_FLVPPEN
;
109 val
&= ~REALVIEW_FLASHPROG_FLVPPEN
;
110 __raw_writel(val
, REALVIEW_FLASHCTRL
);
113 static struct flash_platform_data realview_flash_data
= {
114 .map_name
= "cfi_probe",
116 .init
= realview_flash_init
,
117 .exit
= realview_flash_exit
,
118 .set_vpp
= realview_flash_set_vpp
,
121 struct platform_device realview_flash_device
= {
125 .platform_data
= &realview_flash_data
,
129 int realview_flash_register(struct resource
*res
, u32 num
)
131 realview_flash_device
.resource
= res
;
132 realview_flash_device
.num_resources
= num
;
133 return platform_device_register(&realview_flash_device
);
136 static struct smsc911x_platform_config smsc911x_config
= {
137 .flags
= SMSC911X_USE_32BIT
,
138 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
,
139 .irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
,
140 .phy_interface
= PHY_INTERFACE_MODE_MII
,
143 static struct platform_device realview_eth_device
= {
149 int realview_eth_register(const char *name
, struct resource
*res
)
152 realview_eth_device
.name
= name
;
153 realview_eth_device
.resource
= res
;
154 if (strcmp(realview_eth_device
.name
, "smsc911x") == 0)
155 realview_eth_device
.dev
.platform_data
= &smsc911x_config
;
157 return platform_device_register(&realview_eth_device
);
160 struct platform_device realview_usb_device
= {
165 int realview_usb_register(struct resource
*res
)
167 realview_usb_device
.resource
= res
;
168 return platform_device_register(&realview_usb_device
);
171 static struct pata_platform_info pata_platform_data
= {
175 static struct resource pata_resources
[] = {
177 .start
= REALVIEW_CF_BASE
,
178 .end
= REALVIEW_CF_BASE
+ 0xff,
179 .flags
= IORESOURCE_MEM
,
182 .start
= REALVIEW_CF_BASE
+ 0x100,
183 .end
= REALVIEW_CF_BASE
+ SZ_4K
- 1,
184 .flags
= IORESOURCE_MEM
,
188 struct platform_device realview_cf_device
= {
189 .name
= "pata_platform",
191 .num_resources
= ARRAY_SIZE(pata_resources
),
192 .resource
= pata_resources
,
194 .platform_data
= &pata_platform_data
,
198 static struct resource realview_i2c_resource
= {
199 .start
= REALVIEW_I2C_BASE
,
200 .end
= REALVIEW_I2C_BASE
+ SZ_4K
- 1,
201 .flags
= IORESOURCE_MEM
,
204 struct platform_device realview_i2c_device
= {
205 .name
= "versatile-i2c",
208 .resource
= &realview_i2c_resource
,
211 static struct i2c_board_info realview_i2c_board_info
[] = {
213 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
217 static int __init
realview_i2c_init(void)
219 return i2c_register_board_info(0, realview_i2c_board_info
,
220 ARRAY_SIZE(realview_i2c_board_info
));
222 arch_initcall(realview_i2c_init
);
224 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
227 * This is only used if GPIOLIB support is disabled
229 static unsigned int realview_mmc_status(struct device
*dev
)
231 struct amba_device
*adev
= container_of(dev
, struct amba_device
, dev
);
234 if (machine_is_realview_pb1176()) {
235 static bool inserted
= false;
238 * The PB1176 does not have the status register,
239 * assume it is inserted at startup, then invert
240 * for each call so card insertion/removal will
241 * be detected anyway. This will not be called if
242 * GPIO on PL061 is active, which is the proper
243 * way to do this on the PB1176.
245 inserted
= !inserted
;
246 return inserted
? 0 : 1;
249 if (adev
->res
.start
== REALVIEW_MMCI0_BASE
)
254 return readl(REALVIEW_SYSMCI
) & mask
;
257 struct mmci_platform_data realview_mmc0_plat_data
= {
258 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
259 .status
= realview_mmc_status
,
265 struct mmci_platform_data realview_mmc1_plat_data
= {
266 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
267 .status
= realview_mmc_status
,
276 static const struct icst_params realview_oscvco_params
= {
278 .vco_max
= ICST307_VCO_MAX
,
279 .vco_min
= ICST307_VCO_MIN
,
284 .s2div
= icst307_s2div
,
285 .idx2s
= icst307_idx2s
,
288 static void realview_oscvco_set(struct clk
*clk
, struct icst_vco vco
)
290 void __iomem
*sys_lock
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_LOCK_OFFSET
;
293 val
= readl(clk
->vcoreg
) & ~0x7ffff;
294 val
|= vco
.v
| (vco
.r
<< 9) | (vco
.s
<< 16);
296 writel(0xa05f, sys_lock
);
297 writel(val
, clk
->vcoreg
);
301 static const struct clk_ops oscvco_clk_ops
= {
302 .round
= icst_clk_round
,
304 .setvco
= realview_oscvco_set
,
307 static struct clk oscvco_clk
= {
308 .ops
= &oscvco_clk_ops
,
309 .params
= &realview_oscvco_params
,
313 * These are fixed clocks.
315 static struct clk ref24_clk
= {
319 static struct clk dummy_apb_pclk
;
321 static struct clk_lookup lookups
[] = {
323 .con_id
= "apb_pclk",
324 .clk
= &dummy_apb_pclk
,
326 .dev_id
= "dev:uart0",
329 .dev_id
= "dev:uart1",
332 .dev_id
= "dev:uart2",
335 .dev_id
= "fpga:uart3",
337 }, { /* UART3 is on the dev chip in PB1176 */
338 .dev_id
= "dev:uart3",
340 }, { /* UART4 only exists in PB1176 */
341 .dev_id
= "fpga:uart4",
344 .dev_id
= "fpga:kmi0",
347 .dev_id
= "fpga:kmi1",
350 .dev_id
= "fpga:mmc0",
352 }, { /* CLCD is in the PB1176 and EB DevChip */
353 .dev_id
= "dev:clcd",
356 .dev_id
= "issp:clcd",
359 .dev_id
= "dev:ssp0",
364 static int __init
clk_init(void)
366 if (machine_is_realview_pb1176())
367 oscvco_clk
.vcoreg
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_OSC0_OFFSET
;
369 oscvco_clk
.vcoreg
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_OSC4_OFFSET
;
371 clkdev_add_table(lookups
, ARRAY_SIZE(lookups
));
375 core_initcall(clk_init
);
380 #define SYS_CLCD_NLCDIOON (1 << 2)
381 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
382 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
383 #define SYS_CLCD_ID_MASK (0x1f << 8)
384 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
385 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
386 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
387 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
388 #define SYS_CLCD_ID_VGA (0x1f << 8)
390 static struct clcd_panel vga
= {
404 .vmode
= FB_VMODE_NONINTERLACED
,
408 .tim2
= TIM2_BCD
| TIM2_IPC
,
409 .cntl
= CNTL_LCDTFT
| CNTL_BGR
| CNTL_LCDVCOMP(1),
413 static struct clcd_panel xvga
= {
427 .vmode
= FB_VMODE_NONINTERLACED
,
431 .tim2
= TIM2_BCD
| TIM2_IPC
,
432 .cntl
= CNTL_LCDTFT
| CNTL_BGR
| CNTL_LCDVCOMP(1),
436 static struct clcd_panel sanyo_3_8_in
= {
438 .name
= "Sanyo QVGA",
450 .vmode
= FB_VMODE_NONINTERLACED
,
455 .cntl
= CNTL_LCDTFT
| CNTL_BGR
| CNTL_LCDVCOMP(1),
459 static struct clcd_panel sanyo_2_5_in
= {
461 .name
= "Sanyo QVGA Portrait",
472 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
473 .vmode
= FB_VMODE_NONINTERLACED
,
477 .tim2
= TIM2_IVS
| TIM2_IHS
| TIM2_IPC
,
478 .cntl
= CNTL_LCDTFT
| CNTL_BGR
| CNTL_LCDVCOMP(1),
482 static struct clcd_panel epson_2_2_in
= {
484 .name
= "Epson QCIF",
496 .vmode
= FB_VMODE_NONINTERLACED
,
500 .tim2
= TIM2_BCD
| TIM2_IPC
,
501 .cntl
= CNTL_LCDTFT
| CNTL_BGR
| CNTL_LCDVCOMP(1),
506 * Detect which LCD panel is connected, and return the appropriate
507 * clcd_panel structure. Note: we do not have any information on
508 * the required timings for the 8.4in panel, so we presently assume
511 static struct clcd_panel
*realview_clcd_panel(void)
513 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
514 struct clcd_panel
*vga_panel
;
515 struct clcd_panel
*panel
;
518 if (machine_is_realview_eb())
523 val
= readl(sys_clcd
) & SYS_CLCD_ID_MASK
;
524 if (val
== SYS_CLCD_ID_SANYO_3_8
)
525 panel
= &sanyo_3_8_in
;
526 else if (val
== SYS_CLCD_ID_SANYO_2_5
)
527 panel
= &sanyo_2_5_in
;
528 else if (val
== SYS_CLCD_ID_EPSON_2_2
)
529 panel
= &epson_2_2_in
;
530 else if (val
== SYS_CLCD_ID_VGA
)
533 printk(KERN_ERR
"CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
542 * Disable all display connectors on the interface module.
544 static void realview_clcd_disable(struct clcd_fb
*fb
)
546 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
549 val
= readl(sys_clcd
);
550 val
&= ~SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
551 writel(val
, sys_clcd
);
555 * Enable the relevant connector on the interface module.
557 static void realview_clcd_enable(struct clcd_fb
*fb
)
559 void __iomem
*sys_clcd
= __io_address(REALVIEW_SYS_BASE
) + REALVIEW_SYS_CLCD_OFFSET
;
565 val
= readl(sys_clcd
);
566 val
|= SYS_CLCD_NLCDIOON
| SYS_CLCD_PWR3V5SWITCH
;
567 writel(val
, sys_clcd
);
570 static int realview_clcd_setup(struct clcd_fb
*fb
)
572 unsigned long framesize
;
575 if (machine_is_realview_eb())
577 framesize
= 640 * 480 * 2;
580 framesize
= 1024 * 768 * 2;
582 fb
->panel
= realview_clcd_panel();
584 fb
->fb
.screen_base
= dma_alloc_writecombine(&fb
->dev
->dev
, framesize
,
585 &dma
, GFP_KERNEL
| GFP_DMA
);
586 if (!fb
->fb
.screen_base
) {
587 printk(KERN_ERR
"CLCD: unable to map framebuffer\n");
591 fb
->fb
.fix
.smem_start
= dma
;
592 fb
->fb
.fix
.smem_len
= framesize
;
597 static int realview_clcd_mmap(struct clcd_fb
*fb
, struct vm_area_struct
*vma
)
599 return dma_mmap_writecombine(&fb
->dev
->dev
, vma
,
601 fb
->fb
.fix
.smem_start
,
602 fb
->fb
.fix
.smem_len
);
605 static void realview_clcd_remove(struct clcd_fb
*fb
)
607 dma_free_writecombine(&fb
->dev
->dev
, fb
->fb
.fix
.smem_len
,
608 fb
->fb
.screen_base
, fb
->fb
.fix
.smem_start
);
611 struct clcd_board clcd_plat_data
= {
613 .check
= clcdfb_check
,
614 .decode
= clcdfb_decode
,
615 .disable
= realview_clcd_disable
,
616 .enable
= realview_clcd_enable
,
617 .setup
= realview_clcd_setup
,
618 .mmap
= realview_clcd_mmap
,
619 .remove
= realview_clcd_remove
,
623 #define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
625 void realview_leds_event(led_event_t ledevt
)
629 u32 led
= 1 << smp_processor_id();
631 local_irq_save(flags
);
632 val
= readl(VA_LEDS_BASE
);
644 val
= val
^ REALVIEW_SYS_LED7
;
655 writel(val
, VA_LEDS_BASE
);
656 local_irq_restore(flags
);
658 #endif /* CONFIG_LEDS */
661 * Where is the timer (VA)?
663 void __iomem
*timer0_va_base
;
664 void __iomem
*timer1_va_base
;
665 void __iomem
*timer2_va_base
;
666 void __iomem
*timer3_va_base
;
669 * Set up the clock source and clock events devices
671 void __init
realview_timer_init(unsigned int timer_irq
)
676 * set clock frequency:
677 * REALVIEW_REFCLK is 32KHz
678 * REALVIEW_TIMCLK is 1MHz
680 val
= readl(__io_address(REALVIEW_SCTL_BASE
));
681 writel((REALVIEW_TIMCLK
<< REALVIEW_TIMER1_EnSel
) |
682 (REALVIEW_TIMCLK
<< REALVIEW_TIMER2_EnSel
) |
683 (REALVIEW_TIMCLK
<< REALVIEW_TIMER3_EnSel
) |
684 (REALVIEW_TIMCLK
<< REALVIEW_TIMER4_EnSel
) | val
,
685 __io_address(REALVIEW_SCTL_BASE
));
688 * Initialise to a known state (all timers off)
690 writel(0, timer0_va_base
+ TIMER_CTRL
);
691 writel(0, timer1_va_base
+ TIMER_CTRL
);
692 writel(0, timer2_va_base
+ TIMER_CTRL
);
693 writel(0, timer3_va_base
+ TIMER_CTRL
);
695 sp804_clocksource_init(timer3_va_base
);
696 sp804_clockevents_init(timer0_va_base
, timer_irq
);
700 * Setup the memory banks.
702 void realview_fixup(struct machine_desc
*mdesc
, struct tag
*tags
, char **from
,
703 struct meminfo
*meminfo
)
706 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
707 * Half of this is mirrored at 0.
709 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
710 meminfo
->bank
[0].start
= 0x70000000;
711 meminfo
->bank
[0].size
= SZ_512M
;
712 meminfo
->nr_banks
= 1;
714 meminfo
->bank
[0].start
= 0;
715 meminfo
->bank
[0].size
= SZ_256M
;
716 meminfo
->nr_banks
= 1;