x86: support gbpages in pagetable dump
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / mm / fault.c
blobad8b9733d6b3fee4d2f90e2981e54dc2b71299e4
1 /*
2 * Copyright (C) 1995 Linus Torvalds
3 * Copyright (C) 2001,2002 Andi Kleen, SuSE Labs.
4 */
6 #include <linux/signal.h>
7 #include <linux/sched.h>
8 #include <linux/kernel.h>
9 #include <linux/errno.h>
10 #include <linux/string.h>
11 #include <linux/types.h>
12 #include <linux/ptrace.h>
13 #include <linux/mman.h>
14 #include <linux/mm.h>
15 #include <linux/smp.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/tty.h>
19 #include <linux/vt_kern.h> /* For unblank_screen() */
20 #include <linux/compiler.h>
21 #include <linux/highmem.h>
22 #include <linux/bootmem.h> /* for max_low_pfn */
23 #include <linux/vmalloc.h>
24 #include <linux/module.h>
25 #include <linux/kprobes.h>
26 #include <linux/uaccess.h>
27 #include <linux/kdebug.h>
29 #include <asm/system.h>
30 #include <asm/desc.h>
31 #include <asm/segment.h>
32 #include <asm/pgalloc.h>
33 #include <asm/smp.h>
34 #include <asm/tlbflush.h>
35 #include <asm/proto.h>
36 #include <asm-generic/sections.h>
39 * Page fault error code bits
40 * bit 0 == 0 means no page found, 1 means protection fault
41 * bit 1 == 0 means read, 1 means write
42 * bit 2 == 0 means kernel, 1 means user-mode
43 * bit 3 == 1 means use of reserved bit detected
44 * bit 4 == 1 means fault was an instruction fetch
46 #define PF_PROT (1<<0)
47 #define PF_WRITE (1<<1)
48 #define PF_USER (1<<2)
49 #define PF_RSVD (1<<3)
50 #define PF_INSTR (1<<4)
52 static inline int notify_page_fault(struct pt_regs *regs)
54 #ifdef CONFIG_KPROBES
55 int ret = 0;
57 /* kprobe_running() needs smp_processor_id() */
58 #ifdef CONFIG_X86_32
59 if (!user_mode_vm(regs)) {
60 #else
61 if (!user_mode(regs)) {
62 #endif
63 preempt_disable();
64 if (kprobe_running() && kprobe_fault_handler(regs, 14))
65 ret = 1;
66 preempt_enable();
69 return ret;
70 #else
71 return 0;
72 #endif
76 * X86_32
77 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
78 * Check that here and ignore it.
80 * X86_64
81 * Sometimes the CPU reports invalid exceptions on prefetch.
82 * Check that here and ignore it.
84 * Opcode checker based on code by Richard Brunner
86 static int is_prefetch(struct pt_regs *regs, unsigned long addr,
87 unsigned long error_code)
89 unsigned char *instr;
90 int scan_more = 1;
91 int prefetch = 0;
92 unsigned char *max_instr;
94 #ifdef CONFIG_X86_32
95 if (!(__supported_pte_mask & _PAGE_NX))
96 return 0;
97 #endif
99 /* If it was a exec fault on NX page, ignore */
100 if (error_code & PF_INSTR)
101 return 0;
103 instr = (unsigned char *)convert_ip_to_linear(current, regs);
104 max_instr = instr + 15;
106 if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
107 return 0;
109 while (scan_more && instr < max_instr) {
110 unsigned char opcode;
111 unsigned char instr_hi;
112 unsigned char instr_lo;
114 if (probe_kernel_address(instr, opcode))
115 break;
117 instr_hi = opcode & 0xf0;
118 instr_lo = opcode & 0x0f;
119 instr++;
121 switch (instr_hi) {
122 case 0x20:
123 case 0x30:
125 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
126 * In X86_64 long mode, the CPU will signal invalid
127 * opcode if some of these prefixes are present so
128 * X86_64 will never get here anyway
130 scan_more = ((instr_lo & 7) == 0x6);
131 break;
132 #ifdef CONFIG_X86_64
133 case 0x40:
135 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
136 * Need to figure out under what instruction mode the
137 * instruction was issued. Could check the LDT for lm,
138 * but for now it's good enough to assume that long
139 * mode only uses well known segments or kernel.
141 scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS);
142 break;
143 #endif
144 case 0x60:
145 /* 0x64 thru 0x67 are valid prefixes in all modes. */
146 scan_more = (instr_lo & 0xC) == 0x4;
147 break;
148 case 0xF0:
149 /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
150 scan_more = !instr_lo || (instr_lo>>1) == 1;
151 break;
152 case 0x00:
153 /* Prefetch instruction is 0x0F0D or 0x0F18 */
154 scan_more = 0;
156 if (probe_kernel_address(instr, opcode))
157 break;
158 prefetch = (instr_lo == 0xF) &&
159 (opcode == 0x0D || opcode == 0x18);
160 break;
161 default:
162 scan_more = 0;
163 break;
166 return prefetch;
169 static void force_sig_info_fault(int si_signo, int si_code,
170 unsigned long address, struct task_struct *tsk)
172 siginfo_t info;
174 info.si_signo = si_signo;
175 info.si_errno = 0;
176 info.si_code = si_code;
177 info.si_addr = (void __user *)address;
178 force_sig_info(si_signo, &info, tsk);
181 #ifdef CONFIG_X86_64
182 static int bad_address(void *p)
184 unsigned long dummy;
185 return probe_kernel_address((unsigned long *)p, dummy);
187 #endif
189 void dump_pagetable(unsigned long address)
191 #ifdef CONFIG_X86_32
192 __typeof__(pte_val(__pte(0))) page;
194 page = read_cr3();
195 page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT];
196 #ifdef CONFIG_X86_PAE
197 printk("*pdpt = %016Lx ", page);
198 if ((page >> PAGE_SHIFT) < max_low_pfn
199 && page & _PAGE_PRESENT) {
200 page &= PAGE_MASK;
201 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT)
202 & (PTRS_PER_PMD - 1)];
203 printk(KERN_CONT "*pde = %016Lx ", page);
204 page &= ~_PAGE_NX;
206 #else
207 printk("*pde = %08lx ", page);
208 #endif
211 * We must not directly access the pte in the highpte
212 * case if the page table is located in highmem.
213 * And let's rather not kmap-atomic the pte, just in case
214 * it's allocated already.
216 if ((page >> PAGE_SHIFT) < max_low_pfn
217 && (page & _PAGE_PRESENT)
218 && !(page & _PAGE_PSE)) {
219 page &= PAGE_MASK;
220 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)
221 & (PTRS_PER_PTE - 1)];
222 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page);
225 printk("\n");
226 #else /* CONFIG_X86_64 */
227 pgd_t *pgd;
228 pud_t *pud;
229 pmd_t *pmd;
230 pte_t *pte;
232 pgd = (pgd_t *)read_cr3();
234 pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
235 pgd += pgd_index(address);
236 if (bad_address(pgd)) goto bad;
237 printk("PGD %lx ", pgd_val(*pgd));
238 if (!pgd_present(*pgd)) goto ret;
240 pud = pud_offset(pgd, address);
241 if (bad_address(pud)) goto bad;
242 printk("PUD %lx ", pud_val(*pud));
243 if (!pud_present(*pud) || pud_large(*pud))
244 goto ret;
246 pmd = pmd_offset(pud, address);
247 if (bad_address(pmd)) goto bad;
248 printk("PMD %lx ", pmd_val(*pmd));
249 if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
251 pte = pte_offset_kernel(pmd, address);
252 if (bad_address(pte)) goto bad;
253 printk("PTE %lx", pte_val(*pte));
254 ret:
255 printk("\n");
256 return;
257 bad:
258 printk("BAD\n");
259 #endif
262 #ifdef CONFIG_X86_32
263 static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
265 unsigned index = pgd_index(address);
266 pgd_t *pgd_k;
267 pud_t *pud, *pud_k;
268 pmd_t *pmd, *pmd_k;
270 pgd += index;
271 pgd_k = init_mm.pgd + index;
273 if (!pgd_present(*pgd_k))
274 return NULL;
277 * set_pgd(pgd, *pgd_k); here would be useless on PAE
278 * and redundant with the set_pmd() on non-PAE. As would
279 * set_pud.
282 pud = pud_offset(pgd, address);
283 pud_k = pud_offset(pgd_k, address);
284 if (!pud_present(*pud_k))
285 return NULL;
287 pmd = pmd_offset(pud, address);
288 pmd_k = pmd_offset(pud_k, address);
289 if (!pmd_present(*pmd_k))
290 return NULL;
291 if (!pmd_present(*pmd)) {
292 set_pmd(pmd, *pmd_k);
293 arch_flush_lazy_mmu_mode();
294 } else
295 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
296 return pmd_k;
298 #endif
300 #ifdef CONFIG_X86_64
301 static const char errata93_warning[] =
302 KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
303 KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
304 KERN_ERR "******* Please consider a BIOS update.\n"
305 KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
306 #endif
308 /* Workaround for K8 erratum #93 & buggy BIOS.
309 BIOS SMM functions are required to use a specific workaround
310 to avoid corruption of the 64bit RIP register on C stepping K8.
311 A lot of BIOS that didn't get tested properly miss this.
312 The OS sees this as a page fault with the upper 32bits of RIP cleared.
313 Try to work around it here.
314 Note we only handle faults in kernel here.
315 Does nothing for X86_32
317 static int is_errata93(struct pt_regs *regs, unsigned long address)
319 #ifdef CONFIG_X86_64
320 static int warned;
321 if (address != regs->ip)
322 return 0;
323 if ((address >> 32) != 0)
324 return 0;
325 address |= 0xffffffffUL << 32;
326 if ((address >= (u64)_stext && address <= (u64)_etext) ||
327 (address >= MODULES_VADDR && address <= MODULES_END)) {
328 if (!warned) {
329 printk(errata93_warning);
330 warned = 1;
332 regs->ip = address;
333 return 1;
335 #endif
336 return 0;
340 * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal
341 * addresses >4GB. We catch this in the page fault handler because these
342 * addresses are not reachable. Just detect this case and return. Any code
343 * segment in LDT is compatibility mode.
345 static int is_errata100(struct pt_regs *regs, unsigned long address)
347 #ifdef CONFIG_X86_64
348 if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) &&
349 (address >> 32))
350 return 1;
351 #endif
352 return 0;
355 void do_invalid_op(struct pt_regs *, unsigned long);
357 static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
359 #ifdef CONFIG_X86_F00F_BUG
360 unsigned long nr;
362 * Pentium F0 0F C7 C8 bug workaround.
364 if (boot_cpu_data.f00f_bug) {
365 nr = (address - idt_descr.address) >> 3;
367 if (nr == 6) {
368 do_invalid_op(regs, 0);
369 return 1;
372 #endif
373 return 0;
376 static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
377 unsigned long address)
379 #ifdef CONFIG_X86_32
380 if (!oops_may_print())
381 return;
382 #endif
384 #ifdef CONFIG_X86_PAE
385 if (error_code & PF_INSTR) {
386 unsigned int level;
387 pte_t *pte = lookup_address(address, &level);
389 if (pte && pte_present(*pte) && !pte_exec(*pte))
390 printk(KERN_CRIT "kernel tried to execute "
391 "NX-protected page - exploit attempt? "
392 "(uid: %d)\n", current->uid);
394 #endif
396 printk(KERN_ALERT "BUG: unable to handle kernel ");
397 if (address < PAGE_SIZE)
398 printk(KERN_CONT "NULL pointer dereference");
399 else
400 printk(KERN_CONT "paging request");
401 #ifdef CONFIG_X86_32
402 printk(KERN_CONT " at %08lx\n", address);
403 #else
404 printk(KERN_CONT " at %016lx\n", address);
405 #endif
406 printk(KERN_ALERT "IP:");
407 printk_address(regs->ip, 1);
408 dump_pagetable(address);
411 #ifdef CONFIG_X86_64
412 static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
413 unsigned long error_code)
415 unsigned long flags = oops_begin();
416 struct task_struct *tsk;
418 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
419 current->comm, address);
420 dump_pagetable(address);
421 tsk = current;
422 tsk->thread.cr2 = address;
423 tsk->thread.trap_no = 14;
424 tsk->thread.error_code = error_code;
425 if (__die("Bad pagetable", regs, error_code))
426 regs = NULL;
427 oops_end(flags, regs, SIGKILL);
429 #endif
432 * Handle a spurious fault caused by a stale TLB entry. This allows
433 * us to lazily refresh the TLB when increasing the permissions of a
434 * kernel page (RO -> RW or NX -> X). Doing it eagerly is very
435 * expensive since that implies doing a full cross-processor TLB
436 * flush, even if no stale TLB entries exist on other processors.
437 * There are no security implications to leaving a stale TLB when
438 * increasing the permissions on a page.
440 static int spurious_fault(unsigned long address,
441 unsigned long error_code)
443 pgd_t *pgd;
444 pud_t *pud;
445 pmd_t *pmd;
446 pte_t *pte;
448 /* Reserved-bit violation or user access to kernel space? */
449 if (error_code & (PF_USER | PF_RSVD))
450 return 0;
452 pgd = init_mm.pgd + pgd_index(address);
453 if (!pgd_present(*pgd))
454 return 0;
456 pud = pud_offset(pgd, address);
457 if (!pud_present(*pud))
458 return 0;
460 pmd = pmd_offset(pud, address);
461 if (!pmd_present(*pmd))
462 return 0;
464 pte = pte_offset_kernel(pmd, address);
465 if (!pte_present(*pte))
466 return 0;
468 if ((error_code & PF_WRITE) && !pte_write(*pte))
469 return 0;
470 if ((error_code & PF_INSTR) && !pte_exec(*pte))
471 return 0;
473 return 1;
477 * X86_32
478 * Handle a fault on the vmalloc or module mapping area
480 * X86_64
481 * Handle a fault on the vmalloc area
483 * This assumes no large pages in there.
485 static int vmalloc_fault(unsigned long address)
487 #ifdef CONFIG_X86_32
488 unsigned long pgd_paddr;
489 pmd_t *pmd_k;
490 pte_t *pte_k;
492 * Synchronize this task's top level page-table
493 * with the 'reference' page table.
495 * Do _not_ use "current" here. We might be inside
496 * an interrupt in the middle of a task switch..
498 pgd_paddr = read_cr3();
499 pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
500 if (!pmd_k)
501 return -1;
502 pte_k = pte_offset_kernel(pmd_k, address);
503 if (!pte_present(*pte_k))
504 return -1;
505 return 0;
506 #else
507 pgd_t *pgd, *pgd_ref;
508 pud_t *pud, *pud_ref;
509 pmd_t *pmd, *pmd_ref;
510 pte_t *pte, *pte_ref;
512 /* Make sure we are in vmalloc area */
513 if (!(address >= VMALLOC_START && address < VMALLOC_END))
514 return -1;
516 /* Copy kernel mappings over when needed. This can also
517 happen within a race in page table update. In the later
518 case just flush. */
520 pgd = pgd_offset(current->mm ?: &init_mm, address);
521 pgd_ref = pgd_offset_k(address);
522 if (pgd_none(*pgd_ref))
523 return -1;
524 if (pgd_none(*pgd))
525 set_pgd(pgd, *pgd_ref);
526 else
527 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
529 /* Below here mismatches are bugs because these lower tables
530 are shared */
532 pud = pud_offset(pgd, address);
533 pud_ref = pud_offset(pgd_ref, address);
534 if (pud_none(*pud_ref))
535 return -1;
536 if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
537 BUG();
538 pmd = pmd_offset(pud, address);
539 pmd_ref = pmd_offset(pud_ref, address);
540 if (pmd_none(*pmd_ref))
541 return -1;
542 if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
543 BUG();
544 pte_ref = pte_offset_kernel(pmd_ref, address);
545 if (!pte_present(*pte_ref))
546 return -1;
547 pte = pte_offset_kernel(pmd, address);
548 /* Don't use pte_page here, because the mappings can point
549 outside mem_map, and the NUMA hash lookup cannot handle
550 that. */
551 if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
552 BUG();
553 return 0;
554 #endif
557 int show_unhandled_signals = 1;
560 * This routine handles page faults. It determines the address,
561 * and the problem, and then passes it off to one of the appropriate
562 * routines.
564 #ifdef CONFIG_X86_64
565 asmlinkage
566 #endif
567 void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
569 struct task_struct *tsk;
570 struct mm_struct *mm;
571 struct vm_area_struct *vma;
572 unsigned long address;
573 int write, si_code;
574 int fault;
575 #ifdef CONFIG_X86_64
576 unsigned long flags;
577 #endif
580 * We can fault from pretty much anywhere, with unknown IRQ state.
582 trace_hardirqs_fixup();
584 tsk = current;
585 mm = tsk->mm;
586 prefetchw(&mm->mmap_sem);
588 /* get the address */
589 address = read_cr2();
591 si_code = SEGV_MAPERR;
593 if (notify_page_fault(regs))
594 return;
597 * We fault-in kernel-space virtual memory on-demand. The
598 * 'reference' page table is init_mm.pgd.
600 * NOTE! We MUST NOT take any locks for this case. We may
601 * be in an interrupt or a critical region, and should
602 * only copy the information from the master page table,
603 * nothing more.
605 * This verifies that the fault happens in kernel space
606 * (error_code & 4) == 0, and that the fault was not a
607 * protection error (error_code & 9) == 0.
609 #ifdef CONFIG_X86_32
610 if (unlikely(address >= TASK_SIZE)) {
611 #else
612 if (unlikely(address >= TASK_SIZE64)) {
613 #endif
614 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) &&
615 vmalloc_fault(address) >= 0)
616 return;
618 /* Can handle a stale RO->RW TLB */
619 if (spurious_fault(address, error_code))
620 return;
623 * Don't take the mm semaphore here. If we fixup a prefetch
624 * fault we could otherwise deadlock.
626 goto bad_area_nosemaphore;
630 #ifdef CONFIG_X86_32
631 /* It's safe to allow irq's after cr2 has been saved and the vmalloc
632 fault has been handled. */
633 if (regs->flags & (X86_EFLAGS_IF|VM_MASK))
634 local_irq_enable();
637 * If we're in an interrupt, have no user context or are running in an
638 * atomic region then we must not take the fault.
640 if (in_atomic() || !mm)
641 goto bad_area_nosemaphore;
642 #else /* CONFIG_X86_64 */
643 if (likely(regs->flags & X86_EFLAGS_IF))
644 local_irq_enable();
646 if (unlikely(error_code & PF_RSVD))
647 pgtable_bad(address, regs, error_code);
650 * If we're in an interrupt, have no user context or are running in an
651 * atomic region then we must not take the fault.
653 if (unlikely(in_atomic() || !mm))
654 goto bad_area_nosemaphore;
657 * User-mode registers count as a user access even for any
658 * potential system fault or CPU buglet.
660 if (user_mode_vm(regs))
661 error_code |= PF_USER;
662 again:
663 #endif
664 /* When running in the kernel we expect faults to occur only to
665 * addresses in user space. All other faults represent errors in the
666 * kernel and should generate an OOPS. Unfortunately, in the case of an
667 * erroneous fault occurring in a code path which already holds mmap_sem
668 * we will deadlock attempting to validate the fault against the
669 * address space. Luckily the kernel only validly references user
670 * space from well defined areas of code, which are listed in the
671 * exceptions table.
673 * As the vast majority of faults will be valid we will only perform
674 * the source reference check when there is a possibility of a deadlock.
675 * Attempt to lock the address space, if we cannot we then validate the
676 * source. If this is invalid we can skip the address space check,
677 * thus avoiding the deadlock.
679 if (!down_read_trylock(&mm->mmap_sem)) {
680 if ((error_code & PF_USER) == 0 &&
681 !search_exception_tables(regs->ip))
682 goto bad_area_nosemaphore;
683 down_read(&mm->mmap_sem);
686 vma = find_vma(mm, address);
687 if (!vma)
688 goto bad_area;
689 if (vma->vm_start <= address)
690 goto good_area;
691 if (!(vma->vm_flags & VM_GROWSDOWN))
692 goto bad_area;
693 if (error_code & PF_USER) {
695 * Accessing the stack below %sp is always a bug.
696 * The large cushion allows instructions like enter
697 * and pusha to work. ("enter $65535,$31" pushes
698 * 32 pointers and then decrements %sp by 65535.)
700 if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp)
701 goto bad_area;
703 if (expand_stack(vma, address))
704 goto bad_area;
706 * Ok, we have a good vm_area for this memory access, so
707 * we can handle it..
709 good_area:
710 si_code = SEGV_ACCERR;
711 write = 0;
712 switch (error_code & (PF_PROT|PF_WRITE)) {
713 default: /* 3: write, present */
714 /* fall through */
715 case PF_WRITE: /* write, not present */
716 if (!(vma->vm_flags & VM_WRITE))
717 goto bad_area;
718 write++;
719 break;
720 case PF_PROT: /* read, present */
721 goto bad_area;
722 case 0: /* read, not present */
723 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
724 goto bad_area;
727 #ifdef CONFIG_X86_32
728 survive:
729 #endif
731 * If for any reason at all we couldn't handle the fault,
732 * make sure we exit gracefully rather than endlessly redo
733 * the fault.
735 fault = handle_mm_fault(mm, vma, address, write);
736 if (unlikely(fault & VM_FAULT_ERROR)) {
737 if (fault & VM_FAULT_OOM)
738 goto out_of_memory;
739 else if (fault & VM_FAULT_SIGBUS)
740 goto do_sigbus;
741 BUG();
743 if (fault & VM_FAULT_MAJOR)
744 tsk->maj_flt++;
745 else
746 tsk->min_flt++;
748 #ifdef CONFIG_X86_32
750 * Did it hit the DOS screen memory VA from vm86 mode?
752 if (v8086_mode(regs)) {
753 unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT;
754 if (bit < 32)
755 tsk->thread.screen_bitmap |= 1 << bit;
757 #endif
758 up_read(&mm->mmap_sem);
759 return;
762 * Something tried to access memory that isn't in our memory map..
763 * Fix it, but check if it's kernel or user first..
765 bad_area:
766 up_read(&mm->mmap_sem);
768 bad_area_nosemaphore:
769 /* User mode accesses just cause a SIGSEGV */
770 if (error_code & PF_USER) {
772 * It's possible to have interrupts off here.
774 local_irq_enable();
777 * Valid to do another page fault here because this one came
778 * from user space.
780 if (is_prefetch(regs, address, error_code))
781 return;
783 if (is_errata100(regs, address))
784 return;
786 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
787 printk_ratelimit()) {
788 printk(
789 #ifdef CONFIG_X86_32
790 "%s%s[%d]: segfault at %lx ip %08lx sp %08lx error %lx",
791 #else
792 "%s%s[%d]: segfault at %lx ip %lx sp %lx error %lx",
793 #endif
794 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
795 tsk->comm, task_pid_nr(tsk), address, regs->ip,
796 regs->sp, error_code);
797 print_vma_addr(" in ", regs->ip);
798 printk("\n");
801 tsk->thread.cr2 = address;
802 /* Kernel addresses are always protection faults */
803 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
804 tsk->thread.trap_no = 14;
805 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
806 return;
809 if (is_f00f_bug(regs, address))
810 return;
812 no_context:
813 /* Are we prepared to handle this kernel fault? */
814 if (fixup_exception(regs))
815 return;
818 * X86_32
819 * Valid to do another page fault here, because if this fault
820 * had been triggered by is_prefetch fixup_exception would have
821 * handled it.
823 * X86_64
824 * Hall of shame of CPU/BIOS bugs.
826 if (is_prefetch(regs, address, error_code))
827 return;
829 if (is_errata93(regs, address))
830 return;
833 * Oops. The kernel tried to access some bad page. We'll have to
834 * terminate things with extreme prejudice.
836 #ifdef CONFIG_X86_32
837 bust_spinlocks(1);
838 #else
839 flags = oops_begin();
840 #endif
842 show_fault_oops(regs, error_code, address);
844 tsk->thread.cr2 = address;
845 tsk->thread.trap_no = 14;
846 tsk->thread.error_code = error_code;
848 #ifdef CONFIG_X86_32
849 die("Oops", regs, error_code);
850 bust_spinlocks(0);
851 do_exit(SIGKILL);
852 #else
853 if (__die("Oops", regs, error_code))
854 regs = NULL;
855 /* Executive summary in case the body of the oops scrolled away */
856 printk(KERN_EMERG "CR2: %016lx\n", address);
857 oops_end(flags, regs, SIGKILL);
858 #endif
861 * We ran out of memory, or some other thing happened to us that made
862 * us unable to handle the page fault gracefully.
864 out_of_memory:
865 up_read(&mm->mmap_sem);
866 if (is_global_init(tsk)) {
867 yield();
868 #ifdef CONFIG_X86_32
869 down_read(&mm->mmap_sem);
870 goto survive;
871 #else
872 goto again;
873 #endif
876 printk("VM: killing process %s\n", tsk->comm);
877 if (error_code & PF_USER)
878 do_group_exit(SIGKILL);
879 goto no_context;
881 do_sigbus:
882 up_read(&mm->mmap_sem);
884 /* Kernel mode? Handle exceptions or die */
885 if (!(error_code & PF_USER))
886 goto no_context;
887 #ifdef CONFIG_X86_32
888 /* User space => ok to do another page fault */
889 if (is_prefetch(regs, address, error_code))
890 return;
891 #endif
892 tsk->thread.cr2 = address;
893 tsk->thread.error_code = error_code;
894 tsk->thread.trap_no = 14;
895 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
898 DEFINE_SPINLOCK(pgd_lock);
899 LIST_HEAD(pgd_list);
901 void vmalloc_sync_all(void)
903 #ifdef CONFIG_X86_32
905 * Note that races in the updates of insync and start aren't
906 * problematic: insync can only get set bits added, and updates to
907 * start are only improving performance (without affecting correctness
908 * if undone).
910 static DECLARE_BITMAP(insync, PTRS_PER_PGD);
911 static unsigned long start = TASK_SIZE;
912 unsigned long address;
914 if (SHARED_KERNEL_PMD)
915 return;
917 BUILD_BUG_ON(TASK_SIZE & ~PGDIR_MASK);
918 for (address = start; address >= TASK_SIZE; address += PGDIR_SIZE) {
919 if (!test_bit(pgd_index(address), insync)) {
920 unsigned long flags;
921 struct page *page;
923 spin_lock_irqsave(&pgd_lock, flags);
924 list_for_each_entry(page, &pgd_list, lru) {
925 if (!vmalloc_sync_one(page_address(page),
926 address))
927 break;
929 spin_unlock_irqrestore(&pgd_lock, flags);
930 if (!page)
931 set_bit(pgd_index(address), insync);
933 if (address == start && test_bit(pgd_index(address), insync))
934 start = address + PGDIR_SIZE;
936 #else /* CONFIG_X86_64 */
938 * Note that races in the updates of insync and start aren't
939 * problematic: insync can only get set bits added, and updates to
940 * start are only improving performance (without affecting correctness
941 * if undone).
943 static DECLARE_BITMAP(insync, PTRS_PER_PGD);
944 static unsigned long start = VMALLOC_START & PGDIR_MASK;
945 unsigned long address;
947 for (address = start; address <= VMALLOC_END; address += PGDIR_SIZE) {
948 if (!test_bit(pgd_index(address), insync)) {
949 const pgd_t *pgd_ref = pgd_offset_k(address);
950 struct page *page;
952 if (pgd_none(*pgd_ref))
953 continue;
954 spin_lock(&pgd_lock);
955 list_for_each_entry(page, &pgd_list, lru) {
956 pgd_t *pgd;
957 pgd = (pgd_t *)page_address(page) + pgd_index(address);
958 if (pgd_none(*pgd))
959 set_pgd(pgd, *pgd_ref);
960 else
961 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
963 spin_unlock(&pgd_lock);
964 set_bit(pgd_index(address), insync);
966 if (address == start)
967 start = address + PGDIR_SIZE;
969 /* Check that there is no need to do the same for the modules area. */
970 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
971 BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
972 (__START_KERNEL & PGDIR_MASK)));
973 #endif