2 * drivers/serial/serial_txx9.c
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
20 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/platform_device.h>
30 #include <linux/pci.h>
31 #include <linux/serial_core.h>
32 #include <linux/serial.h>
36 static char *serial_version
= "1.11";
37 static char *serial_name
= "TX39/49 Serial driver";
39 #define PASS_LIMIT 256
41 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
42 /* "ttyS" is used for standard serial driver */
43 #define TXX9_TTY_NAME "ttyTX"
44 #define TXX9_TTY_MINOR_START 196
45 #define TXX9_TTY_MAJOR 204
47 /* acts like standard serial driver */
48 #define TXX9_TTY_NAME "ttyS"
49 #define TXX9_TTY_MINOR_START 64
50 #define TXX9_TTY_MAJOR TTY_MAJOR
54 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
55 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
58 /* support for Toshiba TC86C001 SIO */
59 #define ENABLE_SERIAL_TXX9_PCI
63 * Number of serial ports
65 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
67 struct uart_txx9_port
{
68 struct uart_port port
;
69 /* No additional info for now */
72 #define TXX9_REGION_SIZE 0x24
74 /* TXX9 Serial Registers */
75 #define TXX9_SILCR 0x00
76 #define TXX9_SIDICR 0x04
77 #define TXX9_SIDISR 0x08
78 #define TXX9_SICISR 0x0c
79 #define TXX9_SIFCR 0x10
80 #define TXX9_SIFLCR 0x14
81 #define TXX9_SIBGR 0x18
82 #define TXX9_SITFIFO 0x1c
83 #define TXX9_SIRFIFO 0x20
85 /* SILCR : Line Control */
86 #define TXX9_SILCR_SCS_MASK 0x00000060
87 #define TXX9_SILCR_SCS_IMCLK 0x00000000
88 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
89 #define TXX9_SILCR_SCS_SCLK 0x00000040
90 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
91 #define TXX9_SILCR_UEPS 0x00000010
92 #define TXX9_SILCR_UPEN 0x00000008
93 #define TXX9_SILCR_USBL_MASK 0x00000004
94 #define TXX9_SILCR_USBL_1BIT 0x00000000
95 #define TXX9_SILCR_USBL_2BIT 0x00000004
96 #define TXX9_SILCR_UMODE_MASK 0x00000003
97 #define TXX9_SILCR_UMODE_8BIT 0x00000000
98 #define TXX9_SILCR_UMODE_7BIT 0x00000001
100 /* SIDICR : DMA/Int. Control */
101 #define TXX9_SIDICR_TDE 0x00008000
102 #define TXX9_SIDICR_RDE 0x00004000
103 #define TXX9_SIDICR_TIE 0x00002000
104 #define TXX9_SIDICR_RIE 0x00001000
105 #define TXX9_SIDICR_SPIE 0x00000800
106 #define TXX9_SIDICR_CTSAC 0x00000600
107 #define TXX9_SIDICR_STIE_MASK 0x0000003f
108 #define TXX9_SIDICR_STIE_OERS 0x00000020
109 #define TXX9_SIDICR_STIE_CTSS 0x00000010
110 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
111 #define TXX9_SIDICR_STIE_TRDY 0x00000004
112 #define TXX9_SIDICR_STIE_TXALS 0x00000002
113 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
115 /* SIDISR : DMA/Int. Status */
116 #define TXX9_SIDISR_UBRK 0x00008000
117 #define TXX9_SIDISR_UVALID 0x00004000
118 #define TXX9_SIDISR_UFER 0x00002000
119 #define TXX9_SIDISR_UPER 0x00001000
120 #define TXX9_SIDISR_UOER 0x00000800
121 #define TXX9_SIDISR_ERI 0x00000400
122 #define TXX9_SIDISR_TOUT 0x00000200
123 #define TXX9_SIDISR_TDIS 0x00000100
124 #define TXX9_SIDISR_RDIS 0x00000080
125 #define TXX9_SIDISR_STIS 0x00000040
126 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
128 /* SICISR : Change Int. Status */
129 #define TXX9_SICISR_OERS 0x00000020
130 #define TXX9_SICISR_CTSS 0x00000010
131 #define TXX9_SICISR_RBRKD 0x00000008
132 #define TXX9_SICISR_TRDY 0x00000004
133 #define TXX9_SICISR_TXALS 0x00000002
134 #define TXX9_SICISR_UBRKD 0x00000001
136 /* SIFCR : FIFO Control */
137 #define TXX9_SIFCR_SWRST 0x00008000
138 #define TXX9_SIFCR_RDIL_MASK 0x00000180
139 #define TXX9_SIFCR_RDIL_1 0x00000000
140 #define TXX9_SIFCR_RDIL_4 0x00000080
141 #define TXX9_SIFCR_RDIL_8 0x00000100
142 #define TXX9_SIFCR_RDIL_12 0x00000180
143 #define TXX9_SIFCR_RDIL_MAX 0x00000180
144 #define TXX9_SIFCR_TDIL_MASK 0x00000018
145 #define TXX9_SIFCR_TDIL_MASK 0x00000018
146 #define TXX9_SIFCR_TDIL_1 0x00000000
147 #define TXX9_SIFCR_TDIL_4 0x00000001
148 #define TXX9_SIFCR_TDIL_8 0x00000010
149 #define TXX9_SIFCR_TDIL_MAX 0x00000010
150 #define TXX9_SIFCR_TFRST 0x00000004
151 #define TXX9_SIFCR_RFRST 0x00000002
152 #define TXX9_SIFCR_FRSTE 0x00000001
153 #define TXX9_SIO_TX_FIFO 8
154 #define TXX9_SIO_RX_FIFO 16
156 /* SIFLCR : Flow Control */
157 #define TXX9_SIFLCR_RCS 0x00001000
158 #define TXX9_SIFLCR_TES 0x00000800
159 #define TXX9_SIFLCR_RTSSC 0x00000200
160 #define TXX9_SIFLCR_RSDE 0x00000100
161 #define TXX9_SIFLCR_TSDE 0x00000080
162 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
163 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
164 #define TXX9_SIFLCR_TBRK 0x00000001
166 /* SIBGR : Baudrate Control */
167 #define TXX9_SIBGR_BCLK_MASK 0x00000300
168 #define TXX9_SIBGR_BCLK_T0 0x00000000
169 #define TXX9_SIBGR_BCLK_T2 0x00000100
170 #define TXX9_SIBGR_BCLK_T4 0x00000200
171 #define TXX9_SIBGR_BCLK_T6 0x00000300
172 #define TXX9_SIBGR_BRD_MASK 0x000000ff
174 static inline unsigned int sio_in(struct uart_txx9_port
*up
, int offset
)
176 switch (up
->port
.iotype
) {
178 return __raw_readl(up
->port
.membase
+ offset
);
180 return inl(up
->port
.iobase
+ offset
);
185 sio_out(struct uart_txx9_port
*up
, int offset
, int value
)
187 switch (up
->port
.iotype
) {
189 __raw_writel(value
, up
->port
.membase
+ offset
);
192 outl(value
, up
->port
.iobase
+ offset
);
198 sio_mask(struct uart_txx9_port
*up
, int offset
, unsigned int value
)
200 sio_out(up
, offset
, sio_in(up
, offset
) & ~value
);
203 sio_set(struct uart_txx9_port
*up
, int offset
, unsigned int value
)
205 sio_out(up
, offset
, sio_in(up
, offset
) | value
);
209 sio_quot_set(struct uart_txx9_port
*up
, int quot
)
213 sio_out(up
, TXX9_SIBGR
, quot
| TXX9_SIBGR_BCLK_T0
);
214 else if (quot
< (256 << 2))
215 sio_out(up
, TXX9_SIBGR
, (quot
>> 2) | TXX9_SIBGR_BCLK_T2
);
216 else if (quot
< (256 << 4))
217 sio_out(up
, TXX9_SIBGR
, (quot
>> 4) | TXX9_SIBGR_BCLK_T4
);
218 else if (quot
< (256 << 6))
219 sio_out(up
, TXX9_SIBGR
, (quot
>> 6) | TXX9_SIBGR_BCLK_T6
);
221 sio_out(up
, TXX9_SIBGR
, 0xff | TXX9_SIBGR_BCLK_T6
);
224 static void serial_txx9_stop_tx(struct uart_port
*port
)
226 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
227 sio_mask(up
, TXX9_SIDICR
, TXX9_SIDICR_TIE
);
230 static void serial_txx9_start_tx(struct uart_port
*port
)
232 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
233 sio_set(up
, TXX9_SIDICR
, TXX9_SIDICR_TIE
);
236 static void serial_txx9_stop_rx(struct uart_port
*port
)
238 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
239 up
->port
.read_status_mask
&= ~TXX9_SIDISR_RDIS
;
242 static void serial_txx9_enable_ms(struct uart_port
*port
)
244 /* TXX9-SIO can not control DTR... */
247 static void serial_txx9_initialize(struct uart_port
*port
)
249 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
250 unsigned int tmout
= 10000;
252 sio_out(up
, TXX9_SIFCR
, TXX9_SIFCR_SWRST
);
253 /* TX4925 BUG WORKAROUND. Accessing SIOC register
254 * immediately after soft reset causes bus error. */
257 while ((sio_in(up
, TXX9_SIFCR
) & TXX9_SIFCR_SWRST
) && --tmout
)
259 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
260 sio_set(up
, TXX9_SIFCR
,
261 TXX9_SIFCR_TDIL_MAX
| TXX9_SIFCR_RDIL_1
);
262 /* initial settings */
263 sio_out(up
, TXX9_SILCR
,
264 TXX9_SILCR_UMODE_8BIT
| TXX9_SILCR_USBL_1BIT
|
265 ((up
->port
.flags
& UPF_TXX9_USE_SCLK
) ?
266 TXX9_SILCR_SCS_SCLK_BG
: TXX9_SILCR_SCS_IMCLK_BG
));
267 sio_quot_set(up
, uart_get_divisor(port
, 9600));
268 sio_out(up
, TXX9_SIFLCR
, TXX9_SIFLCR_RTSTL_MAX
/* 15 */);
269 sio_out(up
, TXX9_SIDICR
, 0);
273 receive_chars(struct uart_txx9_port
*up
, unsigned int *status
)
275 struct tty_struct
*tty
= up
->port
.info
->port
.tty
;
277 unsigned int disr
= *status
;
280 unsigned int next_ignore_status_mask
;
283 ch
= sio_in(up
, TXX9_SIRFIFO
);
285 up
->port
.icount
.rx
++;
287 /* mask out RFDN_MASK bit added by previous overrun */
288 next_ignore_status_mask
=
289 up
->port
.ignore_status_mask
& ~TXX9_SIDISR_RFDN_MASK
;
290 if (unlikely(disr
& (TXX9_SIDISR_UBRK
| TXX9_SIDISR_UPER
|
291 TXX9_SIDISR_UFER
| TXX9_SIDISR_UOER
))) {
293 * For statistics only
295 if (disr
& TXX9_SIDISR_UBRK
) {
296 disr
&= ~(TXX9_SIDISR_UFER
| TXX9_SIDISR_UPER
);
297 up
->port
.icount
.brk
++;
299 * We do the SysRQ and SAK checking
300 * here because otherwise the break
301 * may get masked by ignore_status_mask
302 * or read_status_mask.
304 if (uart_handle_break(&up
->port
))
306 } else if (disr
& TXX9_SIDISR_UPER
)
307 up
->port
.icount
.parity
++;
308 else if (disr
& TXX9_SIDISR_UFER
)
309 up
->port
.icount
.frame
++;
310 if (disr
& TXX9_SIDISR_UOER
) {
311 up
->port
.icount
.overrun
++;
313 * The receiver read buffer still hold
314 * a char which caused overrun.
315 * Ignore next char by adding RFDN_MASK
316 * to ignore_status_mask temporarily.
318 next_ignore_status_mask
|=
319 TXX9_SIDISR_RFDN_MASK
;
323 * Mask off conditions which should be ingored.
325 disr
&= up
->port
.read_status_mask
;
327 if (disr
& TXX9_SIDISR_UBRK
) {
329 } else if (disr
& TXX9_SIDISR_UPER
)
331 else if (disr
& TXX9_SIDISR_UFER
)
334 if (uart_handle_sysrq_char(&up
->port
, ch
))
337 uart_insert_char(&up
->port
, disr
, TXX9_SIDISR_UOER
, ch
, flag
);
340 up
->port
.ignore_status_mask
= next_ignore_status_mask
;
341 disr
= sio_in(up
, TXX9_SIDISR
);
342 } while (!(disr
& TXX9_SIDISR_UVALID
) && (max_count
-- > 0));
343 spin_unlock(&up
->port
.lock
);
344 tty_flip_buffer_push(tty
);
345 spin_lock(&up
->port
.lock
);
349 static inline void transmit_chars(struct uart_txx9_port
*up
)
351 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
354 if (up
->port
.x_char
) {
355 sio_out(up
, TXX9_SITFIFO
, up
->port
.x_char
);
356 up
->port
.icount
.tx
++;
360 if (uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
)) {
361 serial_txx9_stop_tx(&up
->port
);
365 count
= TXX9_SIO_TX_FIFO
;
367 sio_out(up
, TXX9_SITFIFO
, xmit
->buf
[xmit
->tail
]);
368 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
369 up
->port
.icount
.tx
++;
370 if (uart_circ_empty(xmit
))
372 } while (--count
> 0);
374 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
375 uart_write_wakeup(&up
->port
);
377 if (uart_circ_empty(xmit
))
378 serial_txx9_stop_tx(&up
->port
);
381 static irqreturn_t
serial_txx9_interrupt(int irq
, void *dev_id
)
383 int pass_counter
= 0;
384 struct uart_txx9_port
*up
= dev_id
;
388 spin_lock(&up
->port
.lock
);
389 status
= sio_in(up
, TXX9_SIDISR
);
390 if (!(sio_in(up
, TXX9_SIDICR
) & TXX9_SIDICR_TIE
))
391 status
&= ~TXX9_SIDISR_TDIS
;
392 if (!(status
& (TXX9_SIDISR_TDIS
| TXX9_SIDISR_RDIS
|
393 TXX9_SIDISR_TOUT
))) {
394 spin_unlock(&up
->port
.lock
);
398 if (status
& TXX9_SIDISR_RDIS
)
399 receive_chars(up
, &status
);
400 if (status
& TXX9_SIDISR_TDIS
)
402 /* Clear TX/RX Int. Status */
403 sio_mask(up
, TXX9_SIDISR
,
404 TXX9_SIDISR_TDIS
| TXX9_SIDISR_RDIS
|
406 spin_unlock(&up
->port
.lock
);
408 if (pass_counter
++ > PASS_LIMIT
)
412 return pass_counter
? IRQ_HANDLED
: IRQ_NONE
;
415 static unsigned int serial_txx9_tx_empty(struct uart_port
*port
)
417 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
421 spin_lock_irqsave(&up
->port
.lock
, flags
);
422 ret
= (sio_in(up
, TXX9_SICISR
) & TXX9_SICISR_TXALS
) ? TIOCSER_TEMT
: 0;
423 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
428 static unsigned int serial_txx9_get_mctrl(struct uart_port
*port
)
430 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
433 /* no modem control lines */
434 ret
= TIOCM_CAR
| TIOCM_DSR
;
435 ret
|= (sio_in(up
, TXX9_SIFLCR
) & TXX9_SIFLCR_RTSSC
) ? 0 : TIOCM_RTS
;
436 ret
|= (sio_in(up
, TXX9_SICISR
) & TXX9_SICISR_CTSS
) ? 0 : TIOCM_CTS
;
441 static void serial_txx9_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
443 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
445 if (mctrl
& TIOCM_RTS
)
446 sio_mask(up
, TXX9_SIFLCR
, TXX9_SIFLCR_RTSSC
);
448 sio_set(up
, TXX9_SIFLCR
, TXX9_SIFLCR_RTSSC
);
451 static void serial_txx9_break_ctl(struct uart_port
*port
, int break_state
)
453 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
456 spin_lock_irqsave(&up
->port
.lock
, flags
);
457 if (break_state
== -1)
458 sio_set(up
, TXX9_SIFLCR
, TXX9_SIFLCR_TBRK
);
460 sio_mask(up
, TXX9_SIFLCR
, TXX9_SIFLCR_TBRK
);
461 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
464 static int serial_txx9_startup(struct uart_port
*port
)
466 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
471 * Clear the FIFO buffers and disable them.
472 * (they will be reenabled in set_termios())
474 sio_set(up
, TXX9_SIFCR
,
475 TXX9_SIFCR_TFRST
| TXX9_SIFCR_RFRST
| TXX9_SIFCR_FRSTE
);
477 sio_mask(up
, TXX9_SIFCR
,
478 TXX9_SIFCR_TFRST
| TXX9_SIFCR_RFRST
| TXX9_SIFCR_FRSTE
);
479 sio_out(up
, TXX9_SIDICR
, 0);
482 * Clear the interrupt registers.
484 sio_out(up
, TXX9_SIDISR
, 0);
486 retval
= request_irq(up
->port
.irq
, serial_txx9_interrupt
,
487 IRQF_SHARED
, "serial_txx9", up
);
492 * Now, initialize the UART
494 spin_lock_irqsave(&up
->port
.lock
, flags
);
495 serial_txx9_set_mctrl(&up
->port
, up
->port
.mctrl
);
496 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
499 sio_mask(up
, TXX9_SIFLCR
, TXX9_SIFLCR_RSDE
| TXX9_SIFLCR_TSDE
);
502 * Finally, enable interrupts.
504 sio_set(up
, TXX9_SIDICR
, TXX9_SIDICR_RIE
);
509 static void serial_txx9_shutdown(struct uart_port
*port
)
511 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
515 * Disable interrupts from this port
517 sio_out(up
, TXX9_SIDICR
, 0); /* disable all intrs */
519 spin_lock_irqsave(&up
->port
.lock
, flags
);
520 serial_txx9_set_mctrl(&up
->port
, up
->port
.mctrl
);
521 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
524 * Disable break condition
526 sio_mask(up
, TXX9_SIFLCR
, TXX9_SIFLCR_TBRK
);
528 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
529 if (up
->port
.cons
&& up
->port
.line
== up
->port
.cons
->index
) {
530 free_irq(up
->port
.irq
, up
);
535 sio_set(up
, TXX9_SIFCR
,
536 TXX9_SIFCR_TFRST
| TXX9_SIFCR_RFRST
| TXX9_SIFCR_FRSTE
);
538 sio_mask(up
, TXX9_SIFCR
,
539 TXX9_SIFCR_TFRST
| TXX9_SIFCR_RFRST
| TXX9_SIFCR_FRSTE
);
542 sio_set(up
, TXX9_SIFLCR
, TXX9_SIFLCR_RSDE
| TXX9_SIFLCR_TSDE
);
544 free_irq(up
->port
.irq
, up
);
548 serial_txx9_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
549 struct ktermios
*old
)
551 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
552 unsigned int cval
, fcr
= 0;
554 unsigned int baud
, quot
;
557 * We don't support modem control lines.
559 termios
->c_cflag
&= ~(HUPCL
| CMSPAR
);
560 termios
->c_cflag
|= CLOCAL
;
562 cval
= sio_in(up
, TXX9_SILCR
);
563 /* byte size and parity */
564 cval
&= ~TXX9_SILCR_UMODE_MASK
;
565 switch (termios
->c_cflag
& CSIZE
) {
567 cval
|= TXX9_SILCR_UMODE_7BIT
;
570 case CS5
: /* not supported */
571 case CS6
: /* not supported */
573 cval
|= TXX9_SILCR_UMODE_8BIT
;
577 cval
&= ~TXX9_SILCR_USBL_MASK
;
578 if (termios
->c_cflag
& CSTOPB
)
579 cval
|= TXX9_SILCR_USBL_2BIT
;
581 cval
|= TXX9_SILCR_USBL_1BIT
;
582 cval
&= ~(TXX9_SILCR_UPEN
| TXX9_SILCR_UEPS
);
583 if (termios
->c_cflag
& PARENB
)
584 cval
|= TXX9_SILCR_UPEN
;
585 if (!(termios
->c_cflag
& PARODD
))
586 cval
|= TXX9_SILCR_UEPS
;
589 * Ask the core to calculate the divisor for us.
591 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16/2);
592 quot
= uart_get_divisor(port
, baud
);
595 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
596 fcr
= TXX9_SIFCR_TDIL_MAX
| TXX9_SIFCR_RDIL_1
;
599 * Ok, we're now changing the port state. Do it with
600 * interrupts disabled.
602 spin_lock_irqsave(&up
->port
.lock
, flags
);
605 * Update the per-port timeout.
607 uart_update_timeout(port
, termios
->c_cflag
, baud
);
609 up
->port
.read_status_mask
= TXX9_SIDISR_UOER
|
610 TXX9_SIDISR_TDIS
| TXX9_SIDISR_RDIS
;
611 if (termios
->c_iflag
& INPCK
)
612 up
->port
.read_status_mask
|= TXX9_SIDISR_UFER
| TXX9_SIDISR_UPER
;
613 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
614 up
->port
.read_status_mask
|= TXX9_SIDISR_UBRK
;
617 * Characteres to ignore
619 up
->port
.ignore_status_mask
= 0;
620 if (termios
->c_iflag
& IGNPAR
)
621 up
->port
.ignore_status_mask
|= TXX9_SIDISR_UPER
| TXX9_SIDISR_UFER
;
622 if (termios
->c_iflag
& IGNBRK
) {
623 up
->port
.ignore_status_mask
|= TXX9_SIDISR_UBRK
;
625 * If we're ignoring parity and break indicators,
626 * ignore overruns too (for real raw support).
628 if (termios
->c_iflag
& IGNPAR
)
629 up
->port
.ignore_status_mask
|= TXX9_SIDISR_UOER
;
633 * ignore all characters if CREAD is not set
635 if ((termios
->c_cflag
& CREAD
) == 0)
636 up
->port
.ignore_status_mask
|= TXX9_SIDISR_RDIS
;
638 /* CTS flow control flag */
639 if ((termios
->c_cflag
& CRTSCTS
) &&
640 (up
->port
.flags
& UPF_TXX9_HAVE_CTS_LINE
)) {
641 sio_set(up
, TXX9_SIFLCR
,
642 TXX9_SIFLCR_RCS
| TXX9_SIFLCR_TES
);
644 sio_mask(up
, TXX9_SIFLCR
,
645 TXX9_SIFLCR_RCS
| TXX9_SIFLCR_TES
);
648 sio_out(up
, TXX9_SILCR
, cval
);
649 sio_quot_set(up
, quot
);
650 sio_out(up
, TXX9_SIFCR
, fcr
);
652 serial_txx9_set_mctrl(&up
->port
, up
->port
.mctrl
);
653 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
657 serial_txx9_pm(struct uart_port
*port
, unsigned int state
,
658 unsigned int oldstate
)
661 * If oldstate was -1 this is called from
662 * uart_configure_port(). In this case do not initialize the
663 * port now, because the port was already initialized (for
664 * non-console port) or should not be initialized here (for
665 * console port). If we initialized the port here we lose
666 * serial console settings.
668 if (state
== 0 && oldstate
!= -1)
669 serial_txx9_initialize(port
);
672 static int serial_txx9_request_resource(struct uart_txx9_port
*up
)
674 unsigned int size
= TXX9_REGION_SIZE
;
677 switch (up
->port
.iotype
) {
679 if (!up
->port
.mapbase
)
682 if (!request_mem_region(up
->port
.mapbase
, size
, "serial_txx9")) {
687 if (up
->port
.flags
& UPF_IOREMAP
) {
688 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
689 if (!up
->port
.membase
) {
690 release_mem_region(up
->port
.mapbase
, size
);
697 if (!request_region(up
->port
.iobase
, size
, "serial_txx9"))
704 static void serial_txx9_release_resource(struct uart_txx9_port
*up
)
706 unsigned int size
= TXX9_REGION_SIZE
;
708 switch (up
->port
.iotype
) {
710 if (!up
->port
.mapbase
)
713 if (up
->port
.flags
& UPF_IOREMAP
) {
714 iounmap(up
->port
.membase
);
715 up
->port
.membase
= NULL
;
718 release_mem_region(up
->port
.mapbase
, size
);
722 release_region(up
->port
.iobase
, size
);
727 static void serial_txx9_release_port(struct uart_port
*port
)
729 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
730 serial_txx9_release_resource(up
);
733 static int serial_txx9_request_port(struct uart_port
*port
)
735 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
736 return serial_txx9_request_resource(up
);
739 static void serial_txx9_config_port(struct uart_port
*port
, int uflags
)
741 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
745 * Find the region that we can probe for. This in turn
746 * tells us whether we can probe for the type of port.
748 ret
= serial_txx9_request_resource(up
);
751 port
->type
= PORT_TXX9
;
752 up
->port
.fifosize
= TXX9_SIO_TX_FIFO
;
754 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
755 if (up
->port
.line
== up
->port
.cons
->index
)
758 serial_txx9_initialize(port
);
762 serial_txx9_type(struct uart_port
*port
)
767 static struct uart_ops serial_txx9_pops
= {
768 .tx_empty
= serial_txx9_tx_empty
,
769 .set_mctrl
= serial_txx9_set_mctrl
,
770 .get_mctrl
= serial_txx9_get_mctrl
,
771 .stop_tx
= serial_txx9_stop_tx
,
772 .start_tx
= serial_txx9_start_tx
,
773 .stop_rx
= serial_txx9_stop_rx
,
774 .enable_ms
= serial_txx9_enable_ms
,
775 .break_ctl
= serial_txx9_break_ctl
,
776 .startup
= serial_txx9_startup
,
777 .shutdown
= serial_txx9_shutdown
,
778 .set_termios
= serial_txx9_set_termios
,
779 .pm
= serial_txx9_pm
,
780 .type
= serial_txx9_type
,
781 .release_port
= serial_txx9_release_port
,
782 .request_port
= serial_txx9_request_port
,
783 .config_port
= serial_txx9_config_port
,
786 static struct uart_txx9_port serial_txx9_ports
[UART_NR
];
788 static void __init
serial_txx9_register_ports(struct uart_driver
*drv
,
793 for (i
= 0; i
< UART_NR
; i
++) {
794 struct uart_txx9_port
*up
= &serial_txx9_ports
[i
];
797 up
->port
.ops
= &serial_txx9_pops
;
799 if (up
->port
.iobase
|| up
->port
.mapbase
)
800 uart_add_one_port(drv
, &up
->port
);
804 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
807 * Wait for transmitter & holding register to empty
809 static inline void wait_for_xmitr(struct uart_txx9_port
*up
)
811 unsigned int tmout
= 10000;
813 /* Wait up to 10ms for the character(s) to be sent. */
815 !(sio_in(up
, TXX9_SICISR
) & TXX9_SICISR_TXALS
))
818 /* Wait up to 1s for flow control if necessary */
819 if (up
->port
.flags
& UPF_CONS_FLOW
) {
822 (sio_in(up
, TXX9_SICISR
) & TXX9_SICISR_CTSS
))
827 static void serial_txx9_console_putchar(struct uart_port
*port
, int ch
)
829 struct uart_txx9_port
*up
= (struct uart_txx9_port
*)port
;
832 sio_out(up
, TXX9_SITFIFO
, ch
);
836 * Print a string to the serial port trying not to disturb
837 * any possible real use of the port...
839 * The console_lock must be held when we get here.
842 serial_txx9_console_write(struct console
*co
, const char *s
, unsigned int count
)
844 struct uart_txx9_port
*up
= &serial_txx9_ports
[co
->index
];
845 unsigned int ier
, flcr
;
848 * First save the UER then disable the interrupts
850 ier
= sio_in(up
, TXX9_SIDICR
);
851 sio_out(up
, TXX9_SIDICR
, 0);
853 * Disable flow-control if enabled (and unnecessary)
855 flcr
= sio_in(up
, TXX9_SIFLCR
);
856 if (!(up
->port
.flags
& UPF_CONS_FLOW
) && (flcr
& TXX9_SIFLCR_TES
))
857 sio_out(up
, TXX9_SIFLCR
, flcr
& ~TXX9_SIFLCR_TES
);
859 uart_console_write(&up
->port
, s
, count
, serial_txx9_console_putchar
);
862 * Finally, wait for transmitter to become empty
863 * and restore the IER
866 sio_out(up
, TXX9_SIFLCR
, flcr
);
867 sio_out(up
, TXX9_SIDICR
, ier
);
870 static int __init
serial_txx9_console_setup(struct console
*co
, char *options
)
872 struct uart_port
*port
;
873 struct uart_txx9_port
*up
;
880 * Check whether an invalid uart number has been specified, and
881 * if so, search for the first available port that does have
884 if (co
->index
>= UART_NR
)
886 up
= &serial_txx9_ports
[co
->index
];
891 serial_txx9_initialize(&up
->port
);
894 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
896 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
899 static struct uart_driver serial_txx9_reg
;
900 static struct console serial_txx9_console
= {
901 .name
= TXX9_TTY_NAME
,
902 .write
= serial_txx9_console_write
,
903 .device
= uart_console_device
,
904 .setup
= serial_txx9_console_setup
,
905 .flags
= CON_PRINTBUFFER
,
907 .data
= &serial_txx9_reg
,
910 static int __init
serial_txx9_console_init(void)
912 register_console(&serial_txx9_console
);
915 console_initcall(serial_txx9_console_init
);
917 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
919 #define SERIAL_TXX9_CONSOLE NULL
922 static struct uart_driver serial_txx9_reg
= {
923 .owner
= THIS_MODULE
,
924 .driver_name
= "serial_txx9",
925 .dev_name
= TXX9_TTY_NAME
,
926 .major
= TXX9_TTY_MAJOR
,
927 .minor
= TXX9_TTY_MINOR_START
,
929 .cons
= SERIAL_TXX9_CONSOLE
,
932 int __init
early_serial_txx9_setup(struct uart_port
*port
)
934 if (port
->line
>= ARRAY_SIZE(serial_txx9_ports
))
937 serial_txx9_ports
[port
->line
].port
= *port
;
938 serial_txx9_ports
[port
->line
].port
.ops
= &serial_txx9_pops
;
939 serial_txx9_ports
[port
->line
].port
.flags
|=
940 UPF_BOOT_AUTOCONF
| UPF_FIXED_PORT
;
944 static DEFINE_MUTEX(serial_txx9_mutex
);
947 * serial_txx9_register_port - register a serial port
948 * @port: serial port template
950 * Configure the serial port specified by the request.
952 * The port is then probed and if necessary the IRQ is autodetected
953 * If this fails an error is returned.
955 * On success the port is ready to use and the line number is returned.
957 static int __devinit
serial_txx9_register_port(struct uart_port
*port
)
960 struct uart_txx9_port
*uart
;
963 mutex_lock(&serial_txx9_mutex
);
964 for (i
= 0; i
< UART_NR
; i
++) {
965 uart
= &serial_txx9_ports
[i
];
966 if (uart_match_port(&uart
->port
, port
)) {
967 uart_remove_one_port(&serial_txx9_reg
, &uart
->port
);
972 /* Find unused port */
973 for (i
= 0; i
< UART_NR
; i
++) {
974 uart
= &serial_txx9_ports
[i
];
975 if (!(uart
->port
.iobase
|| uart
->port
.mapbase
))
980 uart
->port
.iobase
= port
->iobase
;
981 uart
->port
.membase
= port
->membase
;
982 uart
->port
.irq
= port
->irq
;
983 uart
->port
.uartclk
= port
->uartclk
;
984 uart
->port
.iotype
= port
->iotype
;
985 uart
->port
.flags
= port
->flags
986 | UPF_BOOT_AUTOCONF
| UPF_FIXED_PORT
;
987 uart
->port
.mapbase
= port
->mapbase
;
989 uart
->port
.dev
= port
->dev
;
990 ret
= uart_add_one_port(&serial_txx9_reg
, &uart
->port
);
992 ret
= uart
->port
.line
;
994 mutex_unlock(&serial_txx9_mutex
);
999 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1000 * @line: serial line number
1002 * Remove one serial port. This may not be called from interrupt
1003 * context. We hand the port back to the our control.
1005 static void __devexit
serial_txx9_unregister_port(int line
)
1007 struct uart_txx9_port
*uart
= &serial_txx9_ports
[line
];
1009 mutex_lock(&serial_txx9_mutex
);
1010 uart_remove_one_port(&serial_txx9_reg
, &uart
->port
);
1011 uart
->port
.flags
= 0;
1012 uart
->port
.type
= PORT_UNKNOWN
;
1013 uart
->port
.iobase
= 0;
1014 uart
->port
.mapbase
= 0;
1015 uart
->port
.membase
= NULL
;
1016 uart
->port
.dev
= NULL
;
1017 mutex_unlock(&serial_txx9_mutex
);
1021 * Register a set of serial devices attached to a platform device.
1023 static int __devinit
serial_txx9_probe(struct platform_device
*dev
)
1025 struct uart_port
*p
= dev
->dev
.platform_data
;
1026 struct uart_port port
;
1029 memset(&port
, 0, sizeof(struct uart_port
));
1030 for (i
= 0; p
&& p
->uartclk
!= 0; p
++, i
++) {
1031 port
.iobase
= p
->iobase
;
1032 port
.membase
= p
->membase
;
1034 port
.uartclk
= p
->uartclk
;
1035 port
.iotype
= p
->iotype
;
1036 port
.flags
= p
->flags
;
1037 port
.mapbase
= p
->mapbase
;
1038 port
.dev
= &dev
->dev
;
1039 ret
= serial_txx9_register_port(&port
);
1041 dev_err(&dev
->dev
, "unable to register port at index %d "
1042 "(IO%lx MEM%llx IRQ%d): %d\n", i
,
1043 p
->iobase
, (unsigned long long)p
->mapbase
,
1051 * Remove serial ports registered against a platform device.
1053 static int __devexit
serial_txx9_remove(struct platform_device
*dev
)
1057 for (i
= 0; i
< UART_NR
; i
++) {
1058 struct uart_txx9_port
*up
= &serial_txx9_ports
[i
];
1060 if (up
->port
.dev
== &dev
->dev
)
1061 serial_txx9_unregister_port(i
);
1067 static int serial_txx9_suspend(struct platform_device
*dev
, pm_message_t state
)
1071 for (i
= 0; i
< UART_NR
; i
++) {
1072 struct uart_txx9_port
*up
= &serial_txx9_ports
[i
];
1074 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
1075 uart_suspend_port(&serial_txx9_reg
, &up
->port
);
1081 static int serial_txx9_resume(struct platform_device
*dev
)
1085 for (i
= 0; i
< UART_NR
; i
++) {
1086 struct uart_txx9_port
*up
= &serial_txx9_ports
[i
];
1088 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
1089 uart_resume_port(&serial_txx9_reg
, &up
->port
);
1096 static struct platform_driver serial_txx9_plat_driver
= {
1097 .probe
= serial_txx9_probe
,
1098 .remove
= __devexit_p(serial_txx9_remove
),
1100 .suspend
= serial_txx9_suspend
,
1101 .resume
= serial_txx9_resume
,
1104 .name
= "serial_txx9",
1105 .owner
= THIS_MODULE
,
1109 #ifdef ENABLE_SERIAL_TXX9_PCI
1111 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1112 * to the arrangement of serial ports on a PCI card.
1114 static int __devinit
1115 pciserial_txx9_init_one(struct pci_dev
*dev
, const struct pci_device_id
*ent
)
1117 struct uart_port port
;
1121 rc
= pci_enable_device(dev
);
1125 memset(&port
, 0, sizeof(port
));
1126 port
.ops
= &serial_txx9_pops
;
1127 port
.flags
|= UPF_TXX9_HAVE_CTS_LINE
;
1128 port
.uartclk
= 66670000;
1129 port
.irq
= dev
->irq
;
1130 port
.iotype
= UPIO_PORT
;
1131 port
.iobase
= pci_resource_start(dev
, 1);
1132 port
.dev
= &dev
->dev
;
1133 line
= serial_txx9_register_port(&port
);
1135 printk(KERN_WARNING
"Couldn't register serial port %s: %d\n", pci_name(dev
), line
);
1136 pci_disable_device(dev
);
1139 pci_set_drvdata(dev
, &serial_txx9_ports
[line
]);
1144 static void __devexit
pciserial_txx9_remove_one(struct pci_dev
*dev
)
1146 struct uart_txx9_port
*up
= pci_get_drvdata(dev
);
1148 pci_set_drvdata(dev
, NULL
);
1151 serial_txx9_unregister_port(up
->port
.line
);
1152 pci_disable_device(dev
);
1157 static int pciserial_txx9_suspend_one(struct pci_dev
*dev
, pm_message_t state
)
1159 struct uart_txx9_port
*up
= pci_get_drvdata(dev
);
1162 uart_suspend_port(&serial_txx9_reg
, &up
->port
);
1163 pci_save_state(dev
);
1164 pci_set_power_state(dev
, pci_choose_state(dev
, state
));
1168 static int pciserial_txx9_resume_one(struct pci_dev
*dev
)
1170 struct uart_txx9_port
*up
= pci_get_drvdata(dev
);
1172 pci_set_power_state(dev
, PCI_D0
);
1173 pci_restore_state(dev
);
1175 uart_resume_port(&serial_txx9_reg
, &up
->port
);
1180 static const struct pci_device_id serial_txx9_pci_tbl
[] = {
1181 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2
, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC
) },
1185 static struct pci_driver serial_txx9_pci_driver
= {
1186 .name
= "serial_txx9",
1187 .probe
= pciserial_txx9_init_one
,
1188 .remove
= __devexit_p(pciserial_txx9_remove_one
),
1190 .suspend
= pciserial_txx9_suspend_one
,
1191 .resume
= pciserial_txx9_resume_one
,
1193 .id_table
= serial_txx9_pci_tbl
,
1196 MODULE_DEVICE_TABLE(pci
, serial_txx9_pci_tbl
);
1197 #endif /* ENABLE_SERIAL_TXX9_PCI */
1199 static struct platform_device
*serial_txx9_plat_devs
;
1201 static int __init
serial_txx9_init(void)
1205 printk(KERN_INFO
"%s version %s\n", serial_name
, serial_version
);
1207 ret
= uart_register_driver(&serial_txx9_reg
);
1211 serial_txx9_plat_devs
= platform_device_alloc("serial_txx9", -1);
1212 if (!serial_txx9_plat_devs
) {
1214 goto unreg_uart_drv
;
1217 ret
= platform_device_add(serial_txx9_plat_devs
);
1221 serial_txx9_register_ports(&serial_txx9_reg
,
1222 &serial_txx9_plat_devs
->dev
);
1224 ret
= platform_driver_register(&serial_txx9_plat_driver
);
1228 #ifdef ENABLE_SERIAL_TXX9_PCI
1229 ret
= pci_register_driver(&serial_txx9_pci_driver
);
1235 platform_device_del(serial_txx9_plat_devs
);
1237 platform_device_put(serial_txx9_plat_devs
);
1239 uart_unregister_driver(&serial_txx9_reg
);
1244 static void __exit
serial_txx9_exit(void)
1248 #ifdef ENABLE_SERIAL_TXX9_PCI
1249 pci_unregister_driver(&serial_txx9_pci_driver
);
1251 platform_driver_unregister(&serial_txx9_plat_driver
);
1252 platform_device_unregister(serial_txx9_plat_devs
);
1253 for (i
= 0; i
< UART_NR
; i
++) {
1254 struct uart_txx9_port
*up
= &serial_txx9_ports
[i
];
1255 if (up
->port
.iobase
|| up
->port
.mapbase
)
1256 uart_remove_one_port(&serial_txx9_reg
, &up
->port
);
1259 uart_unregister_driver(&serial_txx9_reg
);
1262 module_init(serial_txx9_init
);
1263 module_exit(serial_txx9_exit
);
1265 MODULE_LICENSE("GPL");
1266 MODULE_DESCRIPTION("TX39/49 serial driver");
1268 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR
);