drivers/mmc/host/tmio_mmc.c

   1 /*
   2  *  linux/drivers/mmc/tmio_mmc.c
   3  *
   4  *  Copyright (C) 2004 Ian Molton
   5  *  Copyright (C) 2007 Ian Molton
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Driver for the MMC / SD / SDIO cell found in:
  12  *
  13  * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  14  *
  15  * This driver draws mainly on scattered spec sheets, Reverse engineering
  16  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
  17  * support). (Further 4 bit support from a later datasheet).
  18  *
  19  * TODO:
  20  *   Investigate using a workqueue for PIO transfers
  21  *   Eliminate FIXMEs
  22  *   SDIO support
  23  *   Better Power management
  24  *   Handle MMC errors better
  25  *   double buffer support
  26  *
  27  */
  28 #include <linux/module.h>
  29 #include <linux/irq.h>
  30 #include <linux/device.h>
  31 #include <linux/delay.h>
  32 #include <linux/mmc/host.h>
  33 #include <linux/mfd/core.h>
  34 #include <linux/mfd/tmio.h>
  35
  36 #include "tmio_mmc.h"
  37
  38 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
  39 {
  40         u32 clk = 0, clock;
  41
  42         if (new_clock) {
  43                 for (clock = host->mmc->f_min, clk = 0x80000080;
  44                         new_clock >= (clock<<1); clk >>= 1)
  45                         clock <<= 1;
  46                 clk |= 0x100;
  47         }
  48
  49         sd_config_write8(host, CNF_SD_CLK_MODE, clk >> 22);
  50         sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
  51 }
  52
  53 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
  54 {
  55         sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
  56         msleep(10);
  57         sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
  58                 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  59         msleep(10);
  60 }
  61
  62 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
  63 {
  64         sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
  65                 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  66         msleep(10);
  67         sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
  68         msleep(10);
  69 }
  70
  71 static void reset(struct tmio_mmc_host *host)
  72 {
  73         /* FIXME - should we set stop clock reg here */
  74         sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
  75         sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
  76         msleep(10);
  77         sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
  78         sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
  79         msleep(10);
  80 }
  81
  82 static void
  83 tmio_mmc_finish_request(struct tmio_mmc_host *host)
  84 {
  85         struct mmc_request *mrq = host->mrq;
  86
  87         host->mrq = NULL;
  88         host->cmd = NULL;
  89         host->data = NULL;
  90
  91         mmc_request_done(host->mmc, mrq);
  92 }
  93
  94 /* These are the bitmasks the tmio chip requires to implement the MMC response
  95  * types. Note that R1 and R6 are the same in this scheme. */
  96 #define APP_CMD        0x0040
  97 #define RESP_NONE      0x0300
  98 #define RESP_R1        0x0400
  99 #define RESP_R1B       0x0500
 100 #define RESP_R2        0x0600
 101 #define RESP_R3        0x0700
 102 #define DATA_PRESENT   0x0800
 103 #define TRANSFER_READ  0x1000
 104 #define TRANSFER_MULTI 0x2000
 105 #define SECURITY_CMD   0x4000
 106
 107 static int
 108 tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
 109 {
 110         struct mmc_data *data = host->data;
 111         int c = cmd->opcode;
 112
 113         /* Command 12 is handled by hardware */
 114         if (cmd->opcode == 12 && !cmd->arg) {
 115                 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
 116                 return 0;
 117         }
 118
 119         switch (mmc_resp_type(cmd)) {
 120         case MMC_RSP_NONE: c |= RESP_NONE; break;
 121         case MMC_RSP_R1:   c |= RESP_R1;   break;
 122         case MMC_RSP_R1B:  c |= RESP_R1B;  break;
 123         case MMC_RSP_R2:   c |= RESP_R2;   break;
 124         case MMC_RSP_R3:   c |= RESP_R3;   break;
 125         default:
 126                 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
 127                 return -EINVAL;
 128         }
 129
 130         host->cmd = cmd;
 131
 132 /* FIXME - this seems to be ok comented out but the spec suggest this bit should
 133  *         be set when issuing app commands.
 134  *      if(cmd->flags & MMC_FLAG_ACMD)
 135  *              c |= APP_CMD;
 136  */
 137         if (data) {
 138                 c |= DATA_PRESENT;
 139                 if (data->blocks > 1) {
 140                         sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
 141                         c |= TRANSFER_MULTI;
 142                 }
 143                 if (data->flags & MMC_DATA_READ)
 144                         c |= TRANSFER_READ;
 145         }
 146
 147         enable_mmc_irqs(host, TMIO_MASK_CMD);
 148
 149         /* Fire off the command */
 150         sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
 151         sd_ctrl_write16(host, CTL_SD_CMD, c);
 152
 153         return 0;
 154 }
 155
 156 /* This chip always returns (at least?) as much data as you ask for.
 157  * I'm unsure what happens if you ask for less than a block. This should be
 158  * looked into to ensure that a funny length read doesnt hose the controller.
 159  *
 160  */
 161 static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
 162 {
 163         struct mmc_data *data = host->data;
 164         void *sg_virt;
 165         unsigned short *buf;
 166         unsigned int count;
 167         unsigned long flags;
 168
 169         if (!data) {
 170                 pr_debug("Spurious PIO IRQ\n");
 171                 return;
 172         }
 173
 174         sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
 175         buf = (unsigned short *)(sg_virt + host->sg_off);
 176
 177         count = host->sg_ptr->length - host->sg_off;
 178         if (count > data->blksz)
 179                 count = data->blksz;
 180
 181         pr_debug("count: %08x offset: %08x flags %08x\n",
 182             count, host->sg_off, data->flags);
 183
 184         /* Transfer the data */
 185         if (data->flags & MMC_DATA_READ)
 186                 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
 187         else
 188                 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
 189
 190         host->sg_off += count;
 191
 192         tmio_mmc_kunmap_atomic(sg_virt, &flags);
 193
 194         if (host->sg_off == host->sg_ptr->length)
 195                 tmio_mmc_next_sg(host);
 196
 197         return;
 198 }
 199
 200 static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
 201 {
 202         struct mmc_data *data = host->data;
 203         struct mmc_command *stop;
 204
 205         host->data = NULL;
 206
 207         if (!data) {
 208                 pr_debug("Spurious data end IRQ\n");
 209                 return;
 210         }
 211         stop = data->stop;
 212
 213         /* FIXME - return correct transfer count on errors */
 214         if (!data->error)
 215                 data->bytes_xfered = data->blocks * data->blksz;
 216         else
 217                 data->bytes_xfered = 0;
 218
 219         pr_debug("Completed data request\n");
 220
 221         /*FIXME - other drivers allow an optional stop command of any given type
 222          *        which we dont do, as the chip can auto generate them.
 223          *        Perhaps we can be smarter about when to use auto CMD12 and
 224          *        only issue the auto request when we know this is the desired
 225          *        stop command, allowing fallback to the stop command the
 226          *        upper layers expect. For now, we do what works.
 227          */
 228
 229         if (data->flags & MMC_DATA_READ)
 230                 disable_mmc_irqs(host, TMIO_MASK_READOP);
 231         else
 232                 disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
 233
 234         if (stop) {
 235                 if (stop->opcode == 12 && !stop->arg)
 236                         sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
 237                 else
 238                         BUG();
 239         }
 240
 241         tmio_mmc_finish_request(host);
 242 }
 243
 244 static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
 245         unsigned int stat)
 246 {
 247         struct mmc_command *cmd = host->cmd;
 248         int i, addr;
 249
 250         if (!host->cmd) {
 251                 pr_debug("Spurious CMD irq\n");
 252                 return;
 253         }
 254
 255         host->cmd = NULL;
 256
 257         /* This controller is sicker than the PXA one. Not only do we need to
 258          * drop the top 8 bits of the first response word, we also need to
 259          * modify the order of the response for short response command types.
 260          */
 261
 262         for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
 263                 cmd->resp[i] = sd_ctrl_read32(host, addr);
 264
 265         if (cmd->flags &  MMC_RSP_136) {
 266                 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
 267                 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
 268                 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
 269                 cmd->resp[3] <<= 8;
 270         } else if (cmd->flags & MMC_RSP_R3) {
 271                 cmd->resp[0] = cmd->resp[3];
 272         }
 273
 274         if (stat & TMIO_STAT_CMDTIMEOUT)
 275                 cmd->error = -ETIMEDOUT;
 276         else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
 277                 cmd->error = -EILSEQ;
 278
 279         /* If there is data to handle we enable data IRQs here, and
 280          * we will ultimatley finish the request in the data_end handler.
 281          * If theres no data or we encountered an error, finish now.
 282          */
 283         if (host->data && !cmd->error) {
 284                 if (host->data->flags & MMC_DATA_READ)
 285                         enable_mmc_irqs(host, TMIO_MASK_READOP);
 286                 else
 287                         enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
 288         } else {
 289                 tmio_mmc_finish_request(host);
 290         }
 291
 292         return;
 293 }
 294
 295
 296 static irqreturn_t tmio_mmc_irq(int irq, void *devid)
 297 {
 298         struct tmio_mmc_host *host = devid;
 299         unsigned int ireg, irq_mask, status;
 300
 301         pr_debug("MMC IRQ begin\n");
 302
 303         status = sd_ctrl_read32(host, CTL_STATUS);
 304         irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
 305         ireg = status & TMIO_MASK_IRQ & ~irq_mask;
 306
 307         pr_debug_status(status);
 308         pr_debug_status(ireg);
 309
 310         if (!ireg) {
 311                 disable_mmc_irqs(host, status & ~irq_mask);
 312
 313                 pr_debug("tmio_mmc: Spurious irq, disabling! "
 314                         "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
 315                 pr_debug_status(status);
 316
 317                 goto out;
 318         }
 319
 320         while (ireg) {
 321                 /* Card insert / remove attempts */
 322                 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
 323                         ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
 324                                 TMIO_STAT_CARD_REMOVE);
 325                         mmc_detect_change(host->mmc, 0);
 326                 }
 327
 328                 /* CRC and other errors */
 329 /*              if (ireg & TMIO_STAT_ERR_IRQ)
 330  *                      handled |= tmio_error_irq(host, irq, stat);
 331  */
 332
 333                 /* Command completion */
 334                 if (ireg & TMIO_MASK_CMD) {
 335                         ack_mmc_irqs(host, TMIO_MASK_CMD);
 336                         tmio_mmc_cmd_irq(host, status);
 337                 }
 338
 339                 /* Data transfer */
 340                 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
 341                         ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
 342                         tmio_mmc_pio_irq(host);
 343                 }
 344
 345                 /* Data transfer completion */
 346                 if (ireg & TMIO_STAT_DATAEND) {
 347                         ack_mmc_irqs(host, TMIO_STAT_DATAEND);
 348                         tmio_mmc_data_irq(host);
 349                 }
 350
 351                 /* Check status - keep going until we've handled it all */
 352                 status = sd_ctrl_read32(host, CTL_STATUS);
 353                 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
 354                 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
 355
 356                 pr_debug("Status at end of loop: %08x\n", status);
 357                 pr_debug_status(status);
 358         }
 359         pr_debug("MMC IRQ end\n");
 360
 361 out:
 362         return IRQ_HANDLED;
 363 }
 364
 365 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
 366         struct mmc_data *data)
 367 {
 368         pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
 369             data->blksz, data->blocks);
 370
 371         /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
 372         if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
 373                 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
 374                         mmc_hostname(host->mmc), data->blksz);
 375                 return -EINVAL;
 376         }
 377
 378         tmio_mmc_init_sg(host, data);
 379         host->data = data;
 380
 381         /* Set transfer length / blocksize */
 382         sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
 383         sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
 384
 385         return 0;
 386 }
 387
 388 /* Process requests from the MMC layer */
 389 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 390 {
 391         struct tmio_mmc_host *host = mmc_priv(mmc);
 392         int ret;
 393
 394         if (host->mrq)
 395                 pr_debug("request not null\n");
 396
 397         host->mrq = mrq;
 398
 399         if (mrq->data) {
 400                 ret = tmio_mmc_start_data(host, mrq->data);
 401                 if (ret)
 402                         goto fail;
 403         }
 404
 405         ret = tmio_mmc_start_command(host, mrq->cmd);
 406
 407         if (!ret)
 408                 return;
 409
 410 fail:
 411         mrq->cmd->error = ret;
 412         mmc_request_done(mmc, mrq);
 413 }
 414
 415 /* Set MMC clock / power.
 416  * Note: This controller uses a simple divider scheme therefore it cannot
 417  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
 418  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
 419  * slowest setting.
 420  */
 421 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 422 {
 423         struct tmio_mmc_host *host = mmc_priv(mmc);
 424
 425         if (ios->clock)
 426                 tmio_mmc_set_clock(host, ios->clock);
 427
 428         /* Power sequence - OFF -> ON -> UP */
 429         switch (ios->power_mode) {
 430         case MMC_POWER_OFF: /* power down SD bus */
 431                 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
 432                 tmio_mmc_clk_stop(host);
 433                 break;
 434         case MMC_POWER_ON: /* power up SD bus */
 435
 436                 sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
 437                 break;
 438         case MMC_POWER_UP: /* start bus clock */
 439                 tmio_mmc_clk_start(host);
 440                 break;
 441         }
 442
 443         switch (ios->bus_width) {
 444         case MMC_BUS_WIDTH_1:
 445                 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
 446         break;
 447         case MMC_BUS_WIDTH_4:
 448                 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
 449         break;
 450         }
 451
 452         /* Let things settle. delay taken from winCE driver */
 453         udelay(140);
 454 }
 455
 456 static int tmio_mmc_get_ro(struct mmc_host *mmc)
 457 {
 458         struct tmio_mmc_host *host = mmc_priv(mmc);
 459
 460         return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
 461 }
 462
 463 static struct mmc_host_ops tmio_mmc_ops = {
 464         .request        = tmio_mmc_request,
 465         .set_ios        = tmio_mmc_set_ios,
 466         .get_ro         = tmio_mmc_get_ro,
 467 };
 468
 469 #ifdef CONFIG_PM
 470 static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
 471 {
 472         struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
 473         struct mmc_host *mmc = platform_get_drvdata(dev);
 474         int ret;
 475
 476         ret = mmc_suspend_host(mmc, state);
 477
 478         /* Tell MFD core it can disable us now.*/
 479         if (!ret && cell->disable)
 480                 cell->disable(dev);
 481
 482         return ret;
 483 }
 484
 485 static int tmio_mmc_resume(struct platform_device *dev)
 486 {
 487         struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
 488         struct mmc_host *mmc = platform_get_drvdata(dev);
 489         struct tmio_mmc_host *host = mmc_priv(mmc);
 490         int ret = 0;
 491
 492         /* Tell the MFD core we are ready to be enabled */
 493         if (cell->enable) {
 494                 ret = cell->enable(dev);
 495                 if (ret)
 496                         goto out;
 497         }
 498
 499         /* Enable the MMC/SD Control registers */
 500         sd_config_write16(host, CNF_CMD, SDCREN);
 501         sd_config_write32(host, CNF_CTL_BASE,
 502                 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
 503
 504         mmc_resume_host(mmc);
 505
 506 out:
 507         return ret;
 508 }
 509 #else
 510 #define tmio_mmc_suspend NULL
 511 #define tmio_mmc_resume NULL
 512 #endif
 513
 514 static int __devinit tmio_mmc_probe(struct platform_device *dev)
 515 {
 516         struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
 517         struct tmio_mmc_data *pdata;
 518         struct resource *res_ctl, *res_cnf;
 519         struct tmio_mmc_host *host;
 520         struct mmc_host *mmc;
 521         int ret = -EINVAL;
 522
 523         if (dev->num_resources != 3)
 524                 goto out;
 525
 526         res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
 527         res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
 528         if (!res_ctl || !res_cnf)
 529                 goto out;
 530
 531         pdata = cell->driver_data;
 532         if (!pdata || !pdata->hclk)
 533                 goto out;
 534
 535         ret = -ENOMEM;
 536
 537         mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
 538         if (!mmc)
 539                 goto out;
 540
 541         host = mmc_priv(mmc);
 542         host->mmc = mmc;
 543         platform_set_drvdata(dev, mmc);
 544
 545         /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
 546         host->bus_shift = resource_size(res_ctl) >> 10;
 547
 548         host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
 549         if (!host->ctl)
 550                 goto host_free;
 551
 552         host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
 553         if (!host->cnf)
 554                 goto unmap_ctl;
 555
 556         mmc->ops = &tmio_mmc_ops;
 557         mmc->caps = MMC_CAP_4_BIT_DATA;
 558         mmc->f_max = pdata->hclk;
 559         mmc->f_min = mmc->f_max / 512;
 560         mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
 561
 562         /* Tell the MFD core we are ready to be enabled */
 563         if (cell->enable) {
 564                 ret = cell->enable(dev);
 565                 if (ret)
 566                         goto unmap_cnf;
 567         }
 568
 569         /* Enable the MMC/SD Control registers */
 570         sd_config_write16(host, CNF_CMD, SDCREN);
 571         sd_config_write32(host, CNF_CTL_BASE,
 572                 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
 573
 574         /* Disable SD power during suspend */
 575         sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
 576
 577         /* The below is required but why? FIXME */
 578         sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
 579
 580         /* Power down SD bus*/
 581         sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
 582
 583         tmio_mmc_clk_stop(host);
 584         reset(host);
 585
 586         ret = platform_get_irq(dev, 0);
 587         if (ret >= 0)
 588                 host->irq = ret;
 589         else
 590                 goto unmap_cnf;
 591
 592         disable_mmc_irqs(host, TMIO_MASK_ALL);
 593
 594         ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
 595                 IRQF_TRIGGER_FALLING, "tmio-mmc", host);
 596         if (ret)
 597                 goto unmap_cnf;
 598
 599         mmc_add_host(mmc);
 600
 601         printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
 602                (unsigned long)host->ctl, host->irq);
 603
 604         /* Unmask the IRQs we want to know about */
 605         enable_mmc_irqs(host, TMIO_MASK_IRQ);
 606
 607         return 0;
 608
 609 unmap_cnf:
 610         iounmap(host->cnf);
 611 unmap_ctl:
 612         iounmap(host->ctl);
 613 host_free:
 614         mmc_free_host(mmc);
 615 out:
 616         return ret;
 617 }
 618
 619 static int __devexit tmio_mmc_remove(struct platform_device *dev)
 620 {
 621         struct mmc_host *mmc = platform_get_drvdata(dev);
 622
 623         platform_set_drvdata(dev, NULL);
 624
 625         if (mmc) {
 626                 struct tmio_mmc_host *host = mmc_priv(mmc);
 627                 mmc_remove_host(mmc);
 628                 free_irq(host->irq, host);
 629                 iounmap(host->ctl);
 630                 iounmap(host->cnf);
 631                 mmc_free_host(mmc);
 632         }
 633
 634         return 0;
 635 }
 636
 637 /* ------------------- device registration ----------------------- */
 638
 639 static struct platform_driver tmio_mmc_driver = {
 640         .driver = {
 641                 .name = "tmio-mmc",
 642                 .owner = THIS_MODULE,
 643         },
 644         .probe = tmio_mmc_probe,
 645         .remove = __devexit_p(tmio_mmc_remove),
 646         .suspend = tmio_mmc_suspend,
 647         .resume = tmio_mmc_resume,
 648 };
 649
 650
 651 static int __init tmio_mmc_init(void)
 652 {
 653         return platform_driver_register(&tmio_mmc_driver);
 654 }
 655
 656 static void __exit tmio_mmc_exit(void)
 657 {
 658         platform_driver_unregister(&tmio_mmc_driver);
 659 }
 660
 661 module_init(tmio_mmc_init);
 662 module_exit(tmio_mmc_exit);
 663
 664 MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
 665 MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
 666 MODULE_LICENSE("GPL v2");
 667 MODULE_ALIAS("platform:tmio-mmc");