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ext4: fix undefined behavior in ext4_fill_flex_info()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mmc / host / atmel-mci.c
blob8faa703516b5e3359762b2ae5f724d9c04667434
1 /*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
26
27 #include <linux/mmc/host.h>
28 #include <linux/atmel-mci.h>
29
30 #include <asm/io.h>
31 #include <asm/unaligned.h>
32
33 #include <mach/cpu.h>
34 #include <mach/board.h>
35
36 #include "atmel-mci-regs.h"
37
38 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
39 #define ATMCI_DMA_THRESHOLD 16
40
41 enum {
42 EVENT_CMD_COMPLETE = 0,
43 EVENT_XFER_COMPLETE,
44 EVENT_DATA_COMPLETE,
45 EVENT_DATA_ERROR,
46 };
47
48 enum atmel_mci_state {
49 STATE_IDLE = 0,
50 STATE_SENDING_CMD,
51 STATE_SENDING_DATA,
52 STATE_DATA_BUSY,
53 STATE_SENDING_STOP,
54 STATE_DATA_ERROR,
55 };
56
57 struct atmel_mci_dma {
58 #ifdef CONFIG_MMC_ATMELMCI_DMA
59 struct dma_chan *chan;
60 struct dma_async_tx_descriptor *data_desc;
61 #endif
62 };
63
64 /**
65 * struct atmel_mci - MMC controller state shared between all slots
66 * @lock: Spinlock protecting the queue and associated data.
67 * @regs: Pointer to MMIO registers.
68 * @sg: Scatterlist entry currently being processed by PIO code, if any.
69 * @pio_offset: Offset into the current scatterlist entry.
70 * @cur_slot: The slot which is currently using the controller.
71 * @mrq: The request currently being processed on @cur_slot,
72 * or NULL if the controller is idle.
73 * @cmd: The command currently being sent to the card, or NULL.
74 * @data: The data currently being transferred, or NULL if no data
75 * transfer is in progress.
76 * @dma: DMA client state.
77 * @data_chan: DMA channel being used for the current data transfer.
78 * @cmd_status: Snapshot of SR taken upon completion of the current
79 * command. Only valid when EVENT_CMD_COMPLETE is pending.
80 * @data_status: Snapshot of SR taken upon completion of the current
81 * data transfer. Only valid when EVENT_DATA_COMPLETE or
82 * EVENT_DATA_ERROR is pending.
83 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
84 * to be sent.
85 * @tasklet: Tasklet running the request state machine.
86 * @pending_events: Bitmask of events flagged by the interrupt handler
87 * to be processed by the tasklet.
88 * @completed_events: Bitmask of events which the state machine has
89 * processed.
90 * @state: Tasklet state.
91 * @queue: List of slots waiting for access to the controller.
92 * @need_clock_update: Update the clock rate before the next request.
93 * @need_reset: Reset controller before next request.
94 * @mode_reg: Value of the MR register.
95 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96 * rate and timeout calculations.
97 * @mapbase: Physical address of the MMIO registers.
98 * @mck: The peripheral bus clock hooked up to the MMC controller.
99 * @pdev: Platform device associated with the MMC controller.
100 * @slot: Slots sharing this MMC controller.
101 *
102 * Locking
103 * =======
104 *
105 * @lock is a softirq-safe spinlock protecting @queue as well as
106 * @cur_slot, @mrq and @state. These must always be updated
107 * at the same time while holding @lock.
108 *
109 * @lock also protects mode_reg and need_clock_update since these are
110 * used to synchronize mode register updates with the queue
111 * processing.
112 *
113 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114 * and must always be written at the same time as the slot is added to
115 * @queue.
116 *
117 * @pending_events and @completed_events are accessed using atomic bit
118 * operations, so they don't need any locking.
119 *
120 * None of the fields touched by the interrupt handler need any
121 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123 * interrupts must be disabled and @data_status updated with a
124 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125 * CMDRDY interupt must be disabled and @cmd_status updated with a
126 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127 * bytes_xfered field of @data must be written. This is ensured by
128 * using barriers.
129 */
130 struct atmel_mci {
131 spinlock_t lock;
132 void __iomem *regs;
133
134 struct scatterlist *sg;
135 unsigned int pio_offset;
136
137 struct atmel_mci_slot *cur_slot;
138 struct mmc_request *mrq;
139 struct mmc_command *cmd;
140 struct mmc_data *data;
141
142 struct atmel_mci_dma dma;
143 struct dma_chan *data_chan;
144
145 u32 cmd_status;
146 u32 data_status;
147 u32 stop_cmdr;
148
149 struct tasklet_struct tasklet;
150 unsigned long pending_events;
151 unsigned long completed_events;
152 enum atmel_mci_state state;
153 struct list_head queue;
154
155 bool need_clock_update;
156 bool need_reset;
157 u32 mode_reg;
158 unsigned long bus_hz;
159 unsigned long mapbase;
160 struct clk *mck;
161 struct platform_device *pdev;
162
163 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
164 };
165
166 /**
167 * struct atmel_mci_slot - MMC slot state
168 * @mmc: The mmc_host representing this slot.
169 * @host: The MMC controller this slot is using.
170 * @sdc_reg: Value of SDCR to be written before using this slot.
171 * @mrq: mmc_request currently being processed or waiting to be
172 * processed, or NULL when the slot is idle.
173 * @queue_node: List node for placing this node in the @queue list of
174 * &struct atmel_mci.
175 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176 * @flags: Random state bits associated with the slot.
177 * @detect_pin: GPIO pin used for card detection, or negative if not
178 * available.
179 * @wp_pin: GPIO pin used for card write protect sending, or negative
180 * if not available.
181 * @detect_is_active_high: The state of the detect pin when it is active.
182 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
183 */
184 struct atmel_mci_slot {
185 struct mmc_host *mmc;
186 struct atmel_mci *host;
187
188 u32 sdc_reg;
189
190 struct mmc_request *mrq;
191 struct list_head queue_node;
192
193 unsigned int clock;
194 unsigned long flags;
195 #define ATMCI_CARD_PRESENT 0
196 #define ATMCI_CARD_NEED_INIT 1
197 #define ATMCI_SHUTDOWN 2
198
199 int detect_pin;
200 int wp_pin;
201 bool detect_is_active_high;
202
203 struct timer_list detect_timer;
204 };
205
206 #define atmci_test_and_clear_pending(host, event) \
207 test_and_clear_bit(event, &host->pending_events)
208 #define atmci_set_completed(host, event) \
209 set_bit(event, &host->completed_events)
210 #define atmci_set_pending(host, event) \
211 set_bit(event, &host->pending_events)
212
213 /*
214 * Enable or disable features/registers based on
215 * whether the processor supports them
216 */
217 static bool mci_has_rwproof(void)
218 {
219 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
220 return false;
221 else
222 return true;
223 }
224
225 /*
226 * The debugfs stuff below is mostly optimized away when
227 * CONFIG_DEBUG_FS is not set.
228 */
229 static int atmci_req_show(struct seq_file *s, void *v)
230 {
231 struct atmel_mci_slot *slot = s->private;
232 struct mmc_request *mrq;
233 struct mmc_command *cmd;
234 struct mmc_command *stop;
235 struct mmc_data *data;
236
237 /* Make sure we get a consistent snapshot */
238 spin_lock_bh(&slot->host->lock);
239 mrq = slot->mrq;
240
241 if (mrq) {
242 cmd = mrq->cmd;
243 data = mrq->data;
244 stop = mrq->stop;
245
246 if (cmd)
247 seq_printf(s,
248 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
249 cmd->opcode, cmd->arg, cmd->flags,
250 cmd->resp[0], cmd->resp[1], cmd->resp[2],
251 cmd->resp[2], cmd->error);
252 if (data)
253 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
254 data->bytes_xfered, data->blocks,
255 data->blksz, data->flags, data->error);
256 if (stop)
257 seq_printf(s,
258 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
259 stop->opcode, stop->arg, stop->flags,
260 stop->resp[0], stop->resp[1], stop->resp[2],
261 stop->resp[2], stop->error);
262 }
263
264 spin_unlock_bh(&slot->host->lock);
265
266 return 0;
267 }
268
269 static int atmci_req_open(struct inode *inode, struct file *file)
270 {
271 return single_open(file, atmci_req_show, inode->i_private);
272 }
273
274 static const struct file_operations atmci_req_fops = {
275 .owner = THIS_MODULE,
276 .open = atmci_req_open,
277 .read = seq_read,
278 .llseek = seq_lseek,
279 .release = single_release,
280 };
281
282 static void atmci_show_status_reg(struct seq_file *s,
283 const char *regname, u32 value)
284 {
285 static const char *sr_bit[] = {
286 [0] = "CMDRDY",
287 [1] = "RXRDY",
288 [2] = "TXRDY",
289 [3] = "BLKE",
290 [4] = "DTIP",
291 [5] = "NOTBUSY",
292 [6] = "ENDRX",
293 [7] = "ENDTX",
294 [8] = "SDIOIRQA",
295 [9] = "SDIOIRQB",
296 [12] = "SDIOWAIT",
297 [14] = "RXBUFF",
298 [15] = "TXBUFE",
299 [16] = "RINDE",
300 [17] = "RDIRE",
301 [18] = "RCRCE",
302 [19] = "RENDE",
303 [20] = "RTOE",
304 [21] = "DCRCE",
305 [22] = "DTOE",
306 [23] = "CSTOE",
307 [24] = "BLKOVRE",
308 [25] = "DMADONE",
309 [26] = "FIFOEMPTY",
310 [27] = "XFRDONE",
311 [30] = "OVRE",
312 [31] = "UNRE",
313 };
314 unsigned int i;
315
316 seq_printf(s, "%s:\t0x%08x", regname, value);
317 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
318 if (value & (1 << i)) {
319 if (sr_bit[i])
320 seq_printf(s, " %s", sr_bit[i]);
321 else
322 seq_puts(s, " UNKNOWN");
323 }
324 }
325 seq_putc(s, '\n');
326 }
327
328 static int atmci_regs_show(struct seq_file *s, void *v)
329 {
330 struct atmel_mci *host = s->private;
331 u32 *buf;
332
333 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
334 if (!buf)
335 return -ENOMEM;
336
337 /*
338 * Grab a more or less consistent snapshot. Note that we're
339 * not disabling interrupts, so IMR and SR may not be
340 * consistent.
341 */
342 spin_lock_bh(&host->lock);
343 clk_enable(host->mck);
344 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
345 clk_disable(host->mck);
346 spin_unlock_bh(&host->lock);
347
348 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
349 buf[MCI_MR / 4],
350 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
351 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
352 buf[MCI_MR / 4] & 0xff);
353 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
354 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
355 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
356 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
357 buf[MCI_BLKR / 4],
358 buf[MCI_BLKR / 4] & 0xffff,
359 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
360
361 /* Don't read RSPR and RDR; it will consume the data there */
362
363 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
364 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
365
366 kfree(buf);
367
368 return 0;
369 }
370
371 static int atmci_regs_open(struct inode *inode, struct file *file)
372 {
373 return single_open(file, atmci_regs_show, inode->i_private);
374 }
375
376 static const struct file_operations atmci_regs_fops = {
377 .owner = THIS_MODULE,
378 .open = atmci_regs_open,
379 .read = seq_read,
380 .llseek = seq_lseek,
381 .release = single_release,
382 };
383
384 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
385 {
386 struct mmc_host *mmc = slot->mmc;
387 struct atmel_mci *host = slot->host;
388 struct dentry *root;
389 struct dentry *node;
390
391 root = mmc->debugfs_root;
392 if (!root)
393 return;
394
395 node = debugfs_create_file("regs", S_IRUSR, root, host,
396 &atmci_regs_fops);
397 if (IS_ERR(node))
398 return;
399 if (!node)
400 goto err;
401
402 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
403 if (!node)
404 goto err;
405
406 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
407 if (!node)
408 goto err;
409
410 node = debugfs_create_x32("pending_events", S_IRUSR, root,
411 (u32 *)&host->pending_events);
412 if (!node)
413 goto err;
414
415 node = debugfs_create_x32("completed_events", S_IRUSR, root,
416 (u32 *)&host->completed_events);
417 if (!node)
418 goto err;
419
420 return;
421
422 err:
423 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
424 }
425
426 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
427 unsigned int ns)
428 {
429 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
430 }
431
432 static void atmci_set_timeout(struct atmel_mci *host,
433 struct atmel_mci_slot *slot, struct mmc_data *data)
434 {
435 static unsigned dtomul_to_shift[] = {
436 0, 4, 7, 8, 10, 12, 16, 20
437 };
438 unsigned timeout;
439 unsigned dtocyc;
440 unsigned dtomul;
441
442 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
443
444 for (dtomul = 0; dtomul < 8; dtomul++) {
445 unsigned shift = dtomul_to_shift[dtomul];
446 dtocyc = (timeout + (1 << shift) - 1) >> shift;
447 if (dtocyc < 15)
448 break;
449 }
450
451 if (dtomul >= 8) {
452 dtomul = 7;
453 dtocyc = 15;
454 }
455
456 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
457 dtocyc << dtomul_to_shift[dtomul]);
458 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
459 }
460
461 /*
462 * Return mask with command flags to be enabled for this command.
463 */
464 static u32 atmci_prepare_command(struct mmc_host *mmc,
465 struct mmc_command *cmd)
466 {
467 struct mmc_data *data;
468 u32 cmdr;
469
470 cmd->error = -EINPROGRESS;
471
472 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
473
474 if (cmd->flags & MMC_RSP_PRESENT) {
475 if (cmd->flags & MMC_RSP_136)
476 cmdr |= MCI_CMDR_RSPTYP_136BIT;
477 else
478 cmdr |= MCI_CMDR_RSPTYP_48BIT;
479 }
480
481 /*
482 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
483 * it's too difficult to determine whether this is an ACMD or
484 * not. Better make it 64.
485 */
486 cmdr |= MCI_CMDR_MAXLAT_64CYC;
487
488 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
489 cmdr |= MCI_CMDR_OPDCMD;
490
491 data = cmd->data;
492 if (data) {
493 cmdr |= MCI_CMDR_START_XFER;
494 if (data->flags & MMC_DATA_STREAM)
495 cmdr |= MCI_CMDR_STREAM;
496 else if (data->blocks > 1)
497 cmdr |= MCI_CMDR_MULTI_BLOCK;
498 else
499 cmdr |= MCI_CMDR_BLOCK;
500
501 if (data->flags & MMC_DATA_READ)
502 cmdr |= MCI_CMDR_TRDIR_READ;
503 }
504
505 return cmdr;
506 }
507
508 static void atmci_start_command(struct atmel_mci *host,
509 struct mmc_command *cmd, u32 cmd_flags)
510 {
511 WARN_ON(host->cmd);
512 host->cmd = cmd;
513
514 dev_vdbg(&host->pdev->dev,
515 "start command: ARGR=0x%08x CMDR=0x%08x\n",
516 cmd->arg, cmd_flags);
517
518 mci_writel(host, ARGR, cmd->arg);
519 mci_writel(host, CMDR, cmd_flags);
520 }
521
522 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
523 {
524 atmci_start_command(host, data->stop, host->stop_cmdr);
525 mci_writel(host, IER, MCI_CMDRDY);
526 }
527
528 #ifdef CONFIG_MMC_ATMELMCI_DMA
529 static void atmci_dma_cleanup(struct atmel_mci *host)
530 {
531 struct mmc_data *data = host->data;
532
533 if (data)
534 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
535 ((data->flags & MMC_DATA_WRITE)
536 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
537 }
538
539 static void atmci_stop_dma(struct atmel_mci *host)
540 {
541 struct dma_chan *chan = host->data_chan;
542
543 if (chan) {
544 chan->device->device_terminate_all(chan);
545 atmci_dma_cleanup(host);
546 } else {
547 /* Data transfer was stopped by the interrupt handler */
548 atmci_set_pending(host, EVENT_XFER_COMPLETE);
549 mci_writel(host, IER, MCI_NOTBUSY);
550 }
551 }
552
553 /* This function is called by the DMA driver from tasklet context. */
554 static void atmci_dma_complete(void *arg)
555 {
556 struct atmel_mci *host = arg;
557 struct mmc_data *data = host->data;
558
559 dev_vdbg(&host->pdev->dev, "DMA complete\n");
560
561 atmci_dma_cleanup(host);
562
563 /*
564 * If the card was removed, data will be NULL. No point trying
565 * to send the stop command or waiting for NBUSY in this case.
566 */
567 if (data) {
568 atmci_set_pending(host, EVENT_XFER_COMPLETE);
569 tasklet_schedule(&host->tasklet);
570
571 /*
572 * Regardless of what the documentation says, we have
573 * to wait for NOTBUSY even after block read
574 * operations.
575 *
576 * When the DMA transfer is complete, the controller
577 * may still be reading the CRC from the card, i.e.
578 * the data transfer is still in progress and we
579 * haven't seen all the potential error bits yet.
580 *
581 * The interrupt handler will schedule a different
582 * tasklet to finish things up when the data transfer
583 * is completely done.
584 *
585 * We may not complete the mmc request here anyway
586 * because the mmc layer may call back and cause us to
587 * violate the "don't submit new operations from the
588 * completion callback" rule of the dma engine
589 * framework.
590 */
591 mci_writel(host, IER, MCI_NOTBUSY);
592 }
593 }
594
595 static int
596 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
597 {
598 struct dma_chan *chan;
599 struct dma_async_tx_descriptor *desc;
600 struct scatterlist *sg;
601 unsigned int i;
602 enum dma_data_direction direction;
603 unsigned int sglen;
604
605 /*
606 * We don't do DMA on "complex" transfers, i.e. with
607 * non-word-aligned buffers or lengths. Also, we don't bother
608 * with all the DMA setup overhead for short transfers.
609 */
610 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
611 return -EINVAL;
612 if (data->blksz & 3)
613 return -EINVAL;
614
615 for_each_sg(data->sg, sg, data->sg_len, i) {
616 if (sg->offset & 3 || sg->length & 3)
617 return -EINVAL;
618 }
619
620 /* If we don't have a channel, we can't do DMA */
621 chan = host->dma.chan;
622 if (chan)
623 host->data_chan = chan;
624
625 if (!chan)
626 return -ENODEV;
627
628 if (data->flags & MMC_DATA_READ)
629 direction = DMA_FROM_DEVICE;
630 else
631 direction = DMA_TO_DEVICE;
632
633 sglen = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, direction);
634 if (sglen != data->sg_len)
635 goto unmap_exit;
636 desc = chan->device->device_prep_slave_sg(chan,
637 data->sg, data->sg_len, direction,
638 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
639 if (!desc)
640 goto unmap_exit;
641
642 host->dma.data_desc = desc;
643 desc->callback = atmci_dma_complete;
644 desc->callback_param = host;
645 desc->tx_submit(desc);
646
647 /* Go! */
648 chan->device->device_issue_pending(chan);
649
650 return 0;
651 unmap_exit:
652 dma_unmap_sg(&host->pdev->dev, data->sg, sglen, direction);
653 return -ENOMEM;
654 }
655
656 #else /* CONFIG_MMC_ATMELMCI_DMA */
657
658 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
659 {
660 return -ENOSYS;
661 }
662
663 static void atmci_stop_dma(struct atmel_mci *host)
664 {
665 /* Data transfer was stopped by the interrupt handler */
666 atmci_set_pending(host, EVENT_XFER_COMPLETE);
667 mci_writel(host, IER, MCI_NOTBUSY);
668 }
669
670 #endif /* CONFIG_MMC_ATMELMCI_DMA */
671
672 /*
673 * Returns a mask of interrupt flags to be enabled after the whole
674 * request has been prepared.
675 */
676 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
677 {
678 u32 iflags;
679
680 data->error = -EINPROGRESS;
681
682 WARN_ON(host->data);
683 host->sg = NULL;
684 host->data = data;
685
686 iflags = ATMCI_DATA_ERROR_FLAGS;
687 if (atmci_submit_data_dma(host, data)) {
688 host->data_chan = NULL;
689
690 /*
691 * Errata: MMC data write operation with less than 12
692 * bytes is impossible.
693 *
694 * Errata: MCI Transmit Data Register (TDR) FIFO
695 * corruption when length is not multiple of 4.
696 */
697 if (data->blocks * data->blksz < 12
698 || (data->blocks * data->blksz) & 3)
699 host->need_reset = true;
700
701 host->sg = data->sg;
702 host->pio_offset = 0;
703 if (data->flags & MMC_DATA_READ)
704 iflags |= MCI_RXRDY;
705 else
706 iflags |= MCI_TXRDY;
707 }
708
709 return iflags;
710 }
711
712 static void atmci_start_request(struct atmel_mci *host,
713 struct atmel_mci_slot *slot)
714 {
715 struct mmc_request *mrq;
716 struct mmc_command *cmd;
717 struct mmc_data *data;
718 u32 iflags;
719 u32 cmdflags;
720
721 mrq = slot->mrq;
722 host->cur_slot = slot;
723 host->mrq = mrq;
724
725 host->pending_events = 0;
726 host->completed_events = 0;
727 host->data_status = 0;
728
729 if (host->need_reset) {
730 mci_writel(host, CR, MCI_CR_SWRST);
731 mci_writel(host, CR, MCI_CR_MCIEN);
732 mci_writel(host, MR, host->mode_reg);
733 host->need_reset = false;
734 }
735 mci_writel(host, SDCR, slot->sdc_reg);
736
737 iflags = mci_readl(host, IMR);
738 if (iflags)
739 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
740 iflags);
741
742 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
743 /* Send init sequence (74 clock cycles) */
744 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
745 while (!(mci_readl(host, SR) & MCI_CMDRDY))
746 cpu_relax();
747 }
748 data = mrq->data;
749 if (data) {
750 atmci_set_timeout(host, slot, data);
751
752 /* Must set block count/size before sending command */
753 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
754 | MCI_BLKLEN(data->blksz));
755 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
756 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
757 }
758
759 iflags = MCI_CMDRDY;
760 cmd = mrq->cmd;
761 cmdflags = atmci_prepare_command(slot->mmc, cmd);
762 atmci_start_command(host, cmd, cmdflags);
763
764 if (data)
765 iflags |= atmci_submit_data(host, data);
766
767 if (mrq->stop) {
768 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
769 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
770 if (!(data->flags & MMC_DATA_WRITE))
771 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
772 if (data->flags & MMC_DATA_STREAM)
773 host->stop_cmdr |= MCI_CMDR_STREAM;
774 else
775 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
776 }
777
778 /*
779 * We could have enabled interrupts earlier, but I suspect
780 * that would open up a nice can of interesting race
781 * conditions (e.g. command and data complete, but stop not
782 * prepared yet.)
783 */
784 mci_writel(host, IER, iflags);
785 }
786
787 static void atmci_queue_request(struct atmel_mci *host,
788 struct atmel_mci_slot *slot, struct mmc_request *mrq)
789 {
790 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
791 host->state);
792
793 spin_lock_bh(&host->lock);
794 slot->mrq = mrq;
795 if (host->state == STATE_IDLE) {
796 host->state = STATE_SENDING_CMD;
797 atmci_start_request(host, slot);
798 } else {
799 list_add_tail(&slot->queue_node, &host->queue);
800 }
801 spin_unlock_bh(&host->lock);
802 }
803
804 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
805 {
806 struct atmel_mci_slot *slot = mmc_priv(mmc);
807 struct atmel_mci *host = slot->host;
808 struct mmc_data *data;
809
810 WARN_ON(slot->mrq);
811
812 /*
813 * We may "know" the card is gone even though there's still an
814 * electrical connection. If so, we really need to communicate
815 * this to the MMC core since there won't be any more
816 * interrupts as the card is completely removed. Otherwise,
817 * the MMC core might believe the card is still there even
818 * though the card was just removed very slowly.
819 */
820 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
821 mrq->cmd->error = -ENOMEDIUM;
822 mmc_request_done(mmc, mrq);
823 return;
824 }
825
826 /* We don't support multiple blocks of weird lengths. */
827 data = mrq->data;
828 if (data && data->blocks > 1 && data->blksz & 3) {
829 mrq->cmd->error = -EINVAL;
830 mmc_request_done(mmc, mrq);
831 }
832
833 atmci_queue_request(host, slot, mrq);
834 }
835
836 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
837 {
838 struct atmel_mci_slot *slot = mmc_priv(mmc);
839 struct atmel_mci *host = slot->host;
840 unsigned int i;
841
842 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
843 switch (ios->bus_width) {
844 case MMC_BUS_WIDTH_1:
845 slot->sdc_reg |= MCI_SDCBUS_1BIT;
846 break;
847 case MMC_BUS_WIDTH_4:
848 slot->sdc_reg |= MCI_SDCBUS_4BIT;
849 break;
850 }
851
852 if (ios->clock) {
853 unsigned int clock_min = ~0U;
854 u32 clkdiv;
855
856 spin_lock_bh(&host->lock);
857 if (!host->mode_reg) {
858 clk_enable(host->mck);
859 mci_writel(host, CR, MCI_CR_SWRST);
860 mci_writel(host, CR, MCI_CR_MCIEN);
861 }
862
863 /*
864 * Use mirror of ios->clock to prevent race with mmc
865 * core ios update when finding the minimum.
866 */
867 slot->clock = ios->clock;
868 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
869 if (host->slot[i] && host->slot[i]->clock
870 && host->slot[i]->clock < clock_min)
871 clock_min = host->slot[i]->clock;
872 }
873
874 /* Calculate clock divider */
875 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
876 if (clkdiv > 255) {
877 dev_warn(&mmc->class_dev,
878 "clock %u too slow; using %lu\n",
879 clock_min, host->bus_hz / (2 * 256));
880 clkdiv = 255;
881 }
882
883 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
884
885 /*
886 * WRPROOF and RDPROOF prevent overruns/underruns by
887 * stopping the clock when the FIFO is full/empty.
888 * This state is not expected to last for long.
889 */
890 if (mci_has_rwproof())
891 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
892
893 if (list_empty(&host->queue))
894 mci_writel(host, MR, host->mode_reg);
895 else
896 host->need_clock_update = true;
897
898 spin_unlock_bh(&host->lock);
899 } else {
900 bool any_slot_active = false;
901
902 spin_lock_bh(&host->lock);
903 slot->clock = 0;
904 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
905 if (host->slot[i] && host->slot[i]->clock) {
906 any_slot_active = true;
907 break;
908 }
909 }
910 if (!any_slot_active) {
911 mci_writel(host, CR, MCI_CR_MCIDIS);
912 if (host->mode_reg) {
913 mci_readl(host, MR);
914 clk_disable(host->mck);
915 }
916 host->mode_reg = 0;
917 }
918 spin_unlock_bh(&host->lock);
919 }
920
921 switch (ios->power_mode) {
922 case MMC_POWER_UP:
923 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
924 break;
925 default:
926 /*
927 * TODO: None of the currently available AVR32-based
928 * boards allow MMC power to be turned off. Implement
929 * power control when this can be tested properly.
930 *
931 * We also need to hook this into the clock management
932 * somehow so that newly inserted cards aren't
933 * subjected to a fast clock before we have a chance
934 * to figure out what the maximum rate is. Currently,
935 * there's no way to avoid this, and there never will
936 * be for boards that don't support power control.
937 */
938 break;
939 }
940 }
941
942 static int atmci_get_ro(struct mmc_host *mmc)
943 {
944 int read_only = -ENOSYS;
945 struct atmel_mci_slot *slot = mmc_priv(mmc);
946
947 if (gpio_is_valid(slot->wp_pin)) {
948 read_only = gpio_get_value(slot->wp_pin);
949 dev_dbg(&mmc->class_dev, "card is %s\n",
950 read_only ? "read-only" : "read-write");
951 }
952
953 return read_only;
954 }
955
956 static int atmci_get_cd(struct mmc_host *mmc)
957 {
958 int present = -ENOSYS;
959 struct atmel_mci_slot *slot = mmc_priv(mmc);
960
961 if (gpio_is_valid(slot->detect_pin)) {
962 present = !(gpio_get_value(slot->detect_pin) ^
963 slot->detect_is_active_high);
964 dev_dbg(&mmc->class_dev, "card is %spresent\n",
965 present ? "" : "not ");
966 }
967
968 return present;
969 }
970
971 static const struct mmc_host_ops atmci_ops = {
972 .request = atmci_request,
973 .set_ios = atmci_set_ios,
974 .get_ro = atmci_get_ro,
975 .get_cd = atmci_get_cd,
976 };
977
978 /* Called with host->lock held */
979 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
980 __releases(&host->lock)
981 __acquires(&host->lock)
982 {
983 struct atmel_mci_slot *slot = NULL;
984 struct mmc_host *prev_mmc = host->cur_slot->mmc;
985
986 WARN_ON(host->cmd || host->data);
987
988 /*
989 * Update the MMC clock rate if necessary. This may be
990 * necessary if set_ios() is called when a different slot is
991 * busy transfering data.
992 */
993 if (host->need_clock_update)
994 mci_writel(host, MR, host->mode_reg);
995
996 host->cur_slot->mrq = NULL;
997 host->mrq = NULL;
998 if (!list_empty(&host->queue)) {
999 slot = list_entry(host->queue.next,
1000 struct atmel_mci_slot, queue_node);
1001 list_del(&slot->queue_node);
1002 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1003 mmc_hostname(slot->mmc));
1004 host->state = STATE_SENDING_CMD;
1005 atmci_start_request(host, slot);
1006 } else {
1007 dev_vdbg(&host->pdev->dev, "list empty\n");
1008 host->state = STATE_IDLE;
1009 }
1010
1011 spin_unlock(&host->lock);
1012 mmc_request_done(prev_mmc, mrq);
1013 spin_lock(&host->lock);
1014 }
1015
1016 static void atmci_command_complete(struct atmel_mci *host,
1017 struct mmc_command *cmd)
1018 {
1019 u32 status = host->cmd_status;
1020
1021 /* Read the response from the card (up to 16 bytes) */
1022 cmd->resp[0] = mci_readl(host, RSPR);
1023 cmd->resp[1] = mci_readl(host, RSPR);
1024 cmd->resp[2] = mci_readl(host, RSPR);
1025 cmd->resp[3] = mci_readl(host, RSPR);
1026
1027 if (status & MCI_RTOE)
1028 cmd->error = -ETIMEDOUT;
1029 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1030 cmd->error = -EILSEQ;
1031 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1032 cmd->error = -EIO;
1033 else
1034 cmd->error = 0;
1035
1036 if (cmd->error) {
1037 dev_dbg(&host->pdev->dev,
1038 "command error: status=0x%08x\n", status);
1039
1040 if (cmd->data) {
1041 atmci_stop_dma(host);
1042 host->data = NULL;
1043 mci_writel(host, IDR, MCI_NOTBUSY
1044 | MCI_TXRDY | MCI_RXRDY
1045 | ATMCI_DATA_ERROR_FLAGS);
1046 }
1047 }
1048 }
1049
1050 static void atmci_detect_change(unsigned long data)
1051 {
1052 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1053 bool present;
1054 bool present_old;
1055
1056 /*
1057 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1058 * freeing the interrupt. We must not re-enable the interrupt
1059 * if it has been freed, and if we're shutting down, it
1060 * doesn't really matter whether the card is present or not.
1061 */
1062 smp_rmb();
1063 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1064 return;
1065
1066 enable_irq(gpio_to_irq(slot->detect_pin));
1067 present = !(gpio_get_value(slot->detect_pin) ^
1068 slot->detect_is_active_high);
1069 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1070
1071 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1072 present, present_old);
1073
1074 if (present != present_old) {
1075 struct atmel_mci *host = slot->host;
1076 struct mmc_request *mrq;
1077
1078 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1079 present ? "inserted" : "removed");
1080
1081 spin_lock(&host->lock);
1082
1083 if (!present)
1084 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1085 else
1086 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1087
1088 /* Clean up queue if present */
1089 mrq = slot->mrq;
1090 if (mrq) {
1091 if (mrq == host->mrq) {
1092 /*
1093 * Reset controller to terminate any ongoing
1094 * commands or data transfers.
1095 */
1096 mci_writel(host, CR, MCI_CR_SWRST);
1097 mci_writel(host, CR, MCI_CR_MCIEN);
1098 mci_writel(host, MR, host->mode_reg);
1099
1100 host->data = NULL;
1101 host->cmd = NULL;
1102
1103 switch (host->state) {
1104 case STATE_IDLE:
1105 break;
1106 case STATE_SENDING_CMD:
1107 mrq->cmd->error = -ENOMEDIUM;
1108 if (!mrq->data)
1109 break;
1110 /* fall through */
1111 case STATE_SENDING_DATA:
1112 mrq->data->error = -ENOMEDIUM;
1113 atmci_stop_dma(host);
1114 break;
1115 case STATE_DATA_BUSY:
1116 case STATE_DATA_ERROR:
1117 if (mrq->data->error == -EINPROGRESS)
1118 mrq->data->error = -ENOMEDIUM;
1119 if (!mrq->stop)
1120 break;
1121 /* fall through */
1122 case STATE_SENDING_STOP:
1123 mrq->stop->error = -ENOMEDIUM;
1124 break;
1125 }
1126
1127 atmci_request_end(host, mrq);
1128 } else {
1129 list_del(&slot->queue_node);
1130 mrq->cmd->error = -ENOMEDIUM;
1131 if (mrq->data)
1132 mrq->data->error = -ENOMEDIUM;
1133 if (mrq->stop)
1134 mrq->stop->error = -ENOMEDIUM;
1135
1136 spin_unlock(&host->lock);
1137 mmc_request_done(slot->mmc, mrq);
1138 spin_lock(&host->lock);
1139 }
1140 }
1141 spin_unlock(&host->lock);
1142
1143 mmc_detect_change(slot->mmc, 0);
1144 }
1145 }
1146
1147 static void atmci_tasklet_func(unsigned long priv)
1148 {
1149 struct atmel_mci *host = (struct atmel_mci *)priv;
1150 struct mmc_request *mrq = host->mrq;
1151 struct mmc_data *data = host->data;
1152 struct mmc_command *cmd = host->cmd;
1153 enum atmel_mci_state state = host->state;
1154 enum atmel_mci_state prev_state;
1155 u32 status;
1156
1157 spin_lock(&host->lock);
1158
1159 state = host->state;
1160
1161 dev_vdbg(&host->pdev->dev,
1162 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1163 state, host->pending_events, host->completed_events,
1164 mci_readl(host, IMR));
1165
1166 do {
1167 prev_state = state;
1168
1169 switch (state) {
1170 case STATE_IDLE:
1171 break;
1172
1173 case STATE_SENDING_CMD:
1174 if (!atmci_test_and_clear_pending(host,
1175 EVENT_CMD_COMPLETE))
1176 break;
1177
1178 host->cmd = NULL;
1179 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1180 atmci_command_complete(host, mrq->cmd);
1181 if (!mrq->data || cmd->error) {
1182 atmci_request_end(host, host->mrq);
1183 goto unlock;
1184 }
1185
1186 prev_state = state = STATE_SENDING_DATA;
1187 /* fall through */
1188
1189 case STATE_SENDING_DATA:
1190 if (atmci_test_and_clear_pending(host,
1191 EVENT_DATA_ERROR)) {
1192 atmci_stop_dma(host);
1193 if (data->stop)
1194 send_stop_cmd(host, data);
1195 state = STATE_DATA_ERROR;
1196 break;
1197 }
1198
1199 if (!atmci_test_and_clear_pending(host,
1200 EVENT_XFER_COMPLETE))
1201 break;
1202
1203 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1204 prev_state = state = STATE_DATA_BUSY;
1205 /* fall through */
1206
1207 case STATE_DATA_BUSY:
1208 if (!atmci_test_and_clear_pending(host,
1209 EVENT_DATA_COMPLETE))
1210 break;
1211
1212 host->data = NULL;
1213 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1214 status = host->data_status;
1215 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1216 if (status & MCI_DTOE) {
1217 dev_dbg(&host->pdev->dev,
1218 "data timeout error\n");
1219 data->error = -ETIMEDOUT;
1220 } else if (status & MCI_DCRCE) {
1221 dev_dbg(&host->pdev->dev,
1222 "data CRC error\n");
1223 data->error = -EILSEQ;
1224 } else {
1225 dev_dbg(&host->pdev->dev,
1226 "data FIFO error (status=%08x)\n",
1227 status);
1228 data->error = -EIO;
1229 }
1230 } else {
1231 data->bytes_xfered = data->blocks * data->blksz;
1232 data->error = 0;
1233 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
1234 }
1235
1236 if (!data->stop) {
1237 atmci_request_end(host, host->mrq);
1238 goto unlock;
1239 }
1240
1241 prev_state = state = STATE_SENDING_STOP;
1242 if (!data->error)
1243 send_stop_cmd(host, data);
1244 /* fall through */
1245
1246 case STATE_SENDING_STOP:
1247 if (!atmci_test_and_clear_pending(host,
1248 EVENT_CMD_COMPLETE))
1249 break;
1250
1251 host->cmd = NULL;
1252 atmci_command_complete(host, mrq->stop);
1253 atmci_request_end(host, host->mrq);
1254 goto unlock;
1255
1256 case STATE_DATA_ERROR:
1257 if (!atmci_test_and_clear_pending(host,
1258 EVENT_XFER_COMPLETE))
1259 break;
1260
1261 state = STATE_DATA_BUSY;
1262 break;
1263 }
1264 } while (state != prev_state);
1265
1266 host->state = state;
1267
1268 unlock:
1269 spin_unlock(&host->lock);
1270 }
1271
1272 static void atmci_read_data_pio(struct atmel_mci *host)
1273 {
1274 struct scatterlist *sg = host->sg;
1275 void *buf = sg_virt(sg);
1276 unsigned int offset = host->pio_offset;
1277 struct mmc_data *data = host->data;
1278 u32 value;
1279 u32 status;
1280 unsigned int nbytes = 0;
1281
1282 do {
1283 value = mci_readl(host, RDR);
1284 if (likely(offset + 4 <= sg->length)) {
1285 put_unaligned(value, (u32 *)(buf + offset));
1286
1287 offset += 4;
1288 nbytes += 4;
1289
1290 if (offset == sg->length) {
1291 flush_dcache_page(sg_page(sg));
1292 host->sg = sg = sg_next(sg);
1293 if (!sg)
1294 goto done;
1295
1296 offset = 0;
1297 buf = sg_virt(sg);
1298 }
1299 } else {
1300 unsigned int remaining = sg->length - offset;
1301 memcpy(buf + offset, &value, remaining);
1302 nbytes += remaining;
1303
1304 flush_dcache_page(sg_page(sg));
1305 host->sg = sg = sg_next(sg);
1306 if (!sg)
1307 goto done;
1308
1309 offset = 4 - remaining;
1310 buf = sg_virt(sg);
1311 memcpy(buf, (u8 *)&value + remaining, offset);
1312 nbytes += offset;
1313 }
1314
1315 status = mci_readl(host, SR);
1316 if (status & ATMCI_DATA_ERROR_FLAGS) {
1317 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1318 | ATMCI_DATA_ERROR_FLAGS));
1319 host->data_status = status;
1320 data->bytes_xfered += nbytes;
1321 smp_wmb();
1322 atmci_set_pending(host, EVENT_DATA_ERROR);
1323 tasklet_schedule(&host->tasklet);
1324 return;
1325 }
1326 } while (status & MCI_RXRDY);
1327
1328 host->pio_offset = offset;
1329 data->bytes_xfered += nbytes;
1330
1331 return;
1332
1333 done:
1334 mci_writel(host, IDR, MCI_RXRDY);
1335 mci_writel(host, IER, MCI_NOTBUSY);
1336 data->bytes_xfered += nbytes;
1337 smp_wmb();
1338 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1339 }
1340
1341 static void atmci_write_data_pio(struct atmel_mci *host)
1342 {
1343 struct scatterlist *sg = host->sg;
1344 void *buf = sg_virt(sg);
1345 unsigned int offset = host->pio_offset;
1346 struct mmc_data *data = host->data;
1347 u32 value;
1348 u32 status;
1349 unsigned int nbytes = 0;
1350
1351 do {
1352 if (likely(offset + 4 <= sg->length)) {
1353 value = get_unaligned((u32 *)(buf + offset));
1354 mci_writel(host, TDR, value);
1355
1356 offset += 4;
1357 nbytes += 4;
1358 if (offset == sg->length) {
1359 host->sg = sg = sg_next(sg);
1360 if (!sg)
1361 goto done;
1362
1363 offset = 0;
1364 buf = sg_virt(sg);
1365 }
1366 } else {
1367 unsigned int remaining = sg->length - offset;
1368
1369 value = 0;
1370 memcpy(&value, buf + offset, remaining);
1371 nbytes += remaining;
1372
1373 host->sg = sg = sg_next(sg);
1374 if (!sg) {
1375 mci_writel(host, TDR, value);
1376 goto done;
1377 }
1378
1379 offset = 4 - remaining;
1380 buf = sg_virt(sg);
1381 memcpy((u8 *)&value + remaining, buf, offset);
1382 mci_writel(host, TDR, value);
1383 nbytes += offset;
1384 }
1385
1386 status = mci_readl(host, SR);
1387 if (status & ATMCI_DATA_ERROR_FLAGS) {
1388 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1389 | ATMCI_DATA_ERROR_FLAGS));
1390 host->data_status = status;
1391 data->bytes_xfered += nbytes;
1392 smp_wmb();
1393 atmci_set_pending(host, EVENT_DATA_ERROR);
1394 tasklet_schedule(&host->tasklet);
1395 return;
1396 }
1397 } while (status & MCI_TXRDY);
1398
1399 host->pio_offset = offset;
1400 data->bytes_xfered += nbytes;
1401
1402 return;
1403
1404 done:
1405 mci_writel(host, IDR, MCI_TXRDY);
1406 mci_writel(host, IER, MCI_NOTBUSY);
1407 data->bytes_xfered += nbytes;
1408 smp_wmb();
1409 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1410 }
1411
1412 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1413 {
1414 mci_writel(host, IDR, MCI_CMDRDY);
1415
1416 host->cmd_status = status;
1417 smp_wmb();
1418 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1419 tasklet_schedule(&host->tasklet);
1420 }
1421
1422 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1423 {
1424 struct atmel_mci *host = dev_id;
1425 u32 status, mask, pending;
1426 unsigned int pass_count = 0;
1427
1428 do {
1429 status = mci_readl(host, SR);
1430 mask = mci_readl(host, IMR);
1431 pending = status & mask;
1432 if (!pending)
1433 break;
1434
1435 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1436 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1437 | MCI_RXRDY | MCI_TXRDY);
1438 pending &= mci_readl(host, IMR);
1439
1440 host->data_status = status;
1441 smp_wmb();
1442 atmci_set_pending(host, EVENT_DATA_ERROR);
1443 tasklet_schedule(&host->tasklet);
1444 }
1445 if (pending & MCI_NOTBUSY) {
1446 mci_writel(host, IDR,
1447 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1448 if (!host->data_status)
1449 host->data_status = status;
1450 smp_wmb();
1451 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1452 tasklet_schedule(&host->tasklet);
1453 }
1454 if (pending & MCI_RXRDY)
1455 atmci_read_data_pio(host);
1456 if (pending & MCI_TXRDY)
1457 atmci_write_data_pio(host);
1458
1459 if (pending & MCI_CMDRDY)
1460 atmci_cmd_interrupt(host, status);
1461 } while (pass_count++ < 5);
1462
1463 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1464 }
1465
1466 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1467 {
1468 struct atmel_mci_slot *slot = dev_id;
1469
1470 /*
1471 * Disable interrupts until the pin has stabilized and check
1472 * the state then. Use mod_timer() since we may be in the
1473 * middle of the timer routine when this interrupt triggers.
1474 */
1475 disable_irq_nosync(irq);
1476 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1477
1478 return IRQ_HANDLED;
1479 }
1480
1481 static int __init atmci_init_slot(struct atmel_mci *host,
1482 struct mci_slot_pdata *slot_data, unsigned int id,
1483 u32 sdc_reg)
1484 {
1485 struct mmc_host *mmc;
1486 struct atmel_mci_slot *slot;
1487
1488 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1489 if (!mmc)
1490 return -ENOMEM;
1491
1492 slot = mmc_priv(mmc);
1493 slot->mmc = mmc;
1494 slot->host = host;
1495 slot->detect_pin = slot_data->detect_pin;
1496 slot->wp_pin = slot_data->wp_pin;
1497 slot->detect_is_active_high = slot_data->detect_is_active_high;
1498 slot->sdc_reg = sdc_reg;
1499
1500 mmc->ops = &atmci_ops;
1501 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1502 mmc->f_max = host->bus_hz / 2;
1503 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1504 if (slot_data->bus_width >= 4)
1505 mmc->caps |= MMC_CAP_4_BIT_DATA;
1506
1507 mmc->max_hw_segs = 64;
1508 mmc->max_phys_segs = 64;
1509 mmc->max_req_size = 32768 * 512;
1510 mmc->max_blk_size = 32768;
1511 mmc->max_blk_count = 512;
1512
1513 /* Assume card is present initially */
1514 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1515 if (gpio_is_valid(slot->detect_pin)) {
1516 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1517 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1518 slot->detect_pin = -EBUSY;
1519 } else if (gpio_get_value(slot->detect_pin) ^
1520 slot->detect_is_active_high) {
1521 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1522 }
1523 }
1524
1525 if (!gpio_is_valid(slot->detect_pin))
1526 mmc->caps |= MMC_CAP_NEEDS_POLL;
1527
1528 if (gpio_is_valid(slot->wp_pin)) {
1529 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1530 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1531 slot->wp_pin = -EBUSY;
1532 }
1533 }
1534
1535 host->slot[id] = slot;
1536 mmc_add_host(mmc);
1537
1538 if (gpio_is_valid(slot->detect_pin)) {
1539 int ret;
1540
1541 setup_timer(&slot->detect_timer, atmci_detect_change,
1542 (unsigned long)slot);
1543
1544 ret = request_irq(gpio_to_irq(slot->detect_pin),
1545 atmci_detect_interrupt,
1546 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1547 "mmc-detect", slot);
1548 if (ret) {
1549 dev_dbg(&mmc->class_dev,
1550 "could not request IRQ %d for detect pin\n",
1551 gpio_to_irq(slot->detect_pin));
1552 gpio_free(slot->detect_pin);
1553 slot->detect_pin = -EBUSY;
1554 }
1555 }
1556
1557 atmci_init_debugfs(slot);
1558
1559 return 0;
1560 }
1561
1562 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1563 unsigned int id)
1564 {
1565 /* Debugfs stuff is cleaned up by mmc core */
1566
1567 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1568 smp_wmb();
1569
1570 mmc_remove_host(slot->mmc);
1571
1572 if (gpio_is_valid(slot->detect_pin)) {
1573 int pin = slot->detect_pin;
1574
1575 free_irq(gpio_to_irq(pin), slot);
1576 del_timer_sync(&slot->detect_timer);
1577 gpio_free(pin);
1578 }
1579 if (gpio_is_valid(slot->wp_pin))
1580 gpio_free(slot->wp_pin);
1581
1582 slot->host->slot[id] = NULL;
1583 mmc_free_host(slot->mmc);
1584 }
1585
1586 #ifdef CONFIG_MMC_ATMELMCI_DMA
1587 static bool filter(struct dma_chan *chan, void *slave)
1588 {
1589 struct dw_dma_slave *dws = slave;
1590
1591 if (dws->dma_dev == chan->device->dev) {
1592 chan->private = dws;
1593 return true;
1594 } else
1595 return false;
1596 }
1597 #endif
1598
1599 static int __init atmci_probe(struct platform_device *pdev)
1600 {
1601 struct mci_platform_data *pdata;
1602 struct atmel_mci *host;
1603 struct resource *regs;
1604 unsigned int nr_slots;
1605 int irq;
1606 int ret;
1607
1608 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1609 if (!regs)
1610 return -ENXIO;
1611 pdata = pdev->dev.platform_data;
1612 if (!pdata)
1613 return -ENXIO;
1614 irq = platform_get_irq(pdev, 0);
1615 if (irq < 0)
1616 return irq;
1617
1618 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1619 if (!host)
1620 return -ENOMEM;
1621
1622 host->pdev = pdev;
1623 spin_lock_init(&host->lock);
1624 INIT_LIST_HEAD(&host->queue);
1625
1626 host->mck = clk_get(&pdev->dev, "mci_clk");
1627 if (IS_ERR(host->mck)) {
1628 ret = PTR_ERR(host->mck);
1629 goto err_clk_get;
1630 }
1631
1632 ret = -ENOMEM;
1633 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1634 if (!host->regs)
1635 goto err_ioremap;
1636
1637 clk_enable(host->mck);
1638 mci_writel(host, CR, MCI_CR_SWRST);
1639 host->bus_hz = clk_get_rate(host->mck);
1640 clk_disable(host->mck);
1641
1642 host->mapbase = regs->start;
1643
1644 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1645
1646 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1647 if (ret)
1648 goto err_request_irq;
1649
1650 #ifdef CONFIG_MMC_ATMELMCI_DMA
1651 if (pdata->dma_slave.dma_dev) {
1652 struct dw_dma_slave *dws = &pdata->dma_slave;
1653 dma_cap_mask_t mask;
1654
1655 dws->tx_reg = regs->start + MCI_TDR;
1656 dws->rx_reg = regs->start + MCI_RDR;
1657
1658 /* Try to grab a DMA channel */
1659 dma_cap_zero(mask);
1660 dma_cap_set(DMA_SLAVE, mask);
1661 host->dma.chan = dma_request_channel(mask, filter, dws);
1662 }
1663 if (!host->dma.chan)
1664 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1665 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1666
1667 platform_set_drvdata(pdev, host);
1668
1669 /* We need at least one slot to succeed */
1670 nr_slots = 0;
1671 ret = -ENODEV;
1672 if (pdata->slot[0].bus_width) {
1673 ret = atmci_init_slot(host, &pdata->slot[0],
1674 0, MCI_SDCSEL_SLOT_A);
1675 if (!ret)
1676 nr_slots++;
1677 }
1678 if (pdata->slot[1].bus_width) {
1679 ret = atmci_init_slot(host, &pdata->slot[1],
1680 1, MCI_SDCSEL_SLOT_B);
1681 if (!ret)
1682 nr_slots++;
1683 }
1684
1685 if (!nr_slots) {
1686 dev_err(&pdev->dev, "init failed: no slot defined\n");
1687 goto err_init_slot;
1688 }
1689
1690 dev_info(&pdev->dev,
1691 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1692 host->mapbase, irq, nr_slots);
1693
1694 return 0;
1695
1696 err_init_slot:
1697 #ifdef CONFIG_MMC_ATMELMCI_DMA
1698 if (host->dma.chan)
1699 dma_release_channel(host->dma.chan);
1700 #endif
1701 free_irq(irq, host);
1702 err_request_irq:
1703 iounmap(host->regs);
1704 err_ioremap:
1705 clk_put(host->mck);
1706 err_clk_get:
1707 kfree(host);
1708 return ret;
1709 }
1710
1711 static int __exit atmci_remove(struct platform_device *pdev)
1712 {
1713 struct atmel_mci *host = platform_get_drvdata(pdev);
1714 unsigned int i;
1715
1716 platform_set_drvdata(pdev, NULL);
1717
1718 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1719 if (host->slot[i])
1720 atmci_cleanup_slot(host->slot[i], i);
1721 }
1722
1723 clk_enable(host->mck);
1724 mci_writel(host, IDR, ~0UL);
1725 mci_writel(host, CR, MCI_CR_MCIDIS);
1726 mci_readl(host, SR);
1727 clk_disable(host->mck);
1728
1729 #ifdef CONFIG_MMC_ATMELMCI_DMA
1730 if (host->dma.chan)
1731 dma_release_channel(host->dma.chan);
1732 #endif
1733
1734 free_irq(platform_get_irq(pdev, 0), host);
1735 iounmap(host->regs);
1736
1737 clk_put(host->mck);
1738 kfree(host);
1739
1740 return 0;
1741 }
1742
1743 static struct platform_driver atmci_driver = {
1744 .remove = __exit_p(atmci_remove),
1745 .driver = {
1746 .name = "atmel_mci",
1747 },
1748 };
1749
1750 static int __init atmci_init(void)
1751 {
1752 return platform_driver_probe(&atmci_driver, atmci_probe);
1753 }
1754
1755 static void __exit atmci_exit(void)
1756 {
1757 platform_driver_unregister(&atmci_driver);
1758 }
1759
1760 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1761 module_exit(atmci_exit);
1762
1763 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1764 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1765 MODULE_LICENSE("GPL v2");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree