2 * linux/drivers/video/omap2/dss/core.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "CORE"
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/platform_device.h>
30 #include <linux/seq_file.h>
31 #include <linux/debugfs.h>
33 #include <linux/device.h>
34 #include <linux/regulator/consumer.h>
36 #include <plat/display.h>
37 #include <plat/clock.h>
42 struct platform_device
*pdev
;
48 struct clk
*dss_54m_fck
;
49 struct clk
*dss_96m_fck
;
50 unsigned num_clks_enabled
;
52 struct regulator
*vdds_dsi_reg
;
53 struct regulator
*vdds_sdi_reg
;
54 struct regulator
*vdda_dac_reg
;
57 static void dss_clk_enable_all_no_ctx(void);
58 static void dss_clk_disable_all_no_ctx(void);
59 static void dss_clk_enable_no_ctx(enum dss_clock clks
);
60 static void dss_clk_disable_no_ctx(enum dss_clock clks
);
62 static char *def_disp_name
;
63 module_param_named(def_disp
, def_disp_name
, charp
, 0);
64 MODULE_PARM_DESC(def_disp_name
, "default display name");
67 unsigned int dss_debug
;
68 module_param_named(debug
, dss_debug
, bool, 0644);
72 static int dss_get_ctx_id(void)
74 struct omap_dss_board_info
*pdata
= core
.pdev
->dev
.platform_data
;
77 if (!pdata
->get_last_off_on_transaction_id
)
79 r
= pdata
->get_last_off_on_transaction_id(&core
.pdev
->dev
);
81 dev_err(&core
.pdev
->dev
, "getting transaction ID failed, "
82 "will force context restore\n");
88 int dss_need_ctx_restore(void)
90 int id
= dss_get_ctx_id();
92 if (id
< 0 || id
!= core
.ctx_id
) {
93 DSSDBG("ctx id %d -> id %d\n",
102 static void save_all_ctx(void)
104 DSSDBG("save context\n");
106 dss_clk_enable_no_ctx(DSS_CLK_ICK
| DSS_CLK_FCK1
);
109 dispc_save_context();
110 #ifdef CONFIG_OMAP2_DSS_DSI
114 dss_clk_disable_no_ctx(DSS_CLK_ICK
| DSS_CLK_FCK1
);
117 static void restore_all_ctx(void)
119 DSSDBG("restore context\n");
121 dss_clk_enable_all_no_ctx();
123 dss_restore_context();
124 dispc_restore_context();
125 #ifdef CONFIG_OMAP2_DSS_DSI
126 dsi_restore_context();
129 dss_clk_disable_all_no_ctx();
132 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
134 static void core_dump_clocks(struct seq_file
*s
)
137 struct clk
*clocks
[5] = {
145 seq_printf(s
, "- CORE -\n");
147 seq_printf(s
, "internal clk count\t\t%u\n", core
.num_clks_enabled
);
149 for (i
= 0; i
< 5; i
++) {
152 seq_printf(s
, "%-15s\t%lu\t%d\n",
154 clk_get_rate(clocks
[i
]),
155 clocks
[i
]->usecount
);
158 #endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
160 static int dss_get_clock(struct clk
**clock
, const char *clk_name
)
164 clk
= clk_get(&core
.pdev
->dev
, clk_name
);
167 DSSERR("can't get clock %s", clk_name
);
173 DSSDBG("clk %s, rate %ld\n", clk_name
, clk_get_rate(clk
));
178 static int dss_get_clocks(void)
183 core
.dss1_fck
= NULL
;
184 core
.dss2_fck
= NULL
;
185 core
.dss_54m_fck
= NULL
;
186 core
.dss_96m_fck
= NULL
;
188 r
= dss_get_clock(&core
.dss_ick
, "ick");
192 r
= dss_get_clock(&core
.dss1_fck
, "dss1_fck");
196 r
= dss_get_clock(&core
.dss2_fck
, "dss2_fck");
200 r
= dss_get_clock(&core
.dss_54m_fck
, "tv_fck");
204 r
= dss_get_clock(&core
.dss_96m_fck
, "video_fck");
212 clk_put(core
.dss_ick
);
214 clk_put(core
.dss1_fck
);
216 clk_put(core
.dss2_fck
);
217 if (core
.dss_54m_fck
)
218 clk_put(core
.dss_54m_fck
);
219 if (core
.dss_96m_fck
)
220 clk_put(core
.dss_96m_fck
);
225 static void dss_put_clocks(void)
227 if (core
.dss_96m_fck
)
228 clk_put(core
.dss_96m_fck
);
229 clk_put(core
.dss_54m_fck
);
230 clk_put(core
.dss1_fck
);
231 clk_put(core
.dss2_fck
);
232 clk_put(core
.dss_ick
);
235 unsigned long dss_clk_get_rate(enum dss_clock clk
)
239 return clk_get_rate(core
.dss_ick
);
241 return clk_get_rate(core
.dss1_fck
);
243 return clk_get_rate(core
.dss2_fck
);
245 return clk_get_rate(core
.dss_54m_fck
);
247 return clk_get_rate(core
.dss_96m_fck
);
254 static unsigned count_clk_bits(enum dss_clock clks
)
256 unsigned num_clks
= 0;
258 if (clks
& DSS_CLK_ICK
)
260 if (clks
& DSS_CLK_FCK1
)
262 if (clks
& DSS_CLK_FCK2
)
264 if (clks
& DSS_CLK_54M
)
266 if (clks
& DSS_CLK_96M
)
272 static void dss_clk_enable_no_ctx(enum dss_clock clks
)
274 unsigned num_clks
= count_clk_bits(clks
);
276 if (clks
& DSS_CLK_ICK
)
277 clk_enable(core
.dss_ick
);
278 if (clks
& DSS_CLK_FCK1
)
279 clk_enable(core
.dss1_fck
);
280 if (clks
& DSS_CLK_FCK2
)
281 clk_enable(core
.dss2_fck
);
282 if (clks
& DSS_CLK_54M
)
283 clk_enable(core
.dss_54m_fck
);
284 if (clks
& DSS_CLK_96M
)
285 clk_enable(core
.dss_96m_fck
);
287 core
.num_clks_enabled
+= num_clks
;
290 void dss_clk_enable(enum dss_clock clks
)
292 bool check_ctx
= core
.num_clks_enabled
== 0;
294 dss_clk_enable_no_ctx(clks
);
296 if (check_ctx
&& cpu_is_omap34xx() && dss_need_ctx_restore())
300 static void dss_clk_disable_no_ctx(enum dss_clock clks
)
302 unsigned num_clks
= count_clk_bits(clks
);
304 if (clks
& DSS_CLK_ICK
)
305 clk_disable(core
.dss_ick
);
306 if (clks
& DSS_CLK_FCK1
)
307 clk_disable(core
.dss1_fck
);
308 if (clks
& DSS_CLK_FCK2
)
309 clk_disable(core
.dss2_fck
);
310 if (clks
& DSS_CLK_54M
)
311 clk_disable(core
.dss_54m_fck
);
312 if (clks
& DSS_CLK_96M
)
313 clk_disable(core
.dss_96m_fck
);
315 core
.num_clks_enabled
-= num_clks
;
318 void dss_clk_disable(enum dss_clock clks
)
320 if (cpu_is_omap34xx()) {
321 unsigned num_clks
= count_clk_bits(clks
);
323 BUG_ON(core
.num_clks_enabled
< num_clks
);
325 if (core
.num_clks_enabled
== num_clks
)
329 dss_clk_disable_no_ctx(clks
);
332 static void dss_clk_enable_all_no_ctx(void)
336 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
337 if (cpu_is_omap34xx())
339 dss_clk_enable_no_ctx(clks
);
342 static void dss_clk_disable_all_no_ctx(void)
346 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
347 if (cpu_is_omap34xx())
349 dss_clk_disable_no_ctx(clks
);
352 static void dss_clk_disable_all(void)
356 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
357 if (cpu_is_omap34xx())
359 dss_clk_disable(clks
);
364 struct regulator
*dss_get_vdds_dsi(void)
366 struct regulator
*reg
;
368 if (core
.vdds_dsi_reg
!= NULL
)
369 return core
.vdds_dsi_reg
;
371 reg
= regulator_get(&core
.pdev
->dev
, "vdds_dsi");
373 core
.vdds_dsi_reg
= reg
;
378 struct regulator
*dss_get_vdds_sdi(void)
380 struct regulator
*reg
;
382 if (core
.vdds_sdi_reg
!= NULL
)
383 return core
.vdds_sdi_reg
;
385 reg
= regulator_get(&core
.pdev
->dev
, "vdds_sdi");
387 core
.vdds_sdi_reg
= reg
;
392 struct regulator
*dss_get_vdda_dac(void)
394 struct regulator
*reg
;
396 if (core
.vdda_dac_reg
!= NULL
)
397 return core
.vdda_dac_reg
;
399 reg
= regulator_get(&core
.pdev
->dev
, "vdda_dac");
401 core
.vdda_dac_reg
= reg
;
407 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
408 static void dss_debug_dump_clocks(struct seq_file
*s
)
412 dispc_dump_clocks(s
);
413 #ifdef CONFIG_OMAP2_DSS_DSI
418 static int dss_debug_show(struct seq_file
*s
, void *unused
)
420 void (*func
)(struct seq_file
*) = s
->private;
425 static int dss_debug_open(struct inode
*inode
, struct file
*file
)
427 return single_open(file
, dss_debug_show
, inode
->i_private
);
430 static const struct file_operations dss_debug_fops
= {
431 .open
= dss_debug_open
,
434 .release
= single_release
,
437 static struct dentry
*dss_debugfs_dir
;
439 static int dss_initialize_debugfs(void)
441 dss_debugfs_dir
= debugfs_create_dir("omapdss", NULL
);
442 if (IS_ERR(dss_debugfs_dir
)) {
443 int err
= PTR_ERR(dss_debugfs_dir
);
444 dss_debugfs_dir
= NULL
;
448 debugfs_create_file("clk", S_IRUGO
, dss_debugfs_dir
,
449 &dss_debug_dump_clocks
, &dss_debug_fops
);
451 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
452 debugfs_create_file("dispc_irq", S_IRUGO
, dss_debugfs_dir
,
453 &dispc_dump_irqs
, &dss_debug_fops
);
456 #if defined(CONFIG_OMAP2_DSS_DSI) && defined(CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS)
457 debugfs_create_file("dsi_irq", S_IRUGO
, dss_debugfs_dir
,
458 &dsi_dump_irqs
, &dss_debug_fops
);
461 debugfs_create_file("dss", S_IRUGO
, dss_debugfs_dir
,
462 &dss_dump_regs
, &dss_debug_fops
);
463 debugfs_create_file("dispc", S_IRUGO
, dss_debugfs_dir
,
464 &dispc_dump_regs
, &dss_debug_fops
);
465 #ifdef CONFIG_OMAP2_DSS_RFBI
466 debugfs_create_file("rfbi", S_IRUGO
, dss_debugfs_dir
,
467 &rfbi_dump_regs
, &dss_debug_fops
);
469 #ifdef CONFIG_OMAP2_DSS_DSI
470 debugfs_create_file("dsi", S_IRUGO
, dss_debugfs_dir
,
471 &dsi_dump_regs
, &dss_debug_fops
);
473 #ifdef CONFIG_OMAP2_DSS_VENC
474 debugfs_create_file("venc", S_IRUGO
, dss_debugfs_dir
,
475 &venc_dump_regs
, &dss_debug_fops
);
480 static void dss_uninitialize_debugfs(void)
483 debugfs_remove_recursive(dss_debugfs_dir
);
485 #endif /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */
487 /* PLATFORM DEVICE */
488 static int omap_dss_probe(struct platform_device
*pdev
)
490 struct omap_dss_board_info
*pdata
= pdev
->dev
.platform_data
;
497 dss_init_overlay_managers(pdev
);
498 dss_init_overlays(pdev
);
500 r
= dss_get_clocks();
504 dss_clk_enable_all_no_ctx();
506 core
.ctx_id
= dss_get_ctx_id();
507 DSSDBG("initial ctx id %u\n", core
.ctx_id
);
509 #ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
511 if (omap_readl(0x48050440) & 1) /* LCD enabled? */
515 r
= dss_init(skip_init
);
517 DSSERR("Failed to initialize DSS\n");
521 #ifdef CONFIG_OMAP2_DSS_RFBI
524 DSSERR("Failed to initialize rfbi\n");
529 #ifdef CONFIG_OMAP2_DSS_DPI
532 DSSERR("Failed to initialize dpi\n");
539 DSSERR("Failed to initialize dispc\n");
542 #ifdef CONFIG_OMAP2_DSS_VENC
545 DSSERR("Failed to initialize venc\n");
549 if (cpu_is_omap34xx()) {
550 #ifdef CONFIG_OMAP2_DSS_SDI
551 r
= sdi_init(skip_init
);
553 DSSERR("Failed to initialize SDI\n");
557 #ifdef CONFIG_OMAP2_DSS_DSI
560 DSSERR("Failed to initialize DSI\n");
566 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
567 r
= dss_initialize_debugfs();
572 for (i
= 0; i
< pdata
->num_devices
; ++i
) {
573 struct omap_dss_device
*dssdev
= pdata
->devices
[i
];
575 r
= omap_dss_register_device(dssdev
);
577 DSSERR("device reg failed %d\n", i
);
579 if (def_disp_name
&& strcmp(def_disp_name
, dssdev
->name
) == 0)
580 pdata
->default_device
= dssdev
;
583 dss_clk_disable_all();
587 /* XXX fail correctly */
592 static int omap_dss_remove(struct platform_device
*pdev
)
594 struct omap_dss_board_info
*pdata
= pdev
->dev
.platform_data
;
598 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
599 dss_uninitialize_debugfs();
602 #ifdef CONFIG_OMAP2_DSS_VENC
606 #ifdef CONFIG_OMAP2_DSS_DPI
609 #ifdef CONFIG_OMAP2_DSS_RFBI
612 if (cpu_is_omap34xx()) {
613 #ifdef CONFIG_OMAP2_DSS_DSI
616 #ifdef CONFIG_OMAP2_DSS_SDI
623 /* these should be removed at some point */
624 c
= core
.dss_ick
->usecount
;
626 DSSERR("warning: dss_ick usecount %d, disabling\n", c
);
628 clk_disable(core
.dss_ick
);
631 c
= core
.dss1_fck
->usecount
;
633 DSSERR("warning: dss1_fck usecount %d, disabling\n", c
);
635 clk_disable(core
.dss1_fck
);
638 c
= core
.dss2_fck
->usecount
;
640 DSSERR("warning: dss2_fck usecount %d, disabling\n", c
);
642 clk_disable(core
.dss2_fck
);
645 c
= core
.dss_54m_fck
->usecount
;
647 DSSERR("warning: dss_54m_fck usecount %d, disabling\n", c
);
649 clk_disable(core
.dss_54m_fck
);
652 if (core
.dss_96m_fck
) {
653 c
= core
.dss_96m_fck
->usecount
;
655 DSSERR("warning: dss_96m_fck usecount %d, disabling\n",
658 clk_disable(core
.dss_96m_fck
);
664 dss_uninit_overlays(pdev
);
665 dss_uninit_overlay_managers(pdev
);
667 for (i
= 0; i
< pdata
->num_devices
; ++i
)
668 omap_dss_unregister_device(pdata
->devices
[i
]);
673 static void omap_dss_shutdown(struct platform_device
*pdev
)
675 DSSDBG("shutdown\n");
676 dss_disable_all_devices();
679 static int omap_dss_suspend(struct platform_device
*pdev
, pm_message_t state
)
681 DSSDBG("suspend %d\n", state
.event
);
683 return dss_suspend_all_devices();
686 static int omap_dss_resume(struct platform_device
*pdev
)
690 return dss_resume_all_devices();
693 static struct platform_driver omap_dss_driver
= {
694 .probe
= omap_dss_probe
,
695 .remove
= omap_dss_remove
,
696 .shutdown
= omap_dss_shutdown
,
697 .suspend
= omap_dss_suspend
,
698 .resume
= omap_dss_resume
,
701 .owner
= THIS_MODULE
,
706 static int dss_bus_match(struct device
*dev
, struct device_driver
*driver
)
708 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
710 DSSDBG("bus_match. dev %s/%s, drv %s\n",
711 dev_name(dev
), dssdev
->driver_name
, driver
->name
);
713 return strcmp(dssdev
->driver_name
, driver
->name
) == 0;
716 static ssize_t
device_name_show(struct device
*dev
,
717 struct device_attribute
*attr
, char *buf
)
719 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
720 return snprintf(buf
, PAGE_SIZE
, "%s\n",
725 static struct device_attribute default_dev_attrs
[] = {
726 __ATTR(name
, S_IRUGO
, device_name_show
, NULL
),
730 static ssize_t
driver_name_show(struct device_driver
*drv
, char *buf
)
732 struct omap_dss_driver
*dssdrv
= to_dss_driver(drv
);
733 return snprintf(buf
, PAGE_SIZE
, "%s\n",
734 dssdrv
->driver
.name
?
735 dssdrv
->driver
.name
: "");
737 static struct driver_attribute default_drv_attrs
[] = {
738 __ATTR(name
, S_IRUGO
, driver_name_show
, NULL
),
742 static struct bus_type dss_bus_type
= {
744 .match
= dss_bus_match
,
745 .dev_attrs
= default_dev_attrs
,
746 .drv_attrs
= default_drv_attrs
,
749 static void dss_bus_release(struct device
*dev
)
751 DSSDBG("bus_release\n");
754 static struct device dss_bus
= {
755 .release
= dss_bus_release
,
758 struct bus_type
*dss_get_bus(void)
760 return &dss_bus_type
;
764 static int dss_driver_probe(struct device
*dev
)
767 struct omap_dss_driver
*dssdrv
= to_dss_driver(dev
->driver
);
768 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
769 struct omap_dss_board_info
*pdata
= core
.pdev
->dev
.platform_data
;
772 DSSDBG("driver_probe: dev %s/%s, drv %s\n",
773 dev_name(dev
), dssdev
->driver_name
,
774 dssdrv
->driver
.name
);
776 dss_init_device(core
.pdev
, dssdev
);
778 force
= pdata
->default_device
== dssdev
;
779 dss_recheck_connections(dssdev
, force
);
781 r
= dssdrv
->probe(dssdev
);
784 DSSERR("driver probe failed: %d\n", r
);
785 dss_uninit_device(core
.pdev
, dssdev
);
789 DSSDBG("probe done for device %s\n", dev_name(dev
));
791 dssdev
->driver
= dssdrv
;
796 static int dss_driver_remove(struct device
*dev
)
798 struct omap_dss_driver
*dssdrv
= to_dss_driver(dev
->driver
);
799 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
801 DSSDBG("driver_remove: dev %s/%s\n", dev_name(dev
),
802 dssdev
->driver_name
);
804 dssdrv
->remove(dssdev
);
806 dss_uninit_device(core
.pdev
, dssdev
);
808 dssdev
->driver
= NULL
;
813 int omap_dss_register_driver(struct omap_dss_driver
*dssdriver
)
815 dssdriver
->driver
.bus
= &dss_bus_type
;
816 dssdriver
->driver
.probe
= dss_driver_probe
;
817 dssdriver
->driver
.remove
= dss_driver_remove
;
819 if (dssdriver
->get_resolution
== NULL
)
820 dssdriver
->get_resolution
= omapdss_default_get_resolution
;
821 if (dssdriver
->get_recommended_bpp
== NULL
)
822 dssdriver
->get_recommended_bpp
=
823 omapdss_default_get_recommended_bpp
;
825 return driver_register(&dssdriver
->driver
);
827 EXPORT_SYMBOL(omap_dss_register_driver
);
829 void omap_dss_unregister_driver(struct omap_dss_driver
*dssdriver
)
831 driver_unregister(&dssdriver
->driver
);
833 EXPORT_SYMBOL(omap_dss_unregister_driver
);
836 static void reset_device(struct device
*dev
, int check
)
838 u8
*dev_p
= (u8
*)dev
;
839 u8
*dev_end
= dev_p
+ sizeof(*dev
);
842 saved_pdata
= dev
->platform_data
;
845 * Check if there is any other setting than platform_data
846 * in struct device; warn that these will be reset by our
849 dev
->platform_data
= NULL
;
850 while (dev_p
< dev_end
) {
852 WARN("%s: struct device fields will be "
860 memset(dev
, 0, sizeof(*dev
));
861 dev
->platform_data
= saved_pdata
;
865 static void omap_dss_dev_release(struct device
*dev
)
867 reset_device(dev
, 0);
870 int omap_dss_register_device(struct omap_dss_device
*dssdev
)
874 WARN_ON(!dssdev
->driver_name
);
876 reset_device(&dssdev
->dev
, 1);
877 dssdev
->dev
.bus
= &dss_bus_type
;
878 dssdev
->dev
.parent
= &dss_bus
;
879 dssdev
->dev
.release
= omap_dss_dev_release
;
880 dev_set_name(&dssdev
->dev
, "display%d", dev_num
++);
881 return device_register(&dssdev
->dev
);
884 void omap_dss_unregister_device(struct omap_dss_device
*dssdev
)
886 device_unregister(&dssdev
->dev
);
890 static int omap_dss_bus_register(void)
894 r
= bus_register(&dss_bus_type
);
896 DSSERR("bus register failed\n");
900 dev_set_name(&dss_bus
, "omapdss");
901 r
= device_register(&dss_bus
);
903 DSSERR("bus driver register failed\n");
904 bus_unregister(&dss_bus_type
);
913 #ifdef CONFIG_OMAP2_DSS_MODULE
914 static void omap_dss_bus_unregister(void)
916 device_unregister(&dss_bus
);
918 bus_unregister(&dss_bus_type
);
921 static int __init
omap_dss_init(void)
925 r
= omap_dss_bus_register();
929 r
= platform_driver_register(&omap_dss_driver
);
931 omap_dss_bus_unregister();
938 static void __exit
omap_dss_exit(void)
940 if (core
.vdds_dsi_reg
!= NULL
) {
941 regulator_put(core
.vdds_dsi_reg
);
942 core
.vdds_dsi_reg
= NULL
;
945 if (core
.vdds_sdi_reg
!= NULL
) {
946 regulator_put(core
.vdds_sdi_reg
);
947 core
.vdds_sdi_reg
= NULL
;
950 if (core
.vdda_dac_reg
!= NULL
) {
951 regulator_put(core
.vdda_dac_reg
);
952 core
.vdda_dac_reg
= NULL
;
955 platform_driver_unregister(&omap_dss_driver
);
957 omap_dss_bus_unregister();
960 module_init(omap_dss_init
);
961 module_exit(omap_dss_exit
);
963 static int __init
omap_dss_init(void)
965 return omap_dss_bus_register();
968 static int __init
omap_dss_init2(void)
970 return platform_driver_register(&omap_dss_driver
);
973 core_initcall(omap_dss_init
);
974 device_initcall(omap_dss_init2
);
977 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
978 MODULE_DESCRIPTION("OMAP2/3 Display Subsystem");
979 MODULE_LICENSE("GPL v2");