ath9k: simpify RX by calling ath_get_virt_hw() once
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / recv.c
blobc910c1047ecc6956c0fd25f3c39d43f31678148a
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include "ath9k.h"
19 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
20 struct ieee80211_hdr *hdr)
22 struct ieee80211_hw *hw = sc->pri_wiphy->hw;
23 int i;
25 spin_lock_bh(&sc->wiphy_lock);
26 for (i = 0; i < sc->num_sec_wiphy; i++) {
27 struct ath_wiphy *aphy = sc->sec_wiphy[i];
28 if (aphy == NULL)
29 continue;
30 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
31 == 0) {
32 hw = aphy->hw;
33 break;
36 spin_unlock_bh(&sc->wiphy_lock);
37 return hw;
41 * Setup and link descriptors.
43 * 11N: we can no longer afford to self link the last descriptor.
44 * MAC acknowledges BA status as long as it copies frames to host
45 * buffer (or rx fifo). This can incorrectly acknowledge packets
46 * to a sender if last desc is self-linked.
48 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
50 struct ath_hw *ah = sc->sc_ah;
51 struct ath_desc *ds;
52 struct sk_buff *skb;
54 ATH_RXBUF_RESET(bf);
56 ds = bf->bf_desc;
57 ds->ds_link = 0; /* link to null */
58 ds->ds_data = bf->bf_buf_addr;
60 /* virtual addr of the beginning of the buffer. */
61 skb = bf->bf_mpdu;
62 BUG_ON(skb == NULL);
63 ds->ds_vdata = skb->data;
65 /* setup rx descriptors. The rx.bufsize here tells the harware
66 * how much data it can DMA to us and that we are prepared
67 * to process */
68 ath9k_hw_setuprxdesc(ah, ds,
69 sc->rx.bufsize,
70 0);
72 if (sc->rx.rxlink == NULL)
73 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
74 else
75 *sc->rx.rxlink = bf->bf_daddr;
77 sc->rx.rxlink = &ds->ds_link;
78 ath9k_hw_rxena(ah);
81 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
83 /* XXX block beacon interrupts */
84 ath9k_hw_setantenna(sc->sc_ah, antenna);
85 sc->rx.defant = antenna;
86 sc->rx.rxotherant = 0;
90 * Extend 15-bit time stamp from rx descriptor to
91 * a full 64-bit TSF using the current h/w TSF.
93 static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
95 u64 tsf;
97 tsf = ath9k_hw_gettsf64(sc->sc_ah);
98 if ((tsf & 0x7fff) < rstamp)
99 tsf -= 0x8000;
100 return (tsf & ~0x7fff) | rstamp;
104 * For Decrypt or Demic errors, we only mark packet status here and always push
105 * up the frame up to let mac80211 handle the actual error case, be it no
106 * decryption key or real decryption error. This let us keep statistics there.
108 static int ath_rx_prepare(struct ieee80211_hw *hw,
109 struct sk_buff *skb, struct ath_desc *ds,
110 struct ieee80211_rx_status *rx_status, bool *decrypt_error,
111 struct ath_softc *sc)
113 struct ieee80211_hdr *hdr;
114 u8 ratecode;
115 __le16 fc;
116 struct ieee80211_sta *sta;
117 struct ath_node *an;
118 int last_rssi = ATH_RSSI_DUMMY_MARKER;
120 hdr = (struct ieee80211_hdr *)skb->data;
121 fc = hdr->frame_control;
122 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
124 if (ds->ds_rxstat.rs_more) {
126 * Frame spans multiple descriptors; this cannot happen yet
127 * as we don't support jumbograms. If not in monitor mode,
128 * discard the frame. Enable this if you want to see
129 * error frames in Monitor mode.
131 if (sc->sc_ah->opmode != NL80211_IFTYPE_MONITOR)
132 goto rx_next;
133 } else if (ds->ds_rxstat.rs_status != 0) {
134 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
135 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
136 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY)
137 goto rx_next;
139 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
140 *decrypt_error = true;
141 } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
142 if (ieee80211_is_ctl(fc))
144 * Sometimes, we get invalid
145 * MIC failures on valid control frames.
146 * Remove these mic errors.
148 ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC;
149 else
150 rx_status->flag |= RX_FLAG_MMIC_ERROR;
153 * Reject error frames with the exception of
154 * decryption and MIC failures. For monitor mode,
155 * we also ignore the CRC error.
157 if (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR) {
158 if (ds->ds_rxstat.rs_status &
159 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
160 ATH9K_RXERR_CRC))
161 goto rx_next;
162 } else {
163 if (ds->ds_rxstat.rs_status &
164 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
165 goto rx_next;
170 ratecode = ds->ds_rxstat.rs_rate;
172 if (ratecode & 0x80) {
173 /* HT rate */
174 rx_status->flag |= RX_FLAG_HT;
175 if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040)
176 rx_status->flag |= RX_FLAG_40MHZ;
177 if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
178 rx_status->flag |= RX_FLAG_SHORT_GI;
179 rx_status->rate_idx = ratecode & 0x7f;
180 } else {
181 int i = 0, cur_band, n_rates;
183 cur_band = hw->conf.channel->band;
184 n_rates = sc->sbands[cur_band].n_bitrates;
186 for (i = 0; i < n_rates; i++) {
187 if (sc->sbands[cur_band].bitrates[i].hw_value ==
188 ratecode) {
189 rx_status->rate_idx = i;
190 break;
193 if (sc->sbands[cur_band].bitrates[i].hw_value_short ==
194 ratecode) {
195 rx_status->rate_idx = i;
196 rx_status->flag |= RX_FLAG_SHORTPRE;
197 break;
202 rcu_read_lock();
203 /* XXX: use ieee80211_find_sta! */
204 sta = ieee80211_find_sta_by_hw(sc->hw, hdr->addr2);
205 if (sta) {
206 an = (struct ath_node *) sta->drv_priv;
207 if (ds->ds_rxstat.rs_rssi != ATH9K_RSSI_BAD &&
208 !ds->ds_rxstat.rs_moreaggr)
209 ATH_RSSI_LPF(an->last_rssi, ds->ds_rxstat.rs_rssi);
210 last_rssi = an->last_rssi;
212 rcu_read_unlock();
214 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
215 ds->ds_rxstat.rs_rssi = ATH_EP_RND(last_rssi,
216 ATH_RSSI_EP_MULTIPLIER);
217 if (ds->ds_rxstat.rs_rssi < 0)
218 ds->ds_rxstat.rs_rssi = 0;
219 else if (ds->ds_rxstat.rs_rssi > 127)
220 ds->ds_rxstat.rs_rssi = 127;
222 /* Update Beacon RSSI, this is used by ANI. */
223 if (ieee80211_is_beacon(fc))
224 sc->sc_ah->stats.avgbrssi = ds->ds_rxstat.rs_rssi;
226 rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
227 rx_status->band = hw->conf.channel->band;
228 rx_status->freq = hw->conf.channel->center_freq;
229 rx_status->noise = sc->ani.noise_floor;
230 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + ds->ds_rxstat.rs_rssi;
231 rx_status->antenna = ds->ds_rxstat.rs_antenna;
234 * Theory for reporting quality:
236 * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
237 * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
238 * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
240 * MCS 7 is the highets MCS index usable by a 1-stream device.
241 * MCS 15 is the highest MCS index usable by a 2-stream device.
243 * All ath9k devices are either 1-stream or 2-stream.
245 * How many bars you see is derived from the qual reporting.
247 * A more elaborate scheme can be used here but it requires tables
248 * of SNR/throughput for each possible mode used. For the MCS table
249 * you can refer to the wireless wiki:
251 * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
254 if (conf_is_ht(&hw->conf))
255 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45;
256 else
257 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 35;
259 /* rssi can be more than 45 though, anything above that
260 * should be considered at 100% */
261 if (rx_status->qual > 100)
262 rx_status->qual = 100;
264 rx_status->flag |= RX_FLAG_TSFT;
266 return 1;
267 rx_next:
268 return 0;
271 static void ath_opmode_init(struct ath_softc *sc)
273 struct ath_hw *ah = sc->sc_ah;
274 struct ath_common *common = ath9k_hw_common(ah);
276 u32 rfilt, mfilt[2];
278 /* configure rx filter */
279 rfilt = ath_calcrxfilter(sc);
280 ath9k_hw_setrxfilter(ah, rfilt);
282 /* configure bssid mask */
283 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
284 ath_hw_setbssidmask(common);
286 /* configure operational mode */
287 ath9k_hw_setopmode(ah);
289 /* Handle any link-level address change. */
290 ath9k_hw_setmac(ah, common->macaddr);
292 /* calculate and install multicast filter */
293 mfilt[0] = mfilt[1] = ~0;
294 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
297 int ath_rx_init(struct ath_softc *sc, int nbufs)
299 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
300 struct sk_buff *skb;
301 struct ath_buf *bf;
302 int error = 0;
304 spin_lock_init(&sc->rx.rxflushlock);
305 sc->sc_flags &= ~SC_OP_RXFLUSH;
306 spin_lock_init(&sc->rx.rxbuflock);
308 sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
309 min(common->cachelsz, (u16)64));
311 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
312 common->cachelsz, sc->rx.bufsize);
314 /* Initialize rx descriptors */
316 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
317 "rx", nbufs, 1);
318 if (error != 0) {
319 ath_print(common, ATH_DBG_FATAL,
320 "failed to allocate rx descriptors: %d\n", error);
321 goto err;
324 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
325 skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_KERNEL);
326 if (skb == NULL) {
327 error = -ENOMEM;
328 goto err;
331 bf->bf_mpdu = skb;
332 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
333 sc->rx.bufsize,
334 DMA_FROM_DEVICE);
335 if (unlikely(dma_mapping_error(sc->dev,
336 bf->bf_buf_addr))) {
337 dev_kfree_skb_any(skb);
338 bf->bf_mpdu = NULL;
339 ath_print(common, ATH_DBG_FATAL,
340 "dma_mapping_error() on RX init\n");
341 error = -ENOMEM;
342 goto err;
344 bf->bf_dmacontext = bf->bf_buf_addr;
346 sc->rx.rxlink = NULL;
348 err:
349 if (error)
350 ath_rx_cleanup(sc);
352 return error;
355 void ath_rx_cleanup(struct ath_softc *sc)
357 struct sk_buff *skb;
358 struct ath_buf *bf;
360 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
361 skb = bf->bf_mpdu;
362 if (skb) {
363 dma_unmap_single(sc->dev, bf->bf_buf_addr,
364 sc->rx.bufsize, DMA_FROM_DEVICE);
365 dev_kfree_skb(skb);
369 if (sc->rx.rxdma.dd_desc_len != 0)
370 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
374 * Calculate the receive filter according to the
375 * operating mode and state:
377 * o always accept unicast, broadcast, and multicast traffic
378 * o maintain current state of phy error reception (the hal
379 * may enable phy error frames for noise immunity work)
380 * o probe request frames are accepted only when operating in
381 * hostap, adhoc, or monitor modes
382 * o enable promiscuous mode according to the interface state
383 * o accept beacons:
384 * - when operating in adhoc mode so the 802.11 layer creates
385 * node table entries for peers,
386 * - when operating in station mode for collecting rssi data when
387 * the station is otherwise quiet, or
388 * - when operating as a repeater so we see repeater-sta beacons
389 * - when scanning
392 u32 ath_calcrxfilter(struct ath_softc *sc)
394 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
396 u32 rfilt;
398 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
399 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
400 | ATH9K_RX_FILTER_MCAST;
402 /* If not a STA, enable processing of Probe Requests */
403 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
404 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
407 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
408 * mode interface or when in monitor mode. AP mode does not need this
409 * since it receives all in-BSS frames anyway.
411 if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
412 (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
413 (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
414 rfilt |= ATH9K_RX_FILTER_PROM;
416 if (sc->rx.rxfilter & FIF_CONTROL)
417 rfilt |= ATH9K_RX_FILTER_CONTROL;
419 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
420 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
421 rfilt |= ATH9K_RX_FILTER_MYBEACON;
422 else
423 rfilt |= ATH9K_RX_FILTER_BEACON;
425 if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
426 AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
427 (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
428 (sc->rx.rxfilter & FIF_PSPOLL))
429 rfilt |= ATH9K_RX_FILTER_PSPOLL;
431 if (conf_is_ht(&sc->hw->conf))
432 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
434 if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
435 /* TODO: only needed if more than one BSSID is in use in
436 * station/adhoc mode */
437 /* The following may also be needed for other older chips */
438 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
439 rfilt |= ATH9K_RX_FILTER_PROM;
440 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
443 return rfilt;
445 #undef RX_FILTER_PRESERVE
448 int ath_startrecv(struct ath_softc *sc)
450 struct ath_hw *ah = sc->sc_ah;
451 struct ath_buf *bf, *tbf;
453 spin_lock_bh(&sc->rx.rxbuflock);
454 if (list_empty(&sc->rx.rxbuf))
455 goto start_recv;
457 sc->rx.rxlink = NULL;
458 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
459 ath_rx_buf_link(sc, bf);
462 /* We could have deleted elements so the list may be empty now */
463 if (list_empty(&sc->rx.rxbuf))
464 goto start_recv;
466 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
467 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
468 ath9k_hw_rxena(ah);
470 start_recv:
471 spin_unlock_bh(&sc->rx.rxbuflock);
472 ath_opmode_init(sc);
473 ath9k_hw_startpcureceive(ah);
475 return 0;
478 bool ath_stoprecv(struct ath_softc *sc)
480 struct ath_hw *ah = sc->sc_ah;
481 bool stopped;
483 ath9k_hw_stoppcurecv(ah);
484 ath9k_hw_setrxfilter(ah, 0);
485 stopped = ath9k_hw_stopdmarecv(ah);
486 sc->rx.rxlink = NULL;
488 return stopped;
491 void ath_flushrecv(struct ath_softc *sc)
493 spin_lock_bh(&sc->rx.rxflushlock);
494 sc->sc_flags |= SC_OP_RXFLUSH;
495 ath_rx_tasklet(sc, 1);
496 sc->sc_flags &= ~SC_OP_RXFLUSH;
497 spin_unlock_bh(&sc->rx.rxflushlock);
500 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
502 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
503 struct ieee80211_mgmt *mgmt;
504 u8 *pos, *end, id, elen;
505 struct ieee80211_tim_ie *tim;
507 mgmt = (struct ieee80211_mgmt *)skb->data;
508 pos = mgmt->u.beacon.variable;
509 end = skb->data + skb->len;
511 while (pos + 2 < end) {
512 id = *pos++;
513 elen = *pos++;
514 if (pos + elen > end)
515 break;
517 if (id == WLAN_EID_TIM) {
518 if (elen < sizeof(*tim))
519 break;
520 tim = (struct ieee80211_tim_ie *) pos;
521 if (tim->dtim_count != 0)
522 break;
523 return tim->bitmap_ctrl & 0x01;
526 pos += elen;
529 return false;
532 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
534 struct ieee80211_mgmt *mgmt;
535 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
537 if (skb->len < 24 + 8 + 2 + 2)
538 return;
540 mgmt = (struct ieee80211_mgmt *)skb->data;
541 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
542 return; /* not from our current AP */
544 sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
546 if (sc->sc_flags & SC_OP_BEACON_SYNC) {
547 sc->sc_flags &= ~SC_OP_BEACON_SYNC;
548 ath_print(common, ATH_DBG_PS,
549 "Reconfigure Beacon timers based on "
550 "timestamp from the AP\n");
551 ath_beacon_config(sc, NULL);
554 if (ath_beacon_dtim_pending_cab(skb)) {
556 * Remain awake waiting for buffered broadcast/multicast
557 * frames. If the last broadcast/multicast frame is not
558 * received properly, the next beacon frame will work as
559 * a backup trigger for returning into NETWORK SLEEP state,
560 * so we are waiting for it as well.
562 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
563 "buffered broadcast/multicast frame(s)\n");
564 sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
565 return;
568 if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
570 * This can happen if a broadcast frame is dropped or the AP
571 * fails to send a frame indicating that all CAB frames have
572 * been delivered.
574 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
575 ath_print(common, ATH_DBG_PS,
576 "PS wait for CAB frames timed out\n");
580 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
582 struct ieee80211_hdr *hdr;
583 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
585 hdr = (struct ieee80211_hdr *)skb->data;
587 /* Process Beacon and CAB receive in PS state */
588 if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
589 ieee80211_is_beacon(hdr->frame_control))
590 ath_rx_ps_beacon(sc, skb);
591 else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
592 (ieee80211_is_data(hdr->frame_control) ||
593 ieee80211_is_action(hdr->frame_control)) &&
594 is_multicast_ether_addr(hdr->addr1) &&
595 !ieee80211_has_moredata(hdr->frame_control)) {
597 * No more broadcast/multicast frames to be received at this
598 * point.
600 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
601 ath_print(common, ATH_DBG_PS,
602 "All PS CAB frames received, back to sleep\n");
603 } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
604 !is_multicast_ether_addr(hdr->addr1) &&
605 !ieee80211_has_morefrags(hdr->frame_control)) {
606 sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
607 ath_print(common, ATH_DBG_PS,
608 "Going back to sleep after having received "
609 "PS-Poll data (0x%x)\n",
610 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
611 SC_OP_WAIT_FOR_CAB |
612 SC_OP_WAIT_FOR_PSPOLL_DATA |
613 SC_OP_WAIT_FOR_TX_ACK));
617 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
618 struct ath_softc *sc, struct sk_buff *skb,
619 struct ieee80211_rx_status *rx_status)
621 struct ieee80211_hdr *hdr;
623 hdr = (struct ieee80211_hdr *)skb->data;
625 /* Send the frame to mac80211 */
626 if (is_multicast_ether_addr(hdr->addr1)) {
627 int i;
629 * Deliver broadcast/multicast frames to all suitable
630 * virtual wiphys.
632 /* TODO: filter based on channel configuration */
633 for (i = 0; i < sc->num_sec_wiphy; i++) {
634 struct ath_wiphy *aphy = sc->sec_wiphy[i];
635 struct sk_buff *nskb;
636 if (aphy == NULL)
637 continue;
638 nskb = skb_copy(skb, GFP_ATOMIC);
639 if (nskb) {
640 memcpy(IEEE80211_SKB_RXCB(nskb), rx_status,
641 sizeof(*rx_status));
642 ieee80211_rx(aphy->hw, nskb);
645 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
646 ieee80211_rx(sc->hw, skb);
647 } else {
648 /* Deliver unicast frames based on receiver address */
649 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
650 ieee80211_rx(hw, skb);
654 int ath_rx_tasklet(struct ath_softc *sc, int flush)
656 #define PA2DESC(_sc, _pa) \
657 ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
658 ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
660 struct ath_buf *bf;
661 struct ath_desc *ds;
662 struct sk_buff *skb = NULL, *requeue_skb;
663 struct ieee80211_rx_status rx_status;
664 struct ath_hw *ah = sc->sc_ah;
665 struct ath_common *common = ath9k_hw_common(ah);
667 * The hw can techncically differ from common->hw when using ath9k
668 * virtual wiphy so to account for that we iterate over the active
669 * wiphys and find the appropriate wiphy and therefore hw.
671 struct ieee80211_hw *hw = NULL;
672 struct ieee80211_hdr *hdr;
673 int hdrlen, padsize, retval;
674 bool decrypt_error = false;
675 u8 keyix;
676 __le16 fc;
678 spin_lock_bh(&sc->rx.rxbuflock);
680 do {
681 /* If handling rx interrupt and flush is in progress => exit */
682 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
683 break;
685 if (list_empty(&sc->rx.rxbuf)) {
686 sc->rx.rxlink = NULL;
687 break;
690 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
691 ds = bf->bf_desc;
694 * Must provide the virtual address of the current
695 * descriptor, the physical address, and the virtual
696 * address of the next descriptor in the h/w chain.
697 * This allows the HAL to look ahead to see if the
698 * hardware is done with a descriptor by checking the
699 * done bit in the following descriptor and the address
700 * of the current descriptor the DMA engine is working
701 * on. All this is necessary because of our use of
702 * a self-linked list to avoid rx overruns.
704 retval = ath9k_hw_rxprocdesc(ah, ds,
705 bf->bf_daddr,
706 PA2DESC(sc, ds->ds_link),
708 if (retval == -EINPROGRESS) {
709 struct ath_buf *tbf;
710 struct ath_desc *tds;
712 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
713 sc->rx.rxlink = NULL;
714 break;
717 tbf = list_entry(bf->list.next, struct ath_buf, list);
720 * On some hardware the descriptor status words could
721 * get corrupted, including the done bit. Because of
722 * this, check if the next descriptor's done bit is
723 * set or not.
725 * If the next descriptor's done bit is set, the current
726 * descriptor has been corrupted. Force s/w to discard
727 * this descriptor and continue...
730 tds = tbf->bf_desc;
731 retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
732 PA2DESC(sc, tds->ds_link), 0);
733 if (retval == -EINPROGRESS) {
734 break;
738 skb = bf->bf_mpdu;
739 if (!skb)
740 continue;
743 * Synchronize the DMA transfer with CPU before
744 * 1. accessing the frame
745 * 2. requeueing the same buffer to h/w
747 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
748 sc->rx.bufsize,
749 DMA_FROM_DEVICE);
751 hdr = (struct ieee80211_hdr *) skb->data;
752 hw = ath_get_virt_hw(sc, hdr);
755 * If we're asked to flush receive queue, directly
756 * chain it back at the queue without processing it.
758 if (flush)
759 goto requeue;
761 if (!ds->ds_rxstat.rs_datalen)
762 goto requeue;
764 /* The status portion of the descriptor could get corrupted. */
765 if (sc->rx.bufsize < ds->ds_rxstat.rs_datalen)
766 goto requeue;
768 if (!ath_rx_prepare(hw, skb, ds,
769 &rx_status, &decrypt_error, sc))
770 goto requeue;
772 /* Ensure we always have an skb to requeue once we are done
773 * processing the current buffer's skb */
774 requeue_skb = ath_rxbuf_alloc(common, sc->rx.bufsize, GFP_ATOMIC);
776 /* If there is no memory we ignore the current RX'd frame,
777 * tell hardware it can give us a new frame using the old
778 * skb and put it at the tail of the sc->rx.rxbuf list for
779 * processing. */
780 if (!requeue_skb)
781 goto requeue;
783 /* Unmap the frame */
784 dma_unmap_single(sc->dev, bf->bf_buf_addr,
785 sc->rx.bufsize,
786 DMA_FROM_DEVICE);
788 skb_put(skb, ds->ds_rxstat.rs_datalen);
790 /* see if any padding is done by the hw and remove it */
791 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
792 fc = hdr->frame_control;
794 /* The MAC header is padded to have 32-bit boundary if the
795 * packet payload is non-zero. The general calculation for
796 * padsize would take into account odd header lengths:
797 * padsize = (4 - hdrlen % 4) % 4; However, since only
798 * even-length headers are used, padding can only be 0 or 2
799 * bytes and we can optimize this a bit. In addition, we must
800 * not try to remove padding from short control frames that do
801 * not have payload. */
802 padsize = hdrlen & 3;
803 if (padsize && hdrlen >= 24) {
804 memmove(skb->data + padsize, skb->data, hdrlen);
805 skb_pull(skb, padsize);
808 keyix = ds->ds_rxstat.rs_keyix;
810 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
811 rx_status.flag |= RX_FLAG_DECRYPTED;
812 } else if (ieee80211_has_protected(fc)
813 && !decrypt_error && skb->len >= hdrlen + 4) {
814 keyix = skb->data[hdrlen + 3] >> 6;
816 if (test_bit(keyix, sc->keymap))
817 rx_status.flag |= RX_FLAG_DECRYPTED;
819 if (ah->sw_mgmt_crypto &&
820 (rx_status.flag & RX_FLAG_DECRYPTED) &&
821 ieee80211_is_mgmt(fc)) {
822 /* Use software decrypt for management frames. */
823 rx_status.flag &= ~RX_FLAG_DECRYPTED;
826 /* We will now give hardware our shiny new allocated skb */
827 bf->bf_mpdu = requeue_skb;
828 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
829 sc->rx.bufsize,
830 DMA_FROM_DEVICE);
831 if (unlikely(dma_mapping_error(sc->dev,
832 bf->bf_buf_addr))) {
833 dev_kfree_skb_any(requeue_skb);
834 bf->bf_mpdu = NULL;
835 ath_print(common, ATH_DBG_FATAL,
836 "dma_mapping_error() on RX\n");
837 ath_rx_send_to_mac80211(hw, sc, skb, &rx_status);
838 break;
840 bf->bf_dmacontext = bf->bf_buf_addr;
843 * change the default rx antenna if rx diversity chooses the
844 * other antenna 3 times in a row.
846 if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
847 if (++sc->rx.rxotherant >= 3)
848 ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna);
849 } else {
850 sc->rx.rxotherant = 0;
853 if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
854 SC_OP_WAIT_FOR_CAB |
855 SC_OP_WAIT_FOR_PSPOLL_DATA)))
856 ath_rx_ps(sc, skb);
858 ath_rx_send_to_mac80211(hw, sc, skb, &rx_status);
860 requeue:
861 list_move_tail(&bf->list, &sc->rx.rxbuf);
862 ath_rx_buf_link(sc, bf);
863 } while (1);
865 spin_unlock_bh(&sc->rx.rxbuflock);
867 return 0;
868 #undef PA2DESC