arch/powerpc/platforms/pseries/xics.c

   1 /*
   2  * arch/powerpc/platforms/pseries/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/threads.h>
  14 #include <linux/kernel.h>
  15 #include <linux/irq.h>
  16 #include <linux/smp.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/init.h>
  19 #include <linux/radix-tree.h>
  20 #include <linux/cpu.h>
  21 #include <linux/of.h>
  22
  23 #include <asm/firmware.h>
  24 #include <asm/io.h>
  25 #include <asm/pgtable.h>
  26 #include <asm/smp.h>
  27 #include <asm/rtas.h>
  28 #include <asm/hvcall.h>
  29 #include <asm/machdep.h>
  30
  31 #include "xics.h"
  32 #include "plpar_wrappers.h"
  33
  34 static struct irq_host *xics_host;
  35
  36 #define XICS_IPI                2
  37 #define XICS_IRQ_SPURIOUS       0
  38
  39 /* Want a priority other than 0.  Various HW issues require this. */
  40 #define DEFAULT_PRIORITY        5
  41
  42 /*
  43  * Mark IPIs as higher priority so we can take them inside interrupts that
  44  * arent marked IRQF_DISABLED
  45  */
  46 #define IPI_PRIORITY            4
  47
  48 static unsigned int default_server = 0xFF;
  49 static unsigned int default_distrib_server = 0;
  50 static unsigned int interrupt_server_size = 8;
  51
  52 /* RTAS service tokens */
  53 static int ibm_get_xive;
  54 static int ibm_set_xive;
  55 static int ibm_int_on;
  56 static int ibm_int_off;
  57
  58
  59 /* Direct hardware low level accessors */
  60
  61 /* The part of the interrupt presentation layer that we care about */
  62 struct xics_ipl {
  63         union {
  64                 u32 word;
  65                 u8 bytes[4];
  66         } xirr_poll;
  67         union {
  68                 u32 word;
  69                 u8 bytes[4];
  70         } xirr;
  71         u32 dummy;
  72         union {
  73                 u32 word;
  74                 u8 bytes[4];
  75         } qirr;
  76 };
  77
  78 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  79
  80 static inline unsigned int direct_xirr_info_get(void)
  81 {
  82         int cpu = smp_processor_id();
  83
  84         return in_be32(&xics_per_cpu[cpu]->xirr.word);
  85 }
  86
  87 static inline void direct_xirr_info_set(unsigned int value)
  88 {
  89         int cpu = smp_processor_id();
  90
  91         out_be32(&xics_per_cpu[cpu]->xirr.word, value);
  92 }
  93
  94 static inline void direct_cppr_info(u8 value)
  95 {
  96         int cpu = smp_processor_id();
  97
  98         out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
  99 }
 100
 101 static inline void direct_qirr_info(int n_cpu, u8 value)
 102 {
 103         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 104 }
 105
 106
 107 /* LPAR low level accessors */
 108
 109 static inline unsigned int lpar_xirr_info_get(void)
 110 {
 111         unsigned long lpar_rc;
 112         unsigned long return_value;
 113
 114         lpar_rc = plpar_xirr(&return_value);
 115         if (lpar_rc != H_SUCCESS)
 116                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 117         return (unsigned int)return_value;
 118 }
 119
 120 static inline void lpar_xirr_info_set(unsigned int value)
 121 {
 122         unsigned long lpar_rc;
 123
 124         lpar_rc = plpar_eoi(value);
 125         if (lpar_rc != H_SUCCESS)
 126                 panic("bad return code EOI - rc = %ld, value=%x\n", lpar_rc,
 127                       value);
 128 }
 129
 130 static inline void lpar_cppr_info(u8 value)
 131 {
 132         unsigned long lpar_rc;
 133
 134         lpar_rc = plpar_cppr(value);
 135         if (lpar_rc != H_SUCCESS)
 136                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 137 }
 138
 139 static inline void lpar_qirr_info(int n_cpu , u8 value)
 140 {
 141         unsigned long lpar_rc;
 142
 143         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 144         if (lpar_rc != H_SUCCESS)
 145                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 146 }
 147
 148
 149 /* Interface to generic irq subsystem */
 150
 151 #ifdef CONFIG_SMP
 152 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 153 {
 154         int server;
 155         /* For the moment only implement delivery to all cpus or one cpu */
 156         cpumask_t cpumask = irq_desc[virq].affinity;
 157         cpumask_t tmp = CPU_MASK_NONE;
 158
 159         if (!distribute_irqs)
 160                 return default_server;
 161
 162         if (!cpus_equal(cpumask, CPU_MASK_ALL)) {
 163                 cpus_and(tmp, cpu_online_map, cpumask);
 164
 165                 server = first_cpu(tmp);
 166
 167                 if (server < NR_CPUS)
 168                         return get_hard_smp_processor_id(server);
 169
 170                 if (strict_check)
 171                         return -1;
 172         }
 173
 174         if (cpus_equal(cpu_online_map, cpu_present_map))
 175                 return default_distrib_server;
 176
 177         return default_server;
 178 }
 179 #else
 180 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 181 {
 182         return default_server;
 183 }
 184 #endif
 185
 186 static void xics_unmask_irq(unsigned int virq)
 187 {
 188         unsigned int irq;
 189         int call_status;
 190         int server;
 191
 192         pr_debug("xics: unmask virq %d\n", virq);
 193
 194         irq = (unsigned int)irq_map[virq].hwirq;
 195         pr_debug(" -> map to hwirq 0x%x\n", irq);
 196         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 197                 return;
 198
 199         server = get_irq_server(virq, 0);
 200
 201         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 202                                 DEFAULT_PRIORITY);
 203         if (call_status != 0) {
 204                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
 205                        "returned %d\n", irq, call_status);
 206                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
 207                 return;
 208         }
 209
 210         /* Now unmask the interrupt (often a no-op) */
 211         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 212         if (call_status != 0) {
 213                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
 214                        "returned %d\n", irq, call_status);
 215                 return;
 216         }
 217 }
 218
 219 static unsigned int xics_startup(unsigned int virq)
 220 {
 221         /* unmask it */
 222         xics_unmask_irq(virq);
 223         return 0;
 224 }
 225
 226 static void xics_mask_real_irq(unsigned int irq)
 227 {
 228         int call_status;
 229
 230         if (irq == XICS_IPI)
 231                 return;
 232
 233         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 234         if (call_status != 0) {
 235                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
 236                        "ibm_int_off returned %d\n", irq, call_status);
 237                 return;
 238         }
 239
 240         /* Have to set XIVE to 0xff to be able to remove a slot */
 241         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
 242                                 default_server, 0xff);
 243         if (call_status != 0) {
 244                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
 245                        " returned %d\n", irq, call_status);
 246                 return;
 247         }
 248 }
 249
 250 static void xics_mask_irq(unsigned int virq)
 251 {
 252         unsigned int irq;
 253
 254         pr_debug("xics: mask virq %d\n", virq);
 255
 256         irq = (unsigned int)irq_map[virq].hwirq;
 257         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 258                 return;
 259         xics_mask_real_irq(irq);
 260 }
 261
 262 static void xics_mask_unknown_vec(unsigned int vec)
 263 {
 264         printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
 265         xics_mask_real_irq(vec);
 266 }
 267
 268 static inline unsigned int xics_xirr_vector(unsigned int xirr)
 269 {
 270         /*
 271          * The top byte is the old cppr, to be restored on EOI.
 272          * The remaining 24 bits are the vector.
 273          */
 274         return xirr & 0x00ffffff;
 275 }
 276
 277 static unsigned int xics_get_irq_direct(void)
 278 {
 279         unsigned int xirr = direct_xirr_info_get();
 280         unsigned int vec = xics_xirr_vector(xirr);
 281         unsigned int irq;
 282
 283         if (vec == XICS_IRQ_SPURIOUS)
 284                 return NO_IRQ;
 285
 286         irq = irq_radix_revmap_lookup(xics_host, vec);
 287         if (likely(irq != NO_IRQ))
 288                 return irq;
 289
 290         /* We don't have a linux mapping, so have rtas mask it. */
 291         xics_mask_unknown_vec(vec);
 292
 293         /* We might learn about it later, so EOI it */
 294         direct_xirr_info_set(xirr);
 295         return NO_IRQ;
 296 }
 297
 298 static unsigned int xics_get_irq_lpar(void)
 299 {
 300         unsigned int xirr = lpar_xirr_info_get();
 301         unsigned int vec = xics_xirr_vector(xirr);
 302         unsigned int irq;
 303
 304         if (vec == XICS_IRQ_SPURIOUS)
 305                 return NO_IRQ;
 306
 307         irq = irq_radix_revmap_lookup(xics_host, vec);
 308         if (likely(irq != NO_IRQ))
 309                 return irq;
 310
 311         /* We don't have a linux mapping, so have RTAS mask it. */
 312         xics_mask_unknown_vec(vec);
 313
 314         /* We might learn about it later, so EOI it */
 315         lpar_xirr_info_set(xirr);
 316         return NO_IRQ;
 317 }
 318
 319 static void xics_eoi_direct(unsigned int virq)
 320 {
 321         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 322
 323         iosync();
 324         direct_xirr_info_set((0xff << 24) | irq);
 325 }
 326
 327 static void xics_eoi_lpar(unsigned int virq)
 328 {
 329         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 330
 331         iosync();
 332         lpar_xirr_info_set((0xff << 24) | irq);
 333 }
 334
 335 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
 336 {
 337         unsigned int irq;
 338         int status;
 339         int xics_status[2];
 340         int irq_server;
 341
 342         irq = (unsigned int)irq_map[virq].hwirq;
 343         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 344                 return;
 345
 346         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 347
 348         if (status) {
 349                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
 350                        "returns %d\n", irq, status);
 351                 return;
 352         }
 353
 354         /*
 355          * For the moment only implement delivery to all cpus or one cpu.
 356          * Get current irq_server for the given irq
 357          */
 358         irq_server = get_irq_server(virq, 1);
 359         if (irq_server == -1) {
 360                 char cpulist[128];
 361                 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
 362                 printk(KERN_WARNING "xics_set_affinity: No online cpus in "
 363                                 "the mask %s for irq %d\n", cpulist, virq);
 364                 return;
 365         }
 366
 367         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 368                                 irq, irq_server, xics_status[1]);
 369
 370         if (status) {
 371                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
 372                        "returns %d\n", irq, status);
 373                 return;
 374         }
 375 }
 376
 377 static struct irq_chip xics_pic_direct = {
 378         .typename = " XICS     ",
 379         .startup = xics_startup,
 380         .mask = xics_mask_irq,
 381         .unmask = xics_unmask_irq,
 382         .eoi = xics_eoi_direct,
 383         .set_affinity = xics_set_affinity
 384 };
 385
 386 static struct irq_chip xics_pic_lpar = {
 387         .typename = " XICS     ",
 388         .startup = xics_startup,
 389         .mask = xics_mask_irq,
 390         .unmask = xics_unmask_irq,
 391         .eoi = xics_eoi_lpar,
 392         .set_affinity = xics_set_affinity
 393 };
 394
 395
 396 /* Interface to arch irq controller subsystem layer */
 397
 398 /* Points to the irq_chip we're actually using */
 399 static struct irq_chip *xics_irq_chip;
 400
 401 static int xics_host_match(struct irq_host *h, struct device_node *node)
 402 {
 403         /* IBM machines have interrupt parents of various funky types for things
 404          * like vdevices, events, etc... The trick we use here is to match
 405          * everything here except the legacy 8259 which is compatible "chrp,iic"
 406          */
 407         return !of_device_is_compatible(node, "chrp,iic");
 408 }
 409
 410 static int xics_host_map(struct irq_host *h, unsigned int virq,
 411                          irq_hw_number_t hw)
 412 {
 413         pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
 414
 415         /* Insert the interrupt mapping into the radix tree for fast lookup */
 416         irq_radix_revmap_insert(xics_host, virq, hw);
 417
 418         get_irq_desc(virq)->status |= IRQ_LEVEL;
 419         set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
 420         return 0;
 421 }
 422
 423 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
 424                            u32 *intspec, unsigned int intsize,
 425                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 426
 427 {
 428         /* Current xics implementation translates everything
 429          * to level. It is not technically right for MSIs but this
 430          * is irrelevant at this point. We might get smarter in the future
 431          */
 432         *out_hwirq = intspec[0];
 433         *out_flags = IRQ_TYPE_LEVEL_LOW;
 434
 435         return 0;
 436 }
 437
 438 static struct irq_host_ops xics_host_ops = {
 439         .match = xics_host_match,
 440         .map = xics_host_map,
 441         .xlate = xics_host_xlate,
 442 };
 443
 444 static void __init xics_init_host(void)
 445 {
 446         if (firmware_has_feature(FW_FEATURE_LPAR))
 447                 xics_irq_chip = &xics_pic_lpar;
 448         else
 449                 xics_irq_chip = &xics_pic_direct;
 450
 451         xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
 452                                    XICS_IRQ_SPURIOUS);
 453         BUG_ON(xics_host == NULL);
 454         irq_set_default_host(xics_host);
 455 }
 456
 457
 458 /* Inter-processor interrupt support */
 459
 460 #ifdef CONFIG_SMP
 461 /*
 462  * XICS only has a single IPI, so encode the messages per CPU
 463  */
 464 struct xics_ipi_struct {
 465         unsigned long value;
 466         } ____cacheline_aligned;
 467
 468 static struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
 469
 470 static inline void smp_xics_do_message(int cpu, int msg)
 471 {
 472         set_bit(msg, &xics_ipi_message[cpu].value);
 473         mb();
 474         if (firmware_has_feature(FW_FEATURE_LPAR))
 475                 lpar_qirr_info(cpu, IPI_PRIORITY);
 476         else
 477                 direct_qirr_info(cpu, IPI_PRIORITY);
 478 }
 479
 480 void smp_xics_message_pass(int target, int msg)
 481 {
 482         unsigned int i;
 483
 484         if (target < NR_CPUS) {
 485                 smp_xics_do_message(target, msg);
 486         } else {
 487                 for_each_online_cpu(i) {
 488                         if (target == MSG_ALL_BUT_SELF
 489                             && i == smp_processor_id())
 490                                 continue;
 491                         smp_xics_do_message(i, msg);
 492                 }
 493         }
 494 }
 495
 496 static irqreturn_t xics_ipi_dispatch(int cpu)
 497 {
 498         WARN_ON(cpu_is_offline(cpu));
 499
 500         while (xics_ipi_message[cpu].value) {
 501                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 502                                        &xics_ipi_message[cpu].value)) {
 503                         mb();
 504                         smp_message_recv(PPC_MSG_CALL_FUNCTION);
 505                 }
 506                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 507                                        &xics_ipi_message[cpu].value)) {
 508                         mb();
 509                         smp_message_recv(PPC_MSG_RESCHEDULE);
 510                 }
 511                 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
 512                                        &xics_ipi_message[cpu].value)) {
 513                         mb();
 514                         smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
 515                 }
 516 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 517                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 518                                        &xics_ipi_message[cpu].value)) {
 519                         mb();
 520                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 521                 }
 522 #endif
 523         }
 524         return IRQ_HANDLED;
 525 }
 526
 527 static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
 528 {
 529         int cpu = smp_processor_id();
 530
 531         direct_qirr_info(cpu, 0xff);
 532
 533         return xics_ipi_dispatch(cpu);
 534 }
 535
 536 static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
 537 {
 538         int cpu = smp_processor_id();
 539
 540         lpar_qirr_info(cpu, 0xff);
 541
 542         return xics_ipi_dispatch(cpu);
 543 }
 544
 545 static void xics_request_ipi(void)
 546 {
 547         unsigned int ipi;
 548         int rc;
 549
 550         ipi = irq_create_mapping(xics_host, XICS_IPI);
 551         BUG_ON(ipi == NO_IRQ);
 552
 553         /*
 554          * IPIs are marked IRQF_DISABLED as they must run with irqs
 555          * disabled
 556          */
 557         set_irq_handler(ipi, handle_percpu_irq);
 558         if (firmware_has_feature(FW_FEATURE_LPAR))
 559                 rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
 560                                 "IPI", NULL);
 561         else
 562                 rc = request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
 563                                 "IPI", NULL);
 564         BUG_ON(rc);
 565 }
 566
 567 int __init smp_xics_probe(void)
 568 {
 569         xics_request_ipi();
 570
 571         return cpus_weight(cpu_possible_map);
 572 }
 573
 574 #endif /* CONFIG_SMP */
 575
 576
 577 /* Initialization */
 578
 579 static void xics_update_irq_servers(void)
 580 {
 581         int i, j;
 582         struct device_node *np;
 583         u32 ilen;
 584         const u32 *ireg, *isize;
 585         u32 hcpuid;
 586
 587         /* Find the server numbers for the boot cpu. */
 588         np = of_get_cpu_node(boot_cpuid, NULL);
 589         BUG_ON(!np);
 590
 591         ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
 592         if (!ireg) {
 593                 of_node_put(np);
 594                 return;
 595         }
 596
 597         i = ilen / sizeof(int);
 598         hcpuid = get_hard_smp_processor_id(boot_cpuid);
 599
 600         /* Global interrupt distribution server is specified in the last
 601          * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
 602          * entry fom this property for current boot cpu id and use it as
 603          * default distribution server
 604          */
 605         for (j = 0; j < i; j += 2) {
 606                 if (ireg[j] == hcpuid) {
 607                         default_server = hcpuid;
 608                         default_distrib_server = ireg[j+1];
 609                 }
 610         }
 611
 612         /* get the bit size of server numbers */
 613         isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
 614         if (isize)
 615                 interrupt_server_size = *isize;
 616
 617         of_node_put(np);
 618 }
 619
 620 static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
 621                                      unsigned long size)
 622 {
 623         int i;
 624
 625         /* This may look gross but it's good enough for now, we don't quite
 626          * have a hard -> linux processor id matching.
 627          */
 628         for_each_possible_cpu(i) {
 629                 if (!cpu_present(i))
 630                         continue;
 631                 if (hw_id == get_hard_smp_processor_id(i)) {
 632                         xics_per_cpu[i] = ioremap(addr, size);
 633                         return;
 634                 }
 635         }
 636 }
 637
 638 static void __init xics_init_one_node(struct device_node *np,
 639                                       unsigned int *indx)
 640 {
 641         unsigned int ilen;
 642         const u32 *ireg;
 643
 644         /* This code does the theorically broken assumption that the interrupt
 645          * server numbers are the same as the hard CPU numbers.
 646          * This happens to be the case so far but we are playing with fire...
 647          * should be fixed one of these days. -BenH.
 648          */
 649         ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
 650
 651         /* Do that ever happen ? we'll know soon enough... but even good'old
 652          * f80 does have that property ..
 653          */
 654         WARN_ON(ireg == NULL);
 655         if (ireg) {
 656                 /*
 657                  * set node starting index for this node
 658                  */
 659                 *indx = *ireg;
 660         }
 661         ireg = of_get_property(np, "reg", &ilen);
 662         if (!ireg)
 663                 panic("xics_init_IRQ: can't find interrupt reg property");
 664
 665         while (ilen >= (4 * sizeof(u32))) {
 666                 unsigned long addr, size;
 667
 668                 /* XXX Use proper OF parsing code here !!! */
 669                 addr = (unsigned long)*ireg++ << 32;
 670                 ilen -= sizeof(u32);
 671                 addr |= *ireg++;
 672                 ilen -= sizeof(u32);
 673                 size = (unsigned long)*ireg++ << 32;
 674                 ilen -= sizeof(u32);
 675                 size |= *ireg++;
 676                 ilen -= sizeof(u32);
 677                 xics_map_one_cpu(*indx, addr, size);
 678                 (*indx)++;
 679         }
 680 }
 681
 682 void __init xics_init_IRQ(void)
 683 {
 684         struct device_node *np;
 685         u32 indx = 0;
 686         int found = 0;
 687
 688         ppc64_boot_msg(0x20, "XICS Init");
 689
 690         ibm_get_xive = rtas_token("ibm,get-xive");
 691         ibm_set_xive = rtas_token("ibm,set-xive");
 692         ibm_int_on  = rtas_token("ibm,int-on");
 693         ibm_int_off = rtas_token("ibm,int-off");
 694
 695         for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
 696                 found = 1;
 697                 if (firmware_has_feature(FW_FEATURE_LPAR)) {
 698                         of_node_put(np);
 699                         break;
 700                         }
 701                 xics_init_one_node(np, &indx);
 702         }
 703         if (found == 0)
 704                 return;
 705
 706         xics_update_irq_servers();
 707         xics_init_host();
 708
 709         if (firmware_has_feature(FW_FEATURE_LPAR))
 710                 ppc_md.get_irq = xics_get_irq_lpar;
 711         else
 712                 ppc_md.get_irq = xics_get_irq_direct;
 713
 714         xics_setup_cpu();
 715
 716         ppc64_boot_msg(0x21, "XICS Done");
 717 }
 718
 719 /* Cpu startup, shutdown, and hotplug */
 720
 721 static void xics_set_cpu_priority(unsigned char cppr)
 722 {
 723         if (firmware_has_feature(FW_FEATURE_LPAR))
 724                 lpar_cppr_info(cppr);
 725         else
 726                 direct_cppr_info(cppr);
 727         iosync();
 728 }
 729
 730 /* Have the calling processor join or leave the specified global queue */
 731 static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
 732 {
 733         int status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 734                 (1UL << interrupt_server_size) - 1 - gserver, join);
 735         WARN_ON(status < 0);
 736 }
 737
 738 void xics_setup_cpu(void)
 739 {
 740         xics_set_cpu_priority(0xff);
 741
 742         xics_set_cpu_giq(default_distrib_server, 1);
 743 }
 744
 745 void xics_teardown_cpu(void)
 746 {
 747         int cpu = smp_processor_id();
 748
 749         xics_set_cpu_priority(0);
 750
 751         /* Clear any pending IPI request */
 752         if (firmware_has_feature(FW_FEATURE_LPAR))
 753                 lpar_qirr_info(cpu, 0xff);
 754         else
 755                 direct_qirr_info(cpu, 0xff);
 756 }
 757
 758 void xics_kexec_teardown_cpu(int secondary)
 759 {
 760         unsigned int ipi;
 761         struct irq_desc *desc;
 762
 763         xics_teardown_cpu();
 764
 765         /*
 766          * we need to EOI the IPI
 767          *
 768          * probably need to check all the other interrupts too
 769          * should we be flagging idle loop instead?
 770          * or creating some task to be scheduled?
 771          */
 772
 773         ipi = irq_find_mapping(xics_host, XICS_IPI);
 774         if (ipi == XICS_IRQ_SPURIOUS)
 775                 return;
 776         desc = get_irq_desc(ipi);
 777         if (desc->chip && desc->chip->eoi)
 778                 desc->chip->eoi(ipi);
 779
 780         /*
 781          * Some machines need to have at least one cpu in the GIQ,
 782          * so leave the master cpu in the group.
 783          */
 784         if (secondary)
 785                 xics_set_cpu_giq(default_distrib_server, 0);
 786 }
 787
 788 #ifdef CONFIG_HOTPLUG_CPU
 789
 790 /* Interrupts are disabled. */
 791 void xics_migrate_irqs_away(void)
 792 {
 793         int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
 794         unsigned int irq, virq;
 795
 796         /* If we used to be the default server, move to the new "boot_cpuid" */
 797         if (hw_cpu == default_server)
 798                 xics_update_irq_servers();
 799
 800         /* Reject any interrupt that was queued to us... */
 801         xics_set_cpu_priority(0);
 802
 803         /* Remove ourselves from the global interrupt queue */
 804         xics_set_cpu_giq(default_distrib_server, 0);
 805
 806         /* Allow IPIs again... */
 807         xics_set_cpu_priority(DEFAULT_PRIORITY);
 808
 809         for_each_irq(virq) {
 810                 struct irq_desc *desc;
 811                 int xics_status[2];
 812                 int status;
 813                 unsigned long flags;
 814
 815                 /* We cant set affinity on ISA interrupts */
 816                 if (virq < NUM_ISA_INTERRUPTS)
 817                         continue;
 818                 if (irq_map[virq].host != xics_host)
 819                         continue;
 820                 irq = (unsigned int)irq_map[virq].hwirq;
 821                 /* We need to get IPIs still. */
 822                 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 823                         continue;
 824                 desc = get_irq_desc(virq);
 825
 826                 /* We only need to migrate enabled IRQS */
 827                 if (desc == NULL || desc->chip == NULL
 828                     || desc->action == NULL
 829                     || desc->chip->set_affinity == NULL)
 830                         continue;
 831
 832                 spin_lock_irqsave(&desc->lock, flags);
 833
 834                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 835                 if (status) {
 836                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
 837                                         "ibm,get-xive returns %d\n",
 838                                         virq, status);
 839                         goto unlock;
 840                 }
 841
 842                 /*
 843                  * We only support delivery to all cpus or to one cpu.
 844                  * The irq has to be migrated only in the single cpu
 845                  * case.
 846                  */
 847                 if (xics_status[0] != hw_cpu)
 848                         goto unlock;
 849
 850                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 851                        virq, cpu);
 852
 853                 /* Reset affinity to all cpus */
 854                 irq_desc[virq].affinity = CPU_MASK_ALL;
 855                 desc->chip->set_affinity(virq, CPU_MASK_ALL);
 856 unlock:
 857                 spin_unlock_irqrestore(&desc->lock, flags);
 858         }
 859 }
 860 #endif