drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <subdev/clock.h>
  26 #include <subdev/bios.h>
  27 #include <subdev/bios/pll.h>
  28
  29 #include "pll.h"
  30
  31 struct nv50_clock_priv {
  32         struct nouveau_clock base;
  33 };
  34
  35 static int
  36 nv50_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
  37 {
  38         struct nv50_clock_priv *priv = (void *)clk;
  39         struct nouveau_bios *bios = nouveau_bios(priv);
  40         struct nvbios_pll info;
  41         int N1, M1, N2, M2, P;
  42         int ret;
  43
  44         ret = nvbios_pll_parse(bios, type, &info);
  45         if (ret) {
  46                 nv_error(clk, "failed to retrieve pll data, %d\n", ret);
  47                 return ret;
  48         }
  49
  50         ret = nv04_pll_calc(clk, &info, freq, &N1, &M1, &N2, &M2, &P);
  51         if (!ret) {
  52                 nv_error(clk, "failed pll calculation\n");
  53                 return ret;
  54         }
  55
  56         switch (info.type) {
  57         case PLL_VPLL0:
  58         case PLL_VPLL1:
  59                 nv_wr32(priv, info.reg + 0, 0x10000611);
  60                 nv_mask(priv, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1);
  61                 nv_mask(priv, info.reg + 8, 0x7fff00ff, (P  << 28) |
  62                                                         (M2 << 16) | N2);
  63                 break;
  64         case PLL_MEMORY:
  65                 nv_mask(priv, info.reg + 0, 0x01ff0000, (P << 22) |
  66                                                         (info.bias_p << 19) |
  67                                                         (P << 16));
  68                 nv_wr32(priv, info.reg + 4, (N1 << 8) | M1);
  69                 break;
  70         default:
  71                 nv_mask(priv, info.reg + 0, 0x00070000, (P << 16));
  72                 nv_wr32(priv, info.reg + 4, (N1 << 8) | M1);
  73                 break;
  74         }
  75
  76         return 0;
  77 }
  78
  79 static int
  80 nv50_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  81                 struct nouveau_oclass *oclass, void *data, u32 size,
  82                 struct nouveau_object **pobject)
  83 {
  84         struct nv50_clock_priv *priv;
  85         int ret;
  86
  87         ret = nouveau_clock_create(parent, engine, oclass, &priv);
  88         *pobject = nv_object(priv);
  89         if (ret)
  90                 return ret;
  91
  92         priv->base.pll_set = nv50_clock_pll_set;
  93         priv->base.pll_calc = nv04_clock_pll_calc;
  94         return 0;
  95 }
  96
  97 struct nouveau_oclass
  98 nv50_clock_oclass = {
  99         .handle = NV_SUBDEV(CLOCK, 0x50),
 100         .ofuncs = &(struct nouveau_ofuncs) {
 101                 .ctor = nv50_clock_ctor,
 102                 .dtor = _nouveau_clock_dtor,
 103                 .init = _nouveau_clock_init,
 104                 .fini = _nouveau_clock_fini,
 105         },
 106 };