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staging: rtl8192e: Cleanup checkpatch -f errors - Part X
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / rtl8192e / rtl_dm.c
blob291ec3e9d22ca07f68652901650dc3d2ca9fe18b
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
19 #include "rtl_core.h"
20 #include "rtl_dm.h"
21 #include "r8192E_hw.h"
22 #include "r8192E_phy.h"
23 #include "r8192E_phyreg.h"
24 #include "r8190P_rtl8256.h"
25 #include "r8192E_cmdpkt.h"
26
27 /*---------------------------Define Local Constant---------------------------*/
28 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
29 0x5e4322,
30 0x5e4322,
31 0x5ea44f,
32 0x5e4322,
33 0x604322,
34 0xa44f,
35 0x5e4322,
36 0x5e4332
37 };
38
39 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
40 0x5e4322,
41 0x5e4322,
42 0x5e4322,
43 0x5e4322,
44 0x604322,
45 0xa44f,
46 0x5e4322,
47 0x5e4322
48 };
49
50 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
51 0x5e4322,
52 0xa44f,
53 0x5ea44f,
54 0x5e4322,
55 0x604322,
56 0x5e4322,
57 0x5e4322,
58 0x5e4332
59 };
60
61 #define RTK_UL_EDCA 0xa44f
62 #define RTK_DL_EDCA 0x5e4322
63 /*---------------------------Define Local Constant---------------------------*/
64
65
66 /*------------------------Define global variable-----------------------------*/
67 struct dig_t dm_digtable;
68 u8 dm_shadow[16][256] = {
69 {0}
70 };
71
72 struct drx_path_sel DM_RxPathSelTable;
73 /*------------------------Define global variable-----------------------------*/
74
75
76 /*------------------------Define local variable------------------------------*/
77 /*------------------------Define local variable------------------------------*/
78
79
80
81 /*---------------------Define local function prototype-----------------------*/
82 static void dm_check_rate_adaptive(struct net_device *dev);
83
84 static void dm_init_bandwidth_autoswitch(struct net_device *dev);
85 static void dm_bandwidth_autoswitch(struct net_device *dev);
86
87
88 static void dm_check_txpower_tracking(struct net_device *dev);
89
90
91
92
93
94 static void dm_bb_initialgain_restore(struct net_device *dev);
95
96
97 static void dm_bb_initialgain_backup(struct net_device *dev);
98
99 static void dm_dig_init(struct net_device *dev);
100 static void dm_ctrl_initgain_byrssi(struct net_device *dev);
101 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
102 static void dm_ctrl_initgain_byrssi_by_driverrssi(struct net_device *dev);
103 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
104 static void dm_initial_gain(struct net_device *dev);
105 static void dm_pd_th(struct net_device *dev);
106 static void dm_cs_ratio(struct net_device *dev);
107
108 static void dm_init_ctstoself(struct net_device *dev);
109 static void dm_Init_WA_Broadcom_IOT(struct net_device *dev);
110
111 static void dm_check_edca_turbo(struct net_device *dev);
112
113 static void dm_check_pbc_gpio(struct net_device *dev);
114
115
116 static void dm_check_rx_path_selection(struct net_device *dev);
117 static void dm_init_rxpath_selection(struct net_device *dev);
118 static void dm_rxpath_sel_byrssi(struct net_device *dev);
119
120
121 static void dm_init_fsync(struct net_device *dev);
122 static void dm_deInit_fsync(struct net_device *dev);
123
124 static void dm_check_txrateandretrycount(struct net_device *dev);
125 static void dm_check_ac_dc_power(struct net_device *dev);
126
127 /*---------------------Define local function prototype-----------------------*/
128
129 static void dm_init_dynamic_txpower(struct net_device *dev);
130 static void dm_dynamic_txpower(struct net_device *dev);
131
132
133 static void dm_send_rssi_tofw(struct net_device *dev);
134 static void dm_ctstoself(struct net_device *dev);
135 /*---------------------------Define function prototype------------------------*/
136
137 extern void
138 init_hal_dm(struct net_device *dev)
139 {
140 struct r8192_priv *priv = rtllib_priv(dev);
141 priv->DM_Type = DM_Type_ByDriver;
142
143 priv->undecorated_smoothed_pwdb = -1;
144
145 dm_init_dynamic_txpower(dev);
146
147 init_rate_adaptive(dev);
148
149 dm_dig_init(dev);
150 dm_init_edca_turbo(dev);
151 dm_init_bandwidth_autoswitch(dev);
152 dm_init_fsync(dev);
153 dm_init_rxpath_selection(dev);
154 dm_init_ctstoself(dev);
155 if (IS_HARDWARE_TYPE_8192SE(dev))
156 dm_Init_WA_Broadcom_IOT(dev);
157
158 INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq, (void *)dm_CheckRfCtrlGPIO, dev);
159 }
160
161 extern void deinit_hal_dm(struct net_device *dev)
162 {
163
164 dm_deInit_fsync(dev);
165
166 }
167
168 extern void hal_dm_watchdog(struct net_device *dev)
169 {
170 struct r8192_priv *priv = rtllib_priv(dev);
171 if (priv->being_init_adapter)
172 return;
173
174 dm_check_ac_dc_power(dev);
175
176 dm_check_pbc_gpio(dev);
177 dm_check_txrateandretrycount(dev);
178 dm_check_edca_turbo(dev);
179
180 dm_check_rate_adaptive(dev);
181 dm_dynamic_txpower(dev);
182 dm_check_txpower_tracking(dev);
183
184 dm_ctrl_initgain_byrssi(dev);
185 dm_bandwidth_autoswitch(dev);
186
187 dm_check_rx_path_selection(dev);
188 dm_check_fsync(dev);
189
190 dm_send_rssi_tofw(dev);
191 dm_ctstoself(dev);
192 }
193
194 void dm_check_ac_dc_power(struct net_device *dev)
195 {
196 struct r8192_priv *priv = rtllib_priv(dev);
197 static char *ac_dc_check_script_path = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
198 char *argv[] = {ac_dc_check_script_path, DRV_NAME, NULL};
199 static char *envp[] = {"HOME=/",
200 "TERM=linux",
201 "PATH=/usr/bin:/bin",
202 NULL};
203
204 if (priv->ResetProgress == RESET_TYPE_SILENT) {
205 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF),
206 "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n");
207 return;
208 }
209
210 if (priv->rtllib->state != RTLLIB_LINKED)
211 return;
212 call_usermodehelper(ac_dc_check_script_path, argv, envp, 1);
213
214 return;
215 };
216
217
218 extern void init_rate_adaptive(struct net_device *dev)
219 {
220
221 struct r8192_priv *priv = rtllib_priv(dev);
222 struct rate_adaptive *pra = (struct rate_adaptive *)&priv->rate_adaptive;
223
224 pra->ratr_state = DM_RATR_STA_MAX;
225 pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
226 pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
227 pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
228
229 pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
230 pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
231 pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
232
233 if (priv->CustomerID == RT_CID_819x_Netcore)
234 pra->ping_rssi_enable = 1;
235 else
236 pra->ping_rssi_enable = 0;
237 pra->ping_rssi_thresh_for_ra = 15;
238
239
240 if (priv->rf_type == RF_2T4R) {
241 pra->upper_rssi_threshold_ratr = 0x8f0f0000;
242 pra->middle_rssi_threshold_ratr = 0x8f0ff000;
243 pra->low_rssi_threshold_ratr = 0x8f0ff001;
244 pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
245 pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
246 pra->ping_rssi_ratr = 0x0000000d;
247 } else if (priv->rf_type == RF_1T2R) {
248 pra->upper_rssi_threshold_ratr = 0x000fc000;
249 pra->middle_rssi_threshold_ratr = 0x000ff000;
250 pra->low_rssi_threshold_ratr = 0x000ff001;
251 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
252 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
253 pra->ping_rssi_ratr = 0x0000000d;
254 }
255
256 }
257
258
259 static void dm_check_rate_adaptive(struct net_device *dev)
260 {
261 struct r8192_priv *priv = rtllib_priv(dev);
262 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
263 struct rate_adaptive *pra = (struct rate_adaptive *)&priv->rate_adaptive;
264 u32 currentRATR, targetRATR = 0;
265 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
266 bool bshort_gi_enabled = false;
267 static u8 ping_rssi_state;
268
269 if (IS_NIC_DOWN(priv)) {
270 RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
271 return;
272 }
273
274 if (pra->rate_adaptive_disabled)
275 return;
276
277 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
278 priv->rtllib->mode == WIRELESS_MODE_N_5G))
279 return;
280
281 if (priv->rtllib->state == RTLLIB_LINKED) {
282
283 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
284 (!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
285
286
287 pra->upper_rssi_threshold_ratr =
288 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
289
290 pra->middle_rssi_threshold_ratr =
291 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
292
293 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
294 pra->low_rssi_threshold_ratr =
295 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
296 } else {
297 pra->low_rssi_threshold_ratr =
298 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
299 }
300 pra->ping_rssi_ratr =
301 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
302
303 if (pra->ratr_state == DM_RATR_STA_HIGH) {
304 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
305 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
306 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
307 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
308 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
309 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
310 (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
311 } else {
312 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
313 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
314 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
315 }
316
317 if (priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA) {
318 pra->ratr_state = DM_RATR_STA_HIGH;
319 targetRATR = pra->upper_rssi_threshold_ratr;
320 } else if (priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA) {
321 pra->ratr_state = DM_RATR_STA_MIDDLE;
322 targetRATR = pra->middle_rssi_threshold_ratr;
323 } else {
324 pra->ratr_state = DM_RATR_STA_LOW;
325 targetRATR = pra->low_rssi_threshold_ratr;
326 }
327
328 if (pra->ping_rssi_enable) {
329 if (priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5)) {
330 if ((priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
331 ping_rssi_state) {
332 pra->ratr_state = DM_RATR_STA_LOW;
333 targetRATR = pra->ping_rssi_ratr;
334 ping_rssi_state = 1;
335 }
336 } else {
337 ping_rssi_state = 0;
338 }
339 }
340
341 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
342 targetRATR &= 0xf00fffff;
343
344 currentRATR = read_nic_dword(dev, RATR0);
345 if (targetRATR != currentRATR) {
346 u32 ratr_value;
347 ratr_value = targetRATR;
348 RT_TRACE(COMP_RATE,
349 "currentRATR = %x, targetRATR = %x\n",
350 currentRATR, targetRATR);
351 if (priv->rf_type == RF_1T2R)
352 ratr_value &= ~(RATE_ALL_OFDM_2SS);
353 write_nic_dword(dev, RATR0, ratr_value);
354 write_nic_byte(dev, UFWP, 1);
355
356 pra->last_ratr = targetRATR;
357 }
358
359 } else {
360 pra->ratr_state = DM_RATR_STA_MAX;
361 }
362 }
363
364 static void dm_init_bandwidth_autoswitch(struct net_device *dev)
365 {
366 struct r8192_priv *priv = rtllib_priv(dev);
367
368 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
369 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
370 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
371 priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
372 }
373
374 static void dm_bandwidth_autoswitch(struct net_device *dev)
375 {
376 struct r8192_priv *priv = rtllib_priv(dev);
377
378 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
379 !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) {
380 return;
381 } else {
382 if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
383 if (priv->undecorated_smoothed_pwdb <=
384 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
385 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
386 } else {
387 if (priv->undecorated_smoothed_pwdb >=
388 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
389 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
390
391 }
392 }
393 }
394
395 static u32 OFDMSwingTable[OFDM_Table_Length] = {
396 0x7f8001fe,
397 0x71c001c7,
398 0x65400195,
399 0x5a400169,
400 0x50800142,
401 0x47c0011f,
402 0x40000100,
403 0x390000e4,
404 0x32c000cb,
405 0x2d4000b5,
406 0x288000a2,
407 0x24000090,
408 0x20000080,
409 0x1c800072,
410 0x19800066,
411 0x26c0005b,
412 0x24400051,
413 0x12000048,
414 0x10000040
415 };
416
417 static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
418 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
419 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
420 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
421 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
422 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
423 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
424 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
425 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
426 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
427 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
428 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
429 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
430 };
431
432 static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
433 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
434 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
435 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
436 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
437 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
438 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
439 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
440 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
441 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
442 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
443 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
444 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
445 };
446
447 #define Pw_Track_Flag 0x11d
448 #define Tssi_Mea_Value 0x13c
449 #define Tssi_Report_Value1 0x134
450 #define Tssi_Report_Value2 0x13e
451 #define FW_Busy_Flag 0x13f
452
453 static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
454 {
455 struct r8192_priv *priv = rtllib_priv(dev);
456 bool bHighpowerstate, viviflag = false;
457 struct dcmd_txcmd tx_cmd;
458 u8 powerlevelOFDM24G;
459 int i = 0, j = 0, k = 0;
460 u8 RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
461 u32 Value;
462 u8 Pwr_Flag;
463 u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
464 u32 delta = 0;
465
466 RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
467 write_nic_byte(dev, Pw_Track_Flag, 0);
468 write_nic_byte(dev, FW_Busy_Flag, 0);
469 priv->rtllib->bdynamic_txpower_enable = false;
470 bHighpowerstate = priv->bDynamicTxHighPower;
471
472 powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
473 RF_Type = priv->rf_type;
474 Value = (RF_Type<<8) | powerlevelOFDM24G;
475
476 RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n",
477 powerlevelOFDM24G);
478
479
480 for (j = 0; j <= 30; j++) {
481
482 tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
483 tx_cmd.Length = 4;
484 tx_cmd.Value = Value;
485 cmpk_message_handle_tx(dev, (u8 *)&tx_cmd,
486 DESC_PACKET_TYPE_INIT,
487 sizeof(struct dcmd_txcmd));
488 mdelay(1);
489 for (i = 0; i <= 30; i++) {
490 Pwr_Flag = read_nic_byte(dev, Pw_Track_Flag);
491
492 if (Pwr_Flag == 0) {
493 mdelay(1);
494
495 if (priv->bResetInProgress) {
496 RT_TRACE(COMP_POWER_TRACKING,
497 "we are in slient reset progress, so return\n");
498 write_nic_byte(dev, Pw_Track_Flag, 0);
499 write_nic_byte(dev, FW_Busy_Flag, 0);
500 return;
501 }
502 if ((priv->rtllib->eRFPowerState != eRfOn)) {
503 RT_TRACE(COMP_POWER_TRACKING,
504 "we are in power save, so return\n");
505 write_nic_byte(dev, Pw_Track_Flag, 0);
506 write_nic_byte(dev, FW_Busy_Flag, 0);
507 return;
508 }
509
510 continue;
511 }
512
513 Avg_TSSI_Meas = read_nic_word(dev, Tssi_Mea_Value);
514
515 if (Avg_TSSI_Meas == 0) {
516 write_nic_byte(dev, Pw_Track_Flag, 0);
517 write_nic_byte(dev, FW_Busy_Flag, 0);
518 return;
519 }
520
521 for (k = 0; k < 5; k++) {
522 if (k != 4)
523 tmp_report[k] = read_nic_byte(dev,
524 Tssi_Report_Value1+k);
525 else
526 tmp_report[k] = read_nic_byte(dev,
527 Tssi_Report_Value2);
528
529 RT_TRACE(COMP_POWER_TRACKING,
530 "TSSI_report_value = %d\n",
531 tmp_report[k]);
532
533 if (tmp_report[k] <= 20) {
534 viviflag = true;
535 break;
536 }
537 }
538
539 if (viviflag == true) {
540 write_nic_byte(dev, Pw_Track_Flag, 0);
541 viviflag = false;
542 RT_TRACE(COMP_POWER_TRACKING, "we filted this data\n");
543 for (k = 0; k < 5; k++)
544 tmp_report[k] = 0;
545 break;
546 }
547
548 for (k = 0; k < 5; k++)
549 Avg_TSSI_Meas_from_driver += tmp_report[k];
550
551 Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
552 RT_TRACE(COMP_POWER_TRACKING,
553 "Avg_TSSI_Meas_from_driver = %d\n",
554 Avg_TSSI_Meas_from_driver);
555 TSSI_13dBm = priv->TSSI_13dBm;
556 RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
557
558 if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
559 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
560 else
561 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
562
563 if (delta <= E_FOR_TX_POWER_TRACK) {
564 priv->rtllib->bdynamic_txpower_enable = true;
565 write_nic_byte(dev, Pw_Track_Flag, 0);
566 write_nic_byte(dev, FW_Busy_Flag, 0);
567 RT_TRACE(COMP_POWER_TRACKING,
568 "tx power track is done\n");
569 RT_TRACE(COMP_POWER_TRACKING,
570 "priv->rfa_txpowertrackingindex = %d\n",
571 priv->rfa_txpowertrackingindex);
572 RT_TRACE(COMP_POWER_TRACKING,
573 "priv->rfa_txpowertrackingindex_real = %d\n",
574 priv->rfa_txpowertrackingindex_real);
575 RT_TRACE(COMP_POWER_TRACKING,
576 "priv->CCKPresentAttentuation_difference = %d\n",
577 priv->CCKPresentAttentuation_difference);
578 RT_TRACE(COMP_POWER_TRACKING,
579 "priv->CCKPresentAttentuation = %d\n",
580 priv->CCKPresentAttentuation);
581 return;
582 } else {
583 if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) {
584 if (RF_Type == RF_2T4R) {
585
586 if ((priv->rfa_txpowertrackingindex > 0) &&
587 (priv->rfc_txpowertrackingindex > 0)) {
588 priv->rfa_txpowertrackingindex--;
589 if (priv->rfa_txpowertrackingindex_real > 4) {
590 priv->rfa_txpowertrackingindex_real--;
591 rtl8192_setBBreg(dev,
592 rOFDM0_XATxIQImbalance,
593 bMaskDWord,
594 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
595 }
596
597 priv->rfc_txpowertrackingindex--;
598 if (priv->rfc_txpowertrackingindex_real > 4) {
599 priv->rfc_txpowertrackingindex_real--;
600 rtl8192_setBBreg(dev,
601 rOFDM0_XCTxIQImbalance,
602 bMaskDWord,
603 priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
604 }
605 } else {
606 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
607 bMaskDWord,
608 priv->txbbgain_table[4].txbbgain_value);
609 rtl8192_setBBreg(dev,
610 rOFDM0_XCTxIQImbalance,
611 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
612 }
613 } else {
614 if (priv->rfa_txpowertrackingindex > 0) {
615 priv->rfa_txpowertrackingindex--;
616 if (priv->rfa_txpowertrackingindex_real > 4) {
617 priv->rfa_txpowertrackingindex_real--;
618 rtl8192_setBBreg(dev,
619 rOFDM0_XATxIQImbalance,
620 bMaskDWord,
621 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
622 }
623 } else
624 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
625 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
626
627 }
628 } else {
629 if (RF_Type == RF_2T4R) {
630 if ((priv->rfa_txpowertrackingindex <
631 TxBBGainTableLength - 1) &&
632 (priv->rfc_txpowertrackingindex <
633 TxBBGainTableLength - 1)) {
634 priv->rfa_txpowertrackingindex++;
635 priv->rfa_txpowertrackingindex_real++;
636 rtl8192_setBBreg(dev,
637 rOFDM0_XATxIQImbalance,
638 bMaskDWord,
639 priv->txbbgain_table
640 [priv->rfa_txpowertrackingindex_real].txbbgain_value);
641 priv->rfc_txpowertrackingindex++;
642 priv->rfc_txpowertrackingindex_real++;
643 rtl8192_setBBreg(dev,
644 rOFDM0_XCTxIQImbalance,
645 bMaskDWord,
646 priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
647 } else {
648 rtl8192_setBBreg(dev,
649 rOFDM0_XATxIQImbalance,
650 bMaskDWord,
651 priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
652 rtl8192_setBBreg(dev,
653 rOFDM0_XCTxIQImbalance,
654 bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
655 }
656 } else {
657 if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
658 priv->rfa_txpowertrackingindex++;
659 priv->rfa_txpowertrackingindex_real++;
660 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
661 bMaskDWord,
662 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
663 } else
664 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
665 bMaskDWord,
666 priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
667 }
668 }
669 if (RF_Type == RF_2T4R) {
670 priv->CCKPresentAttentuation_difference
671 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
672 } else {
673 priv->CCKPresentAttentuation_difference
674 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
675 }
676
677 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
678 priv->CCKPresentAttentuation =
679 priv->CCKPresentAttentuation_20Mdefault +
680 priv->CCKPresentAttentuation_difference;
681 else
682 priv->CCKPresentAttentuation =
683 priv->CCKPresentAttentuation_40Mdefault +
684 priv->CCKPresentAttentuation_difference;
685
686 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
687 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
688 if (priv->CCKPresentAttentuation < 0)
689 priv->CCKPresentAttentuation = 0;
690
691 if (priv->CCKPresentAttentuation > -1 &&
692 priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
693 if (priv->rtllib->current_network.channel == 14 &&
694 !priv->bcck_in_ch14) {
695 priv->bcck_in_ch14 = true;
696 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
697 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
698 priv->bcck_in_ch14 = false;
699 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
700 } else
701 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
702 }
703 RT_TRACE(COMP_POWER_TRACKING,
704 "priv->rfa_txpowertrackingindex = %d\n",
705 priv->rfa_txpowertrackingindex);
706 RT_TRACE(COMP_POWER_TRACKING,
707 "priv->rfa_txpowertrackingindex_real = %d\n",
708 priv->rfa_txpowertrackingindex_real);
709 RT_TRACE(COMP_POWER_TRACKING,
710 "priv->CCKPresentAttentuation_difference = %d\n",
711 priv->CCKPresentAttentuation_difference);
712 RT_TRACE(COMP_POWER_TRACKING,
713 "priv->CCKPresentAttentuation = %d\n",
714 priv->CCKPresentAttentuation);
715
716 if (priv->CCKPresentAttentuation_difference <= -12 || priv->CCKPresentAttentuation_difference >= 24) {
717 priv->rtllib->bdynamic_txpower_enable = true;
718 write_nic_byte(dev, Pw_Track_Flag, 0);
719 write_nic_byte(dev, FW_Busy_Flag, 0);
720 RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
721 return;
722 }
723 }
724 write_nic_byte(dev, Pw_Track_Flag, 0);
725 Avg_TSSI_Meas_from_driver = 0;
726 for (k = 0; k < 5; k++)
727 tmp_report[k] = 0;
728 break;
729 }
730 write_nic_byte(dev, FW_Busy_Flag, 0);
731 }
732 priv->rtllib->bdynamic_txpower_enable = true;
733 write_nic_byte(dev, Pw_Track_Flag, 0);
734 }
735
736 static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device *dev)
737 {
738 #define ThermalMeterVal 9
739 struct r8192_priv *priv = rtllib_priv(dev);
740 u32 tmpRegA, TempCCk;
741 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
742 int i = 0, CCKSwingNeedUpdate = 0;
743
744 if (!priv->btxpower_trackingInit) {
745 tmpRegA = rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
746 for (i = 0; i < OFDM_Table_Length; i++) {
747 if (tmpRegA == OFDMSwingTable[i]) {
748 priv->OFDM_index[0] = (u8)i;
749 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index = 0x%x\n",
750 rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index[0]);
751 }
752 }
753
754 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
755 for (i = 0; i < CCK_Table_length; i++) {
756 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
757 priv->CCK_index = (u8) i;
758 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x"
759 " = 0x%x, CCK_index = 0x%x\n",
760 rCCK0_TxFilter1, TempCCk,
761 priv->CCK_index);
762 break;
763 }
764 }
765 priv->btxpower_trackingInit = true;
766 return;
767 }
768
769 tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078);
770 RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d\n", tmpRegA);
771 if (tmpRegA < 3 || tmpRegA > 13)
772 return;
773 if (tmpRegA >= 12)
774 tmpRegA = 12;
775 RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d\n", tmpRegA);
776 priv->ThermalMeter[0] = ThermalMeterVal;
777 priv->ThermalMeter[1] = ThermalMeterVal;
778
779 if (priv->ThermalMeter[0] >= (u8)tmpRegA) {
780 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] -
781 (u8)tmpRegA);
782 tmpCCK40Mindex = tmpCCK20Mindex - 6;
783 if (tmpOFDMindex >= OFDM_Table_Length)
784 tmpOFDMindex = OFDM_Table_Length-1;
785 if (tmpCCK20Mindex >= CCK_Table_length)
786 tmpCCK20Mindex = CCK_Table_length-1;
787 if (tmpCCK40Mindex >= CCK_Table_length)
788 tmpCCK40Mindex = CCK_Table_length-1;
789 } else {
790 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
791 if (tmpval >= 6)
792 tmpOFDMindex = tmpCCK20Mindex = 0;
793 else
794 tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
795 tmpCCK40Mindex = 0;
796 }
797 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
798 tmpCCKindex = tmpCCK40Mindex;
799 else
800 tmpCCKindex = tmpCCK20Mindex;
801
802 priv->Record_CCK_20Mindex = tmpCCK20Mindex;
803 priv->Record_CCK_40Mindex = tmpCCK40Mindex;
804 RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40"
805 "Mindex = %d / %d.\n",
806 priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
807
808 if (priv->rtllib->current_network.channel == 14 &&
809 !priv->bcck_in_ch14) {
810 priv->bcck_in_ch14 = true;
811 CCKSwingNeedUpdate = 1;
812 } else if (priv->rtllib->current_network.channel != 14 &&
813 priv->bcck_in_ch14) {
814 priv->bcck_in_ch14 = false;
815 CCKSwingNeedUpdate = 1;
816 }
817
818 if (priv->CCK_index != tmpCCKindex) {
819 priv->CCK_index = tmpCCKindex;
820 CCKSwingNeedUpdate = 1;
821 }
822
823 if (CCKSwingNeedUpdate)
824 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
825 if (priv->OFDM_index[0] != tmpOFDMindex) {
826 priv->OFDM_index[0] = tmpOFDMindex;
827 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
828 OFDMSwingTable[priv->OFDM_index[0]]);
829 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
830 priv->OFDM_index[0],
831 OFDMSwingTable[priv->OFDM_index[0]]);
832 }
833 priv->txpower_count = 0;
834 }
835
836 void dm_txpower_trackingcallback(void *data)
837 {
838 struct r8192_priv *priv = container_of_dwork_rsl(data,
839 struct r8192_priv, txpower_tracking_wq);
840 struct net_device *dev = priv->rtllib->dev;
841
842 if (priv->IC_Cut >= IC_VersionCut_D)
843 dm_TXPowerTrackingCallback_TSSI(dev);
844 else
845 dm_TXPowerTrackingCallback_ThermalMeter(dev);
846 }
847
848 static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
849 {
850
851 struct r8192_priv *priv = rtllib_priv(dev);
852
853 priv->txbbgain_table[0].txbb_iq_amplifygain = 12;
854 priv->txbbgain_table[0].txbbgain_value = 0x7f8001fe;
855 priv->txbbgain_table[1].txbb_iq_amplifygain = 11;
856 priv->txbbgain_table[1].txbbgain_value = 0x788001e2;
857 priv->txbbgain_table[2].txbb_iq_amplifygain = 10;
858 priv->txbbgain_table[2].txbbgain_value = 0x71c001c7;
859 priv->txbbgain_table[3].txbb_iq_amplifygain = 9;
860 priv->txbbgain_table[3].txbbgain_value = 0x6b8001ae;
861 priv->txbbgain_table[4].txbb_iq_amplifygain = 8;
862 priv->txbbgain_table[4].txbbgain_value = 0x65400195;
863 priv->txbbgain_table[5].txbb_iq_amplifygain = 7;
864 priv->txbbgain_table[5].txbbgain_value = 0x5fc0017f;
865 priv->txbbgain_table[6].txbb_iq_amplifygain = 6;
866 priv->txbbgain_table[6].txbbgain_value = 0x5a400169;
867 priv->txbbgain_table[7].txbb_iq_amplifygain = 5;
868 priv->txbbgain_table[7].txbbgain_value = 0x55400155;
869 priv->txbbgain_table[8].txbb_iq_amplifygain = 4;
870 priv->txbbgain_table[8].txbbgain_value = 0x50800142;
871 priv->txbbgain_table[9].txbb_iq_amplifygain = 3;
872 priv->txbbgain_table[9].txbbgain_value = 0x4c000130;
873 priv->txbbgain_table[10].txbb_iq_amplifygain = 2;
874 priv->txbbgain_table[10].txbbgain_value = 0x47c0011f;
875 priv->txbbgain_table[11].txbb_iq_amplifygain = 1;
876 priv->txbbgain_table[11].txbbgain_value = 0x43c0010f;
877 priv->txbbgain_table[12].txbb_iq_amplifygain = 0;
878 priv->txbbgain_table[12].txbbgain_value = 0x40000100;
879 priv->txbbgain_table[13].txbb_iq_amplifygain = -1;
880 priv->txbbgain_table[13].txbbgain_value = 0x3c8000f2;
881 priv->txbbgain_table[14].txbb_iq_amplifygain = -2;
882 priv->txbbgain_table[14].txbbgain_value = 0x390000e4;
883 priv->txbbgain_table[15].txbb_iq_amplifygain = -3;
884 priv->txbbgain_table[15].txbbgain_value = 0x35c000d7;
885 priv->txbbgain_table[16].txbb_iq_amplifygain = -4;
886 priv->txbbgain_table[16].txbbgain_value = 0x32c000cb;
887 priv->txbbgain_table[17].txbb_iq_amplifygain = -5;
888 priv->txbbgain_table[17].txbbgain_value = 0x300000c0;
889 priv->txbbgain_table[18].txbb_iq_amplifygain = -6;
890 priv->txbbgain_table[18].txbbgain_value = 0x2d4000b5;
891 priv->txbbgain_table[19].txbb_iq_amplifygain = -7;
892 priv->txbbgain_table[19].txbbgain_value = 0x2ac000ab;
893 priv->txbbgain_table[20].txbb_iq_amplifygain = -8;
894 priv->txbbgain_table[20].txbbgain_value = 0x288000a2;
895 priv->txbbgain_table[21].txbb_iq_amplifygain = -9;
896 priv->txbbgain_table[21].txbbgain_value = 0x26000098;
897 priv->txbbgain_table[22].txbb_iq_amplifygain = -10;
898 priv->txbbgain_table[22].txbbgain_value = 0x24000090;
899 priv->txbbgain_table[23].txbb_iq_amplifygain = -11;
900 priv->txbbgain_table[23].txbbgain_value = 0x22000088;
901 priv->txbbgain_table[24].txbb_iq_amplifygain = -12;
902 priv->txbbgain_table[24].txbbgain_value = 0x20000080;
903 priv->txbbgain_table[25].txbb_iq_amplifygain = -13;
904 priv->txbbgain_table[25].txbbgain_value = 0x1a00006c;
905 priv->txbbgain_table[26].txbb_iq_amplifygain = -14;
906 priv->txbbgain_table[26].txbbgain_value = 0x1c800072;
907 priv->txbbgain_table[27].txbb_iq_amplifygain = -15;
908 priv->txbbgain_table[27].txbbgain_value = 0x18000060;
909 priv->txbbgain_table[28].txbb_iq_amplifygain = -16;
910 priv->txbbgain_table[28].txbbgain_value = 0x19800066;
911 priv->txbbgain_table[29].txbb_iq_amplifygain = -17;
912 priv->txbbgain_table[29].txbbgain_value = 0x15800056;
913 priv->txbbgain_table[30].txbb_iq_amplifygain = -18;
914 priv->txbbgain_table[30].txbbgain_value = 0x26c0005b;
915 priv->txbbgain_table[31].txbb_iq_amplifygain = -19;
916 priv->txbbgain_table[31].txbbgain_value = 0x14400051;
917 priv->txbbgain_table[32].txbb_iq_amplifygain = -20;
918 priv->txbbgain_table[32].txbbgain_value = 0x24400051;
919 priv->txbbgain_table[33].txbb_iq_amplifygain = -21;
920 priv->txbbgain_table[33].txbbgain_value = 0x1300004c;
921 priv->txbbgain_table[34].txbb_iq_amplifygain = -22;
922 priv->txbbgain_table[34].txbbgain_value = 0x12000048;
923 priv->txbbgain_table[35].txbb_iq_amplifygain = -23;
924 priv->txbbgain_table[35].txbbgain_value = 0x11000044;
925 priv->txbbgain_table[36].txbb_iq_amplifygain = -24;
926 priv->txbbgain_table[36].txbbgain_value = 0x10000040;
927
928 priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
929 priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
930 priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
931 priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
932 priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
933 priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
934 priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
935 priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
936
937 priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
938 priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
939 priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
940 priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
941 priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
942 priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
943 priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
944 priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
945
946 priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
947 priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
948 priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
949 priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
950 priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
951 priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
952 priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
953 priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
954
955 priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
956 priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
957 priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
958 priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
959 priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
960 priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
961 priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
962 priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
963
964 priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
965 priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
966 priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
967 priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
968 priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
969 priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
970 priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
971 priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
972
973 priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
974 priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
975 priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
976 priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
977 priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
978 priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
979 priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
980 priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
981
982 priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
983 priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
984 priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
985 priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
986 priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
987 priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
988 priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
989 priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
990
991 priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
992 priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
993 priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
994 priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
995 priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
996 priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
997 priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
998 priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
999
1000 priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
1001 priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
1002 priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
1003 priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
1004 priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
1005 priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
1006 priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
1007 priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
1008
1009 priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
1010 priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
1011 priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
1012 priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
1013 priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
1014 priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
1015 priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
1016 priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
1017
1018 priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
1019 priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
1020 priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
1021 priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
1022 priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
1023 priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
1024 priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
1025 priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
1026
1027 priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
1028 priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
1029 priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
1030 priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
1031 priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
1032 priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
1033 priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
1034 priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
1035
1036 priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
1037 priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
1038 priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
1039 priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
1040 priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
1041 priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
1042 priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
1043 priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
1044
1045 priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
1046 priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
1047 priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
1048 priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
1049 priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
1050 priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
1051 priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
1052 priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
1053
1054 priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
1055 priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
1056 priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
1057 priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
1058 priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
1059 priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
1060 priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
1061 priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
1062
1063 priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
1064 priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
1065 priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
1066 priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
1067 priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
1068 priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
1069 priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
1070 priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
1071
1072 priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
1073 priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
1074 priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
1075 priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
1076 priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
1077 priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
1078 priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
1079 priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
1080
1081 priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
1082 priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
1083 priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
1084 priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
1085 priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
1086 priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
1087 priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
1088 priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
1089
1090 priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
1091 priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
1092 priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
1093 priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
1094 priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
1095 priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
1096 priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
1097 priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
1098
1099 priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
1100 priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
1101 priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
1102 priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
1103 priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
1104 priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
1105 priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
1106 priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
1107
1108 priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
1109 priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
1110 priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
1111 priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
1112 priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
1113 priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
1114 priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
1115 priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
1116
1117 priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
1118 priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
1119 priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
1120 priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
1121 priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
1122 priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
1123 priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
1124 priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
1125
1126 priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
1127 priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
1128 priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
1129 priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
1130 priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
1131 priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
1132 priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
1133 priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
1134
1135 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
1136 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
1137 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
1138 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
1139 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
1140 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
1141 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
1142 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
1143
1144 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
1145 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
1146 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
1147 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
1148 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
1149 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
1150 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
1151 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
1152
1153 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
1154 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
1155 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
1156 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
1157 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
1158 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
1159 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
1160 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
1161
1162 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
1163 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
1164 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
1165 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
1166 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
1167 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
1168 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
1169 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
1170
1171 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
1172 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
1173 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
1174 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
1175 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
1176 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
1177 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
1178 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
1179
1180 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
1181 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
1182 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
1183 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
1184 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
1185 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
1186 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
1187 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
1188
1189 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
1190 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
1191 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
1192 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
1193 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
1194 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
1195 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
1196 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
1197
1198 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
1199 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
1200 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
1201 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
1202 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
1203 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
1204 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
1205 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
1206
1207 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
1208 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
1209 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
1210 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
1211 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
1212 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
1213 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
1214 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
1215
1216 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
1217 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
1218 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
1219 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
1220 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
1221 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
1222 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
1223 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
1224
1225 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
1226 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
1227 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
1228 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
1229 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
1230 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
1231 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
1232 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
1233
1234 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
1235 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
1236 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
1237 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
1238 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
1239 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
1240 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
1241 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
1242
1243 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
1244 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
1245 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
1246 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
1247 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
1248 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
1249 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
1250 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
1251
1252 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
1253 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
1254 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
1255 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
1256 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
1257 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
1258 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
1259 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
1260
1261 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
1262 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
1263 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
1264 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
1265 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
1266 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
1267 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
1268 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
1269
1270 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
1271 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
1272 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
1273 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
1274 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
1275 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
1276 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
1277 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
1278
1279 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
1280 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
1281 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
1282 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
1283 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
1284 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
1285 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
1286 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
1287
1288 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
1289 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
1290 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
1291 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
1292 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
1293 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
1294 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
1295 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
1296
1297 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
1298 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
1299 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
1300 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
1301 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
1302 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
1303 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
1304 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
1305
1306 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
1307 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
1308 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
1309 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
1310 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
1311 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
1312 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
1313 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
1314
1315 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
1316 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
1317 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
1318 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
1319 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
1320 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
1321 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
1322 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
1323
1324 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
1325 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
1326 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
1327 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
1328 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
1329 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
1330 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
1331 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
1332
1333 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
1334 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
1335 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
1336 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
1337 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
1338 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
1339 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
1340 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
1341
1342 priv->btxpower_tracking = true;
1343 priv->txpower_count = 0;
1344 priv->btxpower_trackingInit = false;
1345
1346 }
1347
1348 static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
1349 {
1350 struct r8192_priv *priv = rtllib_priv(dev);
1351
1352
1353 if (priv->rtllib->FwRWRF)
1354 priv->btxpower_tracking = true;
1355 else
1356 priv->btxpower_tracking = false;
1357 priv->txpower_count = 0;
1358 priv->btxpower_trackingInit = false;
1359 RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n",
1360 priv->btxpower_tracking);
1361 }
1362
1363 void dm_initialize_txpower_tracking(struct net_device *dev)
1364 {
1365 struct r8192_priv *priv = rtllib_priv(dev);
1366 if (priv->IC_Cut >= IC_VersionCut_D)
1367 dm_InitializeTXPowerTracking_TSSI(dev);
1368 else
1369 dm_InitializeTXPowerTracking_ThermalMeter(dev);
1370 }
1371
1372 static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
1373 {
1374 struct r8192_priv *priv = rtllib_priv(dev);
1375 static u32 tx_power_track_counter;
1376 RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
1377 if (read_nic_byte(dev, 0x11e) == 1)
1378 return;
1379 if (!priv->btxpower_tracking)
1380 return;
1381 tx_power_track_counter++;
1382
1383
1384 if (tx_power_track_counter >= 180) {
1385 queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1386 tx_power_track_counter = 0;
1387 }
1388
1389 }
1390 static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
1391 {
1392 struct r8192_priv *priv = rtllib_priv(dev);
1393 static u8 TM_Trigger;
1394 u8 TxPowerCheckCnt = 0;
1395
1396 if (IS_HARDWARE_TYPE_8192SE(dev))
1397 TxPowerCheckCnt = 5;
1398 else
1399 TxPowerCheckCnt = 2;
1400 if (!priv->btxpower_tracking) {
1401 return;
1402 } else {
1403 if (priv->txpower_count <= TxPowerCheckCnt) {
1404 priv->txpower_count++;
1405 return;
1406 }
1407 }
1408
1409 if (!TM_Trigger) {
1410 {
1411 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1412 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1413 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1414 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1415 }
1416 TM_Trigger = 1;
1417 return;
1418 } else {
1419 printk(KERN_INFO "===============>Schedule TxPowerTrackingWorkItem\n");
1420
1421 queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1422 TM_Trigger = 0;
1423 }
1424
1425 }
1426
1427 static void dm_check_txpower_tracking(struct net_device *dev)
1428 {
1429 struct r8192_priv *priv = rtllib_priv(dev);
1430
1431 if (priv->IC_Cut >= IC_VersionCut_D)
1432 dm_CheckTXPowerTracking_TSSI(dev);
1433 else
1434 dm_CheckTXPowerTracking_ThermalMeter(dev);
1435 }
1436
1437 static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14)
1438 {
1439 u32 TempVal;
1440 struct r8192_priv *priv = rtllib_priv(dev);
1441 TempVal = 0;
1442 if (!bInCH14) {
1443 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1444 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
1445
1446 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1447 TempVal = 0;
1448 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1449 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1450 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+
1451 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1452 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1453 TempVal = 0;
1454 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1455 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
1456
1457 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1458 } else {
1459 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1460 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
1461
1462 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1463 TempVal = 0;
1464 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1465 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1466 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+
1467 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1468 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1469 TempVal = 0;
1470 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1471 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
1472
1473 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1474 }
1475
1476
1477 }
1478
1479 static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14)
1480 {
1481 u32 TempVal;
1482 struct r8192_priv *priv = rtllib_priv(dev);
1483
1484 TempVal = 0;
1485 if (!bInCH14) {
1486 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1487 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
1488 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1489 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1490 rCCK0_TxFilter1, TempVal);
1491 TempVal = 0;
1492 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1493 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
1494 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16)+
1495 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
1496 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1497 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1498 rCCK0_TxFilter2, TempVal);
1499 TempVal = 0;
1500 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1501 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
1502
1503 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1504 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1505 rCCK0_DebugPort, TempVal);
1506 } else {
1507 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1508 (CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
1509
1510 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1511 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1512 rCCK0_TxFilter1, TempVal);
1513 TempVal = 0;
1514 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1515 (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
1516 (CCKSwingTable_Ch14[priv->CCK_index][4]<<16)+
1517 (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
1518 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1519 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1520 rCCK0_TxFilter2, TempVal);
1521 TempVal = 0;
1522 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1523 (CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
1524
1525 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1526 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1527 rCCK0_DebugPort, TempVal);
1528 }
1529 }
1530
1531 extern void dm_cck_txpower_adjust(
1532 struct net_device *dev,
1533 bool binch14
1534 )
1535 {
1536 struct r8192_priv *priv = rtllib_priv(dev);
1537 if (priv->IC_Cut >= IC_VersionCut_D)
1538 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
1539 else
1540 dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
1541 }
1542
1543 static void dm_txpower_reset_recovery(
1544 struct net_device *dev
1545 )
1546 {
1547 struct r8192_priv *priv = rtllib_priv(dev);
1548
1549 RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
1550 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
1551 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1552 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",
1553 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1554 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",
1555 priv->rfa_txpowertrackingindex);
1556 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n",
1557 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
1558 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n",
1559 priv->CCKPresentAttentuation);
1560 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1561
1562 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord,
1563 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1564 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",
1565 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1566 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",
1567 priv->rfc_txpowertrackingindex);
1568 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n",
1569 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
1570
1571 }
1572
1573 extern void dm_restore_dynamic_mechanism_state(struct net_device *dev)
1574 {
1575 struct r8192_priv *priv = rtllib_priv(dev);
1576 u32 reg_ratr = priv->rate_adaptive.last_ratr;
1577 u32 ratr_value;
1578
1579 if (IS_NIC_DOWN(priv)) {
1580 RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
1581 return;
1582 }
1583
1584 if (priv->rate_adaptive.rate_adaptive_disabled)
1585 return;
1586 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
1587 priv->rtllib->mode == WIRELESS_MODE_N_5G))
1588 return;
1589 ratr_value = reg_ratr;
1590 if (priv->rf_type == RF_1T2R)
1591 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1592 write_nic_dword(dev, RATR0, ratr_value);
1593 write_nic_byte(dev, UFWP, 1);
1594 if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1595 dm_txpower_reset_recovery(dev);
1596
1597 dm_bb_initialgain_restore(dev);
1598
1599 }
1600
1601 static void dm_bb_initialgain_restore(struct net_device *dev)
1602 {
1603 struct r8192_priv *priv = rtllib_priv(dev);
1604 u32 bit_mask = 0x7f;
1605
1606 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1607 return;
1608
1609 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1610 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
1611 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
1612 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
1613 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
1614 bit_mask = bMaskByte2;
1615 rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
1616
1617 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1618 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1619 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1620 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1621 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n", priv->initgain_backup.cca);
1622 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1623
1624 }
1625
1626
1627 extern void dm_backup_dynamic_mechanism_state(struct net_device *dev)
1628 {
1629 struct r8192_priv *priv = rtllib_priv(dev);
1630
1631 priv->bswitch_fsync = false;
1632 priv->bfsync_processing = false;
1633 dm_bb_initialgain_backup(dev);
1634
1635 }
1636
1637
1638 static void dm_bb_initialgain_backup(struct net_device *dev)
1639 {
1640 struct r8192_priv *priv = rtllib_priv(dev);
1641 u32 bit_mask = bMaskByte0;
1642
1643 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1644 return;
1645
1646 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1647 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
1648 priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
1649 priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
1650 priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
1651 bit_mask = bMaskByte2;
1652 priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
1653
1654 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1655 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1656 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1657 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1658 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n", priv->initgain_backup.cca);
1659
1660 }
1661
1662 extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
1663 u32 dm_type, u32 dm_value)
1664 {
1665 if (dm_type == DIG_TYPE_THRESH_HIGH) {
1666 dm_digtable.rssi_high_thresh = dm_value;
1667 } else if (dm_type == DIG_TYPE_THRESH_LOW) {
1668 dm_digtable.rssi_low_thresh = dm_value;
1669 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
1670 dm_digtable.rssi_high_power_highthresh = dm_value;
1671 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
1672 dm_digtable.rssi_high_power_highthresh = dm_value;
1673 } else if (dm_type == DIG_TYPE_ENABLE) {
1674 dm_digtable.dig_state = DM_STA_DIG_MAX;
1675 dm_digtable.dig_enable_flag = true;
1676 } else if (dm_type == DIG_TYPE_DISABLE) {
1677 dm_digtable.dig_state = DM_STA_DIG_MAX;
1678 dm_digtable.dig_enable_flag = false;
1679 } else if (dm_type == DIG_TYPE_DBG_MODE) {
1680 if (dm_value >= DM_DBG_MAX)
1681 dm_value = DM_DBG_OFF;
1682 dm_digtable.dbg_mode = (u8)dm_value;
1683 } else if (dm_type == DIG_TYPE_RSSI) {
1684 if (dm_value > 100)
1685 dm_value = 30;
1686 dm_digtable.rssi_val = (long)dm_value;
1687 } else if (dm_type == DIG_TYPE_ALGORITHM) {
1688 if (dm_value >= DIG_ALGO_MAX)
1689 dm_value = DIG_ALGO_BY_FALSE_ALARM;
1690 if (dm_digtable.dig_algorithm != (u8)dm_value)
1691 dm_digtable.dig_algorithm_switch = 1;
1692 dm_digtable.dig_algorithm = (u8)dm_value;
1693 } else if (dm_type == DIG_TYPE_BACKOFF) {
1694 if (dm_value > 30)
1695 dm_value = 30;
1696 dm_digtable.backoff_val = (u8)dm_value;
1697 } else if (dm_type == DIG_TYPE_RX_GAIN_MIN) {
1698 if (dm_value == 0)
1699 dm_value = 0x1;
1700 dm_digtable.rx_gain_range_min = (u8)dm_value;
1701 } else if (dm_type == DIG_TYPE_RX_GAIN_MAX) {
1702 if (dm_value > 0x50)
1703 dm_value = 0x50;
1704 dm_digtable.rx_gain_range_max = (u8)dm_value;
1705 }
1706 }
1707 extern void dm_change_fsync_setting(struct net_device *dev,
1708 s32 DM_Type,
1709 s32 DM_Value)
1710 {
1711 struct r8192_priv *priv = rtllib_priv(dev);
1712
1713 if (DM_Type == 0) {
1714 if (DM_Value > 1)
1715 DM_Value = 1;
1716 priv->framesyncMonitor = (u8)DM_Value;
1717 }
1718 }
1719
1720 extern void
1721 dm_change_rxpath_selection_setting(
1722 struct net_device *dev,
1723 s32 DM_Type,
1724 s32 DM_Value)
1725 {
1726 struct r8192_priv *priv = rtllib_priv(dev);
1727 struct rate_adaptive *pRA = (struct rate_adaptive *)&(priv->rate_adaptive);
1728
1729
1730 if (DM_Type == 0) {
1731 if (DM_Value > 1)
1732 DM_Value = 1;
1733 DM_RxPathSelTable.Enable = (u8)DM_Value;
1734 } else if (DM_Type == 1) {
1735 if (DM_Value > 1)
1736 DM_Value = 1;
1737 DM_RxPathSelTable.DbgMode = (u8)DM_Value;
1738 } else if (DM_Type == 2) {
1739 if (DM_Value > 40)
1740 DM_Value = 40;
1741 DM_RxPathSelTable.SS_TH_low = (u8)DM_Value;
1742 } else if (DM_Type == 3) {
1743 if (DM_Value > 25)
1744 DM_Value = 25;
1745 DM_RxPathSelTable.diff_TH = (u8)DM_Value;
1746 } else if (DM_Type == 4) {
1747 if (DM_Value >= CCK_Rx_Version_MAX)
1748 DM_Value = CCK_Rx_Version_1;
1749 DM_RxPathSelTable.cck_method = (u8)DM_Value;
1750 } else if (DM_Type == 10) {
1751 if (DM_Value > 100)
1752 DM_Value = 50;
1753 DM_RxPathSelTable.rf_rssi[0] = (u8)DM_Value;
1754 } else if (DM_Type == 11) {
1755 if (DM_Value > 100)
1756 DM_Value = 50;
1757 DM_RxPathSelTable.rf_rssi[1] = (u8)DM_Value;
1758 } else if (DM_Type == 12) {
1759 if (DM_Value > 100)
1760 DM_Value = 50;
1761 DM_RxPathSelTable.rf_rssi[2] = (u8)DM_Value;
1762 } else if (DM_Type == 13) {
1763 if (DM_Value > 100)
1764 DM_Value = 50;
1765 DM_RxPathSelTable.rf_rssi[3] = (u8)DM_Value;
1766 } else if (DM_Type == 20) {
1767 if (DM_Value > 1)
1768 DM_Value = 1;
1769 pRA->ping_rssi_enable = (u8)DM_Value;
1770 } else if (DM_Type == 21) {
1771 if (DM_Value > 30)
1772 DM_Value = 30;
1773 pRA->ping_rssi_thresh_for_ra = DM_Value;
1774 }
1775 }
1776
1777 static void dm_dig_init(struct net_device *dev)
1778 {
1779 struct r8192_priv *priv = rtllib_priv(dev);
1780 dm_digtable.dig_enable_flag = true;
1781 dm_digtable.Backoff_Enable_Flag = true;
1782
1783 dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1784
1785 dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
1786 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
1787 dm_digtable.dbg_mode = DM_DBG_OFF;
1788 dm_digtable.dig_algorithm_switch = 0;
1789
1790 dm_digtable.dig_state = DM_STA_DIG_MAX;
1791 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1792 dm_digtable.CurSTAConnectState = dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
1793 dm_digtable.CurAPConnectState = dm_digtable.PreAPConnectState = DIG_AP_DISCONNECT;
1794 dm_digtable.initialgain_lowerbound_state = false;
1795
1796 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
1797 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
1798
1799 dm_digtable.FALowThresh = DM_FALSEALARM_THRESH_LOW;
1800 dm_digtable.FAHighThresh = DM_FALSEALARM_THRESH_HIGH;
1801
1802 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1803 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1804
1805 dm_digtable.rssi_val = 50;
1806 dm_digtable.backoff_val = DM_DIG_BACKOFF;
1807 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1808 if (priv->CustomerID == RT_CID_819x_Netcore)
1809 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1810 else
1811 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1812
1813 dm_digtable.BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
1814 dm_digtable.BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
1815 }
1816
1817 void dm_FalseAlarmCounterStatistics(struct net_device *dev)
1818 {
1819 struct r8192_priv *priv = rtllib_priv(dev);
1820 u32 ret_value;
1821 struct false_alarm_stats *FalseAlmCnt = &(priv->FalseAlmCnt);
1822
1823 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter1, bMaskDWord);
1824 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
1825
1826 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter2, bMaskDWord);
1827 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
1828 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
1829 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter3, bMaskDWord);
1830 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
1831
1832 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
1833 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail;
1834
1835 ret_value = rtl8192_QueryBBReg(dev, 0xc64, bMaskDWord);
1836 FalseAlmCnt->Cnt_Cck_fail = (ret_value&0xffff);
1837 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Parity_Fail +
1838 FalseAlmCnt->Cnt_Rate_Illegal +
1839 FalseAlmCnt->Cnt_Crc8_fail +
1840 FalseAlmCnt->Cnt_Mcs_fail +
1841 FalseAlmCnt->Cnt_Cck_fail);
1842
1843 RT_TRACE(COMP_DIG, "Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d, Cnt_all = %d\n",
1844 FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail,
1845 FalseAlmCnt->Cnt_all);
1846 }
1847
1848 static void dm_ctrl_initgain_byrssi(struct net_device *dev)
1849 {
1850
1851 if (dm_digtable.dig_enable_flag == false)
1852 return;
1853
1854 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1855 dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
1856 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1857 dm_ctrl_initgain_byrssi_by_driverrssi(dev);
1858 else
1859 return;
1860 }
1861
1862 /*-----------------------------------------------------------------------------
1863 * Function: dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
1864 *
1865 * Overview: Driver monitor RSSI and False Alarm to change initial gain.
1866 Only change initial gain during link in progress.
1867 *
1868 * Input: IN PADAPTER pAdapter
1869 *
1870 * Output: NONE
1871 *
1872 * Return: NONE
1873 *
1874 * Revised History:
1875 * When Who Remark
1876 * 03/04/2009 hpfan Create Version 0.
1877 *
1878 *---------------------------------------------------------------------------*/
1879
1880 static void dm_ctrl_initgain_byrssi_by_driverrssi(
1881 struct net_device *dev)
1882 {
1883 struct r8192_priv *priv = rtllib_priv(dev);
1884 u8 i;
1885 static u8 fw_dig;
1886
1887 if (dm_digtable.dig_enable_flag == false)
1888 return;
1889
1890 if (dm_digtable.dig_algorithm_switch)
1891 fw_dig = 0;
1892 if (fw_dig <= 3) {
1893 for (i = 0; i < 3; i++)
1894 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1895 fw_dig++;
1896 dm_digtable.dig_state = DM_STA_DIG_OFF;
1897 }
1898
1899 if (priv->rtllib->state == RTLLIB_LINKED)
1900 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
1901 else
1902 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1903
1904
1905 if (dm_digtable.dbg_mode == DM_DBG_OFF)
1906 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1907 dm_initial_gain(dev);
1908 dm_pd_th(dev);
1909 dm_cs_ratio(dev);
1910 if (dm_digtable.dig_algorithm_switch)
1911 dm_digtable.dig_algorithm_switch = 0;
1912 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
1913
1914 }
1915
1916 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
1917 struct net_device *dev)
1918 {
1919 struct r8192_priv *priv = rtllib_priv(dev);
1920 static u32 reset_cnt;
1921 u8 i;
1922
1923 if (dm_digtable.dig_enable_flag == false)
1924 return;
1925
1926 if (dm_digtable.dig_algorithm_switch) {
1927 dm_digtable.dig_state = DM_STA_DIG_MAX;
1928 for (i = 0; i < 3; i++)
1929 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1930 dm_digtable.dig_algorithm_switch = 0;
1931 }
1932
1933 if (priv->rtllib->state != RTLLIB_LINKED)
1934 return;
1935
1936 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1937 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1938 return;
1939 if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh)) {
1940 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1941 (priv->reset_count == reset_cnt))
1942 return;
1943 else
1944 reset_cnt = priv->reset_count;
1945
1946 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1947 dm_digtable.dig_state = DM_STA_DIG_OFF;
1948
1949 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1950
1951 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
1952 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
1953 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
1954 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
1955
1956 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1957 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
1958 else
1959 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
1960
1961 write_nic_byte(dev, 0xa0a, 0x08);
1962
1963 return;
1964 }
1965
1966 if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)) {
1967 u8 reset_flag = 0;
1968
1969 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1970 (priv->reset_count == reset_cnt)) {
1971 dm_ctrl_initgain_byrssi_highpwr(dev);
1972 return;
1973 } else {
1974 if (priv->reset_count != reset_cnt)
1975 reset_flag = 1;
1976
1977 reset_cnt = priv->reset_count;
1978 }
1979
1980 dm_digtable.dig_state = DM_STA_DIG_ON;
1981
1982 if (reset_flag == 1) {
1983 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
1984 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
1985 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
1986 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
1987 } else {
1988 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
1989 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
1990 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
1991 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
1992 }
1993
1994 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1995 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
1996 else
1997 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
1998
1999 write_nic_byte(dev, 0xa0a, 0xcd);
2000
2001 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
2002 }
2003 dm_ctrl_initgain_byrssi_highpwr(dev);
2004 }
2005
2006
2007 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev)
2008 {
2009 struct r8192_priv *priv = rtllib_priv(dev);
2010 static u32 reset_cnt_highpwr;
2011
2012 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
2013 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
2014 return;
2015
2016 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) {
2017 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
2018 (priv->reset_count == reset_cnt_highpwr))
2019 return;
2020 else
2021 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
2022
2023 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2024 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2025 else
2026 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
2027 } else {
2028 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
2029 (priv->reset_count == reset_cnt_highpwr))
2030 return;
2031 else
2032 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
2033
2034 if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
2035 priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
2036 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2037 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2038 else
2039 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2040 }
2041 }
2042 reset_cnt_highpwr = priv->reset_count;
2043 }
2044
2045 static void dm_initial_gain(struct net_device *dev)
2046 {
2047 struct r8192_priv *priv = rtllib_priv(dev);
2048 u8 initial_gain = 0;
2049 static u8 initialized, force_write;
2050 static u32 reset_cnt;
2051
2052 if (dm_digtable.dig_algorithm_switch) {
2053 initialized = 0;
2054 reset_cnt = 0;
2055 }
2056
2057 if (rtllib_act_scanning(priv->rtllib, true) == true) {
2058 force_write = 1;
2059 return;
2060 }
2061
2062 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
2063 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
2064 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
2065 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2066 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
2067 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
2068 else
2069 dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
2070 } else {
2071 if (dm_digtable.cur_ig_value == 0)
2072 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2073 else
2074 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
2075 }
2076 } else {
2077 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2078 dm_digtable.pre_ig_value = 0;
2079 }
2080
2081 if (priv->reset_count != reset_cnt) {
2082 force_write = 1;
2083 reset_cnt = priv->reset_count;
2084 }
2085
2086 if (dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1))
2087 force_write = 1;
2088
2089 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
2090 || !initialized || force_write) {
2091 initial_gain = (u8)dm_digtable.cur_ig_value;
2092 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
2093 write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
2094 write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
2095 write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
2096 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
2097 initialized = 1;
2098 force_write = 0;
2099 }
2100 }
2101
2102 void dm_initial_gain_STABeforeConnect(
2103 struct net_device *dev)
2104 {
2105 struct r8192_priv *priv = rtllib_priv(dev);
2106 u8 initial_gain = 0;
2107 static u8 initialized, force_write;
2108
2109 RT_TRACE(COMP_DIG, "PreSTAConnectState = %x, CurSTAConnectState = %x\n",
2110 dm_digtable.PreSTAConnectState, dm_digtable.CurSTAConnectState);
2111
2112
2113 if ((dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) ||
2114 (dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT)) {
2115 if (dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT) {
2116 if (priv->rtllib->eRFPowerState != eRfOn)
2117 return;
2118
2119 if (dm_digtable.Backoff_Enable_Flag == true) {
2120 if (priv->FalseAlmCnt.Cnt_all > dm_digtable.FAHighThresh) {
2121 if ((dm_digtable.backoff_val - 6) < dm_digtable.BackoffVal_range_min)
2122 dm_digtable.backoff_val = dm_digtable.BackoffVal_range_min;
2123 else
2124 dm_digtable.backoff_val -= 6;
2125 } else if (priv->FalseAlmCnt.Cnt_all < dm_digtable.FALowThresh) {
2126 if ((dm_digtable.backoff_val + 6) > dm_digtable.BackoffVal_range_max)
2127 dm_digtable.backoff_val = dm_digtable.BackoffVal_range_max;
2128 else
2129 dm_digtable.backoff_val += 6;
2130 }
2131 } else
2132 dm_digtable.backoff_val = DM_DIG_BACKOFF;
2133
2134 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
2135 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2136 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
2137 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
2138 else
2139 dm_digtable.cur_ig_value = dm_digtable.rssi_val + 10 -
2140 dm_digtable.backoff_val;
2141
2142 if (priv->FalseAlmCnt.Cnt_all > 10000)
2143 dm_digtable.cur_ig_value = (dm_digtable.cur_ig_value > 0x33) ?
2144 dm_digtable.cur_ig_value : 0x33;
2145
2146 if (priv->FalseAlmCnt.Cnt_all > 16000)
2147 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2148
2149 } else {
2150 return;
2151 }
2152 } else {
2153 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
2154 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_ENABLE);
2155
2156 dm_digtable.backoff_val = DM_DIG_BACKOFF;
2157 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2158 dm_digtable.pre_ig_value = 0;
2159 return;
2160 }
2161
2162 if (dm_digtable.pre_ig_value != rtl8192_QueryBBReg(dev,
2163 rOFDM0_XAAGCCore1, bMaskByte0))
2164 force_write = 1;
2165
2166 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value) ||
2167 !initialized || force_write) {
2168 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_DISABLE);
2169
2170 initial_gain = (u8)dm_digtable.cur_ig_value;
2171
2172 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bMaskByte0,
2173 initial_gain);
2174 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bMaskByte0,
2175 initial_gain);
2176 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
2177 initialized = 1;
2178 force_write = 0;
2179 }
2180
2181 RT_TRACE(COMP_DIG, "CurIGValue = 0x%x, pre_ig_value = 0x%x, "
2182 "backoff_val = %d\n", dm_digtable.cur_ig_value,
2183 dm_digtable.pre_ig_value, dm_digtable.backoff_val);
2184
2185 }
2186
2187 static void dm_pd_th(struct net_device *dev)
2188 {
2189 struct r8192_priv *priv = rtllib_priv(dev);
2190 static u8 initialized, force_write;
2191 static u32 reset_cnt;
2192
2193 if (dm_digtable.dig_algorithm_switch) {
2194 initialized = 0;
2195 reset_cnt = 0;
2196 }
2197
2198 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
2199 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
2200 if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
2201 dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
2202 else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
2203 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2204 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
2205 (dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
2206 dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
2207 else
2208 dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
2209 } else {
2210 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2211 }
2212 } else {
2213 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2214 }
2215
2216 if (priv->reset_count != reset_cnt) {
2217 force_write = 1;
2218 reset_cnt = priv->reset_count;
2219 }
2220
2221 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
2222 (initialized <= 3) || force_write) {
2223 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
2224 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2225 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
2226 else
2227 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2228 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER) {
2229 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2230 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2231 else
2232 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2233 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
2234 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2235 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2236 else
2237 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
2238 }
2239 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
2240 if (initialized <= 3)
2241 initialized++;
2242 force_write = 0;
2243 }
2244 }
2245
2246 static void dm_cs_ratio(struct net_device *dev)
2247 {
2248 struct r8192_priv *priv = rtllib_priv(dev);
2249 static u8 initialized, force_write;
2250 static u32 reset_cnt;
2251
2252 if (dm_digtable.dig_algorithm_switch) {
2253 initialized = 0;
2254 reset_cnt = 0;
2255 }
2256
2257 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
2258 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
2259 if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
2260 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2261 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh))
2262 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
2263 else
2264 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
2265 } else {
2266 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2267 }
2268 } else {
2269 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2270 }
2271
2272 if (priv->reset_count != reset_cnt) {
2273 force_write = 1;
2274 reset_cnt = priv->reset_count;
2275 }
2276
2277
2278 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
2279 !initialized || force_write) {
2280 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
2281 write_nic_byte(dev, 0xa0a, 0x08);
2282 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
2283 write_nic_byte(dev, 0xa0a, 0xcd);
2284 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
2285 initialized = 1;
2286 force_write = 0;
2287 }
2288 }
2289
2290 extern void dm_init_edca_turbo(struct net_device *dev)
2291 {
2292 struct r8192_priv *priv = rtllib_priv(dev);
2293
2294 priv->bcurrent_turbo_EDCA = false;
2295 priv->rtllib->bis_any_nonbepkts = false;
2296 priv->bis_cur_rdlstate = false;
2297 }
2298
2299 static void dm_check_edca_turbo(struct net_device *dev)
2300 {
2301 struct r8192_priv *priv = rtllib_priv(dev);
2302 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2303
2304 static unsigned long lastTxOkCnt;
2305 static unsigned long lastRxOkCnt;
2306 unsigned long curTxOkCnt = 0;
2307 unsigned long curRxOkCnt = 0;
2308
2309 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
2310 goto dm_CheckEdcaTurbo_EXIT;
2311 if (priv->rtllib->state != RTLLIB_LINKED)
2312 goto dm_CheckEdcaTurbo_EXIT;
2313 if (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
2314 goto dm_CheckEdcaTurbo_EXIT;
2315
2316 {
2317 u8 *peername[11] = {
2318 "unknown", "realtek_90", "realtek_92se", "broadcom",
2319 "ralink", "atheros", "cisco", "marvell", "92u_softap",
2320 "self_softap"
2321 };
2322 static int wb_tmp;
2323 if (wb_tmp == 0) {
2324 printk(KERN_INFO "%s():iot peer is %s, bssid:"
2325 MAC_FMT"\n", __func__,
2326 peername[pHTInfo->IOTPeer],
2327 MAC_ARG(priv->rtllib->current_network.bssid));
2328 wb_tmp = 1;
2329 }
2330 }
2331 if (!priv->rtllib->bis_any_nonbepkts) {
2332 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2333 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2334 if (pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
2335 if (curTxOkCnt > 4*curRxOkCnt) {
2336 if (priv->bis_cur_rdlstate ||
2337 !priv->bcurrent_turbo_EDCA) {
2338 write_nic_dword(dev, EDCAPARA_BE,
2339 edca_setting_UL[pHTInfo->IOTPeer]);
2340 priv->bis_cur_rdlstate = false;
2341 }
2342 } else {
2343 if (!priv->bis_cur_rdlstate ||
2344 !priv->bcurrent_turbo_EDCA) {
2345 if (priv->rtllib->mode == WIRELESS_MODE_G)
2346 write_nic_dword(dev, EDCAPARA_BE,
2347 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
2348 else
2349 write_nic_dword(dev, EDCAPARA_BE,
2350 edca_setting_DL[pHTInfo->IOTPeer]);
2351 priv->bis_cur_rdlstate = true;
2352 }
2353 }
2354 priv->bcurrent_turbo_EDCA = true;
2355 } else {
2356 if (curRxOkCnt > 4*curTxOkCnt) {
2357 if (!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA) {
2358 if (priv->rtllib->mode == WIRELESS_MODE_G)
2359 write_nic_dword(dev, EDCAPARA_BE,
2360 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
2361 else
2362 write_nic_dword(dev, EDCAPARA_BE,
2363 edca_setting_DL[pHTInfo->IOTPeer]);
2364 priv->bis_cur_rdlstate = true;
2365 }
2366 } else {
2367 if (priv->bis_cur_rdlstate ||
2368 !priv->bcurrent_turbo_EDCA) {
2369 write_nic_dword(dev, EDCAPARA_BE,
2370 edca_setting_UL[pHTInfo->IOTPeer]);
2371 priv->bis_cur_rdlstate = false;
2372 }
2373
2374 }
2375
2376 priv->bcurrent_turbo_EDCA = true;
2377 }
2378 } else {
2379 if (priv->bcurrent_turbo_EDCA) {
2380 u8 tmp = AC0_BE;
2381 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8 *)(&tmp));
2382 priv->bcurrent_turbo_EDCA = false;
2383 }
2384 }
2385
2386
2387 dm_CheckEdcaTurbo_EXIT:
2388 priv->rtllib->bis_any_nonbepkts = false;
2389 lastTxOkCnt = priv->stats.txbytesunicast;
2390 lastRxOkCnt = priv->stats.rxbytesunicast;
2391 }
2392
2393 extern void DM_CTSToSelfSetting(struct net_device *dev, u32 DM_Type,
2394 u32 DM_Value)
2395 {
2396 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2397
2398 if (DM_Type == 0) {
2399 if (DM_Value > 1)
2400 DM_Value = 1;
2401 priv->rtllib->bCTSToSelfEnable = (bool)DM_Value;
2402 } else if (DM_Type == 1) {
2403 if (DM_Value >= 50)
2404 DM_Value = 50;
2405 priv->rtllib->CTSToSelfTH = (u8)DM_Value;
2406 }
2407 }
2408
2409 static void dm_init_ctstoself(struct net_device *dev)
2410 {
2411 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2412
2413 priv->rtllib->bCTSToSelfEnable = true;
2414 priv->rtllib->CTSToSelfTH = CTSToSelfTHVal;
2415 }
2416
2417 static void dm_ctstoself(struct net_device *dev)
2418 {
2419 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2420 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2421 static unsigned long lastTxOkCnt;
2422 static unsigned long lastRxOkCnt;
2423 unsigned long curTxOkCnt = 0;
2424 unsigned long curRxOkCnt = 0;
2425
2426 if (priv->rtllib->bCTSToSelfEnable != true) {
2427 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2428 return;
2429 }
2430 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2431 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2432 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2433 if (curRxOkCnt > 4*curTxOkCnt)
2434 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2435 else
2436 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
2437
2438 lastTxOkCnt = priv->stats.txbytesunicast;
2439 lastRxOkCnt = priv->stats.rxbytesunicast;
2440 }
2441 }
2442
2443
2444 static void dm_Init_WA_Broadcom_IOT(struct net_device *dev)
2445 {
2446 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2447 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2448
2449 pHTInfo->bWAIotBroadcom = false;
2450 pHTInfo->WAIotTH = WAIotTHVal;
2451 }
2452
2453 static void dm_check_pbc_gpio(struct net_device *dev)
2454 {
2455 }
2456
2457 extern void dm_CheckRfCtrlGPIO(void *data)
2458 {
2459 struct r8192_priv *priv = container_of_dwork_rsl(data,
2460 struct r8192_priv, gpio_change_rf_wq);
2461 struct net_device *dev = priv->rtllib->dev;
2462 u8 tmp1byte;
2463 enum rt_rf_power_state eRfPowerStateToSet;
2464 bool bActuallySet = false;
2465 char *argv[3];
2466 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
2467 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
2468
2469 bActuallySet = false;
2470
2471 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
2472 return;
2473
2474 if (priv->bfirst_after_down) {
2475 priv->bfirst_after_down = 1;
2476 return;
2477 }
2478
2479 tmp1byte = read_nic_byte(dev, GPI);
2480
2481 eRfPowerStateToSet = (tmp1byte&BIT1) ? eRfOn : eRfOff;
2482
2483 if ((priv->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)) {
2484 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio ON\n");
2485 printk(KERN_INFO "gpiochangeRF - HW Radio ON\n");
2486 priv->bHwRadioOff = false;
2487 bActuallySet = true;
2488 } else if ((priv->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)) {
2489 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio OFF\n");
2490 printk(KERN_INFO "gpiochangeRF - HW Radio OFF\n");
2491 priv->bHwRadioOff = true;
2492 bActuallySet = true;
2493 }
2494
2495 if (bActuallySet) {
2496 mdelay(1000);
2497 priv->bHwRfOffAction = 1;
2498 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW, true);
2499 if (priv->bHwRadioOff == true)
2500 argv[1] = "RFOFF";
2501 else
2502 argv[1] = "RFON";
2503
2504 argv[0] = RadioPowerPath;
2505 argv[2] = NULL;
2506 call_usermodehelper(RadioPowerPath, argv, envp, 1);
2507 }
2508 }
2509
2510 void dm_rf_pathcheck_workitemcallback(void *data)
2511 {
2512 struct r8192_priv *priv = container_of_dwork_rsl(data,
2513 struct r8192_priv,
2514 rfpath_check_wq);
2515 struct net_device *dev = priv->rtllib->dev;
2516 u8 rfpath = 0, i;
2517
2518 rfpath = read_nic_byte(dev, 0xc04);
2519
2520 for (i = 0; i < RF90_PATH_MAX; i++) {
2521 if (rfpath & (0x01<<i))
2522 priv->brfpath_rxenable[i] = 1;
2523 else
2524 priv->brfpath_rxenable[i] = 0;
2525 }
2526 if (!DM_RxPathSelTable.Enable)
2527 return;
2528
2529 dm_rxpath_sel_byrssi(dev);
2530 }
2531
2532 static void dm_init_rxpath_selection(struct net_device *dev)
2533 {
2534 u8 i;
2535 struct r8192_priv *priv = rtllib_priv(dev);
2536
2537 DM_RxPathSelTable.Enable = 1;
2538 DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
2539 DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
2540 if (priv->CustomerID == RT_CID_819x_Netcore)
2541 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
2542 else
2543 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
2544 DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
2545 DM_RxPathSelTable.disabledRF = 0;
2546 for (i = 0; i < 4; i++) {
2547 DM_RxPathSelTable.rf_rssi[i] = 50;
2548 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
2549 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
2550 }
2551 }
2552
2553 #define PWDB_IN_RANGE ((cur_cck_pwdb < tmp_cck_max_pwdb) && \
2554 (cur_cck_pwdb > tmp_cck_sec_pwdb))
2555
2556 static void dm_rxpath_sel_byrssi(struct net_device *dev)
2557 {
2558 struct r8192_priv *priv = rtllib_priv(dev);
2559 u8 i, max_rssi_index = 0, min_rssi_index = 0;
2560 u8 sec_rssi_index = 0, rf_num = 0;
2561 u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
2562 u8 cck_default_Rx = 0x2;
2563 u8 cck_optional_Rx = 0x3;
2564 long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
2565 u8 cck_rx_ver2_max_index = 0, cck_rx_ver2_min_index = 0;
2566 u8 cck_rx_ver2_sec_index = 0;
2567 u8 cur_rf_rssi;
2568 long cur_cck_pwdb;
2569 static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
2570 u8 update_cck_rx_path;
2571
2572 if (priv->rf_type != RF_2T4R)
2573 return;
2574
2575 if (!cck_Rx_Path_initialized) {
2576 DM_RxPathSelTable.cck_Rx_path = (read_nic_byte(dev, 0xa07)&0xf);
2577 cck_Rx_Path_initialized = 1;
2578 }
2579
2580 DM_RxPathSelTable.disabledRF = 0xf;
2581 DM_RxPathSelTable.disabledRF &= ~(read_nic_byte(dev, 0xc04));
2582
2583 if (priv->rtllib->mode == WIRELESS_MODE_B)
2584 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
2585
2586 for (i = 0; i < RF90_PATH_MAX; i++) {
2587 if (!DM_RxPathSelTable.DbgMode)
2588 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
2589
2590 if (priv->brfpath_rxenable[i]) {
2591 rf_num++;
2592 cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
2593
2594 if (rf_num == 1) {
2595 max_rssi_index = min_rssi_index = sec_rssi_index = i;
2596 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
2597 } else if (rf_num == 2) {
2598 if (cur_rf_rssi >= tmp_max_rssi) {
2599 tmp_max_rssi = cur_rf_rssi;
2600 max_rssi_index = i;
2601 } else {
2602 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
2603 sec_rssi_index = min_rssi_index = i;
2604 }
2605 } else {
2606 if (cur_rf_rssi > tmp_max_rssi) {
2607 tmp_sec_rssi = tmp_max_rssi;
2608 sec_rssi_index = max_rssi_index;
2609 tmp_max_rssi = cur_rf_rssi;
2610 max_rssi_index = i;
2611 } else if (cur_rf_rssi == tmp_max_rssi) {
2612 tmp_sec_rssi = cur_rf_rssi;
2613 sec_rssi_index = i;
2614 } else if ((cur_rf_rssi < tmp_max_rssi) &&
2615 (cur_rf_rssi > tmp_sec_rssi)) {
2616 tmp_sec_rssi = cur_rf_rssi;
2617 sec_rssi_index = i;
2618 } else if (cur_rf_rssi == tmp_sec_rssi) {
2619 if (tmp_sec_rssi == tmp_min_rssi) {
2620 tmp_sec_rssi = cur_rf_rssi;
2621 sec_rssi_index = i;
2622 }
2623 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
2624 (cur_rf_rssi > tmp_min_rssi)) {
2625 ;
2626 } else if (cur_rf_rssi == tmp_min_rssi) {
2627 if (tmp_sec_rssi == tmp_min_rssi) {
2628 tmp_min_rssi = cur_rf_rssi;
2629 min_rssi_index = i;
2630 }
2631 } else if (cur_rf_rssi < tmp_min_rssi) {
2632 tmp_min_rssi = cur_rf_rssi;
2633 min_rssi_index = i;
2634 }
2635 }
2636 }
2637 }
2638
2639 rf_num = 0;
2640 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2641 for (i = 0; i < RF90_PATH_MAX; i++) {
2642 if (priv->brfpath_rxenable[i]) {
2643 rf_num++;
2644 cur_cck_pwdb =
2645 DM_RxPathSelTable.cck_pwdb_sta[i];
2646
2647 if (rf_num == 1) {
2648 cck_rx_ver2_max_index = i;
2649 cck_rx_ver2_min_index = i;
2650 cck_rx_ver2_sec_index = i;
2651 tmp_cck_max_pwdb = cur_cck_pwdb;
2652 tmp_cck_min_pwdb = cur_cck_pwdb;
2653 tmp_cck_sec_pwdb = cur_cck_pwdb;
2654 } else if (rf_num == 2) {
2655 if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
2656 tmp_cck_max_pwdb = cur_cck_pwdb;
2657 cck_rx_ver2_max_index = i;
2658 } else {
2659 tmp_cck_sec_pwdb = cur_cck_pwdb;
2660 tmp_cck_min_pwdb = cur_cck_pwdb;
2661 cck_rx_ver2_sec_index = i;
2662 cck_rx_ver2_min_index = i;
2663 }
2664 } else {
2665 if (cur_cck_pwdb > tmp_cck_max_pwdb) {
2666 tmp_cck_sec_pwdb =
2667 tmp_cck_max_pwdb;
2668 cck_rx_ver2_sec_index =
2669 cck_rx_ver2_max_index;
2670 tmp_cck_max_pwdb = cur_cck_pwdb;
2671 cck_rx_ver2_max_index = i;
2672 } else if (cur_cck_pwdb ==
2673 tmp_cck_max_pwdb) {
2674 tmp_cck_sec_pwdb = cur_cck_pwdb;
2675 cck_rx_ver2_sec_index = i;
2676 } else if (PWDB_IN_RANGE) {
2677 tmp_cck_sec_pwdb = cur_cck_pwdb;
2678 cck_rx_ver2_sec_index = i;
2679 } else if (cur_cck_pwdb ==
2680 tmp_cck_sec_pwdb) {
2681 if (tmp_cck_sec_pwdb ==
2682 tmp_cck_min_pwdb) {
2683 tmp_cck_sec_pwdb =
2684 cur_cck_pwdb;
2685 cck_rx_ver2_sec_index =
2686 i;
2687 }
2688 } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
2689 (cur_cck_pwdb > tmp_cck_min_pwdb)) {
2690 ;
2691 } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
2692 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2693 tmp_cck_min_pwdb = cur_cck_pwdb;
2694 cck_rx_ver2_min_index = i;
2695 }
2696 } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
2697 tmp_cck_min_pwdb = cur_cck_pwdb;
2698 cck_rx_ver2_min_index = i;
2699 }
2700 }
2701
2702 }
2703 }
2704 }
2705
2706 update_cck_rx_path = 0;
2707 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2708 cck_default_Rx = cck_rx_ver2_max_index;
2709 cck_optional_Rx = cck_rx_ver2_sec_index;
2710 if (tmp_cck_max_pwdb != -64)
2711 update_cck_rx_path = 1;
2712 }
2713
2714 if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
2715 if ((tmp_max_rssi - tmp_min_rssi) >=
2716 DM_RxPathSelTable.diff_TH) {
2717 DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] =
2718 tmp_max_rssi+5;
2719 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable,
2720 0x1<<min_rssi_index, 0x0);
2721 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable,
2722 0x1<<min_rssi_index, 0x0);
2723 disabled_rf_cnt++;
2724 }
2725 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
2726 cck_default_Rx = max_rssi_index;
2727 cck_optional_Rx = sec_rssi_index;
2728 if (tmp_max_rssi)
2729 update_cck_rx_path = 1;
2730 }
2731 }
2732
2733 if (update_cck_rx_path) {
2734 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) |
2735 (cck_optional_Rx);
2736 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000,
2737 DM_RxPathSelTable.cck_Rx_path);
2738 }
2739
2740 if (DM_RxPathSelTable.disabledRF) {
2741 for (i = 0; i < 4; i++) {
2742 if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) {
2743 if (tmp_max_rssi >=
2744 DM_RxPathSelTable.rf_enable_rssi_th[i]) {
2745 rtl8192_setBBreg(dev,
2746 rOFDM0_TRxPathEnable, 0x1 << i,
2747 0x1);
2748 rtl8192_setBBreg(dev,
2749 rOFDM1_TRxPathEnable,
2750 0x1 << i, 0x1);
2751 DM_RxPathSelTable.rf_enable_rssi_th[i]
2752 = 100;
2753 disabled_rf_cnt--;
2754 }
2755 }
2756 }
2757 }
2758 }
2759
2760 static void dm_check_rx_path_selection(struct net_device *dev)
2761 {
2762 struct r8192_priv *priv = rtllib_priv(dev);
2763
2764 queue_delayed_work_rsl(priv->priv_wq, &priv->rfpath_check_wq, 0);
2765 }
2766
2767
2768 static void dm_init_fsync(struct net_device *dev)
2769 {
2770 struct r8192_priv *priv = rtllib_priv(dev);
2771
2772 priv->rtllib->fsync_time_interval = 500;
2773 priv->rtllib->fsync_rate_bitmap = 0x0f000800;
2774 priv->rtllib->fsync_rssi_threshold = 30;
2775 priv->rtllib->bfsync_enable = false;
2776 priv->rtllib->fsync_multiple_timeinterval = 3;
2777 priv->rtllib->fsync_firstdiff_ratethreshold = 100;
2778 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2779 priv->rtllib->fsync_state = Default_Fsync;
2780 priv->framesyncMonitor = 1;
2781
2782 init_timer(&priv->fsync_timer);
2783 setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,
2784 (unsigned long) dev);
2785 }
2786
2787
2788 static void dm_deInit_fsync(struct net_device *dev)
2789 {
2790 struct r8192_priv *priv = rtllib_priv(dev);
2791 del_timer_sync(&priv->fsync_timer);
2792 }
2793
2794 extern void dm_fsync_timer_callback(unsigned long data)
2795 {
2796 struct net_device *dev = (struct net_device *)data;
2797 struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
2798 u32 rate_index, rate_count = 0, rate_count_diff = 0;
2799 bool bSwitchFromCountDiff = false;
2800 bool bDoubleTimeInterval = false;
2801
2802 if (priv->rtllib->state == RTLLIB_LINKED &&
2803 priv->rtllib->bfsync_enable &&
2804 (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2805 u32 rate_bitmap;
2806 for (rate_index = 0; rate_index <= 27; rate_index++) {
2807 rate_bitmap = 1 << rate_index;
2808 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
2809 rate_count +=
2810 priv->stats.received_rate_histogram[1]
2811 [rate_index];
2812 }
2813
2814 if (rate_count < priv->rate_record)
2815 rate_count_diff = 0xffffffff - rate_count +
2816 priv->rate_record;
2817 else
2818 rate_count_diff = rate_count - priv->rate_record;
2819 if (rate_count_diff < priv->rateCountDiffRecord) {
2820
2821 u32 DiffNum = priv->rateCountDiffRecord -
2822 rate_count_diff;
2823 if (DiffNum >=
2824 priv->rtllib->fsync_seconddiff_ratethreshold)
2825 priv->ContiuneDiffCount++;
2826 else
2827 priv->ContiuneDiffCount = 0;
2828
2829 if (priv->ContiuneDiffCount >= 2) {
2830 bSwitchFromCountDiff = true;
2831 priv->ContiuneDiffCount = 0;
2832 }
2833 } else {
2834 priv->ContiuneDiffCount = 0;
2835 }
2836
2837 if (rate_count_diff <=
2838 priv->rtllib->fsync_firstdiff_ratethreshold) {
2839 bSwitchFromCountDiff = true;
2840 priv->ContiuneDiffCount = 0;
2841 }
2842 priv->rate_record = rate_count;
2843 priv->rateCountDiffRecord = rate_count_diff;
2844 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rate"
2845 "Countdiff %d bSwitchFsync %d\n", priv->rate_record,
2846 rate_count, rate_count_diff, priv->bswitch_fsync);
2847 if (priv->undecorated_smoothed_pwdb >
2848 priv->rtllib->fsync_rssi_threshold &&
2849 bSwitchFromCountDiff) {
2850 bDoubleTimeInterval = true;
2851 priv->bswitch_fsync = !priv->bswitch_fsync;
2852 if (priv->bswitch_fsync) {
2853 write_nic_byte(dev, 0xC36, 0x1c);
2854 write_nic_byte(dev, 0xC3e, 0x90);
2855 } else {
2856 write_nic_byte(dev, 0xC36, 0x5c);
2857 write_nic_byte(dev, 0xC3e, 0x96);
2858 }
2859 } else if (priv->undecorated_smoothed_pwdb <=
2860 priv->rtllib->fsync_rssi_threshold) {
2861 if (priv->bswitch_fsync) {
2862 priv->bswitch_fsync = false;
2863 write_nic_byte(dev, 0xC36, 0x5c);
2864 write_nic_byte(dev, 0xC3e, 0x96);
2865 }
2866 }
2867 if (bDoubleTimeInterval) {
2868 if (timer_pending(&priv->fsync_timer))
2869 del_timer_sync(&priv->fsync_timer);
2870 priv->fsync_timer.expires = jiffies +
2871 MSECS(priv->rtllib->fsync_time_interval *
2872 priv->rtllib->fsync_multiple_timeinterval);
2873 add_timer(&priv->fsync_timer);
2874 } else {
2875 if (timer_pending(&priv->fsync_timer))
2876 del_timer_sync(&priv->fsync_timer);
2877 priv->fsync_timer.expires = jiffies +
2878 MSECS(priv->rtllib->fsync_time_interval);
2879 add_timer(&priv->fsync_timer);
2880 }
2881 } else {
2882 if (priv->bswitch_fsync) {
2883 priv->bswitch_fsync = false;
2884 write_nic_byte(dev, 0xC36, 0x5c);
2885 write_nic_byte(dev, 0xC3e, 0x96);
2886 }
2887 priv->ContiuneDiffCount = 0;
2888 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2889 }
2890 RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
2891 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d "
2892 "bSwitchFsync %d\n", priv->rate_record, rate_count,
2893 rate_count_diff, priv->bswitch_fsync);
2894 }
2895
2896 static void dm_StartHWFsync(struct net_device *dev)
2897 {
2898 u8 rf_timing = 0x77;
2899 struct r8192_priv *priv = rtllib_priv(dev);
2900 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2901 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
2902 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
2903 (u8 *)(&rf_timing));
2904 write_nic_byte(dev, 0xc3b, 0x41);
2905 }
2906
2907 static void dm_EndHWFsync(struct net_device *dev)
2908 {
2909 u8 rf_timing = 0xaa;
2910 struct r8192_priv *priv = rtllib_priv(dev);
2911 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2912 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2913 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
2914 (&rf_timing));
2915 write_nic_byte(dev, 0xc3b, 0x49);
2916 }
2917
2918 static void dm_EndSWFsync(struct net_device *dev)
2919 {
2920 struct r8192_priv *priv = rtllib_priv(dev);
2921
2922 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2923 del_timer_sync(&(priv->fsync_timer));
2924
2925 if (priv->bswitch_fsync) {
2926 priv->bswitch_fsync = false;
2927
2928 write_nic_byte(dev, 0xC36, 0x5c);
2929
2930 write_nic_byte(dev, 0xC3e, 0x96);
2931 }
2932
2933 priv->ContiuneDiffCount = 0;
2934 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2935 }
2936
2937 static void dm_StartSWFsync(struct net_device *dev)
2938 {
2939 struct r8192_priv *priv = rtllib_priv(dev);
2940 u32 rateIndex;
2941 u32 rateBitmap;
2942
2943 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2944 priv->rate_record = 0;
2945 priv->ContiuneDiffCount = 0;
2946 priv->rateCountDiffRecord = 0;
2947 priv->bswitch_fsync = false;
2948
2949 if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
2950 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
2951 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
2952 } else {
2953 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
2954 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2955 }
2956 for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2957 rateBitmap = 1 << rateIndex;
2958 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
2959 priv->rate_record +=
2960 priv->stats.received_rate_histogram[1]
2961 [rateIndex];
2962 }
2963 if (timer_pending(&priv->fsync_timer))
2964 del_timer_sync(&priv->fsync_timer);
2965 priv->fsync_timer.expires = jiffies +
2966 MSECS(priv->rtllib->fsync_time_interval);
2967 add_timer(&priv->fsync_timer);
2968
2969 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
2970
2971 }
2972
2973 void dm_check_fsync(struct net_device *dev)
2974 {
2975 #define RegC38_Default 0
2976 #define RegC38_NonFsync_Other_AP 1
2977 #define RegC38_Fsync_AP_BCM 2
2978 struct r8192_priv *priv = rtllib_priv(dev);
2979 static u8 reg_c38_State = RegC38_Default;
2980 static u32 reset_cnt;
2981
2982 RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval "
2983 "%d\n", priv->rtllib->fsync_rssi_threshold,
2984 priv->rtllib->fsync_time_interval,
2985 priv->rtllib->fsync_multiple_timeinterval);
2986 RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d Second"
2987 "DiffRateThreshold %d\n", priv->rtllib->fsync_rate_bitmap,
2988 priv->rtllib->fsync_firstdiff_ratethreshold,
2989 priv->rtllib->fsync_seconddiff_ratethreshold);
2990
2991 if (priv->rtllib->state == RTLLIB_LINKED &&
2992 priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2993 if (priv->rtllib->bfsync_enable == 0) {
2994 switch (priv->rtllib->fsync_state) {
2995 case Default_Fsync:
2996 dm_StartHWFsync(dev);
2997 priv->rtllib->fsync_state = HW_Fsync;
2998 break;
2999 case SW_Fsync:
3000 dm_EndSWFsync(dev);
3001 dm_StartHWFsync(dev);
3002 priv->rtllib->fsync_state = HW_Fsync;
3003 break;
3004 case HW_Fsync:
3005 default:
3006 break;
3007 }
3008 } else {
3009 switch (priv->rtllib->fsync_state) {
3010 case Default_Fsync:
3011 dm_StartSWFsync(dev);
3012 priv->rtllib->fsync_state = SW_Fsync;
3013 break;
3014 case HW_Fsync:
3015 dm_EndHWFsync(dev);
3016 dm_StartSWFsync(dev);
3017 priv->rtllib->fsync_state = SW_Fsync;
3018 break;
3019 case SW_Fsync:
3020 default:
3021 break;
3022
3023 }
3024 }
3025 if (priv->framesyncMonitor) {
3026 if (reg_c38_State != RegC38_Fsync_AP_BCM) {
3027 write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
3028
3029 reg_c38_State = RegC38_Fsync_AP_BCM;
3030 }
3031 }
3032 } else {
3033 switch (priv->rtllib->fsync_state) {
3034 case HW_Fsync:
3035 dm_EndHWFsync(dev);
3036 priv->rtllib->fsync_state = Default_Fsync;
3037 break;
3038 case SW_Fsync:
3039 dm_EndSWFsync(dev);
3040 priv->rtllib->fsync_state = Default_Fsync;
3041 break;
3042 case Default_Fsync:
3043 default:
3044 break;
3045 }
3046
3047 if (priv->framesyncMonitor) {
3048 if (priv->rtllib->state == RTLLIB_LINKED) {
3049 if (priv->undecorated_smoothed_pwdb <=
3050 RegC38_TH) {
3051 if (reg_c38_State !=
3052 RegC38_NonFsync_Other_AP) {
3053 write_nic_byte(dev,
3054 rOFDM0_RxDetector3,
3055 0x90);
3056
3057 reg_c38_State =
3058 RegC38_NonFsync_Other_AP;
3059 }
3060 } else if (priv->undecorated_smoothed_pwdb >=
3061 (RegC38_TH+5)) {
3062 if (reg_c38_State) {
3063 write_nic_byte(dev,
3064 rOFDM0_RxDetector3,
3065 priv->framesync);
3066 reg_c38_State = RegC38_Default;
3067 }
3068 }
3069 } else {
3070 if (reg_c38_State) {
3071 write_nic_byte(dev, rOFDM0_RxDetector3,
3072 priv->framesync);
3073 reg_c38_State = RegC38_Default;
3074 }
3075 }
3076 }
3077 }
3078 if (priv->framesyncMonitor) {
3079 if (priv->reset_count != reset_cnt) {
3080 write_nic_byte(dev, rOFDM0_RxDetector3,
3081 priv->framesync);
3082 reg_c38_State = RegC38_Default;
3083 reset_cnt = priv->reset_count;
3084 }
3085 } else {
3086 if (reg_c38_State) {
3087 write_nic_byte(dev, rOFDM0_RxDetector3,
3088 priv->framesync);
3089 reg_c38_State = RegC38_Default;
3090 }
3091 }
3092 }
3093
3094 extern void dm_shadow_init(struct net_device *dev)
3095 {
3096 u8 page;
3097 u16 offset;
3098
3099 for (page = 0; page < 5; page++)
3100 for (offset = 0; offset < 256; offset++)
3101 dm_shadow[page][offset] = read_nic_byte(dev,
3102 offset+page * 256);
3103
3104 for (page = 8; page < 11; page++)
3105 for (offset = 0; offset < 256; offset++)
3106 dm_shadow[page][offset] = read_nic_byte(dev,
3107 offset+page * 256);
3108
3109 for (page = 12; page < 15; page++)
3110 for (offset = 0; offset < 256; offset++)
3111 dm_shadow[page][offset] = read_nic_byte(dev,
3112 offset+page*256);
3113
3114 }
3115
3116 /*---------------------------Define function prototype------------------------*/
3117 static void dm_init_dynamic_txpower(struct net_device *dev)
3118 {
3119 struct r8192_priv *priv = rtllib_priv(dev);
3120
3121 priv->rtllib->bdynamic_txpower_enable = true;
3122 priv->bLastDTPFlag_High = false;
3123 priv->bLastDTPFlag_Low = false;
3124 priv->bDynamicTxHighPower = false;
3125 priv->bDynamicTxLowPower = false;
3126 }
3127
3128 static void dm_dynamic_txpower(struct net_device *dev)
3129 {
3130 struct r8192_priv *priv = rtllib_priv(dev);
3131 unsigned int txhipower_threshhold = 0;
3132 unsigned int txlowpower_threshold = 0;
3133 if (priv->rtllib->bdynamic_txpower_enable != true) {
3134 priv->bDynamicTxHighPower = false;
3135 priv->bDynamicTxLowPower = false;
3136 return;
3137 }
3138 if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) &&
3139 (priv->rtllib->mode == IEEE_G)) {
3140 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
3141 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
3142 } else {
3143 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
3144 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
3145 }
3146
3147 RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n",
3148 priv->undecorated_smoothed_pwdb);
3149
3150 if (priv->rtllib->state == RTLLIB_LINKED) {
3151 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) {
3152 priv->bDynamicTxHighPower = true;
3153 priv->bDynamicTxLowPower = false;
3154 } else {
3155 if (priv->undecorated_smoothed_pwdb <
3156 txlowpower_threshold &&
3157 priv->bDynamicTxHighPower == true)
3158 priv->bDynamicTxHighPower = false;
3159 if (priv->undecorated_smoothed_pwdb < 35)
3160 priv->bDynamicTxLowPower = true;
3161 else if (priv->undecorated_smoothed_pwdb >= 40)
3162 priv->bDynamicTxLowPower = false;
3163 }
3164 } else {
3165 priv->bDynamicTxHighPower = false;
3166 priv->bDynamicTxLowPower = false;
3167 }
3168
3169 if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
3170 (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
3171 RT_TRACE(COMP_TXAGC, "SetTxPowerLevel8190() channel = %d\n",
3172 priv->rtllib->current_network.channel);
3173
3174 rtl8192_phy_setTxPower(dev,
3175 priv->rtllib->current_network.channel);
3176 }
3177 priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
3178 priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
3179
3180 }
3181
3182 static void dm_check_txrateandretrycount(struct net_device *dev)
3183 {
3184 struct r8192_priv *priv = rtllib_priv(dev);
3185 struct rtllib_device *ieee = priv->rtllib;
3186
3187 ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev,
3188 Current_Tx_Rate_Reg);
3189
3190 ieee->softmac_stats.last_packet_rate = read_nic_byte(dev,
3191 Initial_Tx_Rate_Reg);
3192
3193 ieee->softmac_stats.txretrycount = read_nic_dword(dev,
3194 Tx_Retry_Count_Reg);
3195 }
3196
3197 static void dm_send_rssi_tofw(struct net_device *dev)
3198 {
3199 struct r8192_priv *priv = rtllib_priv(dev);
3200
3201 write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
3202 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree