sound/soc/omap/mcpdm.c

   1 /*
   2  * mcpdm.c  --  McPDM interface driver
   3  *
   4  * Author: Jorge Eduardo Candelaria <x0107209@ti.com>
   5  * Copyright (C) 2009 - Texas Instruments, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19  * 02110-1301 USA
  20  *
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/device.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/wait.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/err.h>
  30 #include <linux/clk.h>
  31 #include <linux/delay.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34
  35 #include "mcpdm.h"
  36
  37 static struct omap_mcpdm *mcpdm;
  38
  39 static inline void omap_mcpdm_write(u16 reg, u32 val)
  40 {
  41        __raw_writel(val, mcpdm->io_base + reg);
  42 }
  43
  44 static inline int omap_mcpdm_read(u16 reg)
  45 {
  46        return __raw_readl(mcpdm->io_base + reg);
  47 }
  48
  49 static void omap_mcpdm_reg_dump(void)
  50 {
  51        dev_dbg(mcpdm->dev, "***********************\n");
  52        dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  53                        omap_mcpdm_read(MCPDM_IRQSTATUS_RAW));
  54        dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  55                        omap_mcpdm_read(MCPDM_IRQSTATUS));
  56        dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
  57                        omap_mcpdm_read(MCPDM_IRQENABLE_SET));
  58        dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
  59                        omap_mcpdm_read(MCPDM_IRQENABLE_CLR));
  60        dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
  61                        omap_mcpdm_read(MCPDM_IRQWAKE_EN));
  62        dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
  63                        omap_mcpdm_read(MCPDM_DMAENABLE_SET));
  64        dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
  65                        omap_mcpdm_read(MCPDM_DMAENABLE_CLR));
  66        dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
  67                        omap_mcpdm_read(MCPDM_DMAWAKEEN));
  68        dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
  69                        omap_mcpdm_read(MCPDM_CTRL));
  70        dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
  71                        omap_mcpdm_read(MCPDM_DN_DATA));
  72        dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
  73                        omap_mcpdm_read(MCPDM_UP_DATA));
  74        dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
  75                        omap_mcpdm_read(MCPDM_FIFO_CTRL_DN));
  76        dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
  77                        omap_mcpdm_read(MCPDM_FIFO_CTRL_UP));
  78        dev_dbg(mcpdm->dev, "DN_OFFSET:  0x%04x\n",
  79                        omap_mcpdm_read(MCPDM_DN_OFFSET));
  80        dev_dbg(mcpdm->dev, "***********************\n");
  81 }
  82
  83 /*
  84  * Takes the McPDM module in and out of reset state.
  85  * Uplink and downlink can be reset individually.
  86  */
  87 static void omap_mcpdm_reset_capture(int reset)
  88 {
  89        int ctrl = omap_mcpdm_read(MCPDM_CTRL);
  90
  91        if (reset)
  92                ctrl |= SW_UP_RST;
  93        else
  94                ctrl &= ~SW_UP_RST;
  95
  96        omap_mcpdm_write(MCPDM_CTRL, ctrl);
  97 }
  98
  99 static void omap_mcpdm_reset_playback(int reset)
 100 {
 101        int ctrl = omap_mcpdm_read(MCPDM_CTRL);
 102
 103        if (reset)
 104                ctrl |= SW_DN_RST;
 105        else
 106                ctrl &= ~SW_DN_RST;
 107
 108        omap_mcpdm_write(MCPDM_CTRL, ctrl);
 109 }
 110
 111 /*
 112  * Enables the transfer through the PDM interface to/from the Phoenix
 113  * codec by enabling the corresponding UP or DN channels.
 114  */
 115 void omap_mcpdm_start(int stream)
 116 {
 117        int ctrl = omap_mcpdm_read(MCPDM_CTRL);
 118
 119        if (stream)
 120                ctrl |= mcpdm->up_channels;
 121        else
 122                ctrl |= mcpdm->dn_channels;
 123
 124        omap_mcpdm_write(MCPDM_CTRL, ctrl);
 125 }
 126
 127 /*
 128  * Disables the transfer through the PDM interface to/from the Phoenix
 129  * codec by disabling the corresponding UP or DN channels.
 130  */
 131 void omap_mcpdm_stop(int stream)
 132 {
 133        int ctrl = omap_mcpdm_read(MCPDM_CTRL);
 134
 135        if (stream)
 136                ctrl &= ~mcpdm->up_channels;
 137        else
 138                ctrl &= ~mcpdm->dn_channels;
 139
 140        omap_mcpdm_write(MCPDM_CTRL, ctrl);
 141 }
 142
 143 /*
 144  * Configures McPDM uplink for audio recording.
 145  * This function should be called before omap_mcpdm_start.
 146  */
 147 int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
 148 {
 149        int irq_mask = 0;
 150        int ctrl;
 151
 152        if (!uplink)
 153                return -EINVAL;
 154
 155        mcpdm->uplink = uplink;
 156
 157        /* Enable irq request generation */
 158        irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
 159        omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
 160
 161        /* Configure uplink threshold */
 162        if (uplink->threshold > UP_THRES_MAX)
 163                uplink->threshold = UP_THRES_MAX;
 164
 165        omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold);
 166
 167        /* Configure DMA controller */
 168        omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE);
 169
 170        /* Set pdm out format */
 171        ctrl = omap_mcpdm_read(MCPDM_CTRL);
 172        ctrl &= ~PDMOUTFORMAT;
 173        ctrl |= uplink->format & PDMOUTFORMAT;
 174
 175        /* Uplink channels */
 176        mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK);
 177
 178        omap_mcpdm_write(MCPDM_CTRL, ctrl);
 179
 180        return 0;
 181 }
 182
 183 /*
 184  * Configures McPDM downlink for audio playback.
 185  * This function should be called before omap_mcpdm_start.
 186  */
 187 int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
 188 {
 189        int irq_mask = 0;
 190        int ctrl;
 191
 192        if (!downlink)
 193                return -EINVAL;
 194
 195        mcpdm->downlink = downlink;
 196
 197        /* Enable irq request generation */
 198        irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
 199        omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
 200
 201        /* Configure uplink threshold */
 202        if (downlink->threshold > DN_THRES_MAX)
 203                downlink->threshold = DN_THRES_MAX;
 204
 205        omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold);
 206
 207        /* Enable DMA request generation */
 208        omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE);
 209
 210        /* Set pdm out format */
 211        ctrl = omap_mcpdm_read(MCPDM_CTRL);
 212        ctrl &= ~PDMOUTFORMAT;
 213        ctrl |= downlink->format & PDMOUTFORMAT;
 214
 215        /* Downlink channels */
 216        mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK);
 217
 218        omap_mcpdm_write(MCPDM_CTRL, ctrl);
 219
 220        return 0;
 221 }
 222
 223 /*
 224  * Cleans McPDM uplink configuration.
 225  * This function should be called when the stream is closed.
 226  */
 227 int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
 228 {
 229        int irq_mask = 0;
 230
 231        if (!uplink)
 232                return -EINVAL;
 233
 234        /* Disable irq request generation */
 235        irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
 236        omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
 237
 238        /* Disable DMA request generation */
 239        omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE);
 240
 241        /* Clear Downlink channels */
 242        mcpdm->up_channels = 0;
 243
 244        mcpdm->uplink = NULL;
 245
 246        return 0;
 247 }
 248
 249 /*
 250  * Cleans McPDM downlink configuration.
 251  * This function should be called when the stream is closed.
 252  */
 253 int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink)
 254 {
 255        int irq_mask = 0;
 256
 257        if (!downlink)
 258                return -EINVAL;
 259
 260        /* Disable irq request generation */
 261        irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
 262        omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
 263
 264        /* Disable DMA request generation */
 265        omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE);
 266
 267        /* clear Downlink channels */
 268        mcpdm->dn_channels = 0;
 269
 270        mcpdm->downlink = NULL;
 271
 272        return 0;
 273 }
 274
 275 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 276 {
 277        struct omap_mcpdm *mcpdm_irq = dev_id;
 278        int irq_status;
 279
 280        irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS);
 281
 282        /* Acknowledge irq event */
 283        omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status);
 284
 285        if (irq & MCPDM_DN_IRQ_FULL) {
 286                dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
 287                omap_mcpdm_reset_playback(1);
 288                omap_mcpdm_playback_open(mcpdm_irq->downlink);
 289                omap_mcpdm_reset_playback(0);
 290        }
 291
 292        if (irq & MCPDM_DN_IRQ_EMPTY) {
 293                dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
 294                omap_mcpdm_reset_playback(1);
 295                omap_mcpdm_playback_open(mcpdm_irq->downlink);
 296                omap_mcpdm_reset_playback(0);
 297        }
 298
 299        if (irq & MCPDM_DN_IRQ) {
 300                dev_dbg(mcpdm_irq->dev, "DN write request\n");
 301        }
 302
 303        if (irq & MCPDM_UP_IRQ_FULL) {
 304                dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
 305                omap_mcpdm_reset_capture(1);
 306                omap_mcpdm_capture_open(mcpdm_irq->uplink);
 307                omap_mcpdm_reset_capture(0);
 308        }
 309
 310        if (irq & MCPDM_UP_IRQ_EMPTY) {
 311                dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
 312                omap_mcpdm_reset_capture(1);
 313                omap_mcpdm_capture_open(mcpdm_irq->uplink);
 314                omap_mcpdm_reset_capture(0);
 315        }
 316
 317        if (irq & MCPDM_UP_IRQ) {
 318                dev_dbg(mcpdm_irq->dev, "UP write request\n");
 319        }
 320
 321        return IRQ_HANDLED;
 322 }
 323
 324 int omap_mcpdm_request(void)
 325 {
 326        int ret;
 327
 328        clk_enable(mcpdm->clk);
 329
 330        spin_lock(&mcpdm->lock);
 331
 332        if (!mcpdm->free) {
 333                dev_err(mcpdm->dev, "McPDM interface is in use\n");
 334                spin_unlock(&mcpdm->lock);
 335                ret = -EBUSY;
 336                goto err;
 337        }
 338        mcpdm->free = 0;
 339
 340        spin_unlock(&mcpdm->lock);
 341
 342        /* Disable lines while request is ongoing */
 343        omap_mcpdm_write(MCPDM_CTRL, 0x00);
 344
 345        ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 346                                0, "McPDM", (void *)mcpdm);
 347        if (ret) {
 348                dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n");
 349                goto err;
 350        }
 351
 352        return 0;
 353
 354 err:
 355        clk_disable(mcpdm->clk);
 356        return ret;
 357 }
 358
 359 void omap_mcpdm_free(void)
 360 {
 361        spin_lock(&mcpdm->lock);
 362        if (mcpdm->free) {
 363                dev_err(mcpdm->dev, "McPDM interface is already free\n");
 364                spin_unlock(&mcpdm->lock);
 365                return;
 366        }
 367        mcpdm->free = 1;
 368        spin_unlock(&mcpdm->lock);
 369
 370        clk_disable(mcpdm->clk);
 371
 372        free_irq(mcpdm->irq, (void *)mcpdm);
 373 }
 374
 375 /* Enable/disable DC offset cancelation for the analog
 376  * headset path (PDM channels 1 and 2).
 377  */
 378 int omap_mcpdm_set_offset(int offset1, int offset2)
 379 {
 380        int offset;
 381
 382        if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX))
 383                return -EINVAL;
 384
 385        offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2);
 386
 387        /* offset cancellation for channel 1 */
 388        if (offset1)
 389                offset |= DN_OFST_RX1_EN;
 390        else
 391                offset &= ~DN_OFST_RX1_EN;
 392
 393        /* offset cancellation for channel 2 */
 394        if (offset2)
 395                offset |= DN_OFST_RX2_EN;
 396        else
 397                offset &= ~DN_OFST_RX2_EN;
 398
 399        omap_mcpdm_write(MCPDM_DN_OFFSET, offset);
 400
 401        return 0;
 402 }
 403
 404 static int __devinit omap_mcpdm_probe(struct platform_device *pdev)
 405 {
 406        struct resource *res;
 407        int ret = 0;
 408
 409        mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
 410        if (!mcpdm) {
 411                ret = -ENOMEM;
 412                goto exit;
 413        }
 414
 415        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 416        if (res == NULL) {
 417                dev_err(&pdev->dev, "no resource\n");
 418                goto err_resource;
 419        }
 420
 421        spin_lock_init(&mcpdm->lock);
 422        mcpdm->free = 1;
 423        mcpdm->io_base = ioremap(res->start, resource_size(res));
 424        if (!mcpdm->io_base) {
 425                ret = -ENOMEM;
 426                goto err_resource;
 427        }
 428
 429        mcpdm->irq = platform_get_irq(pdev, 0);
 430
 431        mcpdm->clk = clk_get(&pdev->dev, "pdm_ck");
 432        if (IS_ERR(mcpdm->clk)) {
 433                ret = PTR_ERR(mcpdm->clk);
 434                dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret);
 435                goto err_clk;
 436        }
 437
 438        mcpdm->dev = &pdev->dev;
 439        platform_set_drvdata(pdev, mcpdm);
 440
 441        return 0;
 442
 443 err_clk:
 444        iounmap(mcpdm->io_base);
 445 err_resource:
 446        kfree(mcpdm);
 447 exit:
 448        return ret;
 449 }
 450
 451 static int __devexit omap_mcpdm_remove(struct platform_device *pdev)
 452 {
 453        struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev);
 454
 455        platform_set_drvdata(pdev, NULL);
 456
 457        clk_put(mcpdm_ptr->clk);
 458
 459        iounmap(mcpdm_ptr->io_base);
 460
 461        mcpdm_ptr->clk = NULL;
 462        mcpdm_ptr->free = 0;
 463        mcpdm_ptr->dev = NULL;
 464
 465        kfree(mcpdm_ptr);
 466
 467        return 0;
 468 }
 469
 470 static struct platform_driver omap_mcpdm_driver = {
 471        .probe = omap_mcpdm_probe,
 472        .remove = __devexit_p(omap_mcpdm_remove),
 473        .driver = {
 474                .name = "omap-mcpdm",
 475        },
 476 };
 477
 478 static struct platform_device *omap_mcpdm_device;
 479
 480 static int __init omap_mcpdm_init(void)
 481 {
 482        return platform_driver_register(&omap_mcpdm_driver);
 483 }
 484 arch_initcall(omap_mcpdm_init);