rt2x00: Clean up error handling of PCI queue DMA allocation.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / rt2x00 / rt2x00pci.c
blob971af2546b59a85e3e820f6d9b7e14e9276a515f
1 /*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00pci
23 Abstract: rt2x00 generic pci device routines.
26 #include <linux/dma-mapping.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
31 #include "rt2x00.h"
32 #include "rt2x00pci.h"
35 * TX data handlers.
37 int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
38 struct data_queue *queue, struct sk_buff *skb,
39 struct ieee80211_tx_control *control)
41 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
42 struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
43 struct skb_frame_desc *skbdesc;
44 u32 word;
46 if (rt2x00queue_full(queue))
47 return -EINVAL;
49 rt2x00_desc_read(priv_tx->desc, 0, &word);
51 if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
52 rt2x00_get_field32(word, TXD_ENTRY_VALID)) {
53 ERROR(rt2x00dev,
54 "Arrived at non-free entry in the non-full queue %d.\n"
55 "Please file bug report to %s.\n",
56 control->queue, DRV_PROJECT);
57 return -EINVAL;
61 * Fill in skb descriptor
63 skbdesc = get_skb_frame_desc(skb);
64 skbdesc->data = skb->data;
65 skbdesc->data_len = skb->len;
66 skbdesc->desc = priv_tx->desc;
67 skbdesc->desc_len = queue->desc_size;
68 skbdesc->entry = entry;
70 memcpy(&priv_tx->control, control, sizeof(priv_tx->control));
71 memcpy(priv_tx->data, skb->data, skb->len);
72 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
74 rt2x00queue_index_inc(queue, Q_INDEX);
76 return 0;
78 EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
81 * TX/RX data handlers.
83 void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
85 struct data_queue *queue = rt2x00dev->rx;
86 struct queue_entry *entry;
87 struct queue_entry_priv_pci_rx *priv_rx;
88 struct ieee80211_hdr *hdr;
89 struct skb_frame_desc *skbdesc;
90 struct rxdone_entry_desc rxdesc;
91 int header_size;
92 int align;
93 u32 word;
95 while (1) {
96 entry = rt2x00queue_get_entry(queue, Q_INDEX);
97 priv_rx = entry->priv_data;
98 rt2x00_desc_read(priv_rx->desc, 0, &word);
100 if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
101 break;
103 memset(&rxdesc, 0, sizeof(rxdesc));
104 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc);
106 hdr = (struct ieee80211_hdr *)priv_rx->data;
107 header_size =
108 ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
111 * The data behind the ieee80211 header must be
112 * aligned on a 4 byte boundary.
114 align = header_size % 4;
117 * Allocate the sk_buffer, initialize it and copy
118 * all data into it.
120 entry->skb = dev_alloc_skb(rxdesc.size + align);
121 if (!entry->skb)
122 return;
124 skb_reserve(entry->skb, align);
125 memcpy(skb_put(entry->skb, rxdesc.size),
126 priv_rx->data, rxdesc.size);
129 * Fill in skb descriptor
131 skbdesc = get_skb_frame_desc(entry->skb);
132 memset(skbdesc, 0, sizeof(*skbdesc));
133 skbdesc->data = entry->skb->data;
134 skbdesc->data_len = entry->skb->len;
135 skbdesc->desc = priv_rx->desc;
136 skbdesc->desc_len = queue->desc_size;
137 skbdesc->entry = entry;
140 * Send the frame to rt2x00lib for further processing.
142 rt2x00lib_rxdone(entry, &rxdesc);
144 if (test_bit(DEVICE_ENABLED_RADIO, &queue->rt2x00dev->flags)) {
145 rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
146 rt2x00_desc_write(priv_rx->desc, 0, word);
149 rt2x00queue_index_inc(queue, Q_INDEX);
152 EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
154 void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry,
155 struct txdone_entry_desc *txdesc)
157 struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
158 u32 word;
160 txdesc->control = &priv_tx->control;
161 rt2x00lib_txdone(entry, txdesc);
164 * Make this entry available for reuse.
166 entry->flags = 0;
168 rt2x00_desc_read(priv_tx->desc, 0, &word);
169 rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0);
170 rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0);
171 rt2x00_desc_write(priv_tx->desc, 0, word);
173 rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE);
176 * If the data queue was full before the txdone handler
177 * we must make sure the packet queue in the mac80211 stack
178 * is reenabled when the txdone handler has finished.
180 if (!rt2x00queue_full(entry->queue))
181 ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue);
184 EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
187 * Device initialization handlers.
189 #define desc_size(__queue) \
190 ({ \
191 ((__queue)->limit * (__queue)->desc_size);\
194 #define data_size(__queue) \
195 ({ \
196 ((__queue)->limit * (__queue)->data_size);\
199 #define dma_size(__queue) \
200 ({ \
201 data_size(__queue) + desc_size(__queue);\
204 #define desc_offset(__queue, __base, __i) \
205 ({ \
206 (__base) + data_size(__queue) + \
207 ((__i) * (__queue)->desc_size); \
210 #define data_offset(__queue, __base, __i) \
211 ({ \
212 (__base) + \
213 ((__i) * (__queue)->data_size); \
216 static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
217 struct data_queue *queue)
219 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
220 struct queue_entry_priv_pci_rx *priv_rx;
221 struct queue_entry_priv_pci_tx *priv_tx;
222 void *addr;
223 dma_addr_t dma;
224 void *desc_addr;
225 dma_addr_t desc_dma;
226 void *data_addr;
227 dma_addr_t data_dma;
228 unsigned int i;
231 * Allocate DMA memory for descriptor and buffer.
233 addr = pci_alloc_consistent(pci_dev, dma_size(queue), &dma);
234 if (!addr)
235 return -ENOMEM;
237 memset(addr, 0, dma_size(queue));
240 * Initialize all queue entries to contain valid addresses.
242 for (i = 0; i < queue->limit; i++) {
243 desc_addr = desc_offset(queue, addr, i);
244 desc_dma = desc_offset(queue, dma, i);
245 data_addr = data_offset(queue, addr, i);
246 data_dma = data_offset(queue, dma, i);
248 if (queue->qid == QID_RX) {
249 priv_rx = queue->entries[i].priv_data;
250 priv_rx->desc = desc_addr;
251 priv_rx->desc_dma = desc_dma;
252 priv_rx->data = data_addr;
253 priv_rx->data_dma = data_dma;
254 } else {
255 priv_tx = queue->entries[i].priv_data;
256 priv_tx->desc = desc_addr;
257 priv_tx->desc_dma = desc_dma;
258 priv_tx->data = data_addr;
259 priv_tx->data_dma = data_dma;
263 return 0;
266 static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
267 struct data_queue *queue)
269 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
270 struct queue_entry_priv_pci_rx *priv_rx;
271 struct queue_entry_priv_pci_tx *priv_tx;
272 void *data_addr;
273 dma_addr_t data_dma;
275 if (queue->qid == QID_RX) {
276 priv_rx = queue->entries[0].priv_data;
277 data_addr = priv_rx->data;
278 data_dma = priv_rx->data_dma;
280 priv_rx->data = NULL;
281 } else {
282 priv_tx = queue->entries[0].priv_data;
283 data_addr = priv_tx->data;
284 data_dma = priv_tx->data_dma;
286 priv_tx->data = NULL;
289 if (data_addr)
290 pci_free_consistent(pci_dev, dma_size(queue),
291 data_addr, data_dma);
294 int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
296 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
297 struct data_queue *queue;
298 int status;
301 * Allocate DMA
303 queue_for_each(rt2x00dev, queue) {
304 status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
305 if (status)
306 goto exit;
310 * Register interrupt handler.
312 status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
313 IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
314 if (status) {
315 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
316 pci_dev->irq, status);
317 goto exit;
320 return 0;
322 exit:
323 queue_for_each(rt2x00dev, queue)
324 rt2x00pci_free_queue_dma(rt2x00dev, queue);
326 return status;
328 EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
330 void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
332 struct data_queue *queue;
335 * Free irq line.
337 free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
340 * Free DMA
342 queue_for_each(rt2x00dev, queue)
343 rt2x00pci_free_queue_dma(rt2x00dev, queue);
345 EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
348 * PCI driver handlers.
350 static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
352 kfree(rt2x00dev->rf);
353 rt2x00dev->rf = NULL;
355 kfree(rt2x00dev->eeprom);
356 rt2x00dev->eeprom = NULL;
358 if (rt2x00dev->csr.base) {
359 iounmap(rt2x00dev->csr.base);
360 rt2x00dev->csr.base = NULL;
364 static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
366 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
368 rt2x00dev->csr.base = ioremap(pci_resource_start(pci_dev, 0),
369 pci_resource_len(pci_dev, 0));
370 if (!rt2x00dev->csr.base)
371 goto exit;
373 rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
374 if (!rt2x00dev->eeprom)
375 goto exit;
377 rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
378 if (!rt2x00dev->rf)
379 goto exit;
381 return 0;
383 exit:
384 ERROR_PROBE("Failed to allocate registers.\n");
386 rt2x00pci_free_reg(rt2x00dev);
388 return -ENOMEM;
391 int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
393 struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
394 struct ieee80211_hw *hw;
395 struct rt2x00_dev *rt2x00dev;
396 int retval;
398 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
399 if (retval) {
400 ERROR_PROBE("PCI request regions failed.\n");
401 return retval;
404 retval = pci_enable_device(pci_dev);
405 if (retval) {
406 ERROR_PROBE("Enable device failed.\n");
407 goto exit_release_regions;
410 pci_set_master(pci_dev);
412 if (pci_set_mwi(pci_dev))
413 ERROR_PROBE("MWI not available.\n");
415 if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
416 pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
417 ERROR_PROBE("PCI DMA not supported.\n");
418 retval = -EIO;
419 goto exit_disable_device;
422 hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
423 if (!hw) {
424 ERROR_PROBE("Failed to allocate hardware.\n");
425 retval = -ENOMEM;
426 goto exit_disable_device;
429 pci_set_drvdata(pci_dev, hw);
431 rt2x00dev = hw->priv;
432 rt2x00dev->dev = pci_dev;
433 rt2x00dev->ops = ops;
434 rt2x00dev->hw = hw;
436 retval = rt2x00pci_alloc_reg(rt2x00dev);
437 if (retval)
438 goto exit_free_device;
440 retval = rt2x00lib_probe_dev(rt2x00dev);
441 if (retval)
442 goto exit_free_reg;
444 return 0;
446 exit_free_reg:
447 rt2x00pci_free_reg(rt2x00dev);
449 exit_free_device:
450 ieee80211_free_hw(hw);
452 exit_disable_device:
453 if (retval != -EBUSY)
454 pci_disable_device(pci_dev);
456 exit_release_regions:
457 pci_release_regions(pci_dev);
459 pci_set_drvdata(pci_dev, NULL);
461 return retval;
463 EXPORT_SYMBOL_GPL(rt2x00pci_probe);
465 void rt2x00pci_remove(struct pci_dev *pci_dev)
467 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
468 struct rt2x00_dev *rt2x00dev = hw->priv;
471 * Free all allocated data.
473 rt2x00lib_remove_dev(rt2x00dev);
474 rt2x00pci_free_reg(rt2x00dev);
475 ieee80211_free_hw(hw);
478 * Free the PCI device data.
480 pci_set_drvdata(pci_dev, NULL);
481 pci_disable_device(pci_dev);
482 pci_release_regions(pci_dev);
484 EXPORT_SYMBOL_GPL(rt2x00pci_remove);
486 #ifdef CONFIG_PM
487 int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
489 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
490 struct rt2x00_dev *rt2x00dev = hw->priv;
491 int retval;
493 retval = rt2x00lib_suspend(rt2x00dev, state);
494 if (retval)
495 return retval;
497 rt2x00pci_free_reg(rt2x00dev);
499 pci_save_state(pci_dev);
500 pci_disable_device(pci_dev);
501 return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
503 EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
505 int rt2x00pci_resume(struct pci_dev *pci_dev)
507 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
508 struct rt2x00_dev *rt2x00dev = hw->priv;
509 int retval;
511 if (pci_set_power_state(pci_dev, PCI_D0) ||
512 pci_enable_device(pci_dev) ||
513 pci_restore_state(pci_dev)) {
514 ERROR(rt2x00dev, "Failed to resume device.\n");
515 return -EIO;
518 retval = rt2x00pci_alloc_reg(rt2x00dev);
519 if (retval)
520 return retval;
522 retval = rt2x00lib_resume(rt2x00dev);
523 if (retval)
524 goto exit_free_reg;
526 return 0;
528 exit_free_reg:
529 rt2x00pci_free_reg(rt2x00dev);
531 return retval;
533 EXPORT_SYMBOL_GPL(rt2x00pci_resume);
534 #endif /* CONFIG_PM */
537 * rt2x00pci module information.
539 MODULE_AUTHOR(DRV_PROJECT);
540 MODULE_VERSION(DRV_VERSION);
541 MODULE_DESCRIPTION("rt2x00 pci library");
542 MODULE_LICENSE("GPL");