include/linux/mISDNhw.h

   1 /*
   2  *
   3  * Author       Karsten Keil <kkeil@novell.com>
   4  *
   5  *   Basic declarations for the mISDN HW channels
   6  *
   7  * Copyright 2008  by Karsten Keil <kkeil@novell.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  */
  19
  20 #ifndef MISDNHW_H
  21 #define MISDNHW_H
  22 #include <linux/mISDNif.h>
  23 #include <linux/timer.h>
  24
  25 /*
  26  * HW DEBUG 0xHHHHGGGG
  27  * H - hardware driver specific bits
  28  * G - for all drivers
  29  */
  30
  31 #define DEBUG_HW                0x00000001
  32 #define DEBUG_HW_OPEN           0x00000002
  33 #define DEBUG_HW_DCHANNEL       0x00000100
  34 #define DEBUG_HW_DFIFO          0x00000200
  35 #define DEBUG_HW_BCHANNEL       0x00001000
  36 #define DEBUG_HW_BFIFO          0x00002000
  37
  38 #define MAX_DFRAME_LEN_L1       300
  39 #define MAX_MON_FRAME           32
  40 #define MAX_LOG_SPACE           2048
  41 #define MISDN_COPY_SIZE         32
  42
  43 /* channel->Flags bit field */
  44 #define FLG_TX_BUSY             0       /* tx_buf in use */
  45 #define FLG_TX_NEXT             1       /* next_skb in use */
  46 #define FLG_L1_BUSY             2       /* L1 is permanent busy */
  47 #define FLG_L2_ACTIVATED        3       /* activated from L2 */
  48 #define FLG_OPEN                5       /* channel is in use */
  49 #define FLG_ACTIVE              6       /* channel is activated */
  50 #define FLG_BUSY_TIMER          7
  51 /* channel type */
  52 #define FLG_DCHANNEL            8       /* channel is D-channel */
  53 #define FLG_BCHANNEL            9       /* channel is B-channel */
  54 #define FLG_ECHANNEL            10      /* channel is E-channel */
  55 #define FLG_TRANSPARENT         12      /* channel use transparent data */
  56 #define FLG_HDLC                13      /* channel use hdlc data */
  57 #define FLG_L2DATA              14      /* channel use L2 DATA primitivs */
  58 #define FLG_ORIGIN              15      /* channel is on origin site */
  59 /* channel specific stuff */
  60 /* arcofi specific */
  61 #define FLG_ARCOFI_TIMER        16
  62 #define FLG_ARCOFI_ERROR        17
  63 /* isar specific */
  64 #define FLG_INITIALIZED         16
  65 #define FLG_DLEETX              17
  66 #define FLG_LASTDLE             18
  67 #define FLG_FIRST               19
  68 #define FLG_LASTDATA            20
  69 #define FLG_NMD_DATA            21
  70 #define FLG_FTI_RUN             22
  71 #define FLG_LL_OK               23
  72 #define FLG_LL_CONN             24
  73 #define FLG_DTMFSEND            25
  74
  75 /* workq events */
  76 #define FLG_RECVQUEUE           30
  77 #define FLG_PHCHANGE            31
  78
  79 #define schedule_event(s, ev)   do { \
  80                                         test_and_set_bit(ev, &((s)->Flags)); \
  81                                         schedule_work(&((s)->workq)); \
  82                                 } while (0)
  83
  84 struct dchannel {
  85         struct mISDNdevice      dev;
  86         u_long                  Flags;
  87         struct work_struct      workq;
  88         void                    (*phfunc) (struct dchannel *);
  89         u_int                   state;
  90         void                    *l1;
  91         /* HW access */
  92         u_char                  (*read_reg) (void *, u_char);
  93         void                    (*write_reg) (void *, u_char, u_char);
  94         void                    (*read_fifo) (void *, u_char *, int);
  95         void                    (*write_fifo) (void *, u_char *, int);
  96         void                    *hw;
  97         int                     slot;   /* multiport card channel slot */
  98         struct timer_list       timer;
  99         /* receive data */
 100         struct sk_buff          *rx_skb;
 101         int                     maxlen;
 102         /* send data */
 103         struct sk_buff_head     squeue;
 104         struct sk_buff_head     rqueue;
 105         struct sk_buff          *tx_skb;
 106         int                     tx_idx;
 107         int                     debug;
 108         /* statistics */
 109         int                     err_crc;
 110         int                     err_tx;
 111         int                     err_rx;
 112 };
 113
 114 typedef int     (dchannel_l1callback)(struct dchannel *, u_int);
 115 extern int      create_l1(struct dchannel *, dchannel_l1callback *);
 116
 117 /* private L1 commands */
 118 #define INFO0           0x8002
 119 #define INFO1           0x8102
 120 #define INFO2           0x8202
 121 #define INFO3_P8        0x8302
 122 #define INFO3_P10       0x8402
 123 #define INFO4_P8        0x8502
 124 #define INFO4_P10       0x8602
 125 #define LOSTFRAMING     0x8702
 126 #define ANYSIGNAL       0x8802
 127 #define HW_POWERDOWN    0x8902
 128 #define HW_RESET_REQ    0x8a02
 129 #define HW_POWERUP_REQ  0x8b02
 130 #define HW_DEACT_REQ    0x8c02
 131 #define HW_ACTIVATE_REQ 0x8e02
 132 #define HW_D_NOBLOCKED  0x8f02
 133 #define HW_RESET_IND    0x9002
 134 #define HW_POWERUP_IND  0x9102
 135 #define HW_DEACT_IND    0x9202
 136 #define HW_ACTIVATE_IND 0x9302
 137 #define HW_DEACT_CNF    0x9402
 138 #define HW_TESTLOOP     0x9502
 139 #define HW_TESTRX_RAW   0x9602
 140 #define HW_TESTRX_HDLC  0x9702
 141 #define HW_TESTRX_OFF   0x9802
 142
 143 struct layer1;
 144 extern int      l1_event(struct layer1 *, u_int);
 145
 146
 147 struct bchannel {
 148         struct mISDNchannel     ch;
 149         int                     nr;
 150         u_long                  Flags;
 151         struct work_struct      workq;
 152         u_int                   state;
 153         /* HW access */
 154         u_char                  (*read_reg) (void *, u_char);
 155         void                    (*write_reg) (void *, u_char, u_char);
 156         void                    (*read_fifo) (void *, u_char *, int);
 157         void                    (*write_fifo) (void *, u_char *, int);
 158         void                    *hw;
 159         int                     slot;   /* multiport card channel slot */
 160         struct timer_list       timer;
 161         /* receive data */
 162         struct sk_buff          *rx_skb;
 163         int                     maxlen;
 164         /* send data */
 165         struct sk_buff          *next_skb;
 166         struct sk_buff          *tx_skb;
 167         struct sk_buff_head     rqueue;
 168         int                     rcount;
 169         int                     tx_idx;
 170         int                     debug;
 171         /* statistics */
 172         int                     err_crc;
 173         int                     err_tx;
 174         int                     err_rx;
 175 };
 176
 177 extern int      mISDN_initdchannel(struct dchannel *, int, void *);
 178 extern int      mISDN_initbchannel(struct bchannel *, int);
 179 extern int      mISDN_freedchannel(struct dchannel *);
 180 extern int      mISDN_freebchannel(struct bchannel *);
 181 extern void     queue_ch_frame(struct mISDNchannel *, u_int,
 182                         int, struct sk_buff *);
 183 extern int      dchannel_senddata(struct dchannel *, struct sk_buff *);
 184 extern int      bchannel_senddata(struct bchannel *, struct sk_buff *);
 185 extern void     recv_Dchannel(struct dchannel *);
 186 extern void     recv_Bchannel(struct bchannel *);
 187 extern void     recv_Dchannel_skb(struct dchannel *, struct sk_buff *);
 188 extern void     recv_Bchannel_skb(struct bchannel *, struct sk_buff *);
 189 extern void     confirm_Bsend(struct bchannel *bch);
 190 extern int      get_next_bframe(struct bchannel *);
 191 extern int      get_next_dframe(struct dchannel *);
 192
 193 #endif