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ALSA: emu10k1: cache emu1010 firmware
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / pci / emu10k1 / emu10k1_main.c
blob1dfb94d16b8b0dbbf4eaef6a049a1796354db6e8
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/module.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
44
45
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
49 #include "p16v.h"
50 #include "tina2.h"
51 #include "p17v.h"
52
53
54 #define HANA_FILENAME "emu/hana.fw"
55 #define DOCK_FILENAME "emu/audio_dock.fw"
56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
58 #define EMU0404_FILENAME "emu/emu0404.fw"
59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60
61 MODULE_FIRMWARE(HANA_FILENAME);
62 MODULE_FIRMWARE(DOCK_FILENAME);
63 MODULE_FIRMWARE(EMU1010B_FILENAME);
64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
65 MODULE_FIRMWARE(EMU0404_FILENAME);
66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
67
68
69 /*************************************************************************
70 * EMU10K1 init / done
71 *************************************************************************/
72
73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
74 {
75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82
83 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89
90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98
99 /*** these are last so OFF prevents writing ***/
100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105
106 /* Audigy extra stuffs */
107 if (emu->audigy) {
108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 }
116 }
117
118 static unsigned int spi_dac_init[] = {
119 0x00ff,
120 0x02ff,
121 0x0400,
122 0x0520,
123 0x0600,
124 0x08ff,
125 0x0aff,
126 0x0cff,
127 0x0eff,
128 0x10ff,
129 0x1200,
130 0x1400,
131 0x1480,
132 0x1800,
133 0x1aff,
134 0x1cff,
135 0x1e00,
136 0x0530,
137 0x0602,
138 0x0622,
139 0x1400,
140 };
141
142 static unsigned int i2c_adc_init[][2] = {
143 { 0x17, 0x00 }, /* Reset */
144 { 0x07, 0x00 }, /* Timeout */
145 { 0x0b, 0x22 }, /* Interface control */
146 { 0x0c, 0x22 }, /* Master mode control */
147 { 0x0d, 0x08 }, /* Powerdown control */
148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
150 { 0x10, 0x7b }, /* ALC Control 1 */
151 { 0x11, 0x00 }, /* ALC Control 2 */
152 { 0x12, 0x32 }, /* ALC Control 3 */
153 { 0x13, 0x00 }, /* Noise gate control */
154 { 0x14, 0xa6 }, /* Limiter control */
155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
156 };
157
158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 {
160 unsigned int silent_page;
161 int ch;
162 u32 tmp;
163
164 /* disable audio and lock cache */
165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
167
168 /* reset recording buffers */
169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175
176 /* disable channel interrupt */
177 outl(0, emu->port + INTE);
178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182
183 if (emu->audigy) {
184 /* set SPDIF bypass mode */
185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 /* enable rear left + rear right AC97 slots */
187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 AC97SLOT_REAR_LEFT);
189 }
190
191 /* init envelope engine */
192 for (ch = 0; ch < NUM_G; ch++)
193 snd_emu10k1_voice_init(emu, ch);
194
195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198
199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
200 /* Hacks for Alice3 to work independent of haP16V driver */
201 /* Setup SRCMulti_I2S SamplingRate */
202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 tmp &= 0xfffff1ff;
204 tmp |= (0x2<<9);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206
207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 /* Setup SRCMulti Input Audio Enable */
210 /* Use 0xFFFFFFFF to enable P16V sounds. */
211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212
213 /* Enabled Phased (8-channel) P16V playback */
214 outl(0x0201, emu->port + HCFG2);
215 /* Set playback routing. */
216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 }
218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
219 /* Hacks for Alice3 to work independent of haP16V driver */
220 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
221 /* Setup SRCMulti_I2S SamplingRate */
222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 tmp &= 0xfffff1ff;
224 tmp |= (0x2<<9);
225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226
227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 outl(0x600000, emu->port + 0x20);
229 outl(0x14, emu->port + 0x24);
230
231 /* Setup SRCMulti Input Audio Enable */
232 outl(0x7b0000, emu->port + 0x20);
233 outl(0xFF000000, emu->port + 0x24);
234
235 /* Setup SPDIF Out Audio Enable */
236 /* The Audigy 2 Value has a separate SPDIF out,
237 * so no need for a mixer switch
238 */
239 outl(0x7a0000, emu->port + 0x20);
240 outl(0xFF000000, emu->port + 0x24);
241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 outl(tmp, emu->port + A_IOCFG);
243 }
244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245 int size, n;
246
247 size = ARRAY_SIZE(spi_dac_init);
248 for (n = 0; n < size; n++)
249 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250
251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
252 /* Enable GPIOs
253 * GPIO0: Unknown
254 * GPIO1: Speakers-enabled.
255 * GPIO2: Unknown
256 * GPIO3: Unknown
257 * GPIO4: IEC958 Output on.
258 * GPIO5: Unknown
259 * GPIO6: Unknown
260 * GPIO7: Unknown
261 */
262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
263 }
264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 int size, n;
266
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 for (n = 0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0] = 0xcf;
276 emu->i2c_capture_volume[n][1] = 0xcf;
277 }
278 }
279
280
281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
291 if (emu->card_capabilities->emu_model) {
292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
302 } else if (emu->audigy) {
303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
317 /* With on-chip joystick */
318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
321 if (emu->card_capabilities->emu_model) {
322 ; /* Disable all access to A_IOCFG for the emu1010 */
323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325 } else if (emu->audigy) {
326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
339 }
340 }
341
342 if (emu->card_capabilities->emu_model) {
343 ; /* Disable all access to A_IOCFG for the emu1010 */
344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 } else if (emu->audigy) { /* enable analog output */
347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
351 return 0;
352 }
353
354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355 {
356 /*
357 * Enable the audio bit
358 */
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360
361 /* Enable analog/digital outs on audigy */
362 if (emu->card_capabilities->emu_model) {
363 ; /* Disable all access to A_IOCFG for the emu1010 */
364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
366 } else if (emu->audigy) {
367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
368
369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 } else {
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 }
381 }
382
383 #if 0
384 {
385 unsigned int tmp;
386 /* FIXME: the following routine disables LiveDrive-II !! */
387 /* TOSLink detection */
388 emu->tos_link = 0;
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
392 udelay(50);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 emu->tos_link = 1;
395 outl(tmp, emu->port + HCFG);
396 }
397 }
398 }
399 #endif
400
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
402 }
403
404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
405 {
406 int ch;
407
408 outl(0, emu->port + INTE);
409
410 /*
411 * Shutdown the chip
412 */
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 }
421
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 if (emu->audigy)
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 else
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446
447 return 0;
448 }
449
450 /*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
453
454 /* In A1 Silicon, these bits are in the HC register */
455 #define HOOKN_BIT (1L << 12)
456 #define HANDN_BIT (1L << 11)
457 #define PULSEN_BIT (1L << 10)
458
459 #define EC_GDI1 (1 << 13)
460 #define EC_GDI0 (1 << 14)
461
462 #define EC_NUM_CONTROL_BITS 20
463
464 #define EC_AC3_DATA_SELN 0x0001L
465 #define EC_EE_DATA_SEL 0x0002L
466 #define EC_EE_CNTRL_SELN 0x0004L
467 #define EC_EECLK 0x0008L
468 #define EC_EECS 0x0010L
469 #define EC_EESDO 0x0020L
470 #define EC_TRIM_CSN 0x0040L
471 #define EC_TRIM_SCLK 0x0080L
472 #define EC_TRIM_SDATA 0x0100L
473 #define EC_TRIM_MUTEN 0x0200L
474 #define EC_ADCCAL 0x0400L
475 #define EC_ADCRSTN 0x0800L
476 #define EC_DACCAL 0x1000L
477 #define EC_DACMUTEN 0x2000L
478 #define EC_LEDN 0x4000L
479
480 #define EC_SPDIF0_SEL_SHIFT 15
481 #define EC_SPDIF1_SEL_SHIFT 17
482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
489
490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
492 /* Addresses for special values stored in to EEPROM */
493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
497 #define EC_LAST_PROMFILE_ADDR 0x2f
498
499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
505
506
507 /* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509 * offset problem. Weird.
510 */
511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 EC_TRIM_CSN)
513
514
515 #define EC_DEFAULT_ADC_GAIN 0xC4C4
516 #define EC_DEFAULT_SPDIF0_SEL 0x0
517 #define EC_DEFAULT_SPDIF1_SEL 0x4
518
519 /**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
524 * register.
525 */
526
527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
528 {
529 unsigned short count;
530 unsigned int data;
531 unsigned long hc_port;
532 unsigned int hc_value;
533
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
537
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
542 value >>= 1;
543
544 outl(hc_value | data, hc_port);
545
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
549 }
550
551 /* Latch the bits */
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
554 }
555
556 /**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
562 * channel.
563 */
564
565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
566 unsigned short gain)
567 {
568 unsigned int bit;
569
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
576 for (bit = (1 << 15); bit; bit >>= 1) {
577 unsigned int value;
578
579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580
581 if (gain & bit)
582 value |= EC_TRIM_SDATA;
583
584 /* Clock the bit */
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
588 }
589
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591 }
592
593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
594 {
595 unsigned int hc_value;
596
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
602 /* Step 0: Set the codec type in the hardware control register
603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
607
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
616 * way. */
617 snd_emu10k1_wait(emu, 48000);
618
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629
630 return 0;
631 }
632
633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
634 {
635 unsigned long special_port;
636 unsigned int value;
637
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
640 */
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
653
654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
655 /* Delay to give time for ADC chip to switch on. It needs 113ms */
656 msleep(200);
657 return 0;
658 }
659
660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu)
661 {
662 int n, i;
663 int reg;
664 int value;
665 unsigned int write_post;
666 unsigned long flags;
667 const struct firmware *fw_entry = emu->firmware;
668
669 if (!fw_entry)
670 return -EIO;
671
672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
673 /* GPIO7 -> FPGA PGMN
674 * GPIO6 -> FPGA CCLK
675 * GPIO5 -> FPGA DIN
676 * FPGA CONFIG OFF -> FPGA PGMN
677 */
678 spin_lock_irqsave(&emu->emu_lock, flags);
679 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
680 write_post = inl(emu->port + A_IOCFG);
681 udelay(100);
682 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
683 write_post = inl(emu->port + A_IOCFG);
684 udelay(100); /* Allow FPGA memory to clean */
685 for (n = 0; n < fw_entry->size; n++) {
686 value = fw_entry->data[n];
687 for (i = 0; i < 8; i++) {
688 reg = 0x80;
689 if (value & 0x1)
690 reg = reg | 0x20;
691 value = value >> 1;
692 outl(reg, emu->port + A_IOCFG);
693 write_post = inl(emu->port + A_IOCFG);
694 outl(reg | 0x40, emu->port + A_IOCFG);
695 write_post = inl(emu->port + A_IOCFG);
696 }
697 }
698 /* After programming, set GPIO bit 4 high again. */
699 outl(0x10, emu->port + A_IOCFG);
700 write_post = inl(emu->port + A_IOCFG);
701 spin_unlock_irqrestore(&emu->emu_lock, flags);
702
703 return 0;
704 }
705
706 static int emu1010_firmware_thread(void *data)
707 {
708 struct snd_emu10k1 *emu = data;
709 u32 tmp, tmp2, reg;
710 int err;
711
712 for (;;) {
713 /* Delay to allow Audio Dock to settle */
714 msleep_interruptible(1000);
715 if (kthread_should_stop())
716 break;
717 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
718 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
719 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
720 /* Audio Dock attached */
721 /* Return to Audio Dock programming mode */
722 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
723 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
724 err = snd_emu1010_load_firmware(emu);
725 if (err != 0)
726 continue;
727
728 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
729 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
730 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
731 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
732 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
733 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
734 if ((reg & 0x1f) != 0x15) {
735 /* FPGA failed to be programmed */
736 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
737 continue;
738 }
739 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
740 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
741 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
742 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
743 tmp, tmp2);
744 /* Sync clocking between 1010 and Dock */
745 /* Allow DLL to settle */
746 msleep(10);
747 /* Unmute all. Default is muted after a firmware load */
748 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
749 }
750 }
751 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
752 return 0;
753 }
754
755 /*
756 * EMU-1010 - details found out from this driver, official MS Win drivers,
757 * testing the card:
758 *
759 * Audigy2 (aka Alice2):
760 * ---------------------
761 * * communication over PCI
762 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
763 * to 2 x 16-bit, using internal DSP instructions
764 * * slave mode, clock supplied by HANA
765 * * linked to HANA using:
766 * 32 x 32-bit serial EMU32 output channels
767 * 16 x EMU32 input channels
768 * (?) x I2S I/O channels (?)
769 *
770 * FPGA (aka HANA):
771 * ---------------
772 * * provides all (?) physical inputs and outputs of the card
773 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
774 * * provides clock signal for the card and Alice2
775 * * two crystals - for 44.1kHz and 48kHz multiples
776 * * provides internal routing of signal sources to signal destinations
777 * * inputs/outputs to Alice2 - see above
778 *
779 * Current status of the driver:
780 * ----------------------------
781 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
782 * * PCM device nb. 2:
783 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
784 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
785 */
786 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
787 {
788 unsigned int i;
789 u32 tmp, tmp2, reg;
790 int err;
791
792 snd_printk(KERN_INFO "emu1010: Special config.\n");
793 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
794 * Lock Sound Memory Cache, Lock Tank Memory Cache,
795 * Mute all codecs.
796 */
797 outl(0x0005a00c, emu->port + HCFG);
798 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
799 * Lock Tank Memory Cache,
800 * Mute all codecs.
801 */
802 outl(0x0005a004, emu->port + HCFG);
803 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
804 * Mute all codecs.
805 */
806 outl(0x0005a000, emu->port + HCFG);
807 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
808 * Mute all codecs.
809 */
810 outl(0x0005a000, emu->port + HCFG);
811
812 /* Disable 48Volt power to Audio Dock */
813 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
814
815 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
816 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
817 snd_printdd("reg1 = 0x%x\n", reg);
818 if ((reg & 0x3f) == 0x15) {
819 /* FPGA netlist already present so clear it */
820 /* Return to programming mode */
821
822 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
823 }
824 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
825 snd_printdd("reg2 = 0x%x\n", reg);
826 if ((reg & 0x3f) == 0x15) {
827 /* FPGA failed to return to programming mode */
828 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
829 return -ENODEV;
830 }
831 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
832
833 if (!emu->firmware) {
834 const char *filename;
835 switch (emu->card_capabilities->emu_model) {
836 case EMU_MODEL_EMU1010:
837 filename = HANA_FILENAME;
838 break;
839 case EMU_MODEL_EMU1010B:
840 filename = EMU1010B_FILENAME;
841 break;
842 case EMU_MODEL_EMU1616:
843 filename = EMU1010_NOTEBOOK_FILENAME;
844 break;
845 case EMU_MODEL_EMU0404:
846 filename = EMU0404_FILENAME;
847 break;
848 default:
849 return -ENODEV;
850 }
851
852 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
853 if (err != 0) {
854 snd_printk(KERN_ERR "emu1010: firmware: %s not found. Err = %d\n", filename, err);
855 return err;
856 }
857 snd_printk(KERN_INFO "emu1010: firmware file = %s, size = 0x%zx\n",
858 filename, emu->firmware->size);
859 }
860
861 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
862 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
863 if ((reg & 0x3f) != 0x15) {
864 /* FPGA failed to be programmed */
865 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
866 return -ENODEV;
867 }
868
869 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
870 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
871 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
872 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
873 /* Enable 48Volt power to Audio Dock */
874 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
875
876 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
877 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
878 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
879 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
880 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
881 /* Optical -> ADAT I/O */
882 /* 0 : SPDIF
883 * 1 : ADAT
884 */
885 emu->emu1010.optical_in = 1; /* IN_ADAT */
886 emu->emu1010.optical_out = 1; /* IN_ADAT */
887 tmp = 0;
888 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
889 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
890 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
891 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
892 /* Set no attenuation on Audio Dock pads. */
893 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
894 emu->emu1010.adc_pads = 0x00;
895 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
896 /* Unmute Audio dock DACs, Headphone source DAC-4. */
897 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
898 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
899 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
900 /* DAC PADs. */
901 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
902 emu->emu1010.dac_pads = 0x0f;
903 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
904 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
905 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
906 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
907 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
908 /* MIDI routing */
909 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
910 /* Unknown. */
911 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
912 /* IRQ Enable: All on */
913 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
914 /* IRQ Enable: All off */
915 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
916
917 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
918 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
919 /* Default WCLK set to 48kHz. */
920 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
921 /* Word Clock source, Internal 48kHz x1 */
922 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
923 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
924 /* Audio Dock LEDs. */
925 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
926
927 #if 0
928 /* For 96kHz */
929 snd_emu1010_fpga_link_dst_src_write(emu,
930 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
931 snd_emu1010_fpga_link_dst_src_write(emu,
932 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
933 snd_emu1010_fpga_link_dst_src_write(emu,
934 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
935 snd_emu1010_fpga_link_dst_src_write(emu,
936 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
937 #endif
938 #if 0
939 /* For 192kHz */
940 snd_emu1010_fpga_link_dst_src_write(emu,
941 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
942 snd_emu1010_fpga_link_dst_src_write(emu,
943 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
944 snd_emu1010_fpga_link_dst_src_write(emu,
945 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
946 snd_emu1010_fpga_link_dst_src_write(emu,
947 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
948 snd_emu1010_fpga_link_dst_src_write(emu,
949 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
950 snd_emu1010_fpga_link_dst_src_write(emu,
951 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
954 snd_emu1010_fpga_link_dst_src_write(emu,
955 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
956 #endif
957 #if 1
958 /* For 48kHz */
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
965 snd_emu1010_fpga_link_dst_src_write(emu,
966 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
967 snd_emu1010_fpga_link_dst_src_write(emu,
968 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
969 snd_emu1010_fpga_link_dst_src_write(emu,
970 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
971 snd_emu1010_fpga_link_dst_src_write(emu,
972 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
973 snd_emu1010_fpga_link_dst_src_write(emu,
974 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
975 /* Pavel Hofman - setting defaults for 8 more capture channels
976 * Defaults only, users will set their own values anyways, let's
977 * just copy/paste.
978 */
979
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
984 snd_emu1010_fpga_link_dst_src_write(emu,
985 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
990 snd_emu1010_fpga_link_dst_src_write(emu,
991 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
994 snd_emu1010_fpga_link_dst_src_write(emu,
995 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
996 #endif
997 #if 0
998 /* Original */
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1013 snd_emu1010_fpga_link_dst_src_write(emu,
1014 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1015 snd_emu1010_fpga_link_dst_src_write(emu,
1016 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1023 #endif
1024 for (i = 0; i < 0x20; i++) {
1025 /* AudioDock Elink <- Silence */
1026 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1027 }
1028 for (i = 0; i < 4; i++) {
1029 /* Hana SPDIF Out <- Silence */
1030 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1031 }
1032 for (i = 0; i < 7; i++) {
1033 /* Hamoa DAC <- Silence */
1034 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1035 }
1036 for (i = 0; i < 7; i++) {
1037 /* Hana ADAT Out <- Silence */
1038 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1039 }
1040 snd_emu1010_fpga_link_dst_src_write(emu,
1041 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1042 snd_emu1010_fpga_link_dst_src_write(emu,
1043 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1044 snd_emu1010_fpga_link_dst_src_write(emu,
1045 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1046 snd_emu1010_fpga_link_dst_src_write(emu,
1047 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1048 snd_emu1010_fpga_link_dst_src_write(emu,
1049 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1050 snd_emu1010_fpga_link_dst_src_write(emu,
1051 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1052 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1053
1054 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1055
1056 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1057 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1058 * Mute all codecs.
1059 */
1060 outl(0x0000a000, emu->port + HCFG);
1061 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1062 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1063 * Un-Mute all codecs.
1064 */
1065 outl(0x0000a001, emu->port + HCFG);
1066
1067 /* Initial boot complete. Now patches */
1068
1069 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1070 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1071 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1072 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1073 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1074 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1075 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1076
1077 /* Start Micro/Audio Dock firmware loader thread */
1078 if (!emu->emu1010.firmware_thread) {
1079 emu->emu1010.firmware_thread =
1080 kthread_create(emu1010_firmware_thread, emu,
1081 "emu1010_firmware");
1082 wake_up_process(emu->emu1010.firmware_thread);
1083 }
1084
1085 #if 0
1086 snd_emu1010_fpga_link_dst_src_write(emu,
1087 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1088 snd_emu1010_fpga_link_dst_src_write(emu,
1089 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1090 snd_emu1010_fpga_link_dst_src_write(emu,
1091 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1092 snd_emu1010_fpga_link_dst_src_write(emu,
1093 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1094 #endif
1095 /* Default outputs */
1096 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1097 /* 1616(M) cardbus default outputs */
1098 /* ALICE2 bus 0xa0 */
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1101 emu->emu1010.output_source[0] = 17;
1102 snd_emu1010_fpga_link_dst_src_write(emu,
1103 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1104 emu->emu1010.output_source[1] = 18;
1105 snd_emu1010_fpga_link_dst_src_write(emu,
1106 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1107 emu->emu1010.output_source[2] = 19;
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1110 emu->emu1010.output_source[3] = 20;
1111 snd_emu1010_fpga_link_dst_src_write(emu,
1112 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1113 emu->emu1010.output_source[4] = 21;
1114 snd_emu1010_fpga_link_dst_src_write(emu,
1115 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1116 emu->emu1010.output_source[5] = 22;
1117 /* ALICE2 bus 0xa0 */
1118 snd_emu1010_fpga_link_dst_src_write(emu,
1119 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1120 emu->emu1010.output_source[16] = 17;
1121 snd_emu1010_fpga_link_dst_src_write(emu,
1122 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1123 emu->emu1010.output_source[17] = 18;
1124 } else {
1125 /* ALICE2 bus 0xa0 */
1126 snd_emu1010_fpga_link_dst_src_write(emu,
1127 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1128 emu->emu1010.output_source[0] = 21;
1129 snd_emu1010_fpga_link_dst_src_write(emu,
1130 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1131 emu->emu1010.output_source[1] = 22;
1132 snd_emu1010_fpga_link_dst_src_write(emu,
1133 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1134 emu->emu1010.output_source[2] = 23;
1135 snd_emu1010_fpga_link_dst_src_write(emu,
1136 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1137 emu->emu1010.output_source[3] = 24;
1138 snd_emu1010_fpga_link_dst_src_write(emu,
1139 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1140 emu->emu1010.output_source[4] = 25;
1141 snd_emu1010_fpga_link_dst_src_write(emu,
1142 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1143 emu->emu1010.output_source[5] = 26;
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1146 emu->emu1010.output_source[6] = 27;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1149 emu->emu1010.output_source[7] = 28;
1150 /* ALICE2 bus 0xa0 */
1151 snd_emu1010_fpga_link_dst_src_write(emu,
1152 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1153 emu->emu1010.output_source[8] = 21;
1154 snd_emu1010_fpga_link_dst_src_write(emu,
1155 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1156 emu->emu1010.output_source[9] = 22;
1157 /* ALICE2 bus 0xa0 */
1158 snd_emu1010_fpga_link_dst_src_write(emu,
1159 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1160 emu->emu1010.output_source[10] = 21;
1161 snd_emu1010_fpga_link_dst_src_write(emu,
1162 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1163 emu->emu1010.output_source[11] = 22;
1164 /* ALICE2 bus 0xa0 */
1165 snd_emu1010_fpga_link_dst_src_write(emu,
1166 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1167 emu->emu1010.output_source[12] = 21;
1168 snd_emu1010_fpga_link_dst_src_write(emu,
1169 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1170 emu->emu1010.output_source[13] = 22;
1171 /* ALICE2 bus 0xa0 */
1172 snd_emu1010_fpga_link_dst_src_write(emu,
1173 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1174 emu->emu1010.output_source[14] = 21;
1175 snd_emu1010_fpga_link_dst_src_write(emu,
1176 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1177 emu->emu1010.output_source[15] = 22;
1178 /* ALICE2 bus 0xa0 */
1179 snd_emu1010_fpga_link_dst_src_write(emu,
1180 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1181 emu->emu1010.output_source[16] = 21;
1182 snd_emu1010_fpga_link_dst_src_write(emu,
1183 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1184 emu->emu1010.output_source[17] = 22;
1185 snd_emu1010_fpga_link_dst_src_write(emu,
1186 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1187 emu->emu1010.output_source[18] = 23;
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1190 emu->emu1010.output_source[19] = 24;
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1193 emu->emu1010.output_source[20] = 25;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1196 emu->emu1010.output_source[21] = 26;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1199 emu->emu1010.output_source[22] = 27;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1202 emu->emu1010.output_source[23] = 28;
1203 }
1204 /* TEMP: Select SPDIF in/out */
1205 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1206
1207 /* TEMP: Select 48kHz SPDIF out */
1208 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1209 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1210 /* Word Clock source, Internal 48kHz x1 */
1211 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1212 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1213 emu->emu1010.internal_clock = 1; /* 48000 */
1214 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1215 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1216 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1217 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1218 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1219
1220 return 0;
1221 }
1222 /*
1223 * Create the EMU10K1 instance
1224 */
1225
1226 #ifdef CONFIG_PM_SLEEP
1227 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1228 static void free_pm_buffer(struct snd_emu10k1 *emu);
1229 #endif
1230
1231 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1232 {
1233 if (emu->port) { /* avoid access to already used hardware */
1234 snd_emu10k1_fx8010_tram_setup(emu, 0);
1235 snd_emu10k1_done(emu);
1236 snd_emu10k1_free_efx(emu);
1237 }
1238 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1239 /* Disable 48Volt power to Audio Dock */
1240 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1241 }
1242 if (emu->emu1010.firmware_thread)
1243 kthread_stop(emu->emu1010.firmware_thread);
1244 if (emu->firmware)
1245 release_firmware(emu->firmware);
1246 if (emu->irq >= 0)
1247 free_irq(emu->irq, emu);
1248 /* remove reserved page */
1249 if (emu->reserved_page) {
1250 snd_emu10k1_synth_free(emu,
1251 (struct snd_util_memblk *)emu->reserved_page);
1252 emu->reserved_page = NULL;
1253 }
1254 if (emu->memhdr)
1255 snd_util_memhdr_free(emu->memhdr);
1256 if (emu->silent_page.area)
1257 snd_dma_free_pages(&emu->silent_page);
1258 if (emu->ptb_pages.area)
1259 snd_dma_free_pages(&emu->ptb_pages);
1260 vfree(emu->page_ptr_table);
1261 vfree(emu->page_addr_table);
1262 #ifdef CONFIG_PM_SLEEP
1263 free_pm_buffer(emu);
1264 #endif
1265 if (emu->port)
1266 pci_release_regions(emu->pci);
1267 if (emu->card_capabilities->ca0151_chip) /* P16V */
1268 snd_p16v_free(emu);
1269 pci_disable_device(emu->pci);
1270 kfree(emu);
1271 return 0;
1272 }
1273
1274 static int snd_emu10k1_dev_free(struct snd_device *device)
1275 {
1276 struct snd_emu10k1 *emu = device->device_data;
1277 return snd_emu10k1_free(emu);
1278 }
1279
1280 static struct snd_emu_chip_details emu_chip_details[] = {
1281 /* Audigy4 (Not PRO) SB0610 */
1282 /* Tested by James@superbug.co.uk 4th April 2006 */
1283 /* A_IOCFG bits
1284 * Output
1285 * 0: ?
1286 * 1: ?
1287 * 2: ?
1288 * 3: 0 - Digital Out, 1 - Line in
1289 * 4: ?
1290 * 5: ?
1291 * 6: ?
1292 * 7: ?
1293 * Input
1294 * 8: ?
1295 * 9: ?
1296 * A: Green jack sense (Front)
1297 * B: ?
1298 * C: Black jack sense (Rear/Side Right)
1299 * D: Yellow jack sense (Center/LFE/Side Left)
1300 * E: ?
1301 * F: ?
1302 *
1303 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1304 * 0 - Digital Out
1305 * 1 - Line in
1306 */
1307 /* Mic input not tested.
1308 * Analog CD input not tested
1309 * Digital Out not tested.
1310 * Line in working.
1311 * Audio output 5.1 working. Side outputs not working.
1312 */
1313 /* DSP: CA10300-IAT LF
1314 * DAC: Cirrus Logic CS4382-KQZ
1315 * ADC: Philips 1361T
1316 * AC97: Sigmatel STAC9750
1317 * CA0151: None
1318 */
1319 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1320 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1321 .id = "Audigy2",
1322 .emu10k2_chip = 1,
1323 .ca0108_chip = 1,
1324 .spk71 = 1,
1325 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1326 .ac97_chip = 1} ,
1327 /* Audigy 2 Value AC3 out does not work yet.
1328 * Need to find out how to turn off interpolators.
1329 */
1330 /* Tested by James@superbug.co.uk 3rd July 2005 */
1331 /* DSP: CA0108-IAT
1332 * DAC: CS4382-KQ
1333 * ADC: Philips 1361T
1334 * AC97: STAC9750
1335 * CA0151: None
1336 */
1337 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1338 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1339 .id = "Audigy2",
1340 .emu10k2_chip = 1,
1341 .ca0108_chip = 1,
1342 .spk71 = 1,
1343 .ac97_chip = 1} ,
1344 /* Audigy 2 ZS Notebook Cardbus card.*/
1345 /* Tested by James@superbug.co.uk 6th November 2006 */
1346 /* Audio output 7.1/Headphones working.
1347 * Digital output working. (AC3 not checked, only PCM)
1348 * Audio Mic/Line inputs working.
1349 * Digital input not tested.
1350 */
1351 /* DSP: Tina2
1352 * DAC: Wolfson WM8768/WM8568
1353 * ADC: Wolfson WM8775
1354 * AC97: None
1355 * CA0151: None
1356 */
1357 /* Tested by James@superbug.co.uk 4th April 2006 */
1358 /* A_IOCFG bits
1359 * Output
1360 * 0: Not Used
1361 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1362 * 2: Analog input 0 = line in, 1 = mic in
1363 * 3: Not Used
1364 * 4: Digital output 0 = off, 1 = on.
1365 * 5: Not Used
1366 * 6: Not Used
1367 * 7: Not Used
1368 * Input
1369 * All bits 1 (0x3fxx) means nothing plugged in.
1370 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1371 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1372 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1373 * E-F: Always 0
1374 *
1375 */
1376 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1377 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1378 .id = "Audigy2",
1379 .emu10k2_chip = 1,
1380 .ca0108_chip = 1,
1381 .ca_cardbus_chip = 1,
1382 .spi_dac = 1,
1383 .i2c_adc = 1,
1384 .spk71 = 1} ,
1385 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1386 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1387 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1388 .id = "EMU1010",
1389 .emu10k2_chip = 1,
1390 .ca0108_chip = 1,
1391 .ca_cardbus_chip = 1,
1392 .spk71 = 1 ,
1393 .emu_model = EMU_MODEL_EMU1616},
1394 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1395 /* This is MAEM8960, 0202 is MAEM 8980 */
1396 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1397 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1398 .id = "EMU1010",
1399 .emu10k2_chip = 1,
1400 .ca0108_chip = 1,
1401 .spk71 = 1,
1402 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1403 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1404 /* This is MAEM8986, 0202 is MAEM8980 */
1405 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1406 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1407 .id = "EMU1010",
1408 .emu10k2_chip = 1,
1409 .ca0108_chip = 1,
1410 .spk71 = 1,
1411 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1412 /* Tested by James@superbug.co.uk 8th July 2005. */
1413 /* This is MAEM8810, 0202 is MAEM8820 */
1414 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1415 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1416 .id = "EMU1010",
1417 .emu10k2_chip = 1,
1418 .ca0102_chip = 1,
1419 .spk71 = 1,
1420 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1421 /* EMU0404b */
1422 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1423 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1424 .id = "EMU0404",
1425 .emu10k2_chip = 1,
1426 .ca0108_chip = 1,
1427 .spk71 = 1,
1428 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1429 /* Tested by James@superbug.co.uk 20-3-2007. */
1430 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1431 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1432 .id = "EMU0404",
1433 .emu10k2_chip = 1,
1434 .ca0102_chip = 1,
1435 .spk71 = 1,
1436 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1437 /* EMU0404 PCIe */
1438 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1439 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1440 .id = "EMU0404",
1441 .emu10k2_chip = 1,
1442 .ca0108_chip = 1,
1443 .spk71 = 1,
1444 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1445 /* Note that all E-mu cards require kernel 2.6 or newer. */
1446 {.vendor = 0x1102, .device = 0x0008,
1447 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1448 .id = "Audigy2",
1449 .emu10k2_chip = 1,
1450 .ca0108_chip = 1,
1451 .ac97_chip = 1} ,
1452 /* Tested by James@superbug.co.uk 3rd July 2005 */
1453 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1454 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1455 .id = "Audigy2",
1456 .emu10k2_chip = 1,
1457 .ca0102_chip = 1,
1458 .ca0151_chip = 1,
1459 .spk71 = 1,
1460 .spdif_bug = 1,
1461 .ac97_chip = 1} ,
1462 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1463 /* The 0x20061102 does have SB0350 written on it
1464 * Just like 0x20021102
1465 */
1466 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1467 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1468 .id = "Audigy2",
1469 .emu10k2_chip = 1,
1470 .ca0102_chip = 1,
1471 .ca0151_chip = 1,
1472 .spk71 = 1,
1473 .spdif_bug = 1,
1474 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1475 .ac97_chip = 1} ,
1476 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1477 Creative's Windows driver */
1478 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1479 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1480 .id = "Audigy2",
1481 .emu10k2_chip = 1,
1482 .ca0102_chip = 1,
1483 .ca0151_chip = 1,
1484 .spk71 = 1,
1485 .spdif_bug = 1,
1486 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1487 .ac97_chip = 1} ,
1488 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1489 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1490 .id = "Audigy2",
1491 .emu10k2_chip = 1,
1492 .ca0102_chip = 1,
1493 .ca0151_chip = 1,
1494 .spk71 = 1,
1495 .spdif_bug = 1,
1496 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1497 .ac97_chip = 1} ,
1498 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1499 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1500 .id = "Audigy2",
1501 .emu10k2_chip = 1,
1502 .ca0102_chip = 1,
1503 .ca0151_chip = 1,
1504 .spk71 = 1,
1505 .spdif_bug = 1,
1506 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1507 .ac97_chip = 1} ,
1508 /* Audigy 2 */
1509 /* Tested by James@superbug.co.uk 3rd July 2005 */
1510 /* DSP: CA0102-IAT
1511 * DAC: CS4382-KQ
1512 * ADC: Philips 1361T
1513 * AC97: STAC9721
1514 * CA0151: Yes
1515 */
1516 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1517 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1518 .id = "Audigy2",
1519 .emu10k2_chip = 1,
1520 .ca0102_chip = 1,
1521 .ca0151_chip = 1,
1522 .spk71 = 1,
1523 .spdif_bug = 1,
1524 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1525 .ac97_chip = 1} ,
1526 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1527 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1528 .id = "Audigy2",
1529 .emu10k2_chip = 1,
1530 .ca0102_chip = 1,
1531 .ca0151_chip = 1,
1532 .spk71 = 1,
1533 .spdif_bug = 1} ,
1534 /* Dell OEM/Creative Labs Audigy 2 ZS */
1535 /* See ALSA bug#1365 */
1536 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1537 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1538 .id = "Audigy2",
1539 .emu10k2_chip = 1,
1540 .ca0102_chip = 1,
1541 .ca0151_chip = 1,
1542 .spk71 = 1,
1543 .spdif_bug = 1,
1544 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1545 .ac97_chip = 1} ,
1546 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1547 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1548 .id = "Audigy2",
1549 .emu10k2_chip = 1,
1550 .ca0102_chip = 1,
1551 .ca0151_chip = 1,
1552 .spk71 = 1,
1553 .spdif_bug = 1,
1554 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1555 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1556 .ac97_chip = 1} ,
1557 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1558 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1559 .id = "Audigy2",
1560 .emu10k2_chip = 1,
1561 .ca0102_chip = 1,
1562 .ca0151_chip = 1,
1563 .spdif_bug = 1,
1564 .ac97_chip = 1} ,
1565 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1566 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1567 .id = "Audigy",
1568 .emu10k2_chip = 1,
1569 .ca0102_chip = 1,
1570 .ac97_chip = 1} ,
1571 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1572 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1573 .id = "Audigy",
1574 .emu10k2_chip = 1,
1575 .ca0102_chip = 1,
1576 .spdif_bug = 1,
1577 .ac97_chip = 1} ,
1578 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1579 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1580 .id = "Audigy",
1581 .emu10k2_chip = 1,
1582 .ca0102_chip = 1,
1583 .ac97_chip = 1} ,
1584 {.vendor = 0x1102, .device = 0x0004,
1585 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1586 .id = "Audigy",
1587 .emu10k2_chip = 1,
1588 .ca0102_chip = 1,
1589 .ac97_chip = 1} ,
1590 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1591 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1592 .id = "Live",
1593 .emu10k1_chip = 1,
1594 .ac97_chip = 1,
1595 .sblive51 = 1} ,
1596 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1597 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1598 .id = "Live",
1599 .emu10k1_chip = 1,
1600 .ac97_chip = 1,
1601 .sblive51 = 1} ,
1602 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1603 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1604 .id = "Live",
1605 .emu10k1_chip = 1,
1606 .ac97_chip = 1,
1607 .sblive51 = 1} ,
1608 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1609 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1610 .id = "Live",
1611 .emu10k1_chip = 1,
1612 .ac97_chip = 1,
1613 .sblive51 = 1} ,
1614 /* Tested by ALSA bug#1680 26th December 2005 */
1615 /* note: It really has SB0220 written on the card, */
1616 /* but it's SB0228 according to kx.inf */
1617 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1618 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1619 .id = "Live",
1620 .emu10k1_chip = 1,
1621 .ac97_chip = 1,
1622 .sblive51 = 1} ,
1623 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1624 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1625 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1626 .id = "Live",
1627 .emu10k1_chip = 1,
1628 .ac97_chip = 1,
1629 .sblive51 = 1} ,
1630 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1631 .driver = "EMU10K1", .name = "SB Live! 5.1",
1632 .id = "Live",
1633 .emu10k1_chip = 1,
1634 .ac97_chip = 1,
1635 .sblive51 = 1} ,
1636 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1637 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1638 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1639 .id = "Live",
1640 .emu10k1_chip = 1,
1641 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1642 * share the same IDs!
1643 */
1644 .sblive51 = 1} ,
1645 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1646 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1647 .id = "Live",
1648 .emu10k1_chip = 1,
1649 .ac97_chip = 1,
1650 .sblive51 = 1} ,
1651 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1652 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1653 .id = "Live",
1654 .emu10k1_chip = 1,
1655 .ac97_chip = 1} ,
1656 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1657 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1658 .id = "Live",
1659 .emu10k1_chip = 1,
1660 .ac97_chip = 1,
1661 .sblive51 = 1} ,
1662 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1663 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1664 .id = "Live",
1665 .emu10k1_chip = 1,
1666 .ac97_chip = 1,
1667 .sblive51 = 1} ,
1668 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1669 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1670 .id = "Live",
1671 .emu10k1_chip = 1,
1672 .ac97_chip = 1,
1673 .sblive51 = 1} ,
1674 /* Tested by James@superbug.co.uk 3rd July 2005 */
1675 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1676 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1677 .id = "Live",
1678 .emu10k1_chip = 1,
1679 .ac97_chip = 1,
1680 .sblive51 = 1} ,
1681 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1682 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1683 .id = "Live",
1684 .emu10k1_chip = 1,
1685 .ac97_chip = 1,
1686 .sblive51 = 1} ,
1687 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1688 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1689 .id = "Live",
1690 .emu10k1_chip = 1,
1691 .ac97_chip = 1,
1692 .sblive51 = 1} ,
1693 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1694 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1695 .id = "Live",
1696 .emu10k1_chip = 1,
1697 .ac97_chip = 1,
1698 .sblive51 = 1} ,
1699 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1700 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1701 .id = "APS",
1702 .emu10k1_chip = 1,
1703 .ecard = 1} ,
1704 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1705 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1706 .id = "Live",
1707 .emu10k1_chip = 1,
1708 .ac97_chip = 1,
1709 .sblive51 = 1} ,
1710 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1711 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1712 .id = "Live",
1713 .emu10k1_chip = 1,
1714 .ac97_chip = 1,
1715 .sblive51 = 1} ,
1716 {.vendor = 0x1102, .device = 0x0002,
1717 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1718 .id = "Live",
1719 .emu10k1_chip = 1,
1720 .ac97_chip = 1,
1721 .sblive51 = 1} ,
1722 { } /* terminator */
1723 };
1724
1725 int __devinit snd_emu10k1_create(struct snd_card *card,
1726 struct pci_dev *pci,
1727 unsigned short extin_mask,
1728 unsigned short extout_mask,
1729 long max_cache_bytes,
1730 int enable_ir,
1731 uint subsystem,
1732 struct snd_emu10k1 **remu)
1733 {
1734 struct snd_emu10k1 *emu;
1735 int idx, err;
1736 int is_audigy;
1737 unsigned int silent_page;
1738 const struct snd_emu_chip_details *c;
1739 static struct snd_device_ops ops = {
1740 .dev_free = snd_emu10k1_dev_free,
1741 };
1742
1743 *remu = NULL;
1744
1745 /* enable PCI device */
1746 err = pci_enable_device(pci);
1747 if (err < 0)
1748 return err;
1749
1750 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1751 if (emu == NULL) {
1752 pci_disable_device(pci);
1753 return -ENOMEM;
1754 }
1755 emu->card = card;
1756 spin_lock_init(&emu->reg_lock);
1757 spin_lock_init(&emu->emu_lock);
1758 spin_lock_init(&emu->spi_lock);
1759 spin_lock_init(&emu->i2c_lock);
1760 spin_lock_init(&emu->voice_lock);
1761 spin_lock_init(&emu->synth_lock);
1762 spin_lock_init(&emu->memblk_lock);
1763 mutex_init(&emu->fx8010.lock);
1764 INIT_LIST_HEAD(&emu->mapped_link_head);
1765 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1766 emu->pci = pci;
1767 emu->irq = -1;
1768 emu->synth = NULL;
1769 emu->get_synth_voice = NULL;
1770 /* read revision & serial */
1771 emu->revision = pci->revision;
1772 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1773 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1774 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1775
1776 for (c = emu_chip_details; c->vendor; c++) {
1777 if (c->vendor == pci->vendor && c->device == pci->device) {
1778 if (subsystem) {
1779 if (c->subsystem && (c->subsystem == subsystem))
1780 break;
1781 else
1782 continue;
1783 } else {
1784 if (c->subsystem && (c->subsystem != emu->serial))
1785 continue;
1786 if (c->revision && c->revision != emu->revision)
1787 continue;
1788 }
1789 break;
1790 }
1791 }
1792 if (c->vendor == 0) {
1793 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1794 kfree(emu);
1795 pci_disable_device(pci);
1796 return -ENOENT;
1797 }
1798 emu->card_capabilities = c;
1799 if (c->subsystem && !subsystem)
1800 snd_printdd("Sound card name = %s\n", c->name);
1801 else if (subsystem)
1802 snd_printdd("Sound card name = %s, "
1803 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1804 "Forced to subsystem = 0x%x\n", c->name,
1805 pci->vendor, pci->device, emu->serial, c->subsystem);
1806 else
1807 snd_printdd("Sound card name = %s, "
1808 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1809 c->name, pci->vendor, pci->device,
1810 emu->serial);
1811
1812 if (!*card->id && c->id) {
1813 int i, n = 0;
1814 strlcpy(card->id, c->id, sizeof(card->id));
1815 for (;;) {
1816 for (i = 0; i < snd_ecards_limit; i++) {
1817 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1818 break;
1819 }
1820 if (i >= snd_ecards_limit)
1821 break;
1822 n++;
1823 if (n >= SNDRV_CARDS)
1824 break;
1825 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1826 }
1827 }
1828
1829 is_audigy = emu->audigy = c->emu10k2_chip;
1830
1831 /* set the DMA transfer mask */
1832 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1833 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1834 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1835 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1836 kfree(emu);
1837 pci_disable_device(pci);
1838 return -ENXIO;
1839 }
1840 if (is_audigy)
1841 emu->gpr_base = A_FXGPREGBASE;
1842 else
1843 emu->gpr_base = FXGPREGBASE;
1844
1845 err = pci_request_regions(pci, "EMU10K1");
1846 if (err < 0) {
1847 kfree(emu);
1848 pci_disable_device(pci);
1849 return err;
1850 }
1851 emu->port = pci_resource_start(pci, 0);
1852
1853 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1854 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1855 32 * 1024, &emu->ptb_pages) < 0) {
1856 err = -ENOMEM;
1857 goto error;
1858 }
1859
1860 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1861 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1862 sizeof(unsigned long));
1863 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1864 err = -ENOMEM;
1865 goto error;
1866 }
1867
1868 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1869 EMUPAGESIZE, &emu->silent_page) < 0) {
1870 err = -ENOMEM;
1871 goto error;
1872 }
1873 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1874 if (emu->memhdr == NULL) {
1875 err = -ENOMEM;
1876 goto error;
1877 }
1878 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1879 sizeof(struct snd_util_memblk);
1880
1881 pci_set_master(pci);
1882
1883 emu->fx8010.fxbus_mask = 0x303f;
1884 if (extin_mask == 0)
1885 extin_mask = 0x3fcf;
1886 if (extout_mask == 0)
1887 extout_mask = 0x7fff;
1888 emu->fx8010.extin_mask = extin_mask;
1889 emu->fx8010.extout_mask = extout_mask;
1890 emu->enable_ir = enable_ir;
1891
1892 if (emu->card_capabilities->ca_cardbus_chip) {
1893 err = snd_emu10k1_cardbus_init(emu);
1894 if (err < 0)
1895 goto error;
1896 }
1897 if (emu->card_capabilities->ecard) {
1898 err = snd_emu10k1_ecard_init(emu);
1899 if (err < 0)
1900 goto error;
1901 } else if (emu->card_capabilities->emu_model) {
1902 err = snd_emu10k1_emu1010_init(emu);
1903 if (err < 0) {
1904 snd_emu10k1_free(emu);
1905 return err;
1906 }
1907 } else {
1908 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1909 does not support this, it shouldn't do any harm */
1910 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1911 AC97SLOT_CNTR|AC97SLOT_LFE);
1912 }
1913
1914 /* initialize TRAM setup */
1915 emu->fx8010.itram_size = (16 * 1024)/2;
1916 emu->fx8010.etram_pages.area = NULL;
1917 emu->fx8010.etram_pages.bytes = 0;
1918
1919 /* irq handler must be registered after I/O ports are activated */
1920 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1921 KBUILD_MODNAME, emu)) {
1922 err = -EBUSY;
1923 goto error;
1924 }
1925 emu->irq = pci->irq;
1926
1927 /*
1928 * Init to 0x02109204 :
1929 * Clock accuracy = 0 (1000ppm)
1930 * Sample Rate = 2 (48kHz)
1931 * Audio Channel = 1 (Left of 2)
1932 * Source Number = 0 (Unspecified)
1933 * Generation Status = 1 (Original for Cat Code 12)
1934 * Cat Code = 12 (Digital Signal Mixer)
1935 * Mode = 0 (Mode 0)
1936 * Emphasis = 0 (None)
1937 * CP = 1 (Copyright unasserted)
1938 * AN = 0 (Audio data)
1939 * P = 0 (Consumer)
1940 */
1941 emu->spdif_bits[0] = emu->spdif_bits[1] =
1942 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1943 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1944 SPCS_GENERATIONSTATUS | 0x00001200 |
1945 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1946
1947 emu->reserved_page = (struct snd_emu10k1_memblk *)
1948 snd_emu10k1_synth_alloc(emu, 4096);
1949 if (emu->reserved_page)
1950 emu->reserved_page->map_locked = 1;
1951
1952 /* Clear silent pages and set up pointers */
1953 memset(emu->silent_page.area, 0, PAGE_SIZE);
1954 silent_page = emu->silent_page.addr << 1;
1955 for (idx = 0; idx < MAXPAGES; idx++)
1956 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1957
1958 /* set up voice indices */
1959 for (idx = 0; idx < NUM_G; idx++) {
1960 emu->voices[idx].emu = emu;
1961 emu->voices[idx].number = idx;
1962 }
1963
1964 err = snd_emu10k1_init(emu, enable_ir, 0);
1965 if (err < 0)
1966 goto error;
1967 #ifdef CONFIG_PM_SLEEP
1968 err = alloc_pm_buffer(emu);
1969 if (err < 0)
1970 goto error;
1971 #endif
1972
1973 /* Initialize the effect engine */
1974 err = snd_emu10k1_init_efx(emu);
1975 if (err < 0)
1976 goto error;
1977 snd_emu10k1_audio_enable(emu);
1978
1979 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1980 if (err < 0)
1981 goto error;
1982
1983 #ifdef CONFIG_PROC_FS
1984 snd_emu10k1_proc_init(emu);
1985 #endif
1986
1987 snd_card_set_dev(card, &pci->dev);
1988 *remu = emu;
1989 return 0;
1990
1991 error:
1992 snd_emu10k1_free(emu);
1993 return err;
1994 }
1995
1996 #ifdef CONFIG_PM_SLEEP
1997 static unsigned char saved_regs[] = {
1998 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1999 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2000 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2001 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2002 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2003 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2004 0xff /* end */
2005 };
2006 static unsigned char saved_regs_audigy[] = {
2007 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2008 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2009 0xff /* end */
2010 };
2011
2012 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
2013 {
2014 int size;
2015
2016 size = ARRAY_SIZE(saved_regs);
2017 if (emu->audigy)
2018 size += ARRAY_SIZE(saved_regs_audigy);
2019 emu->saved_ptr = vmalloc(4 * NUM_G * size);
2020 if (!emu->saved_ptr)
2021 return -ENOMEM;
2022 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2023 return -ENOMEM;
2024 if (emu->card_capabilities->ca0151_chip &&
2025 snd_p16v_alloc_pm_buffer(emu) < 0)
2026 return -ENOMEM;
2027 return 0;
2028 }
2029
2030 static void free_pm_buffer(struct snd_emu10k1 *emu)
2031 {
2032 vfree(emu->saved_ptr);
2033 snd_emu10k1_efx_free_pm_buffer(emu);
2034 if (emu->card_capabilities->ca0151_chip)
2035 snd_p16v_free_pm_buffer(emu);
2036 }
2037
2038 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2039 {
2040 int i;
2041 unsigned char *reg;
2042 unsigned int *val;
2043
2044 val = emu->saved_ptr;
2045 for (reg = saved_regs; *reg != 0xff; reg++)
2046 for (i = 0; i < NUM_G; i++, val++)
2047 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2048 if (emu->audigy) {
2049 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2050 for (i = 0; i < NUM_G; i++, val++)
2051 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2052 }
2053 if (emu->audigy)
2054 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2055 emu->saved_hcfg = inl(emu->port + HCFG);
2056 }
2057
2058 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2059 {
2060 if (emu->card_capabilities->ca_cardbus_chip)
2061 snd_emu10k1_cardbus_init(emu);
2062 if (emu->card_capabilities->ecard)
2063 snd_emu10k1_ecard_init(emu);
2064 else if (emu->card_capabilities->emu_model)
2065 snd_emu10k1_emu1010_init(emu);
2066 else
2067 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2068 snd_emu10k1_init(emu, emu->enable_ir, 1);
2069 }
2070
2071 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2072 {
2073 int i;
2074 unsigned char *reg;
2075 unsigned int *val;
2076
2077 snd_emu10k1_audio_enable(emu);
2078
2079 /* resore for spdif */
2080 if (emu->audigy)
2081 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2082 outl(emu->saved_hcfg, emu->port + HCFG);
2083
2084 val = emu->saved_ptr;
2085 for (reg = saved_regs; *reg != 0xff; reg++)
2086 for (i = 0; i < NUM_G; i++, val++)
2087 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2088 if (emu->audigy) {
2089 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2090 for (i = 0; i < NUM_G; i++, val++)
2091 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2092 }
2093 }
2094 #endif
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree