2 * Board and PCI setup routines for IBM Spruce
4 * Author: MontaVista Software <source@mvista.com>
6 * 2000-2004 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/errno.h>
16 #include <linux/reboot.h>
17 #include <linux/pci.h>
18 #include <linux/kdev_t.h>
19 #include <linux/types.h>
20 #include <linux/major.h>
21 #include <linux/initrd.h>
22 #include <linux/console.h>
23 #include <linux/delay.h>
24 #include <linux/seq_file.h>
25 #include <linux/ide.h>
26 #include <linux/root_dev.h>
27 #include <linux/serial.h>
28 #include <linux/tty.h>
29 #include <linux/serial_core.h>
30 #include <linux/serial_8250.h>
32 #include <asm/system.h>
33 #include <asm/pgtable.h>
37 #include <asm/machdep.h>
40 #include <asm/bootinfo.h>
43 #include <syslib/cpc700.h>
48 spruce_map_irq(struct pci_dev
*dev
, unsigned char idsel
, unsigned char pin
)
50 static char pci_irq_table
[][4] =
52 * PCI IDSEL/INTPIN->INTLINE
56 {23, 24, 25, 26}, /* IDSEL 1 - PCI slot 3 */
57 {24, 25, 26, 23}, /* IDSEL 2 - PCI slot 2 */
58 {25, 26, 23, 24}, /* IDSEL 3 - PCI slot 1 */
59 {26, 23, 24, 25}, /* IDSEL 4 - PCI slot 0 */
62 const long min_idsel
= 1, max_idsel
= 4, irqs_per_slot
= 4;
63 return PCI_IRQ_TABLE_LOOKUP
;
67 spruce_setup_hose(void)
69 struct pci_controller
*hose
;
72 hose
= pcibios_alloc_controller();
76 hose
->first_busno
= 0;
77 hose
->last_busno
= 0xff;
79 pci_init_resource(&hose
->io_resource
,
85 pci_init_resource(&hose
->mem_resources
[0],
91 hose
->io_space
.start
= SPRUCE_PCI_LOWER_IO
;
92 hose
->io_space
.end
= SPRUCE_PCI_UPPER_IO
;
93 hose
->mem_space
.start
= SPRUCE_PCI_LOWER_MEM
;
94 hose
->mem_space
.end
= SPRUCE_PCI_UPPER_MEM
;
95 hose
->io_base_virt
= (void *)SPRUCE_ISA_IO_BASE
;
97 setup_indirect_pci(hose
,
98 SPRUCE_PCI_CONFIG_ADDR
,
99 SPRUCE_PCI_CONFIG_DATA
);
101 hose
->last_busno
= pciauto_bus_scan(hose
, hose
->first_busno
);
103 ppc_md
.pci_swizzle
= common_swizzle
;
104 ppc_md
.pci_map_irq
= spruce_map_irq
;
108 * CPC700 PIC interrupt programming table
110 * First entry is the sensitivity (level/edge), second is the polarity.
112 unsigned int cpc700_irq_assigns
[32][2] = {
113 { 1, 1 }, /* IRQ 0: ECC Correctable Error - rising edge */
114 { 1, 1 }, /* IRQ 1: PCI Write Mem Range - rising edge */
115 { 0, 1 }, /* IRQ 2: PCI Write Command Reg - active high */
116 { 0, 1 }, /* IRQ 3: UART 0 - active high */
117 { 0, 1 }, /* IRQ 4: UART 1 - active high */
118 { 0, 1 }, /* IRQ 5: ICC 0 - active high */
119 { 0, 1 }, /* IRQ 6: ICC 1 - active high */
120 { 0, 1 }, /* IRQ 7: GPT Compare 0 - active high */
121 { 0, 1 }, /* IRQ 8: GPT Compare 1 - active high */
122 { 0, 1 }, /* IRQ 9: GPT Compare 2 - active high */
123 { 0, 1 }, /* IRQ 10: GPT Compare 3 - active high */
124 { 0, 1 }, /* IRQ 11: GPT Compare 4 - active high */
125 { 0, 1 }, /* IRQ 12: GPT Capture 0 - active high */
126 { 0, 1 }, /* IRQ 13: GPT Capture 1 - active high */
127 { 0, 1 }, /* IRQ 14: GPT Capture 2 - active high */
128 { 0, 1 }, /* IRQ 15: GPT Capture 3 - active high */
129 { 0, 1 }, /* IRQ 16: GPT Capture 4 - active high */
130 { 0, 0 }, /* IRQ 17: Reserved */
131 { 0, 0 }, /* IRQ 18: Reserved */
132 { 0, 0 }, /* IRQ 19: Reserved */
133 { 0, 1 }, /* IRQ 20: FPGA EXT_IRQ0 - active high */
134 { 1, 1 }, /* IRQ 21: Mouse - rising edge */
135 { 1, 1 }, /* IRQ 22: Keyboard - rising edge */
136 { 0, 0 }, /* IRQ 23: PCI Slot 3 - active low */
137 { 0, 0 }, /* IRQ 24: PCI Slot 2 - active low */
138 { 0, 0 }, /* IRQ 25: PCI Slot 1 - active low */
139 { 0, 0 }, /* IRQ 26: PCI Slot 0 - active low */
143 spruce_calibrate_decr(void)
145 int freq
, divisor
= 4;
147 /* determine processor bus speed */
148 freq
= SPRUCE_BUS_SPEED
;
149 tb_ticks_per_jiffy
= freq
/ HZ
/ divisor
;
150 tb_to_us
= mulhwu_scale_factor(freq
/divisor
, 1000000);
154 spruce_show_cpuinfo(struct seq_file
*m
)
156 seq_printf(m
, "vendor\t\t: IBM\n");
157 seq_printf(m
, "machine\t\t: Spruce\n");
163 spruce_early_serial_map(void)
166 struct uart_port serial_req
;
168 if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A
)))
169 uart_clk
= SPRUCE_BAUD_33M
* 16;
171 uart_clk
= SPRUCE_BAUD_30M
* 16;
173 /* Setup serial port access */
174 memset(&serial_req
, 0, sizeof(serial_req
));
175 serial_req
.uartclk
= uart_clk
;
176 serial_req
.irq
= UART0_INT
;
177 serial_req
.flags
= UPF_BOOT_AUTOCONF
;
178 serial_req
.iotype
= UPIO_MEM
;
179 serial_req
.membase
= (u_char
*)UART0_IO_BASE
;
180 serial_req
.regshift
= 0;
182 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
183 gen550_init(0, &serial_req
);
185 #ifdef CONFIG_SERIAL_8250
186 if (early_serial_setup(&serial_req
) != 0)
187 printk("Early serial init of port 0 failed\n");
190 /* Assume early_serial_setup() doesn't modify serial_req */
192 serial_req
.irq
= UART1_INT
;
193 serial_req
.membase
= (u_char
*)UART1_IO_BASE
;
195 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
196 gen550_init(1, &serial_req
);
198 #ifdef CONFIG_SERIAL_8250
199 if (early_serial_setup(&serial_req
) != 0)
200 printk("Early serial init of port 1 failed\n");
207 spruce_setup_arch(void)
209 /* Setup TODC access */
210 TODC_INIT(TODC_TYPE_DS1643
, 0, 0, SPRUCE_RTC_BASE_ADDR
, 8);
212 /* init to some ~sane value until calibrate_delay() runs */
213 loops_per_jiffy
= 50000000 / HZ
;
215 /* Setup PCI host bridge */
218 #ifdef CONFIG_BLK_DEV_INITRD
220 ROOT_DEV
= Root_RAM0
;
223 #ifdef CONFIG_ROOT_NFS
226 ROOT_DEV
= Root_SDA1
;
229 /* Identify the system */
230 printk(KERN_INFO
"System Identification: IBM Spruce\n");
231 printk(KERN_INFO
"Port by MontaVista Software, Inc. (source@mvista.com)\n");
235 spruce_restart(char *cmd
)
239 /* SRR0 has system reset vector, SRR1 has default MSR value */
240 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
254 spruce_power_off(void)
262 spruce_restart(NULL
);
268 io_block_mapping(SPRUCE_PCI_IO_BASE
, SPRUCE_PCI_PHY_IO_BASE
,
269 0x08000000, _PAGE_IO
);
273 * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
275 static __inline__
void
279 mtspr(SPRN_DBAT1U
, 0xf8000ffe);
280 mtspr(SPRN_DBAT1L
, 0xf800002a);
285 platform_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
286 unsigned long r6
, unsigned long r7
)
288 parse_bootinfo(find_bootinfo());
290 /* Map in board regs, etc. */
293 isa_io_base
= SPRUCE_ISA_IO_BASE
;
294 pci_dram_offset
= SPRUCE_PCI_SYS_MEM_BASE
;
296 ppc_md
.setup_arch
= spruce_setup_arch
;
297 ppc_md
.show_cpuinfo
= spruce_show_cpuinfo
;
298 ppc_md
.init_IRQ
= cpc700_init_IRQ
;
299 ppc_md
.get_irq
= cpc700_get_irq
;
301 ppc_md
.setup_io_mappings
= spruce_map_io
;
303 ppc_md
.restart
= spruce_restart
;
304 ppc_md
.power_off
= spruce_power_off
;
305 ppc_md
.halt
= spruce_halt
;
307 ppc_md
.time_init
= todc_time_init
;
308 ppc_md
.set_rtc_time
= todc_set_rtc_time
;
309 ppc_md
.get_rtc_time
= todc_get_rtc_time
;
310 ppc_md
.calibrate_decr
= spruce_calibrate_decr
;
312 ppc_md
.nvram_read_val
= todc_direct_read_val
;
313 ppc_md
.nvram_write_val
= todc_direct_write_val
;
315 spruce_early_serial_map();
317 #ifdef CONFIG_SERIAL_TEXT_DEBUG
318 ppc_md
.progress
= gen550_progress
;
319 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
321 ppc_md
.kgdb_map_scc
= gen550_kgdb_map_scc
;