2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/spi_bitbang.h>
31 /*----------------------------------------------------------------------*/
34 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
35 * Use this for GPIO or shift-register level hardware APIs.
37 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
38 * to glue code. These bitbang setup() and cleanup() routines are always
39 * used, though maybe they're called from controller-aware code.
41 * chipselect() and friends may use use spi_device->controller_data and
42 * controller registers as appropriate.
45 * NOTE: SPI controller pins can often be used as GPIO pins instead,
46 * which means you could use a bitbang driver either to get hardware
47 * working quickly, or testing for differences that aren't speed related.
50 struct spi_bitbang_cs
{
51 unsigned nsecs
; /* (clock cycle time)/2 */
52 u32 (*txrx_word
)(struct spi_device
*spi
, unsigned nsecs
,
54 unsigned (*txrx_bufs
)(struct spi_device
*,
56 struct spi_device
*spi
,
59 unsigned, struct spi_transfer
*);
62 static unsigned bitbang_txrx_8(
63 struct spi_device
*spi
,
64 u32 (*txrx_word
)(struct spi_device
*spi
,
68 struct spi_transfer
*t
70 unsigned bits
= spi
->bits_per_word
;
71 unsigned count
= t
->len
;
72 const u8
*tx
= t
->tx_buf
;
75 while (likely(count
> 0)) {
80 word
= txrx_word(spi
, ns
, word
, bits
);
85 return t
->len
- count
;
88 static unsigned bitbang_txrx_16(
89 struct spi_device
*spi
,
90 u32 (*txrx_word
)(struct spi_device
*spi
,
94 struct spi_transfer
*t
96 unsigned bits
= spi
->bits_per_word
;
97 unsigned count
= t
->len
;
98 const u16
*tx
= t
->tx_buf
;
101 while (likely(count
> 1)) {
106 word
= txrx_word(spi
, ns
, word
, bits
);
111 return t
->len
- count
;
114 static unsigned bitbang_txrx_32(
115 struct spi_device
*spi
,
116 u32 (*txrx_word
)(struct spi_device
*spi
,
120 struct spi_transfer
*t
122 unsigned bits
= spi
->bits_per_word
;
123 unsigned count
= t
->len
;
124 const u32
*tx
= t
->tx_buf
;
127 while (likely(count
> 3)) {
132 word
= txrx_word(spi
, ns
, word
, bits
);
137 return t
->len
- count
;
140 int spi_bitbang_setup_transfer(struct spi_device
*spi
, struct spi_transfer
*t
)
142 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
147 bits_per_word
= t
->bits_per_word
;
154 /* spi_transfer level calls that work per-word */
156 bits_per_word
= spi
->bits_per_word
;
157 if (bits_per_word
<= 8)
158 cs
->txrx_bufs
= bitbang_txrx_8
;
159 else if (bits_per_word
<= 16)
160 cs
->txrx_bufs
= bitbang_txrx_16
;
161 else if (bits_per_word
<= 32)
162 cs
->txrx_bufs
= bitbang_txrx_32
;
166 /* nsecs = (clock period)/2 */
168 hz
= spi
->max_speed_hz
;
170 cs
->nsecs
= (1000000000/2) / hz
;
171 if (cs
->nsecs
> (MAX_UDELAY_MS
* 1000 * 1000))
177 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer
);
180 * spi_bitbang_setup - default setup for per-word I/O loops
182 int spi_bitbang_setup(struct spi_device
*spi
)
184 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
185 struct spi_bitbang
*bitbang
;
189 bitbang
= spi_master_get_devdata(spi
->master
);
192 cs
= kzalloc(sizeof *cs
, GFP_KERNEL
);
195 spi
->controller_state
= cs
;
198 /* per-word shift register access, in hardware or bitbanging */
199 cs
->txrx_word
= bitbang
->txrx_word
[spi
->mode
& (SPI_CPOL
|SPI_CPHA
)];
203 retval
= bitbang
->setup_transfer(spi
, NULL
);
207 dev_dbg(&spi
->dev
, "%s, %u nsec/bit\n", __func__
, 2 * cs
->nsecs
);
209 /* NOTE we _need_ to call chipselect() early, ideally with adapter
210 * setup, unless the hardware defaults cooperate to avoid confusion
211 * between normal (active low) and inverted chipselects.
214 /* deselect chip (low or high) */
215 spin_lock_irqsave(&bitbang
->lock
, flags
);
216 if (!bitbang
->busy
) {
217 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
220 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
224 EXPORT_SYMBOL_GPL(spi_bitbang_setup
);
227 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
229 void spi_bitbang_cleanup(struct spi_device
*spi
)
231 kfree(spi
->controller_state
);
233 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup
);
235 static int spi_bitbang_bufs(struct spi_device
*spi
, struct spi_transfer
*t
)
237 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
238 unsigned nsecs
= cs
->nsecs
;
240 return cs
->txrx_bufs(spi
, cs
->txrx_word
, nsecs
, t
);
243 /*----------------------------------------------------------------------*/
246 * SECOND PART ... simple transfer queue runner.
248 * This costs a task context per controller, running the queue by
249 * performing each transfer in sequence. Smarter hardware can queue
250 * several DMA transfers at once, and process several controller queues
251 * in parallel; this driver doesn't match such hardware very well.
253 * Drivers can provide word-at-a-time i/o primitives, or provide
254 * transfer-at-a-time ones to leverage dma or fifo hardware.
256 static void bitbang_work(struct work_struct
*work
)
258 struct spi_bitbang
*bitbang
=
259 container_of(work
, struct spi_bitbang
, work
);
262 spin_lock_irqsave(&bitbang
->lock
, flags
);
264 while (!list_empty(&bitbang
->queue
)) {
265 struct spi_message
*m
;
266 struct spi_device
*spi
;
268 struct spi_transfer
*t
= NULL
;
272 int (*setup_transfer
)(struct spi_device
*,
273 struct spi_transfer
*);
275 m
= container_of(bitbang
->queue
.next
, struct spi_message
,
277 list_del_init(&m
->queue
);
278 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
280 /* FIXME this is made-up ... the correct value is known to
281 * word-at-a-time bitbang code, and presumably chipselect()
282 * should enforce these requirements too?
290 setup_transfer
= NULL
;
292 list_for_each_entry (t
, &m
->transfers
, transfer_list
) {
294 /* override or restore speed and wordsize */
295 if (t
->speed_hz
|| t
->bits_per_word
) {
296 setup_transfer
= bitbang
->setup_transfer
;
297 if (!setup_transfer
) {
298 status
= -ENOPROTOOPT
;
302 if (setup_transfer
) {
303 status
= setup_transfer(spi
, t
);
308 /* set up default clock polarity, and activate chip;
309 * this implicitly updates clock and spi modes as
310 * previously recorded for this device via setup().
311 * (and also deselects any other chip that might be
315 bitbang
->chipselect(spi
, BITBANG_CS_ACTIVE
);
318 cs_change
= t
->cs_change
;
319 if (!t
->tx_buf
&& !t
->rx_buf
&& t
->len
) {
324 /* transfer data. the lower level code handles any
325 * new dma mappings it needs. our caller always gave
326 * us dma-safe buffers.
329 /* REVISIT dma API still needs a designated
330 * DMA_ADDR_INVALID; ~0 might be better.
332 if (!m
->is_dma_mapped
)
333 t
->rx_dma
= t
->tx_dma
= 0;
334 status
= bitbang
->txrx_bufs(spi
, t
);
337 m
->actual_length
+= status
;
338 if (status
!= t
->len
) {
339 /* always report some kind of error */
346 /* protocol tweaks before next transfer */
348 udelay(t
->delay_usecs
);
352 if (t
->transfer_list
.next
== &m
->transfers
)
355 /* sometimes a short mid-message deselect of the chip
356 * may be needed to terminate a mode or command
359 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
364 m
->complete(m
->context
);
366 /* restore speed and wordsize */
368 setup_transfer(spi
, NULL
);
370 /* normally deactivate chipselect ... unless no error and
371 * cs_change has hinted that the next message will probably
372 * be for this chip too.
374 if (!(status
== 0 && cs_change
)) {
376 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
380 spin_lock_irqsave(&bitbang
->lock
, flags
);
383 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
387 * spi_bitbang_transfer - default submit to transfer queue
389 int spi_bitbang_transfer(struct spi_device
*spi
, struct spi_message
*m
)
391 struct spi_bitbang
*bitbang
;
395 m
->actual_length
= 0;
396 m
->status
= -EINPROGRESS
;
398 bitbang
= spi_master_get_devdata(spi
->master
);
400 spin_lock_irqsave(&bitbang
->lock
, flags
);
401 if (!spi
->max_speed_hz
)
404 list_add_tail(&m
->queue
, &bitbang
->queue
);
405 queue_work(bitbang
->workqueue
, &bitbang
->work
);
407 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
411 EXPORT_SYMBOL_GPL(spi_bitbang_transfer
);
413 /*----------------------------------------------------------------------*/
416 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
417 * @bitbang: driver handle
419 * Caller should have zero-initialized all parts of the structure, and then
420 * provided callbacks for chip selection and I/O loops. If the master has
421 * a transfer method, its final step should call spi_bitbang_transfer; or,
422 * that's the default if the transfer routine is not initialized. It should
423 * also set up the bus number and number of chipselects.
425 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
426 * hardware that basically exposes a shift register) or per-spi_transfer
427 * (which takes better advantage of hardware like fifos or DMA engines).
429 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
430 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
431 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
432 * routine isn't initialized.
434 * This routine registers the spi_master, which will process requests in a
435 * dedicated task, keeping IRQs unblocked most of the time. To stop
436 * processing those requests, call spi_bitbang_stop().
438 int spi_bitbang_start(struct spi_bitbang
*bitbang
)
442 if (!bitbang
->master
|| !bitbang
->chipselect
)
445 INIT_WORK(&bitbang
->work
, bitbang_work
);
446 spin_lock_init(&bitbang
->lock
);
447 INIT_LIST_HEAD(&bitbang
->queue
);
449 if (!bitbang
->master
->mode_bits
)
450 bitbang
->master
->mode_bits
= SPI_CPOL
| SPI_CPHA
| bitbang
->flags
;
452 if (!bitbang
->master
->transfer
)
453 bitbang
->master
->transfer
= spi_bitbang_transfer
;
454 if (!bitbang
->txrx_bufs
) {
455 bitbang
->use_dma
= 0;
456 bitbang
->txrx_bufs
= spi_bitbang_bufs
;
457 if (!bitbang
->master
->setup
) {
458 if (!bitbang
->setup_transfer
)
459 bitbang
->setup_transfer
=
460 spi_bitbang_setup_transfer
;
461 bitbang
->master
->setup
= spi_bitbang_setup
;
462 bitbang
->master
->cleanup
= spi_bitbang_cleanup
;
464 } else if (!bitbang
->master
->setup
)
467 /* this task is the only thing to touch the SPI bits */
469 bitbang
->workqueue
= create_singlethread_workqueue(
470 dev_name(bitbang
->master
->dev
.parent
));
471 if (bitbang
->workqueue
== NULL
) {
476 /* driver may get busy before register() returns, especially
477 * if someone registered boardinfo for devices
479 status
= spi_register_master(bitbang
->master
);
486 destroy_workqueue(bitbang
->workqueue
);
490 EXPORT_SYMBOL_GPL(spi_bitbang_start
);
493 * spi_bitbang_stop - stops the task providing spi communication
495 int spi_bitbang_stop(struct spi_bitbang
*bitbang
)
497 spi_unregister_master(bitbang
->master
);
499 WARN_ON(!list_empty(&bitbang
->queue
));
501 destroy_workqueue(bitbang
->workqueue
);
505 EXPORT_SYMBOL_GPL(spi_bitbang_stop
);
507 MODULE_LICENSE("GPL");