2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h> /* need_resched() */
40 #include <linux/pm_qos_params.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
56 #include <asm/uaccess.h>
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
62 #define PREFIX "ACPI: "
64 #define ACPI_PROCESSOR_CLASS "processor"
65 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define ACPI_PROCESSOR_FILE_POWER "power"
68 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
69 #define C2_OVERHEAD 1 /* 1us */
70 #define C3_OVERHEAD 1 /* 1us */
71 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
73 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
74 module_param(max_cstate
, uint
, 0000);
75 static unsigned int nocst __read_mostly
;
76 module_param(nocst
, uint
, 0000);
77 static int bm_check_disable __read_mostly
;
78 module_param(bm_check_disable
, uint
, 0000);
80 static unsigned int latency_factor __read_mostly
= 2;
81 module_param(latency_factor
, uint
, 0644);
84 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
85 * For now disable this. Probably a bug somewhere else.
87 * To skip this limit, boot/load with a large max_cstate limit.
89 static int set_max_cstate(const struct dmi_system_id
*id
)
91 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
94 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
95 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
96 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
98 max_cstate
= (long)id
->driver_data
;
103 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
104 callers to only run once -AK */
105 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
106 { set_max_cstate
, "Clevo 5600D", {
107 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
108 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
110 { set_max_cstate
, "Pavilion zv5000", {
111 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
112 DMI_MATCH(DMI_PRODUCT_NAME
,"Pavilion zv5000 (DS502A#ABA)")},
114 { set_max_cstate
, "Asus L8400B", {
115 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer Inc."),
116 DMI_MATCH(DMI_PRODUCT_NAME
,"L8400B series Notebook PC")},
123 * Callers should disable interrupts before the call and enable
124 * interrupts after return.
126 static void acpi_safe_halt(void)
128 current_thread_info()->status
&= ~TS_POLLING
;
130 * TS_POLLING-cleared state must be visible before we
134 if (!need_resched()) {
138 current_thread_info()->status
|= TS_POLLING
;
141 #ifdef ARCH_APICTIMER_STOPS_ON_C3
144 * Some BIOS implementations switch to C3 in the published C2 state.
145 * This seems to be a common problem on AMD boxen, but other vendors
146 * are affected too. We pick the most conservative approach: we assume
147 * that the local APIC stops in both C2 and C3.
149 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
150 struct acpi_processor_cx
*cx
)
152 struct acpi_processor_power
*pwr
= &pr
->power
;
153 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
155 if (cpu_has(&cpu_data(pr
->id
), X86_FEATURE_ARAT
))
159 type
= ACPI_STATE_C1
;
162 * Check, if one of the previous states already marked the lapic
165 if (pwr
->timer_broadcast_on_state
< state
)
168 if (cx
->type
>= type
)
169 pr
->power
.timer_broadcast_on_state
= state
;
172 static void __lapic_timer_propagate_broadcast(void *arg
)
174 struct acpi_processor
*pr
= (struct acpi_processor
*) arg
;
175 unsigned long reason
;
177 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
178 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
180 clockevents_notify(reason
, &pr
->id
);
183 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
)
185 smp_call_function_single(pr
->id
, __lapic_timer_propagate_broadcast
,
189 /* Power(C) State timer broadcast control */
190 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
191 struct acpi_processor_cx
*cx
,
194 int state
= cx
- pr
->power
.states
;
196 if (state
>= pr
->power
.timer_broadcast_on_state
) {
197 unsigned long reason
;
199 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
200 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
201 clockevents_notify(reason
, &pr
->id
);
207 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
208 struct acpi_processor_cx
*cstate
) { }
209 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
) { }
210 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
211 struct acpi_processor_cx
*cx
,
219 * Suspend / resume control
221 static int acpi_idle_suspend
;
222 static u32 saved_bm_rld
;
224 static void acpi_idle_bm_rld_save(void)
226 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &saved_bm_rld
);
228 static void acpi_idle_bm_rld_restore(void)
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &resumed_bm_rld
);
234 if (resumed_bm_rld
!= saved_bm_rld
)
235 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, saved_bm_rld
);
238 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
240 if (acpi_idle_suspend
== 1)
243 acpi_idle_bm_rld_save();
244 acpi_idle_suspend
= 1;
248 int acpi_processor_resume(struct acpi_device
* device
)
250 if (acpi_idle_suspend
== 0)
253 acpi_idle_bm_rld_restore();
254 acpi_idle_suspend
= 0;
258 #if defined(CONFIG_X86)
259 static void tsc_check_state(int state
)
261 switch (boot_cpu_data
.x86_vendor
) {
263 case X86_VENDOR_INTEL
:
265 * AMD Fam10h TSC will tick in all
266 * C/P/S0/S1 states when this bit is set.
268 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
273 /* TSC could halt in idle, so notify users */
274 if (state
> ACPI_STATE_C1
)
275 mark_tsc_unstable("TSC halts in idle");
279 static void tsc_check_state(int state
) { return; }
282 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
291 /* if info is obtained from pblk/fadt, type equals state */
292 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
293 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
295 #ifndef CONFIG_HOTPLUG_CPU
297 * Check for P_LVL2_UP flag before entering C2 and above on
300 if ((num_online_cpus() > 1) &&
301 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
305 /* determine C2 and C3 address from pblk */
306 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
307 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
309 /* determine latencies from FADT */
310 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
311 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
314 * FADT specified C2 latency must be less than or equal to
317 if (acpi_gbl_FADT
.C2latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
318 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
319 "C2 latency too large [%d]\n", acpi_gbl_FADT
.C2latency
));
321 pr
->power
.states
[ACPI_STATE_C2
].address
= 0;
325 * FADT supplied C3 latency must be less than or equal to
328 if (acpi_gbl_FADT
.C3latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
329 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
330 "C3 latency too large [%d]\n", acpi_gbl_FADT
.C3latency
));
332 pr
->power
.states
[ACPI_STATE_C3
].address
= 0;
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
336 "lvl2[0x%08x] lvl3[0x%08x]\n",
337 pr
->power
.states
[ACPI_STATE_C2
].address
,
338 pr
->power
.states
[ACPI_STATE_C3
].address
));
343 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
345 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
346 /* set the first C-State to C1 */
347 /* all processors need to support C1 */
348 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
349 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
350 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
352 /* the C0 state only exists as a filler in our array */
353 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
357 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
359 acpi_status status
= 0;
363 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
364 union acpi_object
*cst
;
372 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
373 if (ACPI_FAILURE(status
)) {
374 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
378 cst
= buffer
.pointer
;
380 /* There must be at least 2 elements */
381 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
382 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
387 count
= cst
->package
.elements
[0].integer
.value
;
389 /* Validate number of power states. */
390 if (count
< 1 || count
!= cst
->package
.count
- 1) {
391 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
396 /* Tell driver that at least _CST is supported. */
397 pr
->flags
.has_cst
= 1;
399 for (i
= 1; i
<= count
; i
++) {
400 union acpi_object
*element
;
401 union acpi_object
*obj
;
402 struct acpi_power_register
*reg
;
403 struct acpi_processor_cx cx
;
405 memset(&cx
, 0, sizeof(cx
));
407 element
= &(cst
->package
.elements
[i
]);
408 if (element
->type
!= ACPI_TYPE_PACKAGE
)
411 if (element
->package
.count
!= 4)
414 obj
= &(element
->package
.elements
[0]);
416 if (obj
->type
!= ACPI_TYPE_BUFFER
)
419 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
421 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
422 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
425 /* There should be an easy way to extract an integer... */
426 obj
= &(element
->package
.elements
[1]);
427 if (obj
->type
!= ACPI_TYPE_INTEGER
)
430 cx
.type
= obj
->integer
.value
;
432 * Some buggy BIOSes won't list C1 in _CST -
433 * Let acpi_processor_get_power_info_default() handle them later
435 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
438 cx
.address
= reg
->address
;
439 cx
.index
= current_count
+ 1;
441 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
442 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
443 if (acpi_processor_ffh_cstate_probe
444 (pr
->id
, &cx
, reg
) == 0) {
445 cx
.entry_method
= ACPI_CSTATE_FFH
;
446 } else if (cx
.type
== ACPI_STATE_C1
) {
448 * C1 is a special case where FIXED_HARDWARE
449 * can be handled in non-MWAIT way as well.
450 * In that case, save this _CST entry info.
451 * Otherwise, ignore this info and continue.
453 cx
.entry_method
= ACPI_CSTATE_HALT
;
454 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
458 if (cx
.type
== ACPI_STATE_C1
&&
459 (idle_halt
|| idle_nomwait
)) {
461 * In most cases the C1 space_id obtained from
462 * _CST object is FIXED_HARDWARE access mode.
463 * But when the option of idle=halt is added,
464 * the entry_method type should be changed from
465 * CSTATE_FFH to CSTATE_HALT.
466 * When the option of idle=nomwait is added,
467 * the C1 entry_method type should be
470 cx
.entry_method
= ACPI_CSTATE_HALT
;
471 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
474 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
478 if (cx
.type
== ACPI_STATE_C1
) {
482 obj
= &(element
->package
.elements
[2]);
483 if (obj
->type
!= ACPI_TYPE_INTEGER
)
486 cx
.latency
= obj
->integer
.value
;
488 obj
= &(element
->package
.elements
[3]);
489 if (obj
->type
!= ACPI_TYPE_INTEGER
)
492 cx
.power
= obj
->integer
.value
;
495 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
498 * We support total ACPI_PROCESSOR_MAX_POWER - 1
499 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
501 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
503 "Limiting number of power states to max (%d)\n",
504 ACPI_PROCESSOR_MAX_POWER
);
506 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
511 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
514 /* Validate number of power states discovered */
515 if (current_count
< 2)
519 kfree(buffer
.pointer
);
524 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
525 struct acpi_processor_cx
*cx
)
527 static int bm_check_flag
= -1;
528 static int bm_control_flag
= -1;
535 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
536 * DMA transfers are used by any ISA device to avoid livelock.
537 * Note that we could disable Type-F DMA (as recommended by
538 * the erratum), but this is known to disrupt certain ISA
539 * devices thus we take the conservative approach.
541 else if (errata
.piix4
.fdma
) {
542 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
543 "C3 not supported on PIIX4 with Type-F DMA\n"));
547 /* All the logic here assumes flags.bm_check is same across all CPUs */
548 if (bm_check_flag
== -1) {
549 /* Determine whether bm_check is needed based on CPU */
550 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
551 bm_check_flag
= pr
->flags
.bm_check
;
552 bm_control_flag
= pr
->flags
.bm_control
;
554 pr
->flags
.bm_check
= bm_check_flag
;
555 pr
->flags
.bm_control
= bm_control_flag
;
558 if (pr
->flags
.bm_check
) {
559 if (!pr
->flags
.bm_control
) {
560 if (pr
->flags
.has_cst
!= 1) {
561 /* bus mastering control is necessary */
562 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
563 "C3 support requires BM control\n"));
566 /* Here we enter C3 without bus mastering */
567 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
568 "C3 support without BM control\n"));
573 * WBINVD should be set in fadt, for C3 state to be
574 * supported on when bm_check is not required.
576 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
577 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
578 "Cache invalidation should work properly"
579 " for C3 to be enabled on SMP systems\n"));
585 * Otherwise we've met all of our C3 requirements.
586 * Normalize the C3 latency to expidite policy. Enable
587 * checking of bus mastering status (bm_check) so we can
588 * use this in our C3 policy
592 cx
->latency_ticks
= cx
->latency
;
594 * On older chipsets, BM_RLD needs to be set
595 * in order for Bus Master activity to wake the
596 * system from C3. Newer chipsets handle DMA
597 * during C3 automatically and BM_RLD is a NOP.
598 * In either case, the proper way to
599 * handle BM_RLD is to set it and leave it set.
601 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
606 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
609 unsigned int working
= 0;
611 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
613 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
614 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
625 cx
->latency_ticks
= cx
->latency
; /* Normalize latency */
629 acpi_processor_power_verify_c3(pr
, cx
);
635 lapic_timer_check_state(i
, pr
, cx
);
636 tsc_check_state(cx
->type
);
640 lapic_timer_propagate_broadcast(pr
);
645 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
651 /* NOTE: the idle thread may not be running while calling
654 /* Zero initialize all the C-states info. */
655 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
657 result
= acpi_processor_get_power_info_cst(pr
);
658 if (result
== -ENODEV
)
659 result
= acpi_processor_get_power_info_fadt(pr
);
664 acpi_processor_get_power_info_default(pr
);
666 pr
->power
.count
= acpi_processor_power_verify(pr
);
669 * if one state of type C2 or C3 is available, mark this
670 * CPU as being "idle manageable"
672 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
673 if (pr
->power
.states
[i
].valid
) {
675 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
684 * acpi_idle_bm_check - checks if bus master activity was detected
686 static int acpi_idle_bm_check(void)
690 if (bm_check_disable
)
693 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
695 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
697 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
698 * the true state of bus mastering activity; forcing us to
699 * manually check the BMIDEA bit of each IDE channel.
701 else if (errata
.piix4
.bmisx
) {
702 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
703 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
710 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
713 * Caller disables interrupt before call and enables interrupt after return.
715 static inline void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
717 /* Don't trace irqs off for idle */
718 stop_critical_timings();
719 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
720 /* Call into architectural FFH based C-state */
721 acpi_processor_ffh_cstate_enter(cx
);
722 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
725 /* IO port based C-state */
727 /* Dummy wait op - must do something useless after P_LVL2 read
728 because chipsets cannot guarantee that STPCLK# signal
729 gets asserted in time to freeze execution properly. */
730 inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
732 start_critical_timings();
736 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
737 * @dev: the target CPU
738 * @state: the state data
740 * This is equivalent to the HALT instruction.
742 static int acpi_idle_enter_c1(struct cpuidle_device
*dev
,
743 struct cpuidle_state
*state
)
747 struct acpi_processor
*pr
;
748 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
750 pr
= __get_cpu_var(processors
);
757 /* Do not access any ACPI IO ports in suspend path */
758 if (acpi_idle_suspend
) {
764 lapic_timer_state_broadcast(pr
, cx
, 1);
765 kt1
= ktime_get_real();
766 acpi_idle_do_entry(cx
);
767 kt2
= ktime_get_real();
768 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
772 lapic_timer_state_broadcast(pr
, cx
, 0);
778 * acpi_idle_enter_simple - enters an ACPI state without BM handling
779 * @dev: the target CPU
780 * @state: the state data
782 static int acpi_idle_enter_simple(struct cpuidle_device
*dev
,
783 struct cpuidle_state
*state
)
785 struct acpi_processor
*pr
;
786 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
791 pr
= __get_cpu_var(processors
);
796 if (acpi_idle_suspend
)
797 return(acpi_idle_enter_c1(dev
, state
));
801 if (cx
->entry_method
!= ACPI_CSTATE_FFH
) {
802 current_thread_info()->status
&= ~TS_POLLING
;
804 * TS_POLLING-cleared state must be visible before we test
809 if (unlikely(need_resched())) {
810 current_thread_info()->status
|= TS_POLLING
;
817 * Must be done before busmaster disable as we might need to
820 lapic_timer_state_broadcast(pr
, cx
, 1);
822 if (cx
->type
== ACPI_STATE_C3
)
823 ACPI_FLUSH_CPU_CACHE();
825 kt1
= ktime_get_real();
826 /* Tell the scheduler that we are going deep-idle: */
827 sched_clock_idle_sleep_event();
828 acpi_idle_do_entry(cx
);
829 kt2
= ktime_get_real();
830 idle_time_ns
= ktime_to_ns(ktime_sub(kt2
, kt1
));
831 idle_time
= idle_time_ns
;
832 do_div(idle_time
, NSEC_PER_USEC
);
834 /* Tell the scheduler how much we idled: */
835 sched_clock_idle_wakeup_event(idle_time_ns
);
838 if (cx
->entry_method
!= ACPI_CSTATE_FFH
)
839 current_thread_info()->status
|= TS_POLLING
;
843 lapic_timer_state_broadcast(pr
, cx
, 0);
844 cx
->time
+= idle_time
;
848 static int c3_cpu_count
;
849 static DEFINE_SPINLOCK(c3_lock
);
852 * acpi_idle_enter_bm - enters C3 with proper BM handling
853 * @dev: the target CPU
854 * @state: the state data
856 * If BM is detected, the deepest non-C3 idle state is entered instead.
858 static int acpi_idle_enter_bm(struct cpuidle_device
*dev
,
859 struct cpuidle_state
*state
)
861 struct acpi_processor
*pr
;
862 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
868 pr
= __get_cpu_var(processors
);
873 if (acpi_idle_suspend
)
874 return(acpi_idle_enter_c1(dev
, state
));
876 if (!cx
->bm_sts_skip
&& acpi_idle_bm_check()) {
877 if (dev
->safe_state
) {
878 dev
->last_state
= dev
->safe_state
;
879 return dev
->safe_state
->enter(dev
, dev
->safe_state
);
890 if (cx
->entry_method
!= ACPI_CSTATE_FFH
) {
891 current_thread_info()->status
&= ~TS_POLLING
;
893 * TS_POLLING-cleared state must be visible before we test
898 if (unlikely(need_resched())) {
899 current_thread_info()->status
|= TS_POLLING
;
905 acpi_unlazy_tlb(smp_processor_id());
907 /* Tell the scheduler that we are going deep-idle: */
908 sched_clock_idle_sleep_event();
910 * Must be done before busmaster disable as we might need to
913 lapic_timer_state_broadcast(pr
, cx
, 1);
915 kt1
= ktime_get_real();
918 * bm_check implies we need ARB_DIS
919 * !bm_check implies we need cache flush
920 * bm_control implies whether we can do ARB_DIS
922 * That leaves a case where bm_check is set and bm_control is
923 * not set. In that case we cannot do much, we enter C3
924 * without doing anything.
926 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
929 /* Disable bus master arbitration when all CPUs are in C3 */
930 if (c3_cpu_count
== num_online_cpus())
931 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 1);
932 spin_unlock(&c3_lock
);
933 } else if (!pr
->flags
.bm_check
) {
934 ACPI_FLUSH_CPU_CACHE();
937 acpi_idle_do_entry(cx
);
939 /* Re-enable bus master arbitration */
940 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
942 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 0);
944 spin_unlock(&c3_lock
);
946 kt2
= ktime_get_real();
947 idle_time_ns
= ktime_to_ns(ktime_sub(kt2
, kt1
));
948 idle_time
= idle_time_ns
;
949 do_div(idle_time
, NSEC_PER_USEC
);
951 /* Tell the scheduler how much we idled: */
952 sched_clock_idle_wakeup_event(idle_time_ns
);
955 if (cx
->entry_method
!= ACPI_CSTATE_FFH
)
956 current_thread_info()->status
|= TS_POLLING
;
960 lapic_timer_state_broadcast(pr
, cx
, 0);
961 cx
->time
+= idle_time
;
965 struct cpuidle_driver acpi_idle_driver
= {
967 .owner
= THIS_MODULE
,
971 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
972 * @pr: the ACPI processor
974 static int acpi_processor_setup_cpuidle(struct acpi_processor
*pr
)
976 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
977 struct acpi_processor_cx
*cx
;
978 struct cpuidle_state
*state
;
979 struct cpuidle_device
*dev
= &pr
->power
.dev
;
981 if (!pr
->flags
.power_setup_done
)
984 if (pr
->flags
.power
== 0) {
989 for (i
= 0; i
< CPUIDLE_STATE_MAX
; i
++) {
990 dev
->states
[i
].name
[0] = '\0';
991 dev
->states
[i
].desc
[0] = '\0';
997 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
998 cx
= &pr
->power
.states
[i
];
999 state
= &dev
->states
[count
];
1004 #ifdef CONFIG_HOTPLUG_CPU
1005 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
1006 !pr
->flags
.has_cst
&&
1007 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
1010 cpuidle_set_statedata(state
, cx
);
1012 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
1013 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
1014 state
->exit_latency
= cx
->latency
;
1015 state
->target_residency
= cx
->latency
* latency_factor
;
1016 state
->power_usage
= cx
->power
;
1021 state
->flags
|= CPUIDLE_FLAG_SHALLOW
;
1022 if (cx
->entry_method
== ACPI_CSTATE_FFH
)
1023 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1025 state
->enter
= acpi_idle_enter_c1
;
1026 dev
->safe_state
= state
;
1030 state
->flags
|= CPUIDLE_FLAG_BALANCED
;
1031 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1032 state
->enter
= acpi_idle_enter_simple
;
1033 dev
->safe_state
= state
;
1037 state
->flags
|= CPUIDLE_FLAG_DEEP
;
1038 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1039 state
->flags
|= CPUIDLE_FLAG_CHECK_BM
;
1040 state
->enter
= pr
->flags
.bm_check
?
1041 acpi_idle_enter_bm
:
1042 acpi_idle_enter_simple
;
1047 if (count
== CPUIDLE_STATE_MAX
)
1051 dev
->state_count
= count
;
1059 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1063 if (boot_option_idle_override
)
1073 if (!pr
->flags
.power_setup_done
)
1076 cpuidle_pause_and_lock();
1077 cpuidle_disable_device(&pr
->power
.dev
);
1078 acpi_processor_get_power_info(pr
);
1079 if (pr
->flags
.power
) {
1080 acpi_processor_setup_cpuidle(pr
);
1081 ret
= cpuidle_enable_device(&pr
->power
.dev
);
1083 cpuidle_resume_and_unlock();
1088 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1089 struct acpi_device
*device
)
1091 acpi_status status
= 0;
1092 static int first_run
;
1094 if (boot_option_idle_override
)
1100 * When the boot option of "idle=halt" is added, halt
1101 * is used for CPU IDLE.
1102 * In such case C2/C3 is meaningless. So the max_cstate
1107 dmi_check_system(processor_power_dmi_table
);
1108 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1109 if (max_cstate
< ACPI_C_STATES_MAX
)
1111 "ACPI: processor limited to max C-state %d\n",
1119 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1121 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1122 if (ACPI_FAILURE(status
)) {
1123 ACPI_EXCEPTION((AE_INFO
, status
,
1124 "Notifying BIOS of _CST ability failed"));
1128 acpi_processor_get_power_info(pr
);
1129 pr
->flags
.power_setup_done
= 1;
1132 * Install the idle handler if processor power management is supported.
1133 * Note that we use previously set idle handler will be used on
1134 * platforms that only support C1.
1136 if (pr
->flags
.power
) {
1137 acpi_processor_setup_cpuidle(pr
);
1138 if (cpuidle_register_device(&pr
->power
.dev
))
1144 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1145 struct acpi_device
*device
)
1147 if (boot_option_idle_override
)
1150 cpuidle_unregister_device(&pr
->power
.dev
);
1151 pr
->flags
.power_setup_done
= 0;