include/asm-powerpc/pmac_feature.h

   1 /*
   2  * Definition of platform feature hooks for PowerMacs
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1998 Paul Mackerras &
   9  *                    Ben. Herrenschmidt.
  10  *
  11  *
  12  * Note: I removed media-bay details from the feature stuff, I believe it's
  13  *       not worth it, the media-bay driver can directly use the mac-io
  14  *       ASIC registers.
  15  *
  16  * Implementation note: Currently, none of these functions will block.
  17  * However, they may internally protect themselves with a spinlock
  18  * for way too long. Be prepared for at least some of these to block
  19  * in the future.
  20  *
  21  * Unless specifically defined, the result code is assumed to be an
  22  * error when negative, 0 is the default success result. Some functions
  23  * may return additional positive result values.
  24  *
  25  * To keep implementation simple, all feature calls are assumed to have
  26  * the prototype parameters (struct device_node* node, int value).
  27  * When either is not used, pass 0.
  28  */
  29
  30 #ifdef __KERNEL__
  31 #ifndef __PPC_ASM_PMAC_FEATURE_H
  32 #define __PPC_ASM_PMAC_FEATURE_H
  33
  34 #include <asm/macio.h>
  35 #include <asm/machdep.h>
  36
  37 /*
  38  * Known Mac motherboard models
  39  *
  40  * Please, report any error here to benh@kernel.crashing.org, thanks !
  41  *
  42  * Note that I don't fully maintain this list for Core99 & MacRISC2
  43  * and I'm considering removing all NewWorld entries from it and
  44  * entirely rely on the model string.
  45  */
  46
  47 /* PowerSurge are the first generation of PCI Pmacs. This include
  48  * all of the Grand-Central based machines. We currently don't
  49  * differenciate most of them.
  50  */
  51 #define PMAC_TYPE_PSURGE                0x10    /* PowerSurge */
  52 #define PMAC_TYPE_ANS                   0x11    /* Apple Network Server */
  53
  54 /* Here is the infamous serie of OHare based machines
  55  */
  56 #define PMAC_TYPE_COMET                 0x20    /* Beleived to be PowerBook 2400 */
  57 #define PMAC_TYPE_HOOPER                0x21    /* Beleived to be PowerBook 3400 */
  58 #define PMAC_TYPE_KANGA                 0x22    /* PowerBook 3500 (first G3) */
  59 #define PMAC_TYPE_ALCHEMY               0x23    /* Alchemy motherboard base */
  60 #define PMAC_TYPE_GAZELLE               0x24    /* Spartacus, some 5xxx/6xxx */
  61 #define PMAC_TYPE_UNKNOWN_OHARE         0x2f    /* Unknown, but OHare based */
  62
  63 /* Here are the Heathrow based machines
  64  * FIXME: Differenciate wallstreet,mainstreet,wallstreetII
  65  */
  66 #define PMAC_TYPE_GOSSAMER              0x30    /* Gossamer motherboard */
  67 #define PMAC_TYPE_SILK                  0x31    /* Desktop PowerMac G3 */
  68 #define PMAC_TYPE_WALLSTREET            0x32    /* Wallstreet/Mainstreet PowerBook*/
  69 #define PMAC_TYPE_UNKNOWN_HEATHROW      0x3f    /* Unknown but heathrow based */
  70
  71 /* Here are newworld machines based on Paddington (heathrow derivative)
  72  */
  73 #define PMAC_TYPE_101_PBOOK             0x40    /* 101 PowerBook (aka Lombard) */
  74 #define PMAC_TYPE_ORIG_IMAC             0x41    /* First generation iMac */
  75 #define PMAC_TYPE_YOSEMITE              0x42    /* B&W G3 */
  76 #define PMAC_TYPE_YIKES                 0x43    /* Yikes G4 (PCI graphics) */
  77 #define PMAC_TYPE_UNKNOWN_PADDINGTON    0x4f    /* Unknown but paddington based */
  78
  79 /* Core99 machines based on UniNorth 1.0 and 1.5
  80  *
  81  * Note: A single entry here may cover several actual models according
  82  * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most
  83  * FireWire based iMacs, etc...). Those machines are too similar to be
  84  * distinguished here, when they need to be differencied, use the
  85  * device-tree "model" or "compatible" property.
  86  */
  87 #define PMAC_TYPE_ORIG_IBOOK            0x40    /* First iBook model (no firewire) */
  88 #define PMAC_TYPE_SAWTOOTH              0x41    /* Desktop G4s */
  89 #define PMAC_TYPE_FW_IMAC               0x42    /* FireWire iMacs (except Pangea based) */
  90 #define PMAC_TYPE_FW_IBOOK              0x43    /* FireWire iBooks (except iBook2) */
  91 #define PMAC_TYPE_CUBE                  0x44    /* Cube PowerMac */
  92 #define PMAC_TYPE_QUICKSILVER           0x45    /* QuickSilver G4s */
  93 #define PMAC_TYPE_PISMO                 0x46    /* Pismo PowerBook */
  94 #define PMAC_TYPE_TITANIUM              0x47    /* Titanium PowerBook */
  95 #define PMAC_TYPE_TITANIUM2             0x48    /* Titanium II PowerBook (no L3, M6) */
  96 #define PMAC_TYPE_TITANIUM3             0x49    /* Titanium III PowerBook (with L3 & M7) */
  97 #define PMAC_TYPE_TITANIUM4             0x50    /* Titanium IV PowerBook (with L3 & M9) */
  98 #define PMAC_TYPE_EMAC                  0x50    /* eMac */
  99 #define PMAC_TYPE_UNKNOWN_CORE99        0x5f
 100
 101 /* MacRisc2 with UniNorth 2.0 */
 102 #define PMAC_TYPE_RACKMAC               0x80    /* XServe */
 103 #define PMAC_TYPE_WINDTUNNEL            0x81
 104
 105 /* MacRISC2 machines based on the Pangea chipset
 106  */
 107 #define PMAC_TYPE_PANGEA_IMAC           0x100   /* Flower Power iMac */
 108 #define PMAC_TYPE_IBOOK2                0x101   /* iBook2 (polycarbonate) */
 109 #define PMAC_TYPE_FLAT_PANEL_IMAC       0x102   /* Flat panel iMac */
 110 #define PMAC_TYPE_UNKNOWN_PANGEA        0x10f
 111
 112 /* MacRISC2 machines based on the Intrepid chipset
 113  */
 114 #define PMAC_TYPE_UNKNOWN_INTREPID      0x11f   /* Generic */
 115
 116 /* MacRISC4 / G5 machines. We don't have per-machine selection here anymore,
 117  * but rather machine families
 118  */
 119 #define PMAC_TYPE_POWERMAC_G5           0x150   /* U3 & U3H based */
 120 #define PMAC_TYPE_POWERMAC_G5_U3L       0x151   /* U3L based desktop */
 121 #define PMAC_TYPE_IMAC_G5               0x152   /* iMac G5 */
 122 #define PMAC_TYPE_XSERVE_G5             0x153   /* Xserve G5 */
 123 #define PMAC_TYPE_UNKNOWN_K2            0x19f   /* Any other K2 based */
 124
 125 /*
 126  * Motherboard flags
 127  */
 128
 129 #define PMAC_MB_CAN_SLEEP               0x00000001
 130 #define PMAC_MB_HAS_FW_POWER            0x00000002
 131 #define PMAC_MB_OLD_CORE99              0x00000004
 132 #define PMAC_MB_MOBILE                  0x00000008
 133 #define PMAC_MB_MAY_SLEEP               0x00000010
 134
 135 /*
 136  * Feature calls supported on pmac
 137  *
 138  */
 139
 140 /*
 141  * Use this inline wrapper
 142  */
 143 struct device_node;
 144
 145 static inline long pmac_call_feature(int selector, struct device_node* node,
 146                                         long param, long value)
 147 {
 148         if (!ppc_md.feature_call)
 149                 return -ENODEV;
 150         return ppc_md.feature_call(selector, node, param, value);
 151 }
 152
 153 /* PMAC_FTR_SERIAL_ENABLE       (struct device_node* node, int param, int value)
 154  * enable/disable an SCC side. Pass the node corresponding to the
 155  * channel side as a parameter.
 156  * param is the type of port
 157  * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled
 158  * for use by xmon.
 159  */
 160 #define PMAC_FTR_SCC_ENABLE             PMAC_FTR_DEF(0)
 161         #define PMAC_SCC_ASYNC          0
 162         #define PMAC_SCC_IRDA           1
 163         #define PMAC_SCC_I2S1           2
 164         #define PMAC_SCC_FLAG_XMON      0x00001000
 165
 166 /* PMAC_FTR_MODEM_ENABLE        (struct device_node* node, 0, int value)
 167  * enable/disable the internal modem.
 168  */
 169 #define PMAC_FTR_MODEM_ENABLE           PMAC_FTR_DEF(1)
 170
 171 /* PMAC_FTR_SWIM3_ENABLE        (struct device_node* node, 0,int value)
 172  * enable/disable the swim3 (floppy) cell of a mac-io ASIC
 173  */
 174 #define PMAC_FTR_SWIM3_ENABLE           PMAC_FTR_DEF(2)
 175
 176 /* PMAC_FTR_MESH_ENABLE         (struct device_node* node, 0, int value)
 177  * enable/disable the mesh (scsi) cell of a mac-io ASIC
 178  */
 179 #define PMAC_FTR_MESH_ENABLE            PMAC_FTR_DEF(3)
 180
 181 /* PMAC_FTR_IDE_ENABLE          (struct device_node* node, int busID, int value)
 182  * enable/disable an IDE port of a mac-io ASIC
 183  * pass the busID parameter
 184  */
 185 #define PMAC_FTR_IDE_ENABLE             PMAC_FTR_DEF(4)
 186
 187 /* PMAC_FTR_IDE_RESET           (struct device_node* node, int busID, int value)
 188  * assert(1)/release(0) an IDE reset line (mac-io IDE only)
 189  */
 190 #define PMAC_FTR_IDE_RESET              PMAC_FTR_DEF(5)
 191
 192 /* PMAC_FTR_BMAC_ENABLE         (struct device_node* node, 0, int value)
 193  * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive
 194  * it's reset line
 195  */
 196 #define PMAC_FTR_BMAC_ENABLE            PMAC_FTR_DEF(6)
 197
 198 /* PMAC_FTR_GMAC_ENABLE         (struct device_node* node, 0, int value)
 199  * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This
 200  * control the cell's clock.
 201  */
 202 #define PMAC_FTR_GMAC_ENABLE            PMAC_FTR_DEF(7)
 203
 204 /* PMAC_FTR_GMAC_PHY_RESET      (struct device_node* node, 0, 0)
 205  * Perform a HW reset of the PHY connected to a gmac controller.
 206  * Pass the gmac device node, not the PHY node.
 207  */
 208 #define PMAC_FTR_GMAC_PHY_RESET         PMAC_FTR_DEF(8)
 209
 210 /* PMAC_FTR_SOUND_CHIP_ENABLE   (struct device_node* node, 0, int value)
 211  * enable/disable the sound chip, whatever it is and provided it can
 212  * acually be controlled
 213  */
 214 #define PMAC_FTR_SOUND_CHIP_ENABLE      PMAC_FTR_DEF(9)
 215
 216 /* -- add various tweaks related to sound routing -- */
 217
 218 /* PMAC_FTR_AIRPORT_ENABLE      (struct device_node* node, 0, int value)
 219  * enable/disable the airport card
 220  */
 221 #define PMAC_FTR_AIRPORT_ENABLE         PMAC_FTR_DEF(10)
 222
 223 /* PMAC_FTR_RESET_CPU           (NULL, int cpu_nr, 0)
 224  * toggle the reset line of a CPU on an uninorth-based SMP machine
 225  */
 226 #define PMAC_FTR_RESET_CPU              PMAC_FTR_DEF(11)
 227
 228 /* PMAC_FTR_USB_ENABLE          (struct device_node* node, 0, int value)
 229  * enable/disable an USB cell, along with the power of the USB "pad"
 230  * on keylargo based machines
 231  */
 232 #define PMAC_FTR_USB_ENABLE             PMAC_FTR_DEF(12)
 233
 234 /* PMAC_FTR_1394_ENABLE         (struct device_node* node, 0, int value)
 235  * enable/disable the firewire cell of an uninorth ASIC.
 236  */
 237 #define PMAC_FTR_1394_ENABLE            PMAC_FTR_DEF(13)
 238
 239 /* PMAC_FTR_1394_CABLE_POWER    (struct device_node* node, 0, int value)
 240  * enable/disable the firewire cable power supply of the uninorth
 241  * firewire cell
 242  */
 243 #define PMAC_FTR_1394_CABLE_POWER       PMAC_FTR_DEF(14)
 244
 245 /* PMAC_FTR_SLEEP_STATE         (struct device_node* node, 0, int value)
 246  * set the sleep state of the motherboard.
 247  *
 248  * Pass -1 as value to query for sleep capability
 249  * Pass 1 to set IOs to sleep
 250  * Pass 0 to set IOs to wake
 251  */
 252 #define PMAC_FTR_SLEEP_STATE            PMAC_FTR_DEF(15)
 253
 254 /* PMAC_FTR_GET_MB_INFO         (NULL, selector, 0)
 255  *
 256  * returns some motherboard infos.
 257  * selector: 0  - model id
 258  *           1  - model flags (capabilities)
 259  *           2  - model name (cast to const char *)
 260  */
 261 #define PMAC_FTR_GET_MB_INFO            PMAC_FTR_DEF(16)
 262 #define   PMAC_MB_INFO_MODEL    0
 263 #define   PMAC_MB_INFO_FLAGS    1
 264 #define   PMAC_MB_INFO_NAME     2
 265
 266 /* PMAC_FTR_READ_GPIO           (NULL, int index, 0)
 267  *
 268  * read a GPIO from a mac-io controller of type KeyLargo or Pangea.
 269  * the value returned is a byte (positive), or a negative error code
 270  */
 271 #define PMAC_FTR_READ_GPIO              PMAC_FTR_DEF(17)
 272
 273 /* PMAC_FTR_WRITE_GPIO          (NULL, int index, int value)
 274  *
 275  * write a GPIO of a mac-io controller of type KeyLargo or Pangea.
 276  */
 277 #define PMAC_FTR_WRITE_GPIO             PMAC_FTR_DEF(18)
 278
 279 /* PMAC_FTR_ENABLE_MPIC
 280  *
 281  * Enable the MPIC cell
 282  */
 283 #define PMAC_FTR_ENABLE_MPIC            PMAC_FTR_DEF(19)
 284
 285 /* PMAC_FTR_AACK_DELAY_ENABLE   (NULL, int enable, 0)
 286  *
 287  * Enable/disable the AACK delay on the northbridge for systems using DFS
 288  */
 289 #define PMAC_FTR_AACK_DELAY_ENABLE      PMAC_FTR_DEF(20)
 290
 291 /* PMAC_FTR_DEVICE_CAN_WAKE
 292  *
 293  * Used by video drivers to inform system that they can actually perform
 294  * wakeup from sleep
 295  */
 296 #define PMAC_FTR_DEVICE_CAN_WAKE        PMAC_FTR_DEF(22)
 297
 298
 299 /* Don't use those directly, they are for the sake of pmac_setup.c */
 300 extern long pmac_do_feature_call(unsigned int selector, ...);
 301 extern void pmac_feature_init(void);
 302
 303 /* Video suspend tweak */
 304 extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data);
 305 extern void pmac_call_early_video_resume(void);
 306
 307 #define PMAC_FTR_DEF(x) ((_MACH_Pmac << 16) | (x))
 308
 309 /* The AGP driver registers itself here */
 310 extern void pmac_register_agp_pm(struct pci_dev *bridge,
 311                                  int (*suspend)(struct pci_dev *bridge),
 312                                  int (*resume)(struct pci_dev *bridge));
 313
 314 /* Those are meant to be used by video drivers to deal with AGP
 315  * suspend resume properly
 316  */
 317 extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
 318 extern void pmac_resume_agp_for_card(struct pci_dev *dev);
 319
 320 /* Used by the via-pmu driver for suspend/resume
 321  */
 322 extern void pmac_tweak_clock_spreading(int enable);
 323
 324 /*
 325  * The part below is for use by macio_asic.c only, do not rely
 326  * on the data structures or constants below in a normal driver
 327  *
 328  */
 329
 330 #define MAX_MACIO_CHIPS         2
 331
 332 enum {
 333         macio_unknown = 0,
 334         macio_grand_central,
 335         macio_ohare,
 336         macio_ohareII,
 337         macio_heathrow,
 338         macio_gatwick,
 339         macio_paddington,
 340         macio_keylargo,
 341         macio_pangea,
 342         macio_intrepid,
 343         macio_keylargo2,
 344 };
 345
 346 struct macio_chip
 347 {
 348         struct device_node      *of_node;
 349         int                     type;
 350         const char              *name;
 351         int                     rev;
 352         volatile u32            __iomem *base;
 353         unsigned long           flags;
 354
 355         /* For use by macio_asic PCI driver */
 356         struct macio_bus        lbus;
 357 };
 358
 359 extern struct macio_chip macio_chips[MAX_MACIO_CHIPS];
 360
 361 #define MACIO_FLAG_SCCA_ON      0x00000001
 362 #define MACIO_FLAG_SCCB_ON      0x00000002
 363 #define MACIO_FLAG_SCC_LOCKED   0x00000004
 364 #define MACIO_FLAG_AIRPORT_ON   0x00000010
 365 #define MACIO_FLAG_FW_SUPPORTED 0x00000020
 366
 367 extern struct macio_chip* macio_find(struct device_node* child, int type);
 368
 369 #define MACIO_FCR32(macio, r)   ((macio)->base + ((r) >> 2))
 370 #define MACIO_FCR8(macio, r)    (((volatile u8 __iomem *)((macio)->base)) + (r))
 371
 372 #define MACIO_IN32(r)           (in_le32(MACIO_FCR32(macio,r)))
 373 #define MACIO_OUT32(r,v)        (out_le32(MACIO_FCR32(macio,r), (v)))
 374 #define MACIO_BIS(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
 375 #define MACIO_BIC(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
 376 #define MACIO_IN8(r)            (in_8(MACIO_FCR8(macio,r)))
 377 #define MACIO_OUT8(r,v)         (out_8(MACIO_FCR8(macio,r), (v)))
 378
 379 #endif /* __PPC_ASM_PMAC_FEATURE_H */
 380 #endif /* __KERNEL__ */