drivers/net/ehea/ehea.h

   1 /*
   2  *  linux/drivers/net/ehea/ehea.h
   3  *
   4  *  eHEA ethernet device driver for IBM eServer System p
   5  *
   6  *  (C) Copyright IBM Corp. 2006
   7  *
   8  *  Authors:
   9  *       Christoph Raisch <raisch@de.ibm.com>
  10  *       Jan-Bernd Themann <themann@de.ibm.com>
  11  *       Thomas Klein <tklein@de.ibm.com>
  12  *
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2, or (at your option)
  17  * any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27  */
  28
  29 #ifndef __EHEA_H__
  30 #define __EHEA_H__
  31
  32 #include <linux/module.h>
  33 #include <linux/ethtool.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/if_vlan.h>
  36
  37 #include <asm/ibmebus.h>
  38 #include <asm/abs_addr.h>
  39 #include <asm/io.h>
  40
  41 #define DRV_NAME        "ehea"
  42 #define DRV_VERSION     "EHEA_0061"
  43
  44 #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
  45         | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  46
  47 #define EHEA_MAX_ENTRIES_RQ1 32767
  48 #define EHEA_MAX_ENTRIES_RQ2 16383
  49 #define EHEA_MAX_ENTRIES_RQ3 16383
  50 #define EHEA_MAX_ENTRIES_SQ  32767
  51 #define EHEA_MIN_ENTRIES_QP  127
  52
  53 #define EHEA_SMALL_QUEUES
  54 #define EHEA_NUM_TX_QP 1
  55
  56 #ifdef EHEA_SMALL_QUEUES
  57 #define EHEA_MAX_CQE_COUNT      1023
  58 #define EHEA_DEF_ENTRIES_SQ     1023
  59 #define EHEA_DEF_ENTRIES_RQ1    4095
  60 #define EHEA_DEF_ENTRIES_RQ2    1023
  61 #define EHEA_DEF_ENTRIES_RQ3    1023
  62 #else
  63 #define EHEA_MAX_CQE_COUNT      4080
  64 #define EHEA_DEF_ENTRIES_SQ     4080
  65 #define EHEA_DEF_ENTRIES_RQ1    8160
  66 #define EHEA_DEF_ENTRIES_RQ2    2040
  67 #define EHEA_DEF_ENTRIES_RQ3    2040
  68 #endif
  69
  70 #define EHEA_MAX_ENTRIES_EQ 20
  71
  72 #define EHEA_SG_SQ  2
  73 #define EHEA_SG_RQ1 1
  74 #define EHEA_SG_RQ2 0
  75 #define EHEA_SG_RQ3 0
  76
  77 #define EHEA_MAX_PACKET_SIZE    9022    /* for jumbo frames */
  78 #define EHEA_RQ2_PKT_SIZE       1522
  79 #define EHEA_L_PKT_SIZE         256     /* low latency */
  80
  81 /* Send completion signaling */
  82
  83 /* Protection Domain Identifier */
  84 #define EHEA_PD_ID        0xaabcdeff
  85
  86 #define EHEA_RQ2_THRESHOLD         1
  87 #define EHEA_RQ3_THRESHOLD         9    /* use RQ3 threshold of 1522 bytes */
  88
  89 #define EHEA_SPEED_10G         10000
  90 #define EHEA_SPEED_1G           1000
  91 #define EHEA_SPEED_100M          100
  92 #define EHEA_SPEED_10M            10
  93 #define EHEA_SPEED_AUTONEG         0
  94
  95 /* Broadcast/Multicast registration types */
  96 #define EHEA_BCMC_SCOPE_ALL     0x08
  97 #define EHEA_BCMC_SCOPE_SINGLE  0x00
  98 #define EHEA_BCMC_MULTICAST     0x04
  99 #define EHEA_BCMC_BROADCAST     0x00
 100 #define EHEA_BCMC_UNTAGGED      0x02
 101 #define EHEA_BCMC_TAGGED        0x00
 102 #define EHEA_BCMC_VLANID_ALL    0x01
 103 #define EHEA_BCMC_VLANID_SINGLE 0x00
 104
 105 #define EHEA_CACHE_LINE          128
 106
 107 /* Memory Regions */
 108 #define EHEA_MR_ACC_CTRL       0x00800000
 109
 110 #define EHEA_WATCH_DOG_TIMEOUT 10*HZ
 111
 112 /* utility functions */
 113
 114 #define ehea_info(fmt, args...) \
 115         printk(KERN_INFO DRV_NAME ": " fmt "\n", ## args)
 116
 117 #define ehea_error(fmt, args...) \
 118         printk(KERN_ERR DRV_NAME ": Error in %s: " fmt "\n", __func__, ## args)
 119
 120 #ifdef DEBUG
 121 #define ehea_debug(fmt, args...) \
 122         printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
 123 #else
 124 #define ehea_debug(fmt, args...) do {} while (0)
 125 #endif
 126
 127 void ehea_dump(void *adr, int len, char *msg);
 128
 129 #define EHEA_BMASK(pos, length) (((pos) << 16) + (length))
 130
 131 #define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
 132
 133 #define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
 134
 135 #define EHEA_BMASK_MASK(mask) \
 136         (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff))
 137
 138 #define EHEA_BMASK_SET(mask, value) \
 139         ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask))
 140
 141 #define EHEA_BMASK_GET(mask, value) \
 142         (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask)))
 143
 144 /*
 145  * Generic ehea page
 146  */
 147 struct ehea_page {
 148         u8 entries[PAGE_SIZE];
 149 };
 150
 151 /*
 152  * Generic queue in linux kernel virtual memory
 153  */
 154 struct hw_queue {
 155         u64 current_q_offset;           /* current queue entry */
 156         struct ehea_page **queue_pages; /* array of pages belonging to queue */
 157         u32 qe_size;                    /* queue entry size */
 158         u32 queue_length;               /* queue length allocated in bytes */
 159         u32 pagesize;
 160         u32 toggle_state;               /* toggle flag - per page */
 161         u32 reserved;                   /* 64 bit alignment */
 162 };
 163
 164 /*
 165  * For pSeries this is a 64bit memory address where
 166  * I/O memory is mapped into CPU address space
 167  */
 168 struct h_epa {
 169         void __iomem *addr;
 170 };
 171
 172 struct h_epa_user {
 173         u64 addr;
 174 };
 175
 176 struct h_epas {
 177         struct h_epa kernel;    /* kernel space accessible resource,
 178                                    set to 0 if unused */
 179         struct h_epa_user user; /* user space accessible resource
 180                                    set to 0 if unused */
 181 };
 182
 183 struct ehea_qp;
 184 struct ehea_cq;
 185 struct ehea_eq;
 186 struct ehea_port;
 187 struct ehea_av;
 188
 189 /*
 190  * Queue attributes passed to ehea_create_qp()
 191  */
 192 struct ehea_qp_init_attr {
 193         /* input parameter */
 194         u32 qp_token;           /* queue token */
 195         u8 low_lat_rq1;
 196         u8 signalingtype;       /* cqe generation flag */
 197         u8 rq_count;            /* num of receive queues */
 198         u8 eqe_gen;             /* eqe generation flag */
 199         u16 max_nr_send_wqes;   /* max number of send wqes */
 200         u16 max_nr_rwqes_rq1;   /* max number of receive wqes */
 201         u16 max_nr_rwqes_rq2;
 202         u16 max_nr_rwqes_rq3;
 203         u8 wqe_size_enc_sq;
 204         u8 wqe_size_enc_rq1;
 205         u8 wqe_size_enc_rq2;
 206         u8 wqe_size_enc_rq3;
 207         u8 swqe_imm_data_len;   /* immediate data length for swqes */
 208         u16 port_nr;
 209         u16 rq2_threshold;
 210         u16 rq3_threshold;
 211         u64 send_cq_handle;
 212         u64 recv_cq_handle;
 213         u64 aff_eq_handle;
 214
 215         /* output parameter */
 216         u32 qp_nr;
 217         u16 act_nr_send_wqes;
 218         u16 act_nr_rwqes_rq1;
 219         u16 act_nr_rwqes_rq2;
 220         u16 act_nr_rwqes_rq3;
 221         u8 act_wqe_size_enc_sq;
 222         u8 act_wqe_size_enc_rq1;
 223         u8 act_wqe_size_enc_rq2;
 224         u8 act_wqe_size_enc_rq3;
 225         u32 nr_sq_pages;
 226         u32 nr_rq1_pages;
 227         u32 nr_rq2_pages;
 228         u32 nr_rq3_pages;
 229         u32 liobn_sq;
 230         u32 liobn_rq1;
 231         u32 liobn_rq2;
 232         u32 liobn_rq3;
 233 };
 234
 235 /*
 236  * Event Queue attributes, passed as paramter
 237  */
 238 struct ehea_eq_attr {
 239         u32 type;
 240         u32 max_nr_of_eqes;
 241         u8 eqe_gen;        /* generate eqe flag */
 242         u64 eq_handle;
 243         u32 act_nr_of_eqes;
 244         u32 nr_pages;
 245         u32 ist1;          /* Interrupt service token */
 246         u32 ist2;
 247         u32 ist3;
 248         u32 ist4;
 249 };
 250
 251
 252 /*
 253  * Event Queue
 254  */
 255 struct ehea_eq {
 256         struct ehea_adapter *adapter;
 257         struct hw_queue hw_queue;
 258         u64 fw_handle;
 259         struct h_epas epas;
 260         spinlock_t spinlock;
 261         struct ehea_eq_attr attr;
 262 };
 263
 264 /*
 265  * HEA Queues
 266  */
 267 struct ehea_qp {
 268         struct ehea_adapter *adapter;
 269         u64 fw_handle;                  /* QP handle for firmware calls */
 270         struct hw_queue hw_squeue;
 271         struct hw_queue hw_rqueue1;
 272         struct hw_queue hw_rqueue2;
 273         struct hw_queue hw_rqueue3;
 274         struct h_epas epas;
 275         struct ehea_qp_init_attr init_attr;
 276 };
 277
 278 /*
 279  * Completion Queue attributes
 280  */
 281 struct ehea_cq_attr {
 282         /* input parameter */
 283         u32 max_nr_of_cqes;
 284         u32 cq_token;
 285         u64 eq_handle;
 286
 287         /* output parameter */
 288         u32 act_nr_of_cqes;
 289         u32 nr_pages;
 290 };
 291
 292 /*
 293  * Completion Queue
 294  */
 295 struct ehea_cq {
 296         struct ehea_adapter *adapter;
 297         u64 fw_handle;
 298         struct hw_queue hw_queue;
 299         struct h_epas epas;
 300         struct ehea_cq_attr attr;
 301 };
 302
 303 /*
 304  * Memory Region
 305  */
 306 struct ehea_mr {
 307         struct ehea_adapter *adapter;
 308         u64 handle;
 309         u64 vaddr;
 310         u32 lkey;
 311 };
 312
 313 /*
 314  * Port state information
 315  */
 316 struct port_stats {
 317         int poll_receive_errors;
 318         int queue_stopped;
 319         int err_tcp_cksum;
 320         int err_ip_cksum;
 321         int err_frame_crc;
 322 };
 323
 324 #define EHEA_IRQ_NAME_SIZE 20
 325
 326 /*
 327  * Queue SKB Array
 328  */
 329 struct ehea_q_skb_arr {
 330         struct sk_buff **arr;           /* skb array for queue */
 331         int len;                        /* array length */
 332         int index;                      /* array index */
 333         int os_skbs;                    /* rq2/rq3 only: outstanding skbs */
 334 };
 335
 336 /*
 337  * Port resources
 338  */
 339 struct ehea_port_res {
 340         struct port_stats p_stats;
 341         struct ehea_mr send_mr;         /* send memory region */
 342         struct ehea_mr recv_mr;         /* receive memory region */
 343         spinlock_t xmit_lock;
 344         struct ehea_port *port;
 345         char int_recv_name[EHEA_IRQ_NAME_SIZE];
 346         char int_send_name[EHEA_IRQ_NAME_SIZE];
 347         struct ehea_qp *qp;
 348         struct ehea_cq *send_cq;
 349         struct ehea_cq *recv_cq;
 350         struct ehea_eq *eq;
 351         struct net_device *d_netdev;
 352         struct ehea_q_skb_arr rq1_skba;
 353         struct ehea_q_skb_arr rq2_skba;
 354         struct ehea_q_skb_arr rq3_skba;
 355         struct ehea_q_skb_arr sq_skba;
 356         spinlock_t netif_queue;
 357         int queue_stopped;
 358         int swqe_refill_th;
 359         atomic_t swqe_avail;
 360         int swqe_ll_count;
 361         u32 swqe_id_counter;
 362         u64 tx_packets;
 363         u64 rx_packets;
 364         u32 poll_counter;
 365 };
 366
 367
 368 #define EHEA_MAX_PORTS 16
 369 struct ehea_adapter {
 370         u64 handle;
 371         struct ibmebus_dev *ebus_dev;
 372         struct ehea_port *port[EHEA_MAX_PORTS];
 373         struct ehea_eq *neq;       /* notification event queue */
 374         struct workqueue_struct *ehea_wq;
 375         struct tasklet_struct neq_tasklet;
 376         struct ehea_mr mr;
 377         u32 pd;                    /* protection domain */
 378         u64 max_mc_mac;            /* max number of multicast mac addresses */
 379 };
 380
 381
 382 struct ehea_mc_list {
 383         struct list_head list;
 384         u64 macaddr;
 385 };
 386
 387 #define EHEA_PORT_UP 1
 388 #define EHEA_PORT_DOWN 0
 389 #define EHEA_MAX_PORT_RES 16
 390 struct ehea_port {
 391         struct ehea_adapter *adapter;    /* adapter that owns this port */
 392         struct net_device *netdev;
 393         struct net_device_stats stats;
 394         struct ehea_port_res port_res[EHEA_MAX_PORT_RES];
 395         struct of_device  ofdev; /* Open Firmware Device */
 396         struct ehea_mc_list *mc_list;    /* Multicast MAC addresses */
 397         struct vlan_group *vgrp;
 398         struct ehea_eq *qp_eq;
 399         struct work_struct reset_task;
 400         struct semaphore port_lock;
 401         char int_aff_name[EHEA_IRQ_NAME_SIZE];
 402         int allmulti;                    /* Indicates IFF_ALLMULTI state */
 403         int promisc;                     /* Indicates IFF_PROMISC state */
 404         int num_tx_qps;
 405         int num_add_tx_qps;
 406         int num_mcs;
 407         int resets;
 408         u64 mac_addr;
 409         u32 logical_port_id;
 410         u32 port_speed;
 411         u32 msg_enable;
 412         u32 sig_comp_iv;
 413         u32 state;
 414         u8 full_duplex;
 415         u8 autoneg;
 416         u8 num_def_qps;
 417 };
 418
 419 struct port_res_cfg {
 420         int max_entries_rcq;
 421         int max_entries_scq;
 422         int max_entries_sq;
 423         int max_entries_rq1;
 424         int max_entries_rq2;
 425         int max_entries_rq3;
 426 };
 427
 428
 429 void ehea_set_ethtool_ops(struct net_device *netdev);
 430 int ehea_sense_port_attr(struct ehea_port *port);
 431 int ehea_set_portspeed(struct ehea_port *port, u32 port_speed);
 432
 433 #endif  /* __EHEA_H__ */