1 /* linux/arch/arm/plat-s3c24xx/clock.c
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX Core clock control support
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/sysdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/clk.h>
40 #include <linux/spinlock.h>
41 #include <linux/delay.h>
44 #include <mach/hardware.h>
47 #include <plat/cpu-freq.h>
49 #include <plat/clock.h>
52 /* clock information */
54 static LIST_HEAD(clocks
);
56 /* We originally used an mutex here, but some contexts (see resume)
57 * are calling functions such as clk_set_parent() with IRQs disabled
58 * causing an BUG to be triggered.
60 DEFINE_SPINLOCK(clocks_lock
);
62 /* enable and disable calls for use with the clk struct */
64 static int clk_null_enable(struct clk
*clk
, int enable
)
71 struct clk
*clk_get(struct device
*dev
, const char *id
)
74 struct clk
*clk
= ERR_PTR(-ENOENT
);
77 if (dev
== NULL
|| dev
->bus
!= &platform_bus_type
)
80 idno
= to_platform_device(dev
)->id
;
82 spin_lock(&clocks_lock
);
84 list_for_each_entry(p
, &clocks
, list
) {
86 strcmp(id
, p
->name
) == 0 &&
87 try_module_get(p
->owner
)) {
93 /* check for the case where a device was supplied, but the
94 * clock that was being searched for is not device specific */
97 list_for_each_entry(p
, &clocks
, list
) {
98 if (p
->id
== -1 && strcmp(id
, p
->name
) == 0 &&
99 try_module_get(p
->owner
)) {
106 spin_unlock(&clocks_lock
);
110 void clk_put(struct clk
*clk
)
112 module_put(clk
->owner
);
115 int clk_enable(struct clk
*clk
)
117 if (IS_ERR(clk
) || clk
== NULL
)
120 clk_enable(clk
->parent
);
122 spin_lock(&clocks_lock
);
124 if ((clk
->usage
++) == 0)
125 (clk
->enable
)(clk
, 1);
127 spin_unlock(&clocks_lock
);
131 void clk_disable(struct clk
*clk
)
133 if (IS_ERR(clk
) || clk
== NULL
)
136 spin_lock(&clocks_lock
);
138 if ((--clk
->usage
) == 0)
139 (clk
->enable
)(clk
, 0);
141 spin_unlock(&clocks_lock
);
142 clk_disable(clk
->parent
);
146 unsigned long clk_get_rate(struct clk
*clk
)
154 if (clk
->get_rate
!= NULL
)
155 return (clk
->get_rate
)(clk
);
157 if (clk
->parent
!= NULL
)
158 return clk_get_rate(clk
->parent
);
163 long clk_round_rate(struct clk
*clk
, unsigned long rate
)
165 if (!IS_ERR(clk
) && clk
->round_rate
)
166 return (clk
->round_rate
)(clk
, rate
);
171 int clk_set_rate(struct clk
*clk
, unsigned long rate
)
178 /* We do not default just do a clk->rate = rate as
179 * the clock may have been made this way by choice.
182 WARN_ON(clk
->set_rate
== NULL
);
184 if (clk
->set_rate
== NULL
)
187 spin_lock(&clocks_lock
);
188 ret
= (clk
->set_rate
)(clk
, rate
);
189 spin_unlock(&clocks_lock
);
194 struct clk
*clk_get_parent(struct clk
*clk
)
199 int clk_set_parent(struct clk
*clk
, struct clk
*parent
)
206 spin_lock(&clocks_lock
);
209 ret
= (clk
->set_parent
)(clk
, parent
);
211 spin_unlock(&clocks_lock
);
216 EXPORT_SYMBOL(clk_get
);
217 EXPORT_SYMBOL(clk_put
);
218 EXPORT_SYMBOL(clk_enable
);
219 EXPORT_SYMBOL(clk_disable
);
220 EXPORT_SYMBOL(clk_get_rate
);
221 EXPORT_SYMBOL(clk_round_rate
);
222 EXPORT_SYMBOL(clk_set_rate
);
223 EXPORT_SYMBOL(clk_get_parent
);
224 EXPORT_SYMBOL(clk_set_parent
);
228 static int clk_default_setrate(struct clk
*clk
, unsigned long rate
)
234 struct clk clk_xtal
= {
242 struct clk clk_mpll
= {
245 .set_rate
= clk_default_setrate
,
248 struct clk clk_upll
= {
261 .set_rate
= clk_default_setrate
,
270 .set_rate
= clk_default_setrate
,
279 .set_rate
= clk_default_setrate
,
282 struct clk clk_usb_bus
= {
291 struct clk s3c24xx_uclk
= {
296 /* initialise the clock system */
298 int s3c24xx_register_clock(struct clk
*clk
)
300 clk
->owner
= THIS_MODULE
;
302 if (clk
->enable
== NULL
)
303 clk
->enable
= clk_null_enable
;
305 /* add to the list of available clocks */
307 spin_lock(&clocks_lock
);
308 list_add(&clk
->list
, &clocks
);
309 spin_unlock(&clocks_lock
);
314 int s3c24xx_register_clocks(struct clk
**clks
, int nr_clks
)
318 for (; nr_clks
> 0; nr_clks
--, clks
++) {
319 if (s3c24xx_register_clock(*clks
) < 0)
326 /* initalise all the clocks */
328 int __init
s3c24xx_register_baseclocks(unsigned long xtal
)
330 printk(KERN_INFO
"S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
332 clk_xtal
.rate
= xtal
;
334 /* register our clocks */
336 if (s3c24xx_register_clock(&clk_xtal
) < 0)
337 printk(KERN_ERR
"failed to register master xtal\n");
339 if (s3c24xx_register_clock(&clk_mpll
) < 0)
340 printk(KERN_ERR
"failed to register mpll clock\n");
342 if (s3c24xx_register_clock(&clk_upll
) < 0)
343 printk(KERN_ERR
"failed to register upll clock\n");
345 if (s3c24xx_register_clock(&clk_f
) < 0)
346 printk(KERN_ERR
"failed to register cpu fclk\n");
348 if (s3c24xx_register_clock(&clk_h
) < 0)
349 printk(KERN_ERR
"failed to register cpu hclk\n");
351 if (s3c24xx_register_clock(&clk_p
) < 0)
352 printk(KERN_ERR
"failed to register cpu pclk\n");