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[SCSI] zfcp: fix device registration issues
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / serial / sunsu.c
blob4e453fa966ae23956a370ffc24dc19a2f241a0fe
1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
34 #ifdef CONFIG_SERIO
35 #include <linux/serio.h>
36 #endif
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/oplib.h>
44 #include <asm/ebus.h>
45 #ifdef CONFIG_SPARC64
46 #include <asm/isa.h>
47 #endif
48
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50 #define SUPPORT_SYSRQ
51 #endif
52
53 #include <linux/serial_core.h>
54
55 #include "suncore.h"
56
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60 #define SU_BASE_BAUD (1846200 / 16)
61
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65 /*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83 };
84
85 struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned short rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98
99 #ifdef CONFIG_SERIO
100 struct serio *serio;
101 int serio_open;
102 #endif
103 };
104
105 #define _INLINE_
106
107 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
108 {
109 offset <<= up->port.regshift;
110
111 switch (up->port.iotype) {
112 case UPIO_HUB6:
113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1);
115
116 case UPIO_MEM:
117 return readb(up->port.membase + offset);
118
119 default:
120 return inb(up->port.iobase + offset);
121 }
122 }
123
124 static _INLINE_ void
125 serial_out(struct uart_sunsu_port *up, int offset, int value)
126 {
127 #ifndef CONFIG_SPARC64
128 /*
129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
131 * gate outputs a logical one. Since we use level triggered interrupts
132 * we have lockup and watchdog reset. We cannot mask IRQ because
133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
134 * This problem is similar to what Alpha people suffer, see serial.c.
135 */
136 if (offset == UART_MCR)
137 value |= UART_MCR_OUT2;
138 #endif
139 offset <<= up->port.regshift;
140
141 switch (up->port.iotype) {
142 case UPIO_HUB6:
143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1);
145 break;
146
147 case UPIO_MEM:
148 writeb(value, up->port.membase + offset);
149 break;
150
151 default:
152 outb(value, up->port.iobase + offset);
153 }
154 }
155
156 /*
157 * We used to support using pause I/O for certain machines. We
158 * haven't supported this for a while, but just in case it's badly
159 * needed for certain old 386 machines, I've left these #define's
160 * in....
161 */
162 #define serial_inp(up, offset) serial_in(up, offset)
163 #define serial_outp(up, offset, value) serial_out(up, offset, value)
164
165
166 /*
167 * For the 16C950
168 */
169 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
170 {
171 serial_out(up, UART_SCR, offset);
172 serial_out(up, UART_ICR, value);
173 }
174
175 #if 0 /* Unused currently */
176 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177 {
178 unsigned int value;
179
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
181 serial_out(up, UART_SCR, offset);
182 value = serial_in(up, UART_ICR);
183 serial_icr_write(up, UART_ACR, up->acr);
184
185 return value;
186 }
187 #endif
188
189 #ifdef CONFIG_SERIAL_8250_RSA
190 /*
191 * Attempts to turn on the RSA FIFO. Returns zero on failure.
192 * We set the port uart clock rate if we succeed.
193 */
194 static int __enable_rsa(struct uart_sunsu_port *up)
195 {
196 unsigned char mode;
197 int result;
198
199 mode = serial_inp(up, UART_RSA_MSR);
200 result = mode & UART_RSA_MSR_FIFO;
201
202 if (!result) {
203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
204 mode = serial_inp(up, UART_RSA_MSR);
205 result = mode & UART_RSA_MSR_FIFO;
206 }
207
208 if (result)
209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
210
211 return result;
212 }
213
214 static void enable_rsa(struct uart_sunsu_port *up)
215 {
216 if (up->port.type == PORT_RSA) {
217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
218 spin_lock_irq(&up->port.lock);
219 __enable_rsa(up);
220 spin_unlock_irq(&up->port.lock);
221 }
222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
223 serial_outp(up, UART_RSA_FRR, 0);
224 }
225 }
226
227 /*
228 * Attempts to turn off the RSA FIFO. Returns zero on failure.
229 * It is unknown why interrupts were disabled in here. However,
230 * the caller is expected to preserve this behaviour by grabbing
231 * the spinlock before calling this function.
232 */
233 static void disable_rsa(struct uart_sunsu_port *up)
234 {
235 unsigned char mode;
236 int result;
237
238 if (up->port.type == PORT_RSA &&
239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
240 spin_lock_irq(&up->port.lock);
241
242 mode = serial_inp(up, UART_RSA_MSR);
243 result = !(mode & UART_RSA_MSR_FIFO);
244
245 if (!result) {
246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
247 mode = serial_inp(up, UART_RSA_MSR);
248 result = !(mode & UART_RSA_MSR_FIFO);
249 }
250
251 if (result)
252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
253 spin_unlock_irq(&up->port.lock);
254 }
255 }
256 #endif /* CONFIG_SERIAL_8250_RSA */
257
258 static inline void __stop_tx(struct uart_sunsu_port *p)
259 {
260 if (p->ier & UART_IER_THRI) {
261 p->ier &= ~UART_IER_THRI;
262 serial_out(p, UART_IER, p->ier);
263 }
264 }
265
266 static void sunsu_stop_tx(struct uart_port *port)
267 {
268 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
269
270 __stop_tx(up);
271
272 /*
273 * We really want to stop the transmitter from sending.
274 */
275 if (up->port.type == PORT_16C950) {
276 up->acr |= UART_ACR_TXDIS;
277 serial_icr_write(up, UART_ACR, up->acr);
278 }
279 }
280
281 static void sunsu_start_tx(struct uart_port *port)
282 {
283 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
284
285 if (!(up->ier & UART_IER_THRI)) {
286 up->ier |= UART_IER_THRI;
287 serial_out(up, UART_IER, up->ier);
288 }
289
290 /*
291 * Re-enable the transmitter if we disabled it.
292 */
293 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
294 up->acr &= ~UART_ACR_TXDIS;
295 serial_icr_write(up, UART_ACR, up->acr);
296 }
297 }
298
299 static void sunsu_stop_rx(struct uart_port *port)
300 {
301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
302
303 up->ier &= ~UART_IER_RLSI;
304 up->port.read_status_mask &= ~UART_LSR_DR;
305 serial_out(up, UART_IER, up->ier);
306 }
307
308 static void sunsu_enable_ms(struct uart_port *port)
309 {
310 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
311 unsigned long flags;
312
313 spin_lock_irqsave(&up->port.lock, flags);
314 up->ier |= UART_IER_MSI;
315 serial_out(up, UART_IER, up->ier);
316 spin_unlock_irqrestore(&up->port.lock, flags);
317 }
318
319 static _INLINE_ struct tty_struct *
320 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
321 {
322 struct tty_struct *tty = up->port.info->tty;
323 unsigned char ch, flag;
324 int max_count = 256;
325 int saw_console_brk = 0;
326
327 do {
328 ch = serial_inp(up, UART_RX);
329 flag = TTY_NORMAL;
330 up->port.icount.rx++;
331
332 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333 UART_LSR_FE | UART_LSR_OE))) {
334 /*
335 * For statistics only
336 */
337 if (*status & UART_LSR_BI) {
338 *status &= ~(UART_LSR_FE | UART_LSR_PE);
339 up->port.icount.brk++;
340 if (up->port.cons != NULL &&
341 up->port.line == up->port.cons->index)
342 saw_console_brk = 1;
343 /*
344 * We do the SysRQ and SAK checking
345 * here because otherwise the break
346 * may get masked by ignore_status_mask
347 * or read_status_mask.
348 */
349 if (uart_handle_break(&up->port))
350 goto ignore_char;
351 } else if (*status & UART_LSR_PE)
352 up->port.icount.parity++;
353 else if (*status & UART_LSR_FE)
354 up->port.icount.frame++;
355 if (*status & UART_LSR_OE)
356 up->port.icount.overrun++;
357
358 /*
359 * Mask off conditions which should be ingored.
360 */
361 *status &= up->port.read_status_mask;
362
363 if (up->port.cons != NULL &&
364 up->port.line == up->port.cons->index) {
365 /* Recover the break flag from console xmit */
366 *status |= up->lsr_break_flag;
367 up->lsr_break_flag = 0;
368 }
369
370 if (*status & UART_LSR_BI) {
371 flag = TTY_BREAK;
372 } else if (*status & UART_LSR_PE)
373 flag = TTY_PARITY;
374 else if (*status & UART_LSR_FE)
375 flag = TTY_FRAME;
376 }
377 if (uart_handle_sysrq_char(&up->port, ch, regs))
378 goto ignore_char;
379 if ((*status & up->port.ignore_status_mask) == 0)
380 tty_insert_flip_char(tty, ch, flag);
381 if (*status & UART_LSR_OE)
382 /*
383 * Overrun is special, since it's reported
384 * immediately, and doesn't affect the current
385 * character.
386 */
387 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
388 ignore_char:
389 *status = serial_inp(up, UART_LSR);
390 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
391
392 if (saw_console_brk)
393 sun_do_break();
394
395 return tty;
396 }
397
398 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
399 {
400 struct circ_buf *xmit = &up->port.info->xmit;
401 int count;
402
403 if (up->port.x_char) {
404 serial_outp(up, UART_TX, up->port.x_char);
405 up->port.icount.tx++;
406 up->port.x_char = 0;
407 return;
408 }
409 if (uart_tx_stopped(&up->port)) {
410 sunsu_stop_tx(&up->port);
411 return;
412 }
413 if (uart_circ_empty(xmit)) {
414 __stop_tx(up);
415 return;
416 }
417
418 count = up->port.fifosize;
419 do {
420 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
421 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
422 up->port.icount.tx++;
423 if (uart_circ_empty(xmit))
424 break;
425 } while (--count > 0);
426
427 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
428 uart_write_wakeup(&up->port);
429
430 if (uart_circ_empty(xmit))
431 __stop_tx(up);
432 }
433
434 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
435 {
436 int status;
437
438 status = serial_in(up, UART_MSR);
439
440 if ((status & UART_MSR_ANY_DELTA) == 0)
441 return;
442
443 if (status & UART_MSR_TERI)
444 up->port.icount.rng++;
445 if (status & UART_MSR_DDSR)
446 up->port.icount.dsr++;
447 if (status & UART_MSR_DDCD)
448 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
449 if (status & UART_MSR_DCTS)
450 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
451
452 wake_up_interruptible(&up->port.info->delta_msr_wait);
453 }
454
455 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
456 {
457 struct uart_sunsu_port *up = dev_id;
458 unsigned long flags;
459 unsigned char status;
460
461 spin_lock_irqsave(&up->port.lock, flags);
462
463 do {
464 struct tty_struct *tty;
465
466 status = serial_inp(up, UART_LSR);
467 tty = NULL;
468 if (status & UART_LSR_DR)
469 tty = receive_chars(up, &status, regs);
470 check_modem_status(up);
471 if (status & UART_LSR_THRE)
472 transmit_chars(up);
473
474 spin_unlock_irqrestore(&up->port.lock, flags);
475
476 if (tty)
477 tty_flip_buffer_push(tty);
478
479 spin_lock_irqsave(&up->port.lock, flags);
480
481 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
482
483 spin_unlock_irqrestore(&up->port.lock, flags);
484
485 return IRQ_HANDLED;
486 }
487
488 /* Separate interrupt handling path for keyboard/mouse ports. */
489
490 static void
491 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
492 unsigned int iflag, unsigned int quot);
493
494 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
495 {
496 unsigned int cur_cflag = up->cflag;
497 int quot, new_baud;
498
499 up->cflag &= ~CBAUD;
500 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
501
502 quot = up->port.uartclk / (16 * new_baud);
503
504 sunsu_change_speed(&up->port, up->cflag, 0, quot);
505 }
506
507 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
508 {
509 do {
510 unsigned char ch = serial_inp(up, UART_RX);
511
512 /* Stop-A is handled by drivers/char/keyboard.c now. */
513 if (up->su_type == SU_PORT_KBD) {
514 #ifdef CONFIG_SERIO
515 serio_interrupt(up->serio, ch, 0, regs);
516 #endif
517 } else if (up->su_type == SU_PORT_MS) {
518 int ret = suncore_mouse_baud_detection(ch, is_break);
519
520 switch (ret) {
521 case 2:
522 sunsu_change_mouse_baud(up);
523 /* fallthru */
524 case 1:
525 break;
526
527 case 0:
528 #ifdef CONFIG_SERIO
529 serio_interrupt(up->serio, ch, 0, regs);
530 #endif
531 break;
532 };
533 }
534 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
535 }
536
537 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
538 {
539 struct uart_sunsu_port *up = dev_id;
540
541 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
542 unsigned char status = serial_inp(up, UART_LSR);
543
544 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
545 receive_kbd_ms_chars(up, regs,
546 (status & UART_LSR_BI) != 0);
547 }
548
549 return IRQ_HANDLED;
550 }
551
552 static unsigned int sunsu_tx_empty(struct uart_port *port)
553 {
554 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
555 unsigned long flags;
556 unsigned int ret;
557
558 spin_lock_irqsave(&up->port.lock, flags);
559 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
560 spin_unlock_irqrestore(&up->port.lock, flags);
561
562 return ret;
563 }
564
565 static unsigned int sunsu_get_mctrl(struct uart_port *port)
566 {
567 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
568 unsigned char status;
569 unsigned int ret;
570
571 status = serial_in(up, UART_MSR);
572
573 ret = 0;
574 if (status & UART_MSR_DCD)
575 ret |= TIOCM_CAR;
576 if (status & UART_MSR_RI)
577 ret |= TIOCM_RNG;
578 if (status & UART_MSR_DSR)
579 ret |= TIOCM_DSR;
580 if (status & UART_MSR_CTS)
581 ret |= TIOCM_CTS;
582 return ret;
583 }
584
585 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
586 {
587 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
588 unsigned char mcr = 0;
589
590 if (mctrl & TIOCM_RTS)
591 mcr |= UART_MCR_RTS;
592 if (mctrl & TIOCM_DTR)
593 mcr |= UART_MCR_DTR;
594 if (mctrl & TIOCM_OUT1)
595 mcr |= UART_MCR_OUT1;
596 if (mctrl & TIOCM_OUT2)
597 mcr |= UART_MCR_OUT2;
598 if (mctrl & TIOCM_LOOP)
599 mcr |= UART_MCR_LOOP;
600
601 serial_out(up, UART_MCR, mcr);
602 }
603
604 static void sunsu_break_ctl(struct uart_port *port, int break_state)
605 {
606 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
607 unsigned long flags;
608
609 spin_lock_irqsave(&up->port.lock, flags);
610 if (break_state == -1)
611 up->lcr |= UART_LCR_SBC;
612 else
613 up->lcr &= ~UART_LCR_SBC;
614 serial_out(up, UART_LCR, up->lcr);
615 spin_unlock_irqrestore(&up->port.lock, flags);
616 }
617
618 static int sunsu_startup(struct uart_port *port)
619 {
620 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
621 unsigned long flags;
622 int retval;
623
624 if (up->port.type == PORT_16C950) {
625 /* Wake up and initialize UART */
626 up->acr = 0;
627 serial_outp(up, UART_LCR, 0xBF);
628 serial_outp(up, UART_EFR, UART_EFR_ECB);
629 serial_outp(up, UART_IER, 0);
630 serial_outp(up, UART_LCR, 0);
631 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
632 serial_outp(up, UART_LCR, 0xBF);
633 serial_outp(up, UART_EFR, UART_EFR_ECB);
634 serial_outp(up, UART_LCR, 0);
635 }
636
637 #ifdef CONFIG_SERIAL_8250_RSA
638 /*
639 * If this is an RSA port, see if we can kick it up to the
640 * higher speed clock.
641 */
642 enable_rsa(up);
643 #endif
644
645 /*
646 * Clear the FIFO buffers and disable them.
647 * (they will be reeanbled in set_termios())
648 */
649 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
650 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
651 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
652 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
653 serial_outp(up, UART_FCR, 0);
654 }
655
656 /*
657 * Clear the interrupt registers.
658 */
659 (void) serial_inp(up, UART_LSR);
660 (void) serial_inp(up, UART_RX);
661 (void) serial_inp(up, UART_IIR);
662 (void) serial_inp(up, UART_MSR);
663
664 /*
665 * At this point, there's no way the LSR could still be 0xff;
666 * if it is, then bail out, because there's likely no UART
667 * here.
668 */
669 if (!(up->port.flags & UPF_BUGGY_UART) &&
670 (serial_inp(up, UART_LSR) == 0xff)) {
671 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
672 return -ENODEV;
673 }
674
675 if (up->su_type != SU_PORT_PORT) {
676 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
677 SA_SHIRQ, su_typev[up->su_type], up);
678 } else {
679 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
680 SA_SHIRQ, su_typev[up->su_type], up);
681 }
682 if (retval) {
683 printk("su: Cannot register IRQ %d\n", up->port.irq);
684 return retval;
685 }
686
687 /*
688 * Now, initialize the UART
689 */
690 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
691
692 spin_lock_irqsave(&up->port.lock, flags);
693
694 up->port.mctrl |= TIOCM_OUT2;
695
696 sunsu_set_mctrl(&up->port, up->port.mctrl);
697 spin_unlock_irqrestore(&up->port.lock, flags);
698
699 /*
700 * Finally, enable interrupts. Note: Modem status interrupts
701 * are set via set_termios(), which will be occurring imminently
702 * anyway, so we don't enable them here.
703 */
704 up->ier = UART_IER_RLSI | UART_IER_RDI;
705 serial_outp(up, UART_IER, up->ier);
706
707 if (up->port.flags & UPF_FOURPORT) {
708 unsigned int icp;
709 /*
710 * Enable interrupts on the AST Fourport board
711 */
712 icp = (up->port.iobase & 0xfe0) | 0x01f;
713 outb_p(0x80, icp);
714 (void) inb_p(icp);
715 }
716
717 /*
718 * And clear the interrupt registers again for luck.
719 */
720 (void) serial_inp(up, UART_LSR);
721 (void) serial_inp(up, UART_RX);
722 (void) serial_inp(up, UART_IIR);
723 (void) serial_inp(up, UART_MSR);
724
725 return 0;
726 }
727
728 static void sunsu_shutdown(struct uart_port *port)
729 {
730 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
731 unsigned long flags;
732
733 /*
734 * Disable interrupts from this port
735 */
736 up->ier = 0;
737 serial_outp(up, UART_IER, 0);
738
739 spin_lock_irqsave(&up->port.lock, flags);
740 if (up->port.flags & UPF_FOURPORT) {
741 /* reset interrupts on the AST Fourport board */
742 inb((up->port.iobase & 0xfe0) | 0x1f);
743 up->port.mctrl |= TIOCM_OUT1;
744 } else
745 up->port.mctrl &= ~TIOCM_OUT2;
746
747 sunsu_set_mctrl(&up->port, up->port.mctrl);
748 spin_unlock_irqrestore(&up->port.lock, flags);
749
750 /*
751 * Disable break condition and FIFOs
752 */
753 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
754 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
755 UART_FCR_CLEAR_RCVR |
756 UART_FCR_CLEAR_XMIT);
757 serial_outp(up, UART_FCR, 0);
758
759 #ifdef CONFIG_SERIAL_8250_RSA
760 /*
761 * Reset the RSA board back to 115kbps compat mode.
762 */
763 disable_rsa(up);
764 #endif
765
766 /*
767 * Read data port to reset things.
768 */
769 (void) serial_in(up, UART_RX);
770
771 free_irq(up->port.irq, up);
772 }
773
774 static void
775 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
776 unsigned int iflag, unsigned int quot)
777 {
778 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
779 unsigned char cval, fcr = 0;
780 unsigned long flags;
781
782 switch (cflag & CSIZE) {
783 case CS5:
784 cval = 0x00;
785 break;
786 case CS6:
787 cval = 0x01;
788 break;
789 case CS7:
790 cval = 0x02;
791 break;
792 default:
793 case CS8:
794 cval = 0x03;
795 break;
796 }
797
798 if (cflag & CSTOPB)
799 cval |= 0x04;
800 if (cflag & PARENB)
801 cval |= UART_LCR_PARITY;
802 if (!(cflag & PARODD))
803 cval |= UART_LCR_EPAR;
804 #ifdef CMSPAR
805 if (cflag & CMSPAR)
806 cval |= UART_LCR_SPAR;
807 #endif
808
809 /*
810 * Work around a bug in the Oxford Semiconductor 952 rev B
811 * chip which causes it to seriously miscalculate baud rates
812 * when DLL is 0.
813 */
814 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
815 up->rev == 0x5201)
816 quot ++;
817
818 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
819 if ((up->port.uartclk / quot) < (2400 * 16))
820 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
821 #ifdef CONFIG_SERIAL_8250_RSA
822 else if (up->port.type == PORT_RSA)
823 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
824 #endif
825 else
826 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
827 }
828 if (up->port.type == PORT_16750)
829 fcr |= UART_FCR7_64BYTE;
830
831 /*
832 * Ok, we're now changing the port state. Do it with
833 * interrupts disabled.
834 */
835 spin_lock_irqsave(&up->port.lock, flags);
836
837 /*
838 * Update the per-port timeout.
839 */
840 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
841
842 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
843 if (iflag & INPCK)
844 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
845 if (iflag & (BRKINT | PARMRK))
846 up->port.read_status_mask |= UART_LSR_BI;
847
848 /*
849 * Characteres to ignore
850 */
851 up->port.ignore_status_mask = 0;
852 if (iflag & IGNPAR)
853 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
854 if (iflag & IGNBRK) {
855 up->port.ignore_status_mask |= UART_LSR_BI;
856 /*
857 * If we're ignoring parity and break indicators,
858 * ignore overruns too (for real raw support).
859 */
860 if (iflag & IGNPAR)
861 up->port.ignore_status_mask |= UART_LSR_OE;
862 }
863
864 /*
865 * ignore all characters if CREAD is not set
866 */
867 if ((cflag & CREAD) == 0)
868 up->port.ignore_status_mask |= UART_LSR_DR;
869
870 /*
871 * CTS flow control flag and modem status interrupts
872 */
873 up->ier &= ~UART_IER_MSI;
874 if (UART_ENABLE_MS(&up->port, cflag))
875 up->ier |= UART_IER_MSI;
876
877 serial_out(up, UART_IER, up->ier);
878
879 if (uart_config[up->port.type].flags & UART_STARTECH) {
880 serial_outp(up, UART_LCR, 0xBF);
881 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
882 }
883 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
884 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
885 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
886 if (up->port.type == PORT_16750)
887 serial_outp(up, UART_FCR, fcr); /* set fcr */
888 serial_outp(up, UART_LCR, cval); /* reset DLAB */
889 up->lcr = cval; /* Save LCR */
890 if (up->port.type != PORT_16750) {
891 if (fcr & UART_FCR_ENABLE_FIFO) {
892 /* emulated UARTs (Lucent Venus 167x) need two steps */
893 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
894 }
895 serial_outp(up, UART_FCR, fcr); /* set fcr */
896 }
897
898 up->cflag = cflag;
899
900 spin_unlock_irqrestore(&up->port.lock, flags);
901 }
902
903 static void
904 sunsu_set_termios(struct uart_port *port, struct termios *termios,
905 struct termios *old)
906 {
907 unsigned int baud, quot;
908
909 /*
910 * Ask the core to calculate the divisor for us.
911 */
912 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
913 quot = uart_get_divisor(port, baud);
914
915 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
916 }
917
918 static void sunsu_release_port(struct uart_port *port)
919 {
920 }
921
922 static int sunsu_request_port(struct uart_port *port)
923 {
924 return 0;
925 }
926
927 static void sunsu_config_port(struct uart_port *port, int flags)
928 {
929 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
930
931 if (flags & UART_CONFIG_TYPE) {
932 /*
933 * We are supposed to call autoconfig here, but this requires
934 * splitting all the OBP probing crap from the UART probing.
935 * We'll do it when we kill sunsu.c altogether.
936 */
937 port->type = up->type_probed; /* XXX */
938 }
939 }
940
941 static int
942 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
943 {
944 return -EINVAL;
945 }
946
947 static const char *
948 sunsu_type(struct uart_port *port)
949 {
950 int type = port->type;
951
952 if (type >= ARRAY_SIZE(uart_config))
953 type = 0;
954 return uart_config[type].name;
955 }
956
957 static struct uart_ops sunsu_pops = {
958 .tx_empty = sunsu_tx_empty,
959 .set_mctrl = sunsu_set_mctrl,
960 .get_mctrl = sunsu_get_mctrl,
961 .stop_tx = sunsu_stop_tx,
962 .start_tx = sunsu_start_tx,
963 .stop_rx = sunsu_stop_rx,
964 .enable_ms = sunsu_enable_ms,
965 .break_ctl = sunsu_break_ctl,
966 .startup = sunsu_startup,
967 .shutdown = sunsu_shutdown,
968 .set_termios = sunsu_set_termios,
969 .type = sunsu_type,
970 .release_port = sunsu_release_port,
971 .request_port = sunsu_request_port,
972 .config_port = sunsu_config_port,
973 .verify_port = sunsu_verify_port,
974 };
975
976 #define UART_NR 4
977
978 static struct uart_sunsu_port sunsu_ports[UART_NR];
979
980 #ifdef CONFIG_SERIO
981
982 static DEFINE_SPINLOCK(sunsu_serio_lock);
983
984 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
985 {
986 struct uart_sunsu_port *up = serio->port_data;
987 unsigned long flags;
988 int lsr;
989
990 spin_lock_irqsave(&sunsu_serio_lock, flags);
991
992 do {
993 lsr = serial_in(up, UART_LSR);
994 } while (!(lsr & UART_LSR_THRE));
995
996 /* Send the character out. */
997 serial_out(up, UART_TX, ch);
998
999 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1000
1001 return 0;
1002 }
1003
1004 static int sunsu_serio_open(struct serio *serio)
1005 {
1006 struct uart_sunsu_port *up = serio->port_data;
1007 unsigned long flags;
1008 int ret;
1009
1010 spin_lock_irqsave(&sunsu_serio_lock, flags);
1011 if (!up->serio_open) {
1012 up->serio_open = 1;
1013 ret = 0;
1014 } else
1015 ret = -EBUSY;
1016 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1017
1018 return ret;
1019 }
1020
1021 static void sunsu_serio_close(struct serio *serio)
1022 {
1023 struct uart_sunsu_port *up = serio->port_data;
1024 unsigned long flags;
1025
1026 spin_lock_irqsave(&sunsu_serio_lock, flags);
1027 up->serio_open = 0;
1028 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1029 }
1030
1031 #endif /* CONFIG_SERIO */
1032
1033 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1034 {
1035 unsigned char status1, status2, scratch, scratch2, scratch3;
1036 unsigned char save_lcr, save_mcr;
1037 struct linux_ebus_device *dev = NULL;
1038 struct linux_ebus *ebus;
1039 #ifdef CONFIG_SPARC64
1040 struct sparc_isa_bridge *isa_br;
1041 struct sparc_isa_device *isa_dev;
1042 #endif
1043 #ifndef CONFIG_SPARC64
1044 struct linux_prom_registers reg0;
1045 #endif
1046 unsigned long flags;
1047
1048 if (!up->port_node || !up->su_type)
1049 return;
1050
1051 up->type_probed = PORT_UNKNOWN;
1052 up->port.iotype = UPIO_MEM;
1053
1054 /*
1055 * First we look for Ebus-bases su's
1056 */
1057 for_each_ebus(ebus) {
1058 for_each_ebusdev(dev, ebus) {
1059 if (dev->prom_node == up->port_node) {
1060 /*
1061 * The EBus is broken on sparc; it delivers
1062 * virtual addresses in resources. Oh well...
1063 * This is correct on sparc64, though.
1064 */
1065 up->port.membase = (char *) dev->resource[0].start;
1066 /*
1067 * This is correct on both architectures.
1068 */
1069 up->port.mapbase = dev->resource[0].start;
1070 up->port.irq = dev->irqs[0];
1071 goto ebus_done;
1072 }
1073 }
1074 }
1075
1076 #ifdef CONFIG_SPARC64
1077 for_each_isa(isa_br) {
1078 for_each_isadev(isa_dev, isa_br) {
1079 if (isa_dev->prom_node == up->port_node) {
1080 /* Same on sparc64. Cool architecure... */
1081 up->port.membase = (char *) isa_dev->resource.start;
1082 up->port.mapbase = isa_dev->resource.start;
1083 up->port.irq = isa_dev->irq;
1084 goto ebus_done;
1085 }
1086 }
1087 }
1088 #endif
1089
1090 #ifdef CONFIG_SPARC64
1091 /*
1092 * Not on Ebus, bailing.
1093 */
1094 return;
1095 #else
1096 /*
1097 * Not on Ebus, must be OBIO.
1098 */
1099 if (prom_getproperty(up->port_node, "reg",
1100 (char *)&reg0, sizeof(reg0)) == -1) {
1101 prom_printf("sunsu: no \"reg\" property\n");
1102 return;
1103 }
1104 prom_apply_obio_ranges(&reg0, 1);
1105 if (reg0.which_io != 0) { /* Just in case... */
1106 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1107 reg0.which_io, reg0.phys_addr);
1108 return;
1109 }
1110 up->port.mapbase = reg0.phys_addr;
1111 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1112 prom_printf("sunsu: Cannot map registers.\n");
1113 return;
1114 }
1115
1116 /*
1117 * 0x20 is sun4m thing, Dave Redman heritage.
1118 * See arch/sparc/kernel/irq.c.
1119 */
1120 #define IRQ_4M(n) ((n)|0x20)
1121
1122 /*
1123 * There is no intr property on MrCoffee, so hardwire it.
1124 */
1125 up->port.irq = IRQ_4M(13);
1126 #endif
1127
1128 ebus_done:
1129
1130 spin_lock_irqsave(&up->port.lock, flags);
1131
1132 if (!(up->port.flags & UPF_BUGGY_UART)) {
1133 /*
1134 * Do a simple existence test first; if we fail this, there's
1135 * no point trying anything else.
1136 *
1137 * 0x80 is used as a nonsense port to prevent against false
1138 * positives due to ISA bus float. The assumption is that
1139 * 0x80 is a non-existent port; which should be safe since
1140 * include/asm/io.h also makes this assumption.
1141 */
1142 scratch = serial_inp(up, UART_IER);
1143 serial_outp(up, UART_IER, 0);
1144 #ifdef __i386__
1145 outb(0xff, 0x080);
1146 #endif
1147 scratch2 = serial_inp(up, UART_IER);
1148 serial_outp(up, UART_IER, 0x0f);
1149 #ifdef __i386__
1150 outb(0, 0x080);
1151 #endif
1152 scratch3 = serial_inp(up, UART_IER);
1153 serial_outp(up, UART_IER, scratch);
1154 if (scratch2 != 0 || scratch3 != 0x0F)
1155 goto out; /* We failed; there's nothing here */
1156 }
1157
1158 save_mcr = serial_in(up, UART_MCR);
1159 save_lcr = serial_in(up, UART_LCR);
1160
1161 /*
1162 * Check to see if a UART is really there. Certain broken
1163 * internal modems based on the Rockwell chipset fail this
1164 * test, because they apparently don't implement the loopback
1165 * test mode. So this test is skipped on the COM 1 through
1166 * COM 4 ports. This *should* be safe, since no board
1167 * manufacturer would be stupid enough to design a board
1168 * that conflicts with COM 1-4 --- we hope!
1169 */
1170 if (!(up->port.flags & UPF_SKIP_TEST)) {
1171 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1172 status1 = serial_inp(up, UART_MSR) & 0xF0;
1173 serial_outp(up, UART_MCR, save_mcr);
1174 if (status1 != 0x90)
1175 goto out; /* We failed loopback test */
1176 }
1177 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1178 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1179 serial_outp(up, UART_LCR, 0);
1180 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1181 scratch = serial_in(up, UART_IIR) >> 6;
1182 switch (scratch) {
1183 case 0:
1184 up->port.type = PORT_16450;
1185 break;
1186 case 1:
1187 up->port.type = PORT_UNKNOWN;
1188 break;
1189 case 2:
1190 up->port.type = PORT_16550;
1191 break;
1192 case 3:
1193 up->port.type = PORT_16550A;
1194 break;
1195 }
1196 if (up->port.type == PORT_16550A) {
1197 /* Check for Startech UART's */
1198 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1199 if (serial_in(up, UART_EFR) == 0) {
1200 up->port.type = PORT_16650;
1201 } else {
1202 serial_outp(up, UART_LCR, 0xBF);
1203 if (serial_in(up, UART_EFR) == 0)
1204 up->port.type = PORT_16650V2;
1205 }
1206 }
1207 if (up->port.type == PORT_16550A) {
1208 /* Check for TI 16750 */
1209 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1210 serial_outp(up, UART_FCR,
1211 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1212 scratch = serial_in(up, UART_IIR) >> 5;
1213 if (scratch == 7) {
1214 /*
1215 * If this is a 16750, and not a cheap UART
1216 * clone, then it should only go into 64 byte
1217 * mode if the UART_FCR7_64BYTE bit was set
1218 * while UART_LCR_DLAB was latched.
1219 */
1220 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1221 serial_outp(up, UART_LCR, 0);
1222 serial_outp(up, UART_FCR,
1223 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1224 scratch = serial_in(up, UART_IIR) >> 5;
1225 if (scratch == 6)
1226 up->port.type = PORT_16750;
1227 }
1228 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1229 }
1230 serial_outp(up, UART_LCR, save_lcr);
1231 if (up->port.type == PORT_16450) {
1232 scratch = serial_in(up, UART_SCR);
1233 serial_outp(up, UART_SCR, 0xa5);
1234 status1 = serial_in(up, UART_SCR);
1235 serial_outp(up, UART_SCR, 0x5a);
1236 status2 = serial_in(up, UART_SCR);
1237 serial_outp(up, UART_SCR, scratch);
1238
1239 if ((status1 != 0xa5) || (status2 != 0x5a))
1240 up->port.type = PORT_8250;
1241 }
1242
1243 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1244
1245 if (up->port.type == PORT_UNKNOWN)
1246 goto out;
1247 up->type_probed = up->port.type; /* XXX */
1248
1249 /*
1250 * Reset the UART.
1251 */
1252 #ifdef CONFIG_SERIAL_8250_RSA
1253 if (up->port.type == PORT_RSA)
1254 serial_outp(up, UART_RSA_FRR, 0);
1255 #endif
1256 serial_outp(up, UART_MCR, save_mcr);
1257 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1258 UART_FCR_CLEAR_RCVR |
1259 UART_FCR_CLEAR_XMIT));
1260 serial_outp(up, UART_FCR, 0);
1261 (void)serial_in(up, UART_RX);
1262 serial_outp(up, UART_IER, 0);
1263
1264 out:
1265 spin_unlock_irqrestore(&up->port.lock, flags);
1266 }
1267
1268 static struct uart_driver sunsu_reg = {
1269 .owner = THIS_MODULE,
1270 .driver_name = "serial",
1271 .devfs_name = "tts/",
1272 .dev_name = "ttyS",
1273 .major = TTY_MAJOR,
1274 };
1275
1276 static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1277 {
1278 int quot, baud;
1279 #ifdef CONFIG_SERIO
1280 struct serio *serio;
1281 #endif
1282
1283 up->port.line = channel;
1284 up->port.type = PORT_UNKNOWN;
1285 up->port.uartclk = (SU_BASE_BAUD * 16);
1286
1287 if (up->su_type == SU_PORT_KBD) {
1288 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1289 baud = 1200;
1290 } else {
1291 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1292 baud = 4800;
1293 }
1294 quot = up->port.uartclk / (16 * baud);
1295
1296 sunsu_autoconfig(up);
1297 if (up->port.type == PORT_UNKNOWN)
1298 return -1;
1299
1300 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1301 channel,
1302 up->port.membase, __irq_itoa(up->port.irq),
1303 sunsu_type(&up->port));
1304
1305 #ifdef CONFIG_SERIO
1306 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1307 if (serio) {
1308 memset(serio, 0, sizeof(*serio));
1309
1310 serio->port_data = up;
1311
1312 serio->id.type = SERIO_RS232;
1313 if (up->su_type == SU_PORT_KBD) {
1314 serio->id.proto = SERIO_SUNKBD;
1315 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1316 } else {
1317 serio->id.proto = SERIO_SUN;
1318 serio->id.extra = 1;
1319 strlcpy(serio->name, "sums", sizeof(serio->name));
1320 }
1321 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1322 sizeof(serio->phys));
1323
1324 serio->write = sunsu_serio_write;
1325 serio->open = sunsu_serio_open;
1326 serio->close = sunsu_serio_close;
1327
1328 serio_register_port(serio);
1329 } else {
1330 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1331 channel);
1332 }
1333 #endif
1334
1335 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1336
1337 sunsu_startup(&up->port);
1338 return 0;
1339 }
1340
1341 /*
1342 * ------------------------------------------------------------
1343 * Serial console driver
1344 * ------------------------------------------------------------
1345 */
1346
1347 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1348
1349 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1350
1351 /*
1352 * Wait for transmitter & holding register to empty
1353 */
1354 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1355 {
1356 unsigned int status, tmout = 10000;
1357
1358 /* Wait up to 10ms for the character(s) to be sent. */
1359 do {
1360 status = serial_in(up, UART_LSR);
1361
1362 if (status & UART_LSR_BI)
1363 up->lsr_break_flag = UART_LSR_BI;
1364
1365 if (--tmout == 0)
1366 break;
1367 udelay(1);
1368 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1369
1370 /* Wait up to 1s for flow control if necessary */
1371 if (up->port.flags & UPF_CONS_FLOW) {
1372 tmout = 1000000;
1373 while (--tmout &&
1374 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1375 udelay(1);
1376 }
1377 }
1378
1379 /*
1380 * Print a string to the serial port trying not to disturb
1381 * any possible real use of the port...
1382 */
1383 static void sunsu_console_write(struct console *co, const char *s,
1384 unsigned int count)
1385 {
1386 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1387 unsigned int ier;
1388 int i;
1389
1390 /*
1391 * First save the UER then disable the interrupts
1392 */
1393 ier = serial_in(up, UART_IER);
1394 serial_out(up, UART_IER, 0);
1395
1396 /*
1397 * Now, do each character
1398 */
1399 for (i = 0; i < count; i++, s++) {
1400 wait_for_xmitr(up);
1401
1402 /*
1403 * Send the character out.
1404 * If a LF, also do CR...
1405 */
1406 serial_out(up, UART_TX, *s);
1407 if (*s == 10) {
1408 wait_for_xmitr(up);
1409 serial_out(up, UART_TX, 13);
1410 }
1411 }
1412
1413 /*
1414 * Finally, wait for transmitter to become empty
1415 * and restore the IER
1416 */
1417 wait_for_xmitr(up);
1418 serial_out(up, UART_IER, ier);
1419 }
1420
1421 /*
1422 * Setup initial baud/bits/parity. We do two things here:
1423 * - construct a cflag setting for the first su_open()
1424 * - initialize the serial port
1425 * Return non-zero if we didn't find a serial port.
1426 */
1427 static int sunsu_console_setup(struct console *co, char *options)
1428 {
1429 struct uart_port *port;
1430 int baud = 9600;
1431 int bits = 8;
1432 int parity = 'n';
1433 int flow = 'n';
1434
1435 printk("Console: ttyS%d (SU)\n",
1436 (sunsu_reg.minor - 64) + co->index);
1437
1438 /*
1439 * Check whether an invalid uart number has been specified, and
1440 * if so, search for the first available port that does have
1441 * console support.
1442 */
1443 if (co->index >= UART_NR)
1444 co->index = 0;
1445 port = &sunsu_ports[co->index].port;
1446
1447 /*
1448 * Temporary fix.
1449 */
1450 spin_lock_init(&port->lock);
1451
1452 if (options)
1453 uart_parse_options(options, &baud, &parity, &bits, &flow);
1454
1455 return uart_set_options(port, co, baud, parity, bits, flow);
1456 }
1457
1458 static struct console sunsu_cons = {
1459 .name = "ttyS",
1460 .write = sunsu_console_write,
1461 .device = uart_console_device,
1462 .setup = sunsu_console_setup,
1463 .flags = CON_PRINTBUFFER,
1464 .index = -1,
1465 .data = &sunsu_reg,
1466 };
1467 #define SUNSU_CONSOLE (&sunsu_cons)
1468
1469 /*
1470 * Register console.
1471 */
1472
1473 static int __init sunsu_serial_console_init(void)
1474 {
1475 int i;
1476
1477 if (con_is_present())
1478 return 0;
1479
1480 for (i = 0; i < UART_NR; i++) {
1481 int this_minor = sunsu_reg.minor + i;
1482
1483 if ((this_minor - 64) == (serial_console - 1))
1484 break;
1485 }
1486 if (i == UART_NR)
1487 return 0;
1488 if (sunsu_ports[i].port_node == 0)
1489 return 0;
1490
1491 sunsu_cons.index = i;
1492 register_console(&sunsu_cons);
1493 return 0;
1494 }
1495 #else
1496 #define SUNSU_CONSOLE (NULL)
1497 #define sunsu_serial_console_init() do { } while (0)
1498 #endif
1499
1500 static int __init sunsu_serial_init(void)
1501 {
1502 int instance, ret, i;
1503
1504 /* How many instances do we need? */
1505 instance = 0;
1506 for (i = 0; i < UART_NR; i++) {
1507 struct uart_sunsu_port *up = &sunsu_ports[i];
1508
1509 if (up->su_type == SU_PORT_MS ||
1510 up->su_type == SU_PORT_KBD)
1511 continue;
1512
1513 up->port.flags |= UPF_BOOT_AUTOCONF;
1514 up->port.type = PORT_UNKNOWN;
1515 up->port.uartclk = (SU_BASE_BAUD * 16);
1516
1517 sunsu_autoconfig(up);
1518 if (up->port.type == PORT_UNKNOWN)
1519 continue;
1520
1521 up->port.line = instance++;
1522 up->port.ops = &sunsu_pops;
1523 }
1524
1525 sunsu_reg.minor = sunserial_current_minor;
1526 sunserial_current_minor += instance;
1527
1528 sunsu_reg.nr = instance;
1529 sunsu_reg.cons = SUNSU_CONSOLE;
1530
1531 ret = uart_register_driver(&sunsu_reg);
1532 if (ret < 0)
1533 return ret;
1534
1535 sunsu_serial_console_init();
1536 for (i = 0; i < UART_NR; i++) {
1537 struct uart_sunsu_port *up = &sunsu_ports[i];
1538
1539 /* Do not register Keyboard/Mouse lines with UART
1540 * layer.
1541 */
1542 if (up->su_type == SU_PORT_MS ||
1543 up->su_type == SU_PORT_KBD)
1544 continue;
1545
1546 if (up->port.type == PORT_UNKNOWN)
1547 continue;
1548
1549 uart_add_one_port(&sunsu_reg, &up->port);
1550 }
1551
1552 return 0;
1553 }
1554
1555 static int su_node_ok(int node, char *name, int namelen)
1556 {
1557 if (strncmp(name, "su", namelen) == 0 ||
1558 strncmp(name, "su_pnp", namelen) == 0)
1559 return 1;
1560
1561 if (strncmp(name, "serial", namelen) == 0) {
1562 char compat[32];
1563 int clen;
1564
1565 /* Is it _really_ a 'su' device? */
1566 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1567 if (clen > 0) {
1568 if (strncmp(compat, "sab82532", 8) == 0) {
1569 /* Nope, Siemens serial, not for us. */
1570 return 0;
1571 }
1572 }
1573 return 1;
1574 }
1575
1576 return 0;
1577 }
1578
1579 #define SU_PROPSIZE 128
1580
1581 /*
1582 * Scan status structure.
1583 * "prop" is a local variable but it eats stack to keep it in each
1584 * stack frame of a recursive procedure.
1585 */
1586 struct su_probe_scan {
1587 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1588 int msx, kbx; /* minors for mouse and keyboard */
1589 int devices; /* scan index */
1590 char prop[SU_PROPSIZE];
1591 };
1592
1593 /*
1594 * We have several platforms which present 'su' in different parts
1595 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1596 * We walk over the tree and find them wherever PROM hides them.
1597 */
1598 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1599 {
1600 struct uart_sunsu_port *up;
1601 int len;
1602
1603 if (t->devices >= UART_NR)
1604 return;
1605
1606 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1607 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1608 if (len <= 1)
1609 continue; /* Broken PROM node */
1610
1611 if (su_node_ok(sunode, t->prop, len)) {
1612 up = &sunsu_ports[t->devices];
1613 if (t->kbnode != 0 && sunode == t->kbnode) {
1614 t->kbx = t->devices;
1615 up->su_type = SU_PORT_KBD;
1616 } else if (t->msnode != 0 && sunode == t->msnode) {
1617 t->msx = t->devices;
1618 up->su_type = SU_PORT_MS;
1619 } else {
1620 #ifdef CONFIG_SPARC64
1621 /*
1622 * Do not attempt to use the truncated
1623 * keyboard/mouse ports as serial ports
1624 * on Ultras with PC keyboard attached.
1625 */
1626 if (prom_getbool(sunode, "mouse"))
1627 continue;
1628 if (prom_getbool(sunode, "keyboard"))
1629 continue;
1630 #endif
1631 up->su_type = SU_PORT_PORT;
1632 }
1633 up->port_node = sunode;
1634 ++t->devices;
1635 } else {
1636 su_probe_any(t, prom_getchild(sunode));
1637 }
1638 }
1639 }
1640
1641 static int __init sunsu_probe(void)
1642 {
1643 int node;
1644 int len;
1645 struct su_probe_scan scan;
1646
1647 /*
1648 * First, we scan the tree.
1649 */
1650 scan.devices = 0;
1651 scan.msx = -1;
1652 scan.kbx = -1;
1653 scan.kbnode = 0;
1654 scan.msnode = 0;
1655
1656 /*
1657 * Get the nodes for keyboard and mouse from 'aliases'...
1658 */
1659 node = prom_getchild(prom_root_node);
1660 node = prom_searchsiblings(node, "aliases");
1661 if (node != 0) {
1662 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1663 if (len > 0) {
1664 scan.prop[len] = 0;
1665 scan.kbnode = prom_finddevice(scan.prop);
1666 }
1667
1668 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1669 if (len > 0) {
1670 scan.prop[len] = 0;
1671 scan.msnode = prom_finddevice(scan.prop);
1672 }
1673 }
1674
1675 su_probe_any(&scan, prom_getchild(prom_root_node));
1676
1677 /*
1678 * Second, we process the special case of keyboard and mouse.
1679 *
1680 * Currently if we got keyboard and mouse hooked to "su" ports
1681 * we do not use any possible remaining "su" as a serial port.
1682 * Thus, we ignore values of .msx and .kbx, then compact ports.
1683 */
1684 if (scan.msx != -1 && scan.kbx != -1) {
1685 sunsu_ports[0].su_type = SU_PORT_MS;
1686 sunsu_ports[0].port_node = scan.msnode;
1687 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1688
1689 sunsu_ports[1].su_type = SU_PORT_KBD;
1690 sunsu_ports[1].port_node = scan.kbnode;
1691 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1692
1693 return 0;
1694 }
1695
1696 if (scan.msx != -1 || scan.kbx != -1) {
1697 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1698 return -ENODEV;
1699 }
1700
1701 if (scan.devices == 0)
1702 return -ENODEV;
1703
1704 /*
1705 * Console must be initiated after the generic initialization.
1706 */
1707 sunsu_serial_init();
1708
1709 return 0;
1710 }
1711
1712 static void __exit sunsu_exit(void)
1713 {
1714 int i, saw_uart;
1715
1716 saw_uart = 0;
1717 for (i = 0; i < UART_NR; i++) {
1718 struct uart_sunsu_port *up = &sunsu_ports[i];
1719
1720 if (up->su_type == SU_PORT_MS ||
1721 up->su_type == SU_PORT_KBD) {
1722 #ifdef CONFIG_SERIO
1723 if (up->serio) {
1724 serio_unregister_port(up->serio);
1725 up->serio = NULL;
1726 }
1727 #endif
1728 } else if (up->port.type != PORT_UNKNOWN) {
1729 uart_remove_one_port(&sunsu_reg, &up->port);
1730 saw_uart++;
1731 }
1732 }
1733
1734 if (saw_uart)
1735 uart_unregister_driver(&sunsu_reg);
1736 }
1737
1738 module_init(sunsu_probe);
1739 module_exit(sunsu_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree