2 * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c
4 * The NEC CMB-VR4133 Board specific PCI fixups.
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
14 * Modified for support in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
18 #include <linux/config.h>
19 #include <linux/init.h>
20 #include <linux/pci.h>
23 #include <asm/vr41xx/cmbvr4133.h>
25 extern int vr4133_rockhopper
;
26 extern void ali_m1535plus_init(struct pci_dev
*dev
);
27 extern void ali_m5229_init(struct pci_dev
*dev
);
29 /* Do platform specific device initialization at pci_enable_device() time */
30 int pcibios_plat_dev_init(struct pci_dev
*dev
)
33 * We have to reset AMD PCnet adapter on Rockhopper since
34 * PMON leaves it enabled and generating interrupts. This leads
35 * to a lock if some PCI device driver later enables the IRQ line
36 * shared with PCnet and there is no AMD PCnet driver to catch its
39 #ifdef CONFIG_ROCKHOPPER
40 if (dev
->vendor
== PCI_VENDOR_ID_AMD
&&
41 dev
->device
== PCI_DEVICE_ID_AMD_LANCE
) {
42 inl(pci_resource_start(dev
, 0) + 0x18);
47 * we have to open the bridges' windows down to 0 because otherwise
48 * we cannot access ISA south bridge I/O registers that get mapped from
49 * 0. for example, 8259 PIC would be unaccessible without that
51 if(dev
->vendor
== PCI_VENDOR_ID_INTEL
&& dev
->device
== PCI_DEVICE_ID_INTEL_S21152BB
) {
52 pci_write_config_byte(dev
, PCI_IO_BASE
, 0);
53 if(dev
->bus
->number
== 0) {
54 pci_write_config_word(dev
, PCI_IO_BASE_UPPER16
, 0);
56 pci_write_config_word(dev
, PCI_IO_BASE_UPPER16
, 1);
65 * Feel free to change this, although it shouldn't be needed
67 #define M1535_IRQ_INTA 7
68 #define M1535_IRQ_INTB 9
69 #define M1535_IRQ_INTC 10
70 #define M1535_IRQ_INTD 11
72 #define M1535_IRQ_USB 9
73 #define M1535_IRQ_IDE 14
74 #define M1535_IRQ_IDE2 15
75 #define M1535_IRQ_PS2 12
76 #define M1535_IRQ_RTC 8
77 #define M1535_IRQ_FDC 6
78 #define M1535_IRQ_AUDIO 5
79 #define M1535_IRQ_COM1 4
80 #define M1535_IRQ_COM2 4
81 #define M1535_IRQ_IRDA 3
82 #define M1535_IRQ_KBD 1
83 #define M1535_IRQ_TMR 0
85 /* Rockhopper "slots" assignment; this is hard-coded ... */
86 #define ROCKHOPPER_M5451_SLOT 1
87 #define ROCKHOPPER_M1535_SLOT 2
88 #define ROCKHOPPER_M5229_SLOT 11
89 #define ROCKHOPPER_M5237_SLOT 15
90 #define ROCKHOPPER_PMU_SLOT 12
91 /* ... and hard-wired. */
92 #define ROCKHOPPER_PCI1_SLOT 3
93 #define ROCKHOPPER_PCI2_SLOT 4
94 #define ROCKHOPPER_PCI3_SLOT 5
95 #define ROCKHOPPER_PCI4_SLOT 6
96 #define ROCKHOPPER_PCNET_SLOT 1
98 #define M1535_IRQ_MASK(n) (1 << (n))
100 #define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
101 M1535_IRQ_MASK(M1535_IRQ_KBD) | \
102 M1535_IRQ_MASK(M1535_IRQ_COM1) | \
103 M1535_IRQ_MASK(M1535_IRQ_COM2) | \
104 M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
105 M1535_IRQ_MASK(M1535_IRQ_RTC) | \
106 M1535_IRQ_MASK(M1535_IRQ_FDC) | \
107 M1535_IRQ_MASK(M1535_IRQ_PS2))
109 #define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
110 M1535_IRQ_MASK(M1535_IRQ_USB) | \
111 M1535_IRQ_MASK(M1535_IRQ_INTA) | \
112 M1535_IRQ_MASK(M1535_IRQ_INTB) | \
113 M1535_IRQ_MASK(M1535_IRQ_INTC) | \
114 M1535_IRQ_MASK(M1535_IRQ_INTD))
116 struct irq_map_entry
{
121 static struct irq_map_entry int_map
[] = {
122 {1, ROCKHOPPER_M5451_SLOT
, M1535_IRQ_AUDIO
}, /* Audio controller */
123 {1, ROCKHOPPER_PCI1_SLOT
, M1535_IRQ_INTD
}, /* PCI slot #1 */
124 {1, ROCKHOPPER_PCI2_SLOT
, M1535_IRQ_INTC
}, /* PCI slot #2 */
125 {1, ROCKHOPPER_M5237_SLOT
, M1535_IRQ_USB
}, /* USB host controller */
126 {1, ROCKHOPPER_M5229_SLOT
, IDE_PRIMARY_IRQ
}, /* IDE controller */
127 {2, ROCKHOPPER_PCNET_SLOT
, M1535_IRQ_INTD
}, /* AMD Am79c973 on-board
129 {2, ROCKHOPPER_PCI3_SLOT
, M1535_IRQ_INTB
}, /* PCI slot #3 */
130 {2, ROCKHOPPER_PCI4_SLOT
, M1535_IRQ_INTC
} /* PCI slot #4 */
133 static int pci_intlines
[] =
134 { M1535_IRQ_INTA
, M1535_IRQ_INTB
, M1535_IRQ_INTC
, M1535_IRQ_INTD
};
136 /* Determine the Rockhopper IRQ line number for the PCI device */
137 int rockhopper_get_irq(struct pci_dev
*dev
, u8 pin
, u8 slot
)
146 for (i
= 0; i
< sizeof (int_map
) / sizeof (int_map
[0]); i
++) {
147 if (int_map
[i
].bus
== bus
->number
&& int_map
[i
].slot
== slot
) {
149 for (line
= 0; line
< 4; line
++)
150 if (pci_intlines
[line
] == int_map
[i
].irq
)
153 return pci_intlines
[(line
+ (pin
- 1)) % 4];
155 return int_map
[i
].irq
;
161 #ifdef CONFIG_ROCKHOPPER
162 void i8259_init(void)
164 outb(0x11, 0x20); /* Master ICW1 */
165 outb(I8259_IRQ_BASE
, 0x21); /* Master ICW2 */
166 outb(0x04, 0x21); /* Master ICW3 */
167 outb(0x01, 0x21); /* Master ICW4 */
168 outb(0xff, 0x21); /* Master IMW */
170 outb(0x11, 0xa0); /* Slave ICW1 */
171 outb(I8259_IRQ_BASE
+ 8, 0xa1); /* Slave ICW2 */
172 outb(0x02, 0xa1); /* Slave ICW3 */
173 outb(0x01, 0xa1); /* Slave ICW4 */
174 outb(0xff, 0xa1); /* Slave IMW */
177 outb(0x02, 0x4d1); /* USB IRQ9 is level */
181 int __init
pcibios_map_irq(struct pci_dev
*dev
, u8 slot
, u8 pin
)
183 extern int pci_probe_only
;
186 #ifdef CONFIG_ROCKHOPPER
187 if( dev
->bus
->number
== 1 && vr4133_rockhopper
) {
188 if(slot
== ROCKHOPPER_PCI1_SLOT
|| slot
== ROCKHOPPER_PCI2_SLOT
)
189 dev
->irq
= CMBVR41XX_INTA_IRQ
;
191 dev
->irq
= rockhopper_get_irq(dev
, pin
, slot
);
193 dev
->irq
= CMBVR41XX_INTA_IRQ
;
195 dev
->irq
= CMBVR41XX_INTA_IRQ
;
201 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL
, PCI_DEVICE_ID_AL_M1533
, ali_m1535plus_init
);
202 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL
, PCI_DEVICE_ID_AL_M5229
, ali_m5229_init
);