drm/radeon/kms: Fix irq handling on AVIVO hw
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / linux / perf_counter.h
blobb53f7006cc4e0bb5e1ad5f09ae76249d150d2ca4
1 /*
2 * Performance counters:
4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
8 * Data type definitions, declarations, prototypes.
10 * Started by: Thomas Gleixner and Ingo Molnar
12 * For licencing details see kernel-base/COPYING
14 #ifndef _LINUX_PERF_COUNTER_H
15 #define _LINUX_PERF_COUNTER_H
17 #include <linux/types.h>
18 #include <linux/ioctl.h>
19 #include <asm/byteorder.h>
22 * User-space ABI bits:
26 * attr.type
28 enum perf_type_id {
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
35 PERF_TYPE_MAX, /* non-ABI */
39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
43 enum perf_hw_id {
45 * Common hardware events, generalized by the kernel:
47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
55 PERF_COUNT_HW_MAX, /* non-ABI */
59 * Generalized hardware cache counters:
61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
62 * { read, write, prefetch } x
63 * { accesses, misses }
65 enum perf_hw_cache_id {
66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
76 enum perf_hw_cache_op_id {
77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
84 enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
97 enum perf_sw_ids {
98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
106 PERF_COUNT_SW_MAX, /* non-ABI */
110 * Bits that can be set in attr.sample_type to request information
111 * in the overflow packets.
113 enum perf_counter_sample_format {
114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
118 PERF_SAMPLE_READ = 1U << 4,
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
123 PERF_SAMPLE_STREAM_ID = 1U << 9,
124 PERF_SAMPLE_RAW = 1U << 10,
126 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
130 * The format of the data returned by read() on a perf counter fd,
131 * as specified by attr.read_format:
133 * struct read_format {
134 * { u64 value;
135 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
136 * { u64 time_running; } && PERF_FORMAT_RUNNING
137 * { u64 id; } && PERF_FORMAT_ID
138 * } && !PERF_FORMAT_GROUP
140 * { u64 nr;
141 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
142 * { u64 time_running; } && PERF_FORMAT_RUNNING
143 * { u64 value;
144 * { u64 id; } && PERF_FORMAT_ID
145 * } cntr[nr];
146 * } && PERF_FORMAT_GROUP
147 * };
149 enum perf_counter_read_format {
150 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
151 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
152 PERF_FORMAT_ID = 1U << 2,
153 PERF_FORMAT_GROUP = 1U << 3,
155 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
158 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
161 * Hardware event to monitor via a performance monitoring counter:
163 struct perf_counter_attr {
166 * Major type: hardware/software/tracepoint/etc.
168 __u32 type;
171 * Size of the attr structure, for fwd/bwd compat.
173 __u32 size;
176 * Type specific configuration information.
178 __u64 config;
180 union {
181 __u64 sample_period;
182 __u64 sample_freq;
185 __u64 sample_type;
186 __u64 read_format;
188 __u64 disabled : 1, /* off by default */
189 inherit : 1, /* children inherit it */
190 pinned : 1, /* must always be on PMU */
191 exclusive : 1, /* only group on PMU */
192 exclude_user : 1, /* don't count user */
193 exclude_kernel : 1, /* ditto kernel */
194 exclude_hv : 1, /* ditto hypervisor */
195 exclude_idle : 1, /* don't count when idle */
196 mmap : 1, /* include mmap data */
197 comm : 1, /* include comm data */
198 freq : 1, /* use freq, not period */
199 inherit_stat : 1, /* per task counts */
200 enable_on_exec : 1, /* next exec enables */
201 task : 1, /* trace fork/exit */
203 __reserved_1 : 50;
205 __u32 wakeup_events; /* wakeup every n events */
206 __u32 __reserved_2;
208 __u64 __reserved_3;
212 * Ioctls that can be done on a perf counter fd:
214 #define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
215 #define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
216 #define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
217 #define PERF_COUNTER_IOC_RESET _IO ('$', 3)
218 #define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
220 enum perf_counter_ioc_flags {
221 PERF_IOC_FLAG_GROUP = 1U << 0,
225 * Structure of the page that can be mapped via mmap
227 struct perf_counter_mmap_page {
228 __u32 version; /* version number of this structure */
229 __u32 compat_version; /* lowest version this is compat with */
232 * Bits needed to read the hw counters in user-space.
234 * u32 seq;
235 * s64 count;
237 * do {
238 * seq = pc->lock;
240 * barrier()
241 * if (pc->index) {
242 * count = pmc_read(pc->index - 1);
243 * count += pc->offset;
244 * } else
245 * goto regular_read;
247 * barrier();
248 * } while (pc->lock != seq);
250 * NOTE: for obvious reason this only works on self-monitoring
251 * processes.
253 __u32 lock; /* seqlock for synchronization */
254 __u32 index; /* hardware counter identifier */
255 __s64 offset; /* add to hardware counter value */
256 __u64 time_enabled; /* time counter active */
257 __u64 time_running; /* time counter on cpu */
260 * Hole for extension of the self monitor capabilities
263 __u64 __reserved[123]; /* align to 1k */
266 * Control data for the mmap() data buffer.
268 * User-space reading the @data_head value should issue an rmb(), on
269 * SMP capable platforms, after reading this value -- see
270 * perf_counter_wakeup().
272 * When the mapping is PROT_WRITE the @data_tail value should be
273 * written by userspace to reflect the last read data. In this case
274 * the kernel will not over-write unread data.
276 __u64 data_head; /* head in the data section */
277 __u64 data_tail; /* user-space written tail */
280 #define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
281 #define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
282 #define PERF_EVENT_MISC_KERNEL (1 << 0)
283 #define PERF_EVENT_MISC_USER (2 << 0)
284 #define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
286 struct perf_event_header {
287 __u32 type;
288 __u16 misc;
289 __u16 size;
292 enum perf_event_type {
295 * The MMAP events record the PROT_EXEC mappings so that we can
296 * correlate userspace IPs to code. They have the following structure:
298 * struct {
299 * struct perf_event_header header;
301 * u32 pid, tid;
302 * u64 addr;
303 * u64 len;
304 * u64 pgoff;
305 * char filename[];
306 * };
308 PERF_EVENT_MMAP = 1,
311 * struct {
312 * struct perf_event_header header;
313 * u64 id;
314 * u64 lost;
315 * };
317 PERF_EVENT_LOST = 2,
320 * struct {
321 * struct perf_event_header header;
323 * u32 pid, tid;
324 * char comm[];
325 * };
327 PERF_EVENT_COMM = 3,
330 * struct {
331 * struct perf_event_header header;
332 * u32 pid, ppid;
333 * u32 tid, ptid;
334 * };
336 PERF_EVENT_EXIT = 4,
339 * struct {
340 * struct perf_event_header header;
341 * u64 time;
342 * u64 id;
343 * u64 stream_id;
344 * };
346 PERF_EVENT_THROTTLE = 5,
347 PERF_EVENT_UNTHROTTLE = 6,
350 * struct {
351 * struct perf_event_header header;
352 * u32 pid, ppid;
353 * u32 tid, ptid;
354 * };
356 PERF_EVENT_FORK = 7,
359 * struct {
360 * struct perf_event_header header;
361 * u32 pid, tid;
363 * struct read_format values;
364 * };
366 PERF_EVENT_READ = 8,
369 * struct {
370 * struct perf_event_header header;
372 * { u64 ip; } && PERF_SAMPLE_IP
373 * { u32 pid, tid; } && PERF_SAMPLE_TID
374 * { u64 time; } && PERF_SAMPLE_TIME
375 * { u64 addr; } && PERF_SAMPLE_ADDR
376 * { u64 id; } && PERF_SAMPLE_ID
377 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
378 * { u32 cpu, res; } && PERF_SAMPLE_CPU
379 * { u64 period; } && PERF_SAMPLE_PERIOD
381 * { struct read_format values; } && PERF_SAMPLE_READ
383 * { u64 nr,
384 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
387 * # The RAW record below is opaque data wrt the ABI
389 * # That is, the ABI doesn't make any promises wrt to
390 * # the stability of its content, it may vary depending
391 * # on event, hardware, kernel version and phase of
392 * # the moon.
394 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
397 * { u32 size;
398 * char data[size];}&& PERF_SAMPLE_RAW
399 * };
401 PERF_EVENT_SAMPLE = 9,
403 PERF_EVENT_MAX, /* non-ABI */
406 enum perf_callchain_context {
407 PERF_CONTEXT_HV = (__u64)-32,
408 PERF_CONTEXT_KERNEL = (__u64)-128,
409 PERF_CONTEXT_USER = (__u64)-512,
411 PERF_CONTEXT_GUEST = (__u64)-2048,
412 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
413 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
415 PERF_CONTEXT_MAX = (__u64)-4095,
418 #ifdef __KERNEL__
420 * Kernel-internal data types and definitions:
423 #ifdef CONFIG_PERF_COUNTERS
424 # include <asm/perf_counter.h>
425 #endif
427 #include <linux/list.h>
428 #include <linux/mutex.h>
429 #include <linux/rculist.h>
430 #include <linux/rcupdate.h>
431 #include <linux/spinlock.h>
432 #include <linux/hrtimer.h>
433 #include <linux/fs.h>
434 #include <linux/pid_namespace.h>
435 #include <asm/atomic.h>
437 #define PERF_MAX_STACK_DEPTH 255
439 struct perf_callchain_entry {
440 __u64 nr;
441 __u64 ip[PERF_MAX_STACK_DEPTH];
444 struct perf_raw_record {
445 u32 size;
446 void *data;
449 struct task_struct;
452 * struct hw_perf_counter - performance counter hardware details:
454 struct hw_perf_counter {
455 #ifdef CONFIG_PERF_COUNTERS
456 union {
457 struct { /* hardware */
458 u64 config;
459 unsigned long config_base;
460 unsigned long counter_base;
461 int idx;
463 union { /* software */
464 atomic64_t count;
465 struct hrtimer hrtimer;
468 atomic64_t prev_count;
469 u64 sample_period;
470 u64 last_period;
471 atomic64_t period_left;
472 u64 interrupts;
474 u64 freq_count;
475 u64 freq_interrupts;
476 u64 freq_stamp;
477 #endif
480 struct perf_counter;
483 * struct pmu - generic performance monitoring unit
485 struct pmu {
486 int (*enable) (struct perf_counter *counter);
487 void (*disable) (struct perf_counter *counter);
488 void (*read) (struct perf_counter *counter);
489 void (*unthrottle) (struct perf_counter *counter);
493 * enum perf_counter_active_state - the states of a counter
495 enum perf_counter_active_state {
496 PERF_COUNTER_STATE_ERROR = -2,
497 PERF_COUNTER_STATE_OFF = -1,
498 PERF_COUNTER_STATE_INACTIVE = 0,
499 PERF_COUNTER_STATE_ACTIVE = 1,
502 struct file;
504 struct perf_mmap_data {
505 struct rcu_head rcu_head;
506 int nr_pages; /* nr of data pages */
507 int writable; /* are we writable */
508 int nr_locked; /* nr pages mlocked */
510 atomic_t poll; /* POLL_ for wakeups */
511 atomic_t events; /* event limit */
513 atomic_long_t head; /* write position */
514 atomic_long_t done_head; /* completed head */
516 atomic_t lock; /* concurrent writes */
517 atomic_t wakeup; /* needs a wakeup */
518 atomic_t lost; /* nr records lost */
520 struct perf_counter_mmap_page *user_page;
521 void *data_pages[0];
524 struct perf_pending_entry {
525 struct perf_pending_entry *next;
526 void (*func)(struct perf_pending_entry *);
530 * struct perf_counter - performance counter kernel representation:
532 struct perf_counter {
533 #ifdef CONFIG_PERF_COUNTERS
534 struct list_head list_entry;
535 struct list_head event_entry;
536 struct list_head sibling_list;
537 int nr_siblings;
538 struct perf_counter *group_leader;
539 const struct pmu *pmu;
541 enum perf_counter_active_state state;
542 atomic64_t count;
545 * These are the total time in nanoseconds that the counter
546 * has been enabled (i.e. eligible to run, and the task has
547 * been scheduled in, if this is a per-task counter)
548 * and running (scheduled onto the CPU), respectively.
550 * They are computed from tstamp_enabled, tstamp_running and
551 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
553 u64 total_time_enabled;
554 u64 total_time_running;
557 * These are timestamps used for computing total_time_enabled
558 * and total_time_running when the counter is in INACTIVE or
559 * ACTIVE state, measured in nanoseconds from an arbitrary point
560 * in time.
561 * tstamp_enabled: the notional time when the counter was enabled
562 * tstamp_running: the notional time when the counter was scheduled on
563 * tstamp_stopped: in INACTIVE state, the notional time when the
564 * counter was scheduled off.
566 u64 tstamp_enabled;
567 u64 tstamp_running;
568 u64 tstamp_stopped;
570 struct perf_counter_attr attr;
571 struct hw_perf_counter hw;
573 struct perf_counter_context *ctx;
574 struct file *filp;
577 * These accumulate total time (in nanoseconds) that children
578 * counters have been enabled and running, respectively.
580 atomic64_t child_total_time_enabled;
581 atomic64_t child_total_time_running;
584 * Protect attach/detach and child_list:
586 struct mutex child_mutex;
587 struct list_head child_list;
588 struct perf_counter *parent;
590 int oncpu;
591 int cpu;
593 struct list_head owner_entry;
594 struct task_struct *owner;
596 /* mmap bits */
597 struct mutex mmap_mutex;
598 atomic_t mmap_count;
599 struct perf_mmap_data *data;
601 /* poll related */
602 wait_queue_head_t waitq;
603 struct fasync_struct *fasync;
605 /* delayed work for NMIs and such */
606 int pending_wakeup;
607 int pending_kill;
608 int pending_disable;
609 struct perf_pending_entry pending;
611 atomic_t event_limit;
613 void (*destroy)(struct perf_counter *);
614 struct rcu_head rcu_head;
616 struct pid_namespace *ns;
617 u64 id;
618 #endif
622 * struct perf_counter_context - counter context structure
624 * Used as a container for task counters and CPU counters as well:
626 struct perf_counter_context {
628 * Protect the states of the counters in the list,
629 * nr_active, and the list:
631 spinlock_t lock;
633 * Protect the list of counters. Locking either mutex or lock
634 * is sufficient to ensure the list doesn't change; to change
635 * the list you need to lock both the mutex and the spinlock.
637 struct mutex mutex;
639 struct list_head counter_list;
640 struct list_head event_list;
641 int nr_counters;
642 int nr_active;
643 int is_active;
644 int nr_stat;
645 atomic_t refcount;
646 struct task_struct *task;
649 * Context clock, runs when context enabled.
651 u64 time;
652 u64 timestamp;
655 * These fields let us detect when two contexts have both
656 * been cloned (inherited) from a common ancestor.
658 struct perf_counter_context *parent_ctx;
659 u64 parent_gen;
660 u64 generation;
661 int pin_count;
662 struct rcu_head rcu_head;
666 * struct perf_counter_cpu_context - per cpu counter context structure
668 struct perf_cpu_context {
669 struct perf_counter_context ctx;
670 struct perf_counter_context *task_ctx;
671 int active_oncpu;
672 int max_pertask;
673 int exclusive;
676 * Recursion avoidance:
678 * task, softirq, irq, nmi context
680 int recursion[4];
683 #ifdef CONFIG_PERF_COUNTERS
686 * Set by architecture code:
688 extern int perf_max_counters;
690 extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
692 extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
693 extern void perf_counter_task_sched_out(struct task_struct *task,
694 struct task_struct *next, int cpu);
695 extern void perf_counter_task_tick(struct task_struct *task, int cpu);
696 extern int perf_counter_init_task(struct task_struct *child);
697 extern void perf_counter_exit_task(struct task_struct *child);
698 extern void perf_counter_free_task(struct task_struct *task);
699 extern void set_perf_counter_pending(void);
700 extern void perf_counter_do_pending(void);
701 extern void perf_counter_print_debug(void);
702 extern void __perf_disable(void);
703 extern bool __perf_enable(void);
704 extern void perf_disable(void);
705 extern void perf_enable(void);
706 extern int perf_counter_task_disable(void);
707 extern int perf_counter_task_enable(void);
708 extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
709 struct perf_cpu_context *cpuctx,
710 struct perf_counter_context *ctx, int cpu);
711 extern void perf_counter_update_userpage(struct perf_counter *counter);
713 struct perf_sample_data {
714 struct pt_regs *regs;
715 u64 addr;
716 u64 period;
717 struct perf_raw_record *raw;
720 extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
721 struct perf_sample_data *data);
722 extern void perf_counter_output(struct perf_counter *counter, int nmi,
723 struct perf_sample_data *data);
726 * Return 1 for a software counter, 0 for a hardware counter
728 static inline int is_software_counter(struct perf_counter *counter)
730 return (counter->attr.type != PERF_TYPE_RAW) &&
731 (counter->attr.type != PERF_TYPE_HARDWARE) &&
732 (counter->attr.type != PERF_TYPE_HW_CACHE);
735 extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX];
737 extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
739 static inline void
740 perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
742 if (atomic_read(&perf_swcounter_enabled[event]))
743 __perf_swcounter_event(event, nr, nmi, regs, addr);
746 extern void __perf_counter_mmap(struct vm_area_struct *vma);
748 static inline void perf_counter_mmap(struct vm_area_struct *vma)
750 if (vma->vm_flags & VM_EXEC)
751 __perf_counter_mmap(vma);
754 extern void perf_counter_comm(struct task_struct *tsk);
755 extern void perf_counter_fork(struct task_struct *tsk);
757 extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
759 extern int sysctl_perf_counter_paranoid;
760 extern int sysctl_perf_counter_mlock;
761 extern int sysctl_perf_counter_sample_rate;
763 extern void perf_counter_init(void);
765 #ifndef perf_misc_flags
766 #define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
767 PERF_EVENT_MISC_KERNEL)
768 #define perf_instruction_pointer(regs) instruction_pointer(regs)
769 #endif
771 #else
772 static inline void
773 perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
774 static inline void
775 perf_counter_task_sched_out(struct task_struct *task,
776 struct task_struct *next, int cpu) { }
777 static inline void
778 perf_counter_task_tick(struct task_struct *task, int cpu) { }
779 static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
780 static inline void perf_counter_exit_task(struct task_struct *child) { }
781 static inline void perf_counter_free_task(struct task_struct *task) { }
782 static inline void perf_counter_do_pending(void) { }
783 static inline void perf_counter_print_debug(void) { }
784 static inline void perf_disable(void) { }
785 static inline void perf_enable(void) { }
786 static inline int perf_counter_task_disable(void) { return -EINVAL; }
787 static inline int perf_counter_task_enable(void) { return -EINVAL; }
789 static inline void
790 perf_swcounter_event(u32 event, u64 nr, int nmi,
791 struct pt_regs *regs, u64 addr) { }
793 static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
794 static inline void perf_counter_comm(struct task_struct *tsk) { }
795 static inline void perf_counter_fork(struct task_struct *tsk) { }
796 static inline void perf_counter_init(void) { }
797 #endif
799 #endif /* __KERNEL__ */
800 #endif /* _LINUX_PERF_COUNTER_H */