arch/powerpc/include/asm/dma-mapping.h

   1 /*
   2  * Copyright (C) 2004 IBM
   3  *
   4  * Implements the generic device dma API for powerpc.
   5  * the pci and vio busses
   6  */
   7 #ifndef _ASM_DMA_MAPPING_H
   8 #define _ASM_DMA_MAPPING_H
   9 #ifdef __KERNEL__
  10
  11 #include <linux/types.h>
  12 #include <linux/cache.h>
  13 /* need struct page definitions */
  14 #include <linux/mm.h>
  15 #include <linux/scatterlist.h>
  16 #include <linux/dma-attrs.h>
  17 #include <linux/dma-debug.h>
  18 #include <asm/io.h>
  19 #include <asm/swiotlb.h>
  20
  21 #define DMA_ERROR_CODE          (~(dma_addr_t)0x0)
  22
  23 /* Some dma direct funcs must be visible for use in other dma_ops */
  24 extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
  25                                        dma_addr_t *dma_handle, gfp_t flag);
  26 extern void dma_direct_free_coherent(struct device *dev, size_t size,
  27                                      void *vaddr, dma_addr_t dma_handle);
  28
  29
  30 #ifdef CONFIG_NOT_COHERENT_CACHE
  31 /*
  32  * DMA-consistent mapping functions for PowerPCs that don't support
  33  * cache snooping.  These allocate/free a region of uncached mapped
  34  * memory space for use with DMA devices.  Alternatively, you could
  35  * allocate the space "normally" and use the cache management functions
  36  * to ensure it is consistent.
  37  */
  38 struct device;
  39 extern void *__dma_alloc_coherent(struct device *dev, size_t size,
  40                                   dma_addr_t *handle, gfp_t gfp);
  41 extern void __dma_free_coherent(size_t size, void *vaddr);
  42 extern void __dma_sync(void *vaddr, size_t size, int direction);
  43 extern void __dma_sync_page(struct page *page, unsigned long offset,
  44                                  size_t size, int direction);
  45
  46 #else /* ! CONFIG_NOT_COHERENT_CACHE */
  47 /*
  48  * Cache coherent cores.
  49  */
  50
  51 #define __dma_alloc_coherent(dev, gfp, size, handle)    NULL
  52 #define __dma_free_coherent(size, addr)         ((void)0)
  53 #define __dma_sync(addr, size, rw)              ((void)0)
  54 #define __dma_sync_page(pg, off, sz, rw)        ((void)0)
  55
  56 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  57
  58 static inline unsigned long device_to_mask(struct device *dev)
  59 {
  60         if (dev->dma_mask && *dev->dma_mask)
  61                 return *dev->dma_mask;
  62         /* Assume devices without mask can take 32 bit addresses */
  63         return 0xfffffffful;
  64 }
  65
  66 /*
  67  * Available generic sets of operations
  68  */
  69 #ifdef CONFIG_PPC64
  70 extern struct dma_map_ops dma_iommu_ops;
  71 #endif
  72 extern struct dma_map_ops dma_direct_ops;
  73
  74 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  75 {
  76         /* We don't handle the NULL dev case for ISA for now. We could
  77          * do it via an out of line call but it is not needed for now. The
  78          * only ISA DMA device we support is the floppy and we have a hack
  79          * in the floppy driver directly to get a device for us.
  80          */
  81         if (unlikely(dev == NULL))
  82                 return NULL;
  83
  84         return dev->archdata.dma_ops;
  85 }
  86
  87 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
  88 {
  89         dev->archdata.dma_ops = ops;
  90 }
  91
  92 /*
  93  * get_dma_offset()
  94  *
  95  * Get the dma offset on configurations where the dma address can be determined
  96  * from the physical address by looking at a simple offset.  Direct dma and
  97  * swiotlb use this function, but it is typically not used by implementations
  98  * with an iommu.
  99  */
 100 static inline dma_addr_t get_dma_offset(struct device *dev)
 101 {
 102         if (dev)
 103                 return dev->archdata.dma_data.dma_offset;
 104
 105         return PCI_DRAM_OFFSET;
 106 }
 107
 108 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
 109 {
 110         if (dev)
 111                 dev->archdata.dma_data.dma_offset = off;
 112 }
 113
 114 /* this will be removed soon */
 115 #define flush_write_buffers()
 116
 117 #include <asm-generic/dma-mapping-common.h>
 118
 119 static inline int dma_supported(struct device *dev, u64 mask)
 120 {
 121         struct dma_map_ops *dma_ops = get_dma_ops(dev);
 122
 123         if (unlikely(dma_ops == NULL))
 124                 return 0;
 125         if (dma_ops->dma_supported == NULL)
 126                 return 1;
 127         return dma_ops->dma_supported(dev, mask);
 128 }
 129
 130 /* We have our own implementation of pci_set_dma_mask() */
 131 #define HAVE_ARCH_PCI_SET_DMA_MASK
 132
 133 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 134 {
 135         struct dma_map_ops *dma_ops = get_dma_ops(dev);
 136
 137         if (unlikely(dma_ops == NULL))
 138                 return -EIO;
 139         if (dma_ops->set_dma_mask != NULL)
 140                 return dma_ops->set_dma_mask(dev, dma_mask);
 141         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
 142                 return -EIO;
 143         *dev->dma_mask = dma_mask;
 144         return 0;
 145 }
 146
 147 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
 148                                        dma_addr_t *dma_handle, gfp_t flag)
 149 {
 150         struct dma_map_ops *dma_ops = get_dma_ops(dev);
 151         void *cpu_addr;
 152
 153         BUG_ON(!dma_ops);
 154
 155         cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag);
 156
 157         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
 158
 159         return cpu_addr;
 160 }
 161
 162 static inline void dma_free_coherent(struct device *dev, size_t size,
 163                                      void *cpu_addr, dma_addr_t dma_handle)
 164 {
 165         struct dma_map_ops *dma_ops = get_dma_ops(dev);
 166
 167         BUG_ON(!dma_ops);
 168
 169         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
 170
 171         dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
 172 }
 173
 174 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 175 {
 176         struct dma_map_ops *dma_ops = get_dma_ops(dev);
 177
 178         if (dma_ops->mapping_error)
 179                 return dma_ops->mapping_error(dev, dma_addr);
 180
 181 #ifdef CONFIG_PPC64
 182         return (dma_addr == DMA_ERROR_CODE);
 183 #else
 184         return 0;
 185 #endif
 186 }
 187
 188 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
 189 {
 190 #ifdef CONFIG_SWIOTLB
 191         struct dev_archdata *sd = &dev->archdata;
 192
 193         if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
 194                 return 0;
 195 #endif
 196
 197         if (!dev->dma_mask)
 198                 return 0;
 199
 200         return addr + size - 1 <= *dev->dma_mask;
 201 }
 202
 203 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
 204 {
 205         return paddr + get_dma_offset(dev);
 206 }
 207
 208 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
 209 {
 210         return daddr - get_dma_offset(dev);
 211 }
 212
 213 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 214 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 215 #ifdef CONFIG_NOT_COHERENT_CACHE
 216 #define dma_is_consistent(d, h) (0)
 217 #else
 218 #define dma_is_consistent(d, h) (1)
 219 #endif
 220
 221 static inline int dma_get_cache_alignment(void)
 222 {
 223 #ifdef CONFIG_PPC64
 224         /* no easy way to get cache size on all processors, so return
 225          * the maximum possible, to be safe */
 226         return (1 << INTERNODE_CACHE_SHIFT);
 227 #else
 228         /*
 229          * Each processor family will define its own L1_CACHE_SHIFT,
 230          * L1_CACHE_BYTES wraps to this, so this is always safe.
 231          */
 232         return L1_CACHE_BYTES;
 233 #endif
 234 }
 235
 236 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 237                 enum dma_data_direction direction)
 238 {
 239         BUG_ON(direction == DMA_NONE);
 240         __dma_sync(vaddr, size, (int)direction);
 241 }
 242
 243 #endif /* __KERNEL__ */
 244 #endif  /* _ASM_DMA_MAPPING_H */