arch/arm/mach-omap2/board-3630sdp.c

   1 /*
   2  * Copyright (C) 2009 Texas Instruments Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/init.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/input.h>
  13 #include <linux/gpio.h>
  14
  15 #include <asm/mach-types.h>
  16 #include <asm/mach/arch.h>
  17
  18 #include <plat/common.h>
  19 #include <plat/board.h>
  20 #include <plat/gpmc-smc91x.h>
  21 #include <plat/usb.h>
  22
  23 #include <mach/board-zoom.h>
  24
  25 #include "board-flash.h"
  26 #include "mux.h"
  27 #include "sdram-hynix-h8mbx00u0mer-0em.h"
  28
  29 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  30
  31 static struct omap_smc91x_platform_data board_smc91x_data = {
  32         .cs             = 3,
  33         .flags          = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
  34 };
  35
  36 static void __init board_smc91x_init(void)
  37 {
  38         board_smc91x_data.gpio_irq = 158;
  39         gpmc_smc91x_init(&board_smc91x_data);
  40 }
  41
  42 #else
  43
  44 static inline void board_smc91x_init(void)
  45 {
  46 }
  47
  48 #endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */
  49
  50 static void enable_board_wakeup_source(void)
  51 {
  52         /* T2 interrupt line (keypad) */
  53         omap_mux_init_signal("sys_nirq",
  54                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  55 }
  56
  57 static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  58
  59         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  60         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  61         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  62
  63         .phy_reset  = true,
  64         .reset_gpio_port[0]  = 126,
  65         .reset_gpio_port[1]  = 61,
  66         .reset_gpio_port[2]  = -EINVAL
  67 };
  68
  69 static struct omap_board_config_kernel sdp_config[] __initdata = {
  70 };
  71
  72 static void __init omap_sdp_init_irq(void)
  73 {
  74         omap_board_config = sdp_config;
  75         omap_board_config_size = ARRAY_SIZE(sdp_config);
  76         omap2_init_common_infrastructure();
  77         omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
  78                                   h8mbx00u0mer0em_sdrc_params);
  79         omap_init_irq();
  80 }
  81
  82 #ifdef CONFIG_OMAP_MUX
  83 static struct omap_board_mux board_mux[] __initdata = {
  84         { .reg_offset = OMAP_MUX_TERMINATOR },
  85 };
  86 #endif
  87
  88 /*
  89  * SDP3630 CS organization
  90  * See also the Switch S8 settings in the comments.
  91  */
  92 static char chip_sel_sdp[][GPMC_CS_NUM] = {
  93         {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  94         {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  95         {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  96 };
  97
  98 static struct mtd_partition sdp_nor_partitions[] = {
  99         /* bootloader (U-Boot, etc) in first sector */
 100         {
 101                 .name           = "Bootloader-NOR",
 102                 .offset         = 0,
 103                 .size           = SZ_256K,
 104                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 105         },
 106         /* bootloader params in the next sector */
 107         {
 108                 .name           = "Params-NOR",
 109                 .offset         = MTDPART_OFS_APPEND,
 110                 .size           = SZ_256K,
 111                 .mask_flags     = 0,
 112         },
 113         /* kernel */
 114         {
 115                 .name           = "Kernel-NOR",
 116                 .offset         = MTDPART_OFS_APPEND,
 117                 .size           = SZ_2M,
 118                 .mask_flags     = 0
 119         },
 120         /* file system */
 121         {
 122                 .name           = "Filesystem-NOR",
 123                 .offset         = MTDPART_OFS_APPEND,
 124                 .size           = MTDPART_SIZ_FULL,
 125                 .mask_flags     = 0
 126         }
 127 };
 128
 129 static struct mtd_partition sdp_onenand_partitions[] = {
 130         {
 131                 .name           = "X-Loader-OneNAND",
 132                 .offset         = 0,
 133                 .size           = 4 * (64 * 2048),
 134                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 135         },
 136         {
 137                 .name           = "U-Boot-OneNAND",
 138                 .offset         = MTDPART_OFS_APPEND,
 139                 .size           = 2 * (64 * 2048),
 140                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 141         },
 142         {
 143                 .name           = "U-Boot Environment-OneNAND",
 144                 .offset         = MTDPART_OFS_APPEND,
 145                 .size           = 1 * (64 * 2048),
 146         },
 147         {
 148                 .name           = "Kernel-OneNAND",
 149                 .offset         = MTDPART_OFS_APPEND,
 150                 .size           = 16 * (64 * 2048),
 151         },
 152         {
 153                 .name           = "File System-OneNAND",
 154                 .offset         = MTDPART_OFS_APPEND,
 155                 .size           = MTDPART_SIZ_FULL,
 156         },
 157 };
 158
 159 static struct mtd_partition sdp_nand_partitions[] = {
 160         /* All the partition sizes are listed in terms of NAND block size */
 161         {
 162                 .name           = "X-Loader-NAND",
 163                 .offset         = 0,
 164                 .size           = 4 * (64 * 2048),
 165                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 166         },
 167         {
 168                 .name           = "U-Boot-NAND",
 169                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
 170                 .size           = 10 * (64 * 2048),
 171                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 172         },
 173         {
 174                 .name           = "Boot Env-NAND",
 175
 176                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
 177                 .size           = 6 * (64 * 2048),
 178         },
 179         {
 180                 .name           = "Kernel-NAND",
 181                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
 182                 .size           = 40 * (64 * 2048),
 183         },
 184         {
 185                 .name           = "File System - NAND",
 186                 .size           = MTDPART_SIZ_FULL,
 187                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
 188         },
 189 };
 190
 191 static struct flash_partitions sdp_flash_partitions[] = {
 192         {
 193                 .parts = sdp_nor_partitions,
 194                 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
 195         },
 196         {
 197                 .parts = sdp_onenand_partitions,
 198                 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
 199         },
 200         {
 201                 .parts = sdp_nand_partitions,
 202                 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
 203         },
 204 };
 205
 206 static void __init omap_sdp_init(void)
 207 {
 208         omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
 209         zoom_peripherals_init();
 210         board_smc91x_init();
 211         board_flash_init(sdp_flash_partitions, chip_sel_sdp);
 212         enable_board_wakeup_source();
 213         usb_ehci_init(&ehci_pdata);
 214 }
 215
 216 MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
 217         .boot_params    = 0x80000100,
 218         .map_io         = omap3_map_io,
 219         .reserve        = omap_reserve,
 220         .init_irq       = omap_sdp_init_irq,
 221         .init_machine   = omap_sdp_init,
 222         .timer          = &omap_timer,
 223 MACHINE_END