2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/stat.h>
28 #include <linux/mmc/host.h>
30 #include <mach/atmel-mci.h>
31 #include <linux/atmel-mci.h>
34 #include <asm/unaligned.h>
37 #include <mach/board.h>
39 #include "atmel-mci-regs.h"
41 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
42 #define ATMCI_DMA_THRESHOLD 16
45 EVENT_CMD_COMPLETE
= 0,
51 enum atmel_mci_state
{
60 struct atmel_mci_dma
{
61 #ifdef CONFIG_MMC_ATMELMCI_DMA
62 struct dma_chan
*chan
;
63 struct dma_async_tx_descriptor
*data_desc
;
68 * struct atmel_mci - MMC controller state shared between all slots
69 * @lock: Spinlock protecting the queue and associated data.
70 * @regs: Pointer to MMIO registers.
71 * @sg: Scatterlist entry currently being processed by PIO code, if any.
72 * @pio_offset: Offset into the current scatterlist entry.
73 * @cur_slot: The slot which is currently using the controller.
74 * @mrq: The request currently being processed on @cur_slot,
75 * or NULL if the controller is idle.
76 * @cmd: The command currently being sent to the card, or NULL.
77 * @data: The data currently being transferred, or NULL if no data
78 * transfer is in progress.
79 * @dma: DMA client state.
80 * @data_chan: DMA channel being used for the current data transfer.
81 * @cmd_status: Snapshot of SR taken upon completion of the current
82 * command. Only valid when EVENT_CMD_COMPLETE is pending.
83 * @data_status: Snapshot of SR taken upon completion of the current
84 * data transfer. Only valid when EVENT_DATA_COMPLETE or
85 * EVENT_DATA_ERROR is pending.
86 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
88 * @tasklet: Tasklet running the request state machine.
89 * @pending_events: Bitmask of events flagged by the interrupt handler
90 * to be processed by the tasklet.
91 * @completed_events: Bitmask of events which the state machine has
93 * @state: Tasklet state.
94 * @queue: List of slots waiting for access to the controller.
95 * @need_clock_update: Update the clock rate before the next request.
96 * @need_reset: Reset controller before next request.
97 * @mode_reg: Value of the MR register.
98 * @cfg_reg: Value of the CFG register.
99 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
100 * rate and timeout calculations.
101 * @mapbase: Physical address of the MMIO registers.
102 * @mck: The peripheral bus clock hooked up to the MMC controller.
103 * @pdev: Platform device associated with the MMC controller.
104 * @slot: Slots sharing this MMC controller.
109 * @lock is a softirq-safe spinlock protecting @queue as well as
110 * @cur_slot, @mrq and @state. These must always be updated
111 * at the same time while holding @lock.
113 * @lock also protects mode_reg and need_clock_update since these are
114 * used to synchronize mode register updates with the queue
117 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
118 * and must always be written at the same time as the slot is added to
121 * @pending_events and @completed_events are accessed using atomic bit
122 * operations, so they don't need any locking.
124 * None of the fields touched by the interrupt handler need any
125 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
126 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
127 * interrupts must be disabled and @data_status updated with a
128 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
129 * CMDRDY interupt must be disabled and @cmd_status updated with a
130 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
131 * bytes_xfered field of @data must be written. This is ensured by
138 struct scatterlist
*sg
;
139 unsigned int pio_offset
;
141 struct atmel_mci_slot
*cur_slot
;
142 struct mmc_request
*mrq
;
143 struct mmc_command
*cmd
;
144 struct mmc_data
*data
;
146 struct atmel_mci_dma dma
;
147 struct dma_chan
*data_chan
;
153 struct tasklet_struct tasklet
;
154 unsigned long pending_events
;
155 unsigned long completed_events
;
156 enum atmel_mci_state state
;
157 struct list_head queue
;
159 bool need_clock_update
;
163 unsigned long bus_hz
;
164 unsigned long mapbase
;
166 struct platform_device
*pdev
;
168 struct atmel_mci_slot
*slot
[ATMEL_MCI_MAX_NR_SLOTS
];
172 * struct atmel_mci_slot - MMC slot state
173 * @mmc: The mmc_host representing this slot.
174 * @host: The MMC controller this slot is using.
175 * @sdc_reg: Value of SDCR to be written before using this slot.
176 * @mrq: mmc_request currently being processed or waiting to be
177 * processed, or NULL when the slot is idle.
178 * @queue_node: List node for placing this node in the @queue list of
180 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
181 * @flags: Random state bits associated with the slot.
182 * @detect_pin: GPIO pin used for card detection, or negative if not
184 * @wp_pin: GPIO pin used for card write protect sending, or negative
186 * @detect_is_active_high: The state of the detect pin when it is active.
187 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
189 struct atmel_mci_slot
{
190 struct mmc_host
*mmc
;
191 struct atmel_mci
*host
;
195 struct mmc_request
*mrq
;
196 struct list_head queue_node
;
200 #define ATMCI_CARD_PRESENT 0
201 #define ATMCI_CARD_NEED_INIT 1
202 #define ATMCI_SHUTDOWN 2
206 bool detect_is_active_high
;
208 struct timer_list detect_timer
;
211 #define atmci_test_and_clear_pending(host, event) \
212 test_and_clear_bit(event, &host->pending_events)
213 #define atmci_set_completed(host, event) \
214 set_bit(event, &host->completed_events)
215 #define atmci_set_pending(host, event) \
216 set_bit(event, &host->pending_events)
219 * Enable or disable features/registers based on
220 * whether the processor supports them
222 static bool mci_has_rwproof(void)
224 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
231 * The new MCI2 module isn't 100% compatible with the old MCI module,
232 * and it has a few nice features which we want to use...
234 static inline bool atmci_is_mci2(void)
236 if (cpu_is_at91sam9g45())
244 * The debugfs stuff below is mostly optimized away when
245 * CONFIG_DEBUG_FS is not set.
247 static int atmci_req_show(struct seq_file
*s
, void *v
)
249 struct atmel_mci_slot
*slot
= s
->private;
250 struct mmc_request
*mrq
;
251 struct mmc_command
*cmd
;
252 struct mmc_command
*stop
;
253 struct mmc_data
*data
;
255 /* Make sure we get a consistent snapshot */
256 spin_lock_bh(&slot
->host
->lock
);
266 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
267 cmd
->opcode
, cmd
->arg
, cmd
->flags
,
268 cmd
->resp
[0], cmd
->resp
[1], cmd
->resp
[2],
269 cmd
->resp
[2], cmd
->error
);
271 seq_printf(s
, "DATA %u / %u * %u flg %x err %d\n",
272 data
->bytes_xfered
, data
->blocks
,
273 data
->blksz
, data
->flags
, data
->error
);
276 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
277 stop
->opcode
, stop
->arg
, stop
->flags
,
278 stop
->resp
[0], stop
->resp
[1], stop
->resp
[2],
279 stop
->resp
[2], stop
->error
);
282 spin_unlock_bh(&slot
->host
->lock
);
287 static int atmci_req_open(struct inode
*inode
, struct file
*file
)
289 return single_open(file
, atmci_req_show
, inode
->i_private
);
292 static const struct file_operations atmci_req_fops
= {
293 .owner
= THIS_MODULE
,
294 .open
= atmci_req_open
,
297 .release
= single_release
,
300 static void atmci_show_status_reg(struct seq_file
*s
,
301 const char *regname
, u32 value
)
303 static const char *sr_bit
[] = {
334 seq_printf(s
, "%s:\t0x%08x", regname
, value
);
335 for (i
= 0; i
< ARRAY_SIZE(sr_bit
); i
++) {
336 if (value
& (1 << i
)) {
338 seq_printf(s
, " %s", sr_bit
[i
]);
340 seq_puts(s
, " UNKNOWN");
346 static int atmci_regs_show(struct seq_file
*s
, void *v
)
348 struct atmel_mci
*host
= s
->private;
351 buf
= kmalloc(MCI_REGS_SIZE
, GFP_KERNEL
);
356 * Grab a more or less consistent snapshot. Note that we're
357 * not disabling interrupts, so IMR and SR may not be
360 spin_lock_bh(&host
->lock
);
361 clk_enable(host
->mck
);
362 memcpy_fromio(buf
, host
->regs
, MCI_REGS_SIZE
);
363 clk_disable(host
->mck
);
364 spin_unlock_bh(&host
->lock
);
366 seq_printf(s
, "MR:\t0x%08x%s%s CLKDIV=%u\n",
368 buf
[MCI_MR
/ 4] & MCI_MR_RDPROOF
? " RDPROOF" : "",
369 buf
[MCI_MR
/ 4] & MCI_MR_WRPROOF
? " WRPROOF" : "",
370 buf
[MCI_MR
/ 4] & 0xff);
371 seq_printf(s
, "DTOR:\t0x%08x\n", buf
[MCI_DTOR
/ 4]);
372 seq_printf(s
, "SDCR:\t0x%08x\n", buf
[MCI_SDCR
/ 4]);
373 seq_printf(s
, "ARGR:\t0x%08x\n", buf
[MCI_ARGR
/ 4]);
374 seq_printf(s
, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
376 buf
[MCI_BLKR
/ 4] & 0xffff,
377 (buf
[MCI_BLKR
/ 4] >> 16) & 0xffff);
379 seq_printf(s
, "CSTOR:\t0x%08x\n", buf
[MCI_CSTOR
/ 4]);
381 /* Don't read RSPR and RDR; it will consume the data there */
383 atmci_show_status_reg(s
, "SR", buf
[MCI_SR
/ 4]);
384 atmci_show_status_reg(s
, "IMR", buf
[MCI_IMR
/ 4]);
386 if (atmci_is_mci2()) {
389 val
= buf
[MCI_DMA
/ 4];
390 seq_printf(s
, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
393 1 << (((val
>> 4) & 3) + 1) : 1,
394 val
& MCI_DMAEN
? " DMAEN" : "");
396 val
= buf
[MCI_CFG
/ 4];
397 seq_printf(s
, "CFG:\t0x%08x%s%s%s%s\n",
399 val
& MCI_CFG_FIFOMODE_1DATA
? " FIFOMODE_ONE_DATA" : "",
400 val
& MCI_CFG_FERRCTRL_COR
? " FERRCTRL_CLEAR_ON_READ" : "",
401 val
& MCI_CFG_HSMODE
? " HSMODE" : "",
402 val
& MCI_CFG_LSYNC
? " LSYNC" : "");
410 static int atmci_regs_open(struct inode
*inode
, struct file
*file
)
412 return single_open(file
, atmci_regs_show
, inode
->i_private
);
415 static const struct file_operations atmci_regs_fops
= {
416 .owner
= THIS_MODULE
,
417 .open
= atmci_regs_open
,
420 .release
= single_release
,
423 static void atmci_init_debugfs(struct atmel_mci_slot
*slot
)
425 struct mmc_host
*mmc
= slot
->mmc
;
426 struct atmel_mci
*host
= slot
->host
;
430 root
= mmc
->debugfs_root
;
434 node
= debugfs_create_file("regs", S_IRUSR
, root
, host
,
441 node
= debugfs_create_file("req", S_IRUSR
, root
, slot
, &atmci_req_fops
);
445 node
= debugfs_create_u32("state", S_IRUSR
, root
, (u32
*)&host
->state
);
449 node
= debugfs_create_x32("pending_events", S_IRUSR
, root
,
450 (u32
*)&host
->pending_events
);
454 node
= debugfs_create_x32("completed_events", S_IRUSR
, root
,
455 (u32
*)&host
->completed_events
);
462 dev_err(&mmc
->class_dev
, "failed to initialize debugfs for slot\n");
465 static inline unsigned int ns_to_clocks(struct atmel_mci
*host
,
468 return (ns
* (host
->bus_hz
/ 1000000) + 999) / 1000;
471 static void atmci_set_timeout(struct atmel_mci
*host
,
472 struct atmel_mci_slot
*slot
, struct mmc_data
*data
)
474 static unsigned dtomul_to_shift
[] = {
475 0, 4, 7, 8, 10, 12, 16, 20
481 timeout
= ns_to_clocks(host
, data
->timeout_ns
) + data
->timeout_clks
;
483 for (dtomul
= 0; dtomul
< 8; dtomul
++) {
484 unsigned shift
= dtomul_to_shift
[dtomul
];
485 dtocyc
= (timeout
+ (1 << shift
) - 1) >> shift
;
495 dev_vdbg(&slot
->mmc
->class_dev
, "setting timeout to %u cycles\n",
496 dtocyc
<< dtomul_to_shift
[dtomul
]);
497 mci_writel(host
, DTOR
, (MCI_DTOMUL(dtomul
) | MCI_DTOCYC(dtocyc
)));
501 * Return mask with command flags to be enabled for this command.
503 static u32
atmci_prepare_command(struct mmc_host
*mmc
,
504 struct mmc_command
*cmd
)
506 struct mmc_data
*data
;
509 cmd
->error
= -EINPROGRESS
;
511 cmdr
= MCI_CMDR_CMDNB(cmd
->opcode
);
513 if (cmd
->flags
& MMC_RSP_PRESENT
) {
514 if (cmd
->flags
& MMC_RSP_136
)
515 cmdr
|= MCI_CMDR_RSPTYP_136BIT
;
517 cmdr
|= MCI_CMDR_RSPTYP_48BIT
;
521 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
522 * it's too difficult to determine whether this is an ACMD or
523 * not. Better make it 64.
525 cmdr
|= MCI_CMDR_MAXLAT_64CYC
;
527 if (mmc
->ios
.bus_mode
== MMC_BUSMODE_OPENDRAIN
)
528 cmdr
|= MCI_CMDR_OPDCMD
;
532 cmdr
|= MCI_CMDR_START_XFER
;
533 if (data
->flags
& MMC_DATA_STREAM
)
534 cmdr
|= MCI_CMDR_STREAM
;
535 else if (data
->blocks
> 1)
536 cmdr
|= MCI_CMDR_MULTI_BLOCK
;
538 cmdr
|= MCI_CMDR_BLOCK
;
540 if (data
->flags
& MMC_DATA_READ
)
541 cmdr
|= MCI_CMDR_TRDIR_READ
;
547 static void atmci_start_command(struct atmel_mci
*host
,
548 struct mmc_command
*cmd
, u32 cmd_flags
)
553 dev_vdbg(&host
->pdev
->dev
,
554 "start command: ARGR=0x%08x CMDR=0x%08x\n",
555 cmd
->arg
, cmd_flags
);
557 mci_writel(host
, ARGR
, cmd
->arg
);
558 mci_writel(host
, CMDR
, cmd_flags
);
561 static void send_stop_cmd(struct atmel_mci
*host
, struct mmc_data
*data
)
563 atmci_start_command(host
, data
->stop
, host
->stop_cmdr
);
564 mci_writel(host
, IER
, MCI_CMDRDY
);
567 #ifdef CONFIG_MMC_ATMELMCI_DMA
568 static void atmci_dma_cleanup(struct atmel_mci
*host
)
570 struct mmc_data
*data
= host
->data
;
573 dma_unmap_sg(&host
->pdev
->dev
, data
->sg
, data
->sg_len
,
574 ((data
->flags
& MMC_DATA_WRITE
)
575 ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
));
578 static void atmci_stop_dma(struct atmel_mci
*host
)
580 struct dma_chan
*chan
= host
->data_chan
;
583 chan
->device
->device_terminate_all(chan
);
584 atmci_dma_cleanup(host
);
586 /* Data transfer was stopped by the interrupt handler */
587 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
588 mci_writel(host
, IER
, MCI_NOTBUSY
);
592 /* This function is called by the DMA driver from tasklet context. */
593 static void atmci_dma_complete(void *arg
)
595 struct atmel_mci
*host
= arg
;
596 struct mmc_data
*data
= host
->data
;
598 dev_vdbg(&host
->pdev
->dev
, "DMA complete\n");
601 /* Disable DMA hardware handshaking on MCI */
602 mci_writel(host
, DMA
, mci_readl(host
, DMA
) & ~MCI_DMAEN
);
604 atmci_dma_cleanup(host
);
607 * If the card was removed, data will be NULL. No point trying
608 * to send the stop command or waiting for NBUSY in this case.
611 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
612 tasklet_schedule(&host
->tasklet
);
615 * Regardless of what the documentation says, we have
616 * to wait for NOTBUSY even after block read
619 * When the DMA transfer is complete, the controller
620 * may still be reading the CRC from the card, i.e.
621 * the data transfer is still in progress and we
622 * haven't seen all the potential error bits yet.
624 * The interrupt handler will schedule a different
625 * tasklet to finish things up when the data transfer
626 * is completely done.
628 * We may not complete the mmc request here anyway
629 * because the mmc layer may call back and cause us to
630 * violate the "don't submit new operations from the
631 * completion callback" rule of the dma engine
634 mci_writel(host
, IER
, MCI_NOTBUSY
);
639 atmci_prepare_data_dma(struct atmel_mci
*host
, struct mmc_data
*data
)
641 struct dma_chan
*chan
;
642 struct dma_async_tx_descriptor
*desc
;
643 struct scatterlist
*sg
;
645 enum dma_data_direction direction
;
649 * We don't do DMA on "complex" transfers, i.e. with
650 * non-word-aligned buffers or lengths. Also, we don't bother
651 * with all the DMA setup overhead for short transfers.
653 if (data
->blocks
* data
->blksz
< ATMCI_DMA_THRESHOLD
)
658 for_each_sg(data
->sg
, sg
, data
->sg_len
, i
) {
659 if (sg
->offset
& 3 || sg
->length
& 3)
663 /* If we don't have a channel, we can't do DMA */
664 chan
= host
->dma
.chan
;
666 host
->data_chan
= chan
;
672 mci_writel(host
, DMA
, MCI_DMA_CHKSIZE(3) | MCI_DMAEN
);
674 if (data
->flags
& MMC_DATA_READ
)
675 direction
= DMA_FROM_DEVICE
;
677 direction
= DMA_TO_DEVICE
;
679 sglen
= dma_map_sg(&host
->pdev
->dev
, data
->sg
, data
->sg_len
, direction
);
680 if (sglen
!= data
->sg_len
)
682 desc
= chan
->device
->device_prep_slave_sg(chan
,
683 data
->sg
, data
->sg_len
, direction
,
684 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
688 host
->dma
.data_desc
= desc
;
689 desc
->callback
= atmci_dma_complete
;
690 desc
->callback_param
= host
;
694 dma_unmap_sg(&host
->pdev
->dev
, data
->sg
, sglen
, direction
);
698 static void atmci_submit_data(struct atmel_mci
*host
)
700 struct dma_chan
*chan
= host
->data_chan
;
701 struct dma_async_tx_descriptor
*desc
= host
->dma
.data_desc
;
704 desc
->tx_submit(desc
);
705 chan
->device
->device_issue_pending(chan
);
709 #else /* CONFIG_MMC_ATMELMCI_DMA */
711 static int atmci_prepare_data_dma(struct atmel_mci
*host
, struct mmc_data
*data
)
716 static void atmci_submit_data(struct atmel_mci
*host
) {}
718 static void atmci_stop_dma(struct atmel_mci
*host
)
720 /* Data transfer was stopped by the interrupt handler */
721 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
722 mci_writel(host
, IER
, MCI_NOTBUSY
);
725 #endif /* CONFIG_MMC_ATMELMCI_DMA */
728 * Returns a mask of interrupt flags to be enabled after the whole
729 * request has been prepared.
731 static u32
atmci_prepare_data(struct atmel_mci
*host
, struct mmc_data
*data
)
735 data
->error
= -EINPROGRESS
;
741 iflags
= ATMCI_DATA_ERROR_FLAGS
;
742 if (atmci_prepare_data_dma(host
, data
)) {
743 host
->data_chan
= NULL
;
746 * Errata: MMC data write operation with less than 12
747 * bytes is impossible.
749 * Errata: MCI Transmit Data Register (TDR) FIFO
750 * corruption when length is not multiple of 4.
752 if (data
->blocks
* data
->blksz
< 12
753 || (data
->blocks
* data
->blksz
) & 3)
754 host
->need_reset
= true;
757 host
->pio_offset
= 0;
758 if (data
->flags
& MMC_DATA_READ
)
767 static void atmci_start_request(struct atmel_mci
*host
,
768 struct atmel_mci_slot
*slot
)
770 struct mmc_request
*mrq
;
771 struct mmc_command
*cmd
;
772 struct mmc_data
*data
;
777 host
->cur_slot
= slot
;
780 host
->pending_events
= 0;
781 host
->completed_events
= 0;
782 host
->data_status
= 0;
784 if (host
->need_reset
) {
785 mci_writel(host
, CR
, MCI_CR_SWRST
);
786 mci_writel(host
, CR
, MCI_CR_MCIEN
);
787 mci_writel(host
, MR
, host
->mode_reg
);
789 mci_writel(host
, CFG
, host
->cfg_reg
);
790 host
->need_reset
= false;
792 mci_writel(host
, SDCR
, slot
->sdc_reg
);
794 iflags
= mci_readl(host
, IMR
);
796 dev_warn(&slot
->mmc
->class_dev
, "WARNING: IMR=0x%08x\n",
799 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT
, &slot
->flags
))) {
800 /* Send init sequence (74 clock cycles) */
801 mci_writel(host
, CMDR
, MCI_CMDR_SPCMD_INIT
);
802 while (!(mci_readl(host
, SR
) & MCI_CMDRDY
))
808 atmci_set_timeout(host
, slot
, data
);
810 /* Must set block count/size before sending command */
811 mci_writel(host
, BLKR
, MCI_BCNT(data
->blocks
)
812 | MCI_BLKLEN(data
->blksz
));
813 dev_vdbg(&slot
->mmc
->class_dev
, "BLKR=0x%08x\n",
814 MCI_BCNT(data
->blocks
) | MCI_BLKLEN(data
->blksz
));
816 iflags
|= atmci_prepare_data(host
, data
);
819 iflags
|= MCI_CMDRDY
;
821 cmdflags
= atmci_prepare_command(slot
->mmc
, cmd
);
822 atmci_start_command(host
, cmd
, cmdflags
);
825 atmci_submit_data(host
);
828 host
->stop_cmdr
= atmci_prepare_command(slot
->mmc
, mrq
->stop
);
829 host
->stop_cmdr
|= MCI_CMDR_STOP_XFER
;
830 if (!(data
->flags
& MMC_DATA_WRITE
))
831 host
->stop_cmdr
|= MCI_CMDR_TRDIR_READ
;
832 if (data
->flags
& MMC_DATA_STREAM
)
833 host
->stop_cmdr
|= MCI_CMDR_STREAM
;
835 host
->stop_cmdr
|= MCI_CMDR_MULTI_BLOCK
;
839 * We could have enabled interrupts earlier, but I suspect
840 * that would open up a nice can of interesting race
841 * conditions (e.g. command and data complete, but stop not
844 mci_writel(host
, IER
, iflags
);
847 static void atmci_queue_request(struct atmel_mci
*host
,
848 struct atmel_mci_slot
*slot
, struct mmc_request
*mrq
)
850 dev_vdbg(&slot
->mmc
->class_dev
, "queue request: state=%d\n",
853 spin_lock_bh(&host
->lock
);
855 if (host
->state
== STATE_IDLE
) {
856 host
->state
= STATE_SENDING_CMD
;
857 atmci_start_request(host
, slot
);
859 list_add_tail(&slot
->queue_node
, &host
->queue
);
861 spin_unlock_bh(&host
->lock
);
864 static void atmci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
866 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
867 struct atmel_mci
*host
= slot
->host
;
868 struct mmc_data
*data
;
873 * We may "know" the card is gone even though there's still an
874 * electrical connection. If so, we really need to communicate
875 * this to the MMC core since there won't be any more
876 * interrupts as the card is completely removed. Otherwise,
877 * the MMC core might believe the card is still there even
878 * though the card was just removed very slowly.
880 if (!test_bit(ATMCI_CARD_PRESENT
, &slot
->flags
)) {
881 mrq
->cmd
->error
= -ENOMEDIUM
;
882 mmc_request_done(mmc
, mrq
);
886 /* We don't support multiple blocks of weird lengths. */
888 if (data
&& data
->blocks
> 1 && data
->blksz
& 3) {
889 mrq
->cmd
->error
= -EINVAL
;
890 mmc_request_done(mmc
, mrq
);
893 atmci_queue_request(host
, slot
, mrq
);
896 static void atmci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
898 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
899 struct atmel_mci
*host
= slot
->host
;
902 slot
->sdc_reg
&= ~MCI_SDCBUS_MASK
;
903 switch (ios
->bus_width
) {
904 case MMC_BUS_WIDTH_1
:
905 slot
->sdc_reg
|= MCI_SDCBUS_1BIT
;
907 case MMC_BUS_WIDTH_4
:
908 slot
->sdc_reg
|= MCI_SDCBUS_4BIT
;
913 unsigned int clock_min
= ~0U;
916 spin_lock_bh(&host
->lock
);
917 if (!host
->mode_reg
) {
918 clk_enable(host
->mck
);
919 mci_writel(host
, CR
, MCI_CR_SWRST
);
920 mci_writel(host
, CR
, MCI_CR_MCIEN
);
922 mci_writel(host
, CFG
, host
->cfg_reg
);
926 * Use mirror of ios->clock to prevent race with mmc
927 * core ios update when finding the minimum.
929 slot
->clock
= ios
->clock
;
930 for (i
= 0; i
< ATMEL_MCI_MAX_NR_SLOTS
; i
++) {
931 if (host
->slot
[i
] && host
->slot
[i
]->clock
932 && host
->slot
[i
]->clock
< clock_min
)
933 clock_min
= host
->slot
[i
]->clock
;
936 /* Calculate clock divider */
937 clkdiv
= DIV_ROUND_UP(host
->bus_hz
, 2 * clock_min
) - 1;
939 dev_warn(&mmc
->class_dev
,
940 "clock %u too slow; using %lu\n",
941 clock_min
, host
->bus_hz
/ (2 * 256));
945 host
->mode_reg
= MCI_MR_CLKDIV(clkdiv
);
948 * WRPROOF and RDPROOF prevent overruns/underruns by
949 * stopping the clock when the FIFO is full/empty.
950 * This state is not expected to last for long.
952 if (mci_has_rwproof())
953 host
->mode_reg
|= (MCI_MR_WRPROOF
| MCI_MR_RDPROOF
);
955 if (list_empty(&host
->queue
))
956 mci_writel(host
, MR
, host
->mode_reg
);
958 host
->need_clock_update
= true;
960 spin_unlock_bh(&host
->lock
);
962 bool any_slot_active
= false;
964 spin_lock_bh(&host
->lock
);
966 for (i
= 0; i
< ATMEL_MCI_MAX_NR_SLOTS
; i
++) {
967 if (host
->slot
[i
] && host
->slot
[i
]->clock
) {
968 any_slot_active
= true;
972 if (!any_slot_active
) {
973 mci_writel(host
, CR
, MCI_CR_MCIDIS
);
974 if (host
->mode_reg
) {
976 clk_disable(host
->mck
);
980 spin_unlock_bh(&host
->lock
);
983 switch (ios
->power_mode
) {
985 set_bit(ATMCI_CARD_NEED_INIT
, &slot
->flags
);
989 * TODO: None of the currently available AVR32-based
990 * boards allow MMC power to be turned off. Implement
991 * power control when this can be tested properly.
993 * We also need to hook this into the clock management
994 * somehow so that newly inserted cards aren't
995 * subjected to a fast clock before we have a chance
996 * to figure out what the maximum rate is. Currently,
997 * there's no way to avoid this, and there never will
998 * be for boards that don't support power control.
1004 static int atmci_get_ro(struct mmc_host
*mmc
)
1006 int read_only
= -ENOSYS
;
1007 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1009 if (gpio_is_valid(slot
->wp_pin
)) {
1010 read_only
= gpio_get_value(slot
->wp_pin
);
1011 dev_dbg(&mmc
->class_dev
, "card is %s\n",
1012 read_only
? "read-only" : "read-write");
1018 static int atmci_get_cd(struct mmc_host
*mmc
)
1020 int present
= -ENOSYS
;
1021 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1023 if (gpio_is_valid(slot
->detect_pin
)) {
1024 present
= !(gpio_get_value(slot
->detect_pin
) ^
1025 slot
->detect_is_active_high
);
1026 dev_dbg(&mmc
->class_dev
, "card is %spresent\n",
1027 present
? "" : "not ");
1033 static const struct mmc_host_ops atmci_ops
= {
1034 .request
= atmci_request
,
1035 .set_ios
= atmci_set_ios
,
1036 .get_ro
= atmci_get_ro
,
1037 .get_cd
= atmci_get_cd
,
1040 /* Called with host->lock held */
1041 static void atmci_request_end(struct atmel_mci
*host
, struct mmc_request
*mrq
)
1042 __releases(&host
->lock
)
1043 __acquires(&host
->lock
)
1045 struct atmel_mci_slot
*slot
= NULL
;
1046 struct mmc_host
*prev_mmc
= host
->cur_slot
->mmc
;
1048 WARN_ON(host
->cmd
|| host
->data
);
1051 * Update the MMC clock rate if necessary. This may be
1052 * necessary if set_ios() is called when a different slot is
1053 * busy transfering data.
1055 if (host
->need_clock_update
)
1056 mci_writel(host
, MR
, host
->mode_reg
);
1058 host
->cur_slot
->mrq
= NULL
;
1060 if (!list_empty(&host
->queue
)) {
1061 slot
= list_entry(host
->queue
.next
,
1062 struct atmel_mci_slot
, queue_node
);
1063 list_del(&slot
->queue_node
);
1064 dev_vdbg(&host
->pdev
->dev
, "list not empty: %s is next\n",
1065 mmc_hostname(slot
->mmc
));
1066 host
->state
= STATE_SENDING_CMD
;
1067 atmci_start_request(host
, slot
);
1069 dev_vdbg(&host
->pdev
->dev
, "list empty\n");
1070 host
->state
= STATE_IDLE
;
1073 spin_unlock(&host
->lock
);
1074 mmc_request_done(prev_mmc
, mrq
);
1075 spin_lock(&host
->lock
);
1078 static void atmci_command_complete(struct atmel_mci
*host
,
1079 struct mmc_command
*cmd
)
1081 u32 status
= host
->cmd_status
;
1083 /* Read the response from the card (up to 16 bytes) */
1084 cmd
->resp
[0] = mci_readl(host
, RSPR
);
1085 cmd
->resp
[1] = mci_readl(host
, RSPR
);
1086 cmd
->resp
[2] = mci_readl(host
, RSPR
);
1087 cmd
->resp
[3] = mci_readl(host
, RSPR
);
1089 if (status
& MCI_RTOE
)
1090 cmd
->error
= -ETIMEDOUT
;
1091 else if ((cmd
->flags
& MMC_RSP_CRC
) && (status
& MCI_RCRCE
))
1092 cmd
->error
= -EILSEQ
;
1093 else if (status
& (MCI_RINDE
| MCI_RDIRE
| MCI_RENDE
))
1099 dev_dbg(&host
->pdev
->dev
,
1100 "command error: status=0x%08x\n", status
);
1103 atmci_stop_dma(host
);
1105 mci_writel(host
, IDR
, MCI_NOTBUSY
1106 | MCI_TXRDY
| MCI_RXRDY
1107 | ATMCI_DATA_ERROR_FLAGS
);
1112 static void atmci_detect_change(unsigned long data
)
1114 struct atmel_mci_slot
*slot
= (struct atmel_mci_slot
*)data
;
1119 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1120 * freeing the interrupt. We must not re-enable the interrupt
1121 * if it has been freed, and if we're shutting down, it
1122 * doesn't really matter whether the card is present or not.
1125 if (test_bit(ATMCI_SHUTDOWN
, &slot
->flags
))
1128 enable_irq(gpio_to_irq(slot
->detect_pin
));
1129 present
= !(gpio_get_value(slot
->detect_pin
) ^
1130 slot
->detect_is_active_high
);
1131 present_old
= test_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1133 dev_vdbg(&slot
->mmc
->class_dev
, "detect change: %d (was %d)\n",
1134 present
, present_old
);
1136 if (present
!= present_old
) {
1137 struct atmel_mci
*host
= slot
->host
;
1138 struct mmc_request
*mrq
;
1140 dev_dbg(&slot
->mmc
->class_dev
, "card %s\n",
1141 present
? "inserted" : "removed");
1143 spin_lock(&host
->lock
);
1146 clear_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1148 set_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1150 /* Clean up queue if present */
1153 if (mrq
== host
->mrq
) {
1155 * Reset controller to terminate any ongoing
1156 * commands or data transfers.
1158 mci_writel(host
, CR
, MCI_CR_SWRST
);
1159 mci_writel(host
, CR
, MCI_CR_MCIEN
);
1160 mci_writel(host
, MR
, host
->mode_reg
);
1161 if (atmci_is_mci2())
1162 mci_writel(host
, CFG
, host
->cfg_reg
);
1167 switch (host
->state
) {
1170 case STATE_SENDING_CMD
:
1171 mrq
->cmd
->error
= -ENOMEDIUM
;
1175 case STATE_SENDING_DATA
:
1176 mrq
->data
->error
= -ENOMEDIUM
;
1177 atmci_stop_dma(host
);
1179 case STATE_DATA_BUSY
:
1180 case STATE_DATA_ERROR
:
1181 if (mrq
->data
->error
== -EINPROGRESS
)
1182 mrq
->data
->error
= -ENOMEDIUM
;
1186 case STATE_SENDING_STOP
:
1187 mrq
->stop
->error
= -ENOMEDIUM
;
1191 atmci_request_end(host
, mrq
);
1193 list_del(&slot
->queue_node
);
1194 mrq
->cmd
->error
= -ENOMEDIUM
;
1196 mrq
->data
->error
= -ENOMEDIUM
;
1198 mrq
->stop
->error
= -ENOMEDIUM
;
1200 spin_unlock(&host
->lock
);
1201 mmc_request_done(slot
->mmc
, mrq
);
1202 spin_lock(&host
->lock
);
1205 spin_unlock(&host
->lock
);
1207 mmc_detect_change(slot
->mmc
, 0);
1211 static void atmci_tasklet_func(unsigned long priv
)
1213 struct atmel_mci
*host
= (struct atmel_mci
*)priv
;
1214 struct mmc_request
*mrq
= host
->mrq
;
1215 struct mmc_data
*data
= host
->data
;
1216 struct mmc_command
*cmd
= host
->cmd
;
1217 enum atmel_mci_state state
= host
->state
;
1218 enum atmel_mci_state prev_state
;
1221 spin_lock(&host
->lock
);
1223 state
= host
->state
;
1225 dev_vdbg(&host
->pdev
->dev
,
1226 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1227 state
, host
->pending_events
, host
->completed_events
,
1228 mci_readl(host
, IMR
));
1237 case STATE_SENDING_CMD
:
1238 if (!atmci_test_and_clear_pending(host
,
1239 EVENT_CMD_COMPLETE
))
1243 atmci_set_completed(host
, EVENT_CMD_COMPLETE
);
1244 atmci_command_complete(host
, mrq
->cmd
);
1245 if (!mrq
->data
|| cmd
->error
) {
1246 atmci_request_end(host
, host
->mrq
);
1250 prev_state
= state
= STATE_SENDING_DATA
;
1253 case STATE_SENDING_DATA
:
1254 if (atmci_test_and_clear_pending(host
,
1255 EVENT_DATA_ERROR
)) {
1256 atmci_stop_dma(host
);
1258 send_stop_cmd(host
, data
);
1259 state
= STATE_DATA_ERROR
;
1263 if (!atmci_test_and_clear_pending(host
,
1264 EVENT_XFER_COMPLETE
))
1267 atmci_set_completed(host
, EVENT_XFER_COMPLETE
);
1268 prev_state
= state
= STATE_DATA_BUSY
;
1271 case STATE_DATA_BUSY
:
1272 if (!atmci_test_and_clear_pending(host
,
1273 EVENT_DATA_COMPLETE
))
1277 atmci_set_completed(host
, EVENT_DATA_COMPLETE
);
1278 status
= host
->data_status
;
1279 if (unlikely(status
& ATMCI_DATA_ERROR_FLAGS
)) {
1280 if (status
& MCI_DTOE
) {
1281 dev_dbg(&host
->pdev
->dev
,
1282 "data timeout error\n");
1283 data
->error
= -ETIMEDOUT
;
1284 } else if (status
& MCI_DCRCE
) {
1285 dev_dbg(&host
->pdev
->dev
,
1286 "data CRC error\n");
1287 data
->error
= -EILSEQ
;
1289 dev_dbg(&host
->pdev
->dev
,
1290 "data FIFO error (status=%08x)\n",
1295 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
1297 mci_writel(host
, IDR
, ATMCI_DATA_ERROR_FLAGS
);
1301 atmci_request_end(host
, host
->mrq
);
1305 prev_state
= state
= STATE_SENDING_STOP
;
1307 send_stop_cmd(host
, data
);
1310 case STATE_SENDING_STOP
:
1311 if (!atmci_test_and_clear_pending(host
,
1312 EVENT_CMD_COMPLETE
))
1316 atmci_command_complete(host
, mrq
->stop
);
1317 atmci_request_end(host
, host
->mrq
);
1320 case STATE_DATA_ERROR
:
1321 if (!atmci_test_and_clear_pending(host
,
1322 EVENT_XFER_COMPLETE
))
1325 state
= STATE_DATA_BUSY
;
1328 } while (state
!= prev_state
);
1330 host
->state
= state
;
1333 spin_unlock(&host
->lock
);
1336 static void atmci_read_data_pio(struct atmel_mci
*host
)
1338 struct scatterlist
*sg
= host
->sg
;
1339 void *buf
= sg_virt(sg
);
1340 unsigned int offset
= host
->pio_offset
;
1341 struct mmc_data
*data
= host
->data
;
1344 unsigned int nbytes
= 0;
1347 value
= mci_readl(host
, RDR
);
1348 if (likely(offset
+ 4 <= sg
->length
)) {
1349 put_unaligned(value
, (u32
*)(buf
+ offset
));
1354 if (offset
== sg
->length
) {
1355 flush_dcache_page(sg_page(sg
));
1356 host
->sg
= sg
= sg_next(sg
);
1364 unsigned int remaining
= sg
->length
- offset
;
1365 memcpy(buf
+ offset
, &value
, remaining
);
1366 nbytes
+= remaining
;
1368 flush_dcache_page(sg_page(sg
));
1369 host
->sg
= sg
= sg_next(sg
);
1373 offset
= 4 - remaining
;
1375 memcpy(buf
, (u8
*)&value
+ remaining
, offset
);
1379 status
= mci_readl(host
, SR
);
1380 if (status
& ATMCI_DATA_ERROR_FLAGS
) {
1381 mci_writel(host
, IDR
, (MCI_NOTBUSY
| MCI_RXRDY
1382 | ATMCI_DATA_ERROR_FLAGS
));
1383 host
->data_status
= status
;
1384 data
->bytes_xfered
+= nbytes
;
1386 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1387 tasklet_schedule(&host
->tasklet
);
1390 } while (status
& MCI_RXRDY
);
1392 host
->pio_offset
= offset
;
1393 data
->bytes_xfered
+= nbytes
;
1398 mci_writel(host
, IDR
, MCI_RXRDY
);
1399 mci_writel(host
, IER
, MCI_NOTBUSY
);
1400 data
->bytes_xfered
+= nbytes
;
1402 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
1405 static void atmci_write_data_pio(struct atmel_mci
*host
)
1407 struct scatterlist
*sg
= host
->sg
;
1408 void *buf
= sg_virt(sg
);
1409 unsigned int offset
= host
->pio_offset
;
1410 struct mmc_data
*data
= host
->data
;
1413 unsigned int nbytes
= 0;
1416 if (likely(offset
+ 4 <= sg
->length
)) {
1417 value
= get_unaligned((u32
*)(buf
+ offset
));
1418 mci_writel(host
, TDR
, value
);
1422 if (offset
== sg
->length
) {
1423 host
->sg
= sg
= sg_next(sg
);
1431 unsigned int remaining
= sg
->length
- offset
;
1434 memcpy(&value
, buf
+ offset
, remaining
);
1435 nbytes
+= remaining
;
1437 host
->sg
= sg
= sg_next(sg
);
1439 mci_writel(host
, TDR
, value
);
1443 offset
= 4 - remaining
;
1445 memcpy((u8
*)&value
+ remaining
, buf
, offset
);
1446 mci_writel(host
, TDR
, value
);
1450 status
= mci_readl(host
, SR
);
1451 if (status
& ATMCI_DATA_ERROR_FLAGS
) {
1452 mci_writel(host
, IDR
, (MCI_NOTBUSY
| MCI_TXRDY
1453 | ATMCI_DATA_ERROR_FLAGS
));
1454 host
->data_status
= status
;
1455 data
->bytes_xfered
+= nbytes
;
1457 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1458 tasklet_schedule(&host
->tasklet
);
1461 } while (status
& MCI_TXRDY
);
1463 host
->pio_offset
= offset
;
1464 data
->bytes_xfered
+= nbytes
;
1469 mci_writel(host
, IDR
, MCI_TXRDY
);
1470 mci_writel(host
, IER
, MCI_NOTBUSY
);
1471 data
->bytes_xfered
+= nbytes
;
1473 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
1476 static void atmci_cmd_interrupt(struct atmel_mci
*host
, u32 status
)
1478 mci_writel(host
, IDR
, MCI_CMDRDY
);
1480 host
->cmd_status
= status
;
1482 atmci_set_pending(host
, EVENT_CMD_COMPLETE
);
1483 tasklet_schedule(&host
->tasklet
);
1486 static irqreturn_t
atmci_interrupt(int irq
, void *dev_id
)
1488 struct atmel_mci
*host
= dev_id
;
1489 u32 status
, mask
, pending
;
1490 unsigned int pass_count
= 0;
1493 status
= mci_readl(host
, SR
);
1494 mask
= mci_readl(host
, IMR
);
1495 pending
= status
& mask
;
1499 if (pending
& ATMCI_DATA_ERROR_FLAGS
) {
1500 mci_writel(host
, IDR
, ATMCI_DATA_ERROR_FLAGS
1501 | MCI_RXRDY
| MCI_TXRDY
);
1502 pending
&= mci_readl(host
, IMR
);
1504 host
->data_status
= status
;
1506 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1507 tasklet_schedule(&host
->tasklet
);
1509 if (pending
& MCI_NOTBUSY
) {
1510 mci_writel(host
, IDR
,
1511 ATMCI_DATA_ERROR_FLAGS
| MCI_NOTBUSY
);
1512 if (!host
->data_status
)
1513 host
->data_status
= status
;
1515 atmci_set_pending(host
, EVENT_DATA_COMPLETE
);
1516 tasklet_schedule(&host
->tasklet
);
1518 if (pending
& MCI_RXRDY
)
1519 atmci_read_data_pio(host
);
1520 if (pending
& MCI_TXRDY
)
1521 atmci_write_data_pio(host
);
1523 if (pending
& MCI_CMDRDY
)
1524 atmci_cmd_interrupt(host
, status
);
1525 } while (pass_count
++ < 5);
1527 return pass_count
? IRQ_HANDLED
: IRQ_NONE
;
1530 static irqreturn_t
atmci_detect_interrupt(int irq
, void *dev_id
)
1532 struct atmel_mci_slot
*slot
= dev_id
;
1535 * Disable interrupts until the pin has stabilized and check
1536 * the state then. Use mod_timer() since we may be in the
1537 * middle of the timer routine when this interrupt triggers.
1539 disable_irq_nosync(irq
);
1540 mod_timer(&slot
->detect_timer
, jiffies
+ msecs_to_jiffies(20));
1545 static int __init
atmci_init_slot(struct atmel_mci
*host
,
1546 struct mci_slot_pdata
*slot_data
, unsigned int id
,
1549 struct mmc_host
*mmc
;
1550 struct atmel_mci_slot
*slot
;
1552 mmc
= mmc_alloc_host(sizeof(struct atmel_mci_slot
), &host
->pdev
->dev
);
1556 slot
= mmc_priv(mmc
);
1559 slot
->detect_pin
= slot_data
->detect_pin
;
1560 slot
->wp_pin
= slot_data
->wp_pin
;
1561 slot
->detect_is_active_high
= slot_data
->detect_is_active_high
;
1562 slot
->sdc_reg
= sdc_reg
;
1564 mmc
->ops
= &atmci_ops
;
1565 mmc
->f_min
= DIV_ROUND_UP(host
->bus_hz
, 512);
1566 mmc
->f_max
= host
->bus_hz
/ 2;
1567 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
1568 if (slot_data
->bus_width
>= 4)
1569 mmc
->caps
|= MMC_CAP_4_BIT_DATA
;
1571 mmc
->max_hw_segs
= 64;
1572 mmc
->max_phys_segs
= 64;
1573 mmc
->max_req_size
= 32768 * 512;
1574 mmc
->max_blk_size
= 32768;
1575 mmc
->max_blk_count
= 512;
1577 /* Assume card is present initially */
1578 set_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1579 if (gpio_is_valid(slot
->detect_pin
)) {
1580 if (gpio_request(slot
->detect_pin
, "mmc_detect")) {
1581 dev_dbg(&mmc
->class_dev
, "no detect pin available\n");
1582 slot
->detect_pin
= -EBUSY
;
1583 } else if (gpio_get_value(slot
->detect_pin
) ^
1584 slot
->detect_is_active_high
) {
1585 clear_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1589 if (!gpio_is_valid(slot
->detect_pin
))
1590 mmc
->caps
|= MMC_CAP_NEEDS_POLL
;
1592 if (gpio_is_valid(slot
->wp_pin
)) {
1593 if (gpio_request(slot
->wp_pin
, "mmc_wp")) {
1594 dev_dbg(&mmc
->class_dev
, "no WP pin available\n");
1595 slot
->wp_pin
= -EBUSY
;
1599 host
->slot
[id
] = slot
;
1602 if (gpio_is_valid(slot
->detect_pin
)) {
1605 setup_timer(&slot
->detect_timer
, atmci_detect_change
,
1606 (unsigned long)slot
);
1608 ret
= request_irq(gpio_to_irq(slot
->detect_pin
),
1609 atmci_detect_interrupt
,
1610 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
,
1611 "mmc-detect", slot
);
1613 dev_dbg(&mmc
->class_dev
,
1614 "could not request IRQ %d for detect pin\n",
1615 gpio_to_irq(slot
->detect_pin
));
1616 gpio_free(slot
->detect_pin
);
1617 slot
->detect_pin
= -EBUSY
;
1621 atmci_init_debugfs(slot
);
1626 static void __exit
atmci_cleanup_slot(struct atmel_mci_slot
*slot
,
1629 /* Debugfs stuff is cleaned up by mmc core */
1631 set_bit(ATMCI_SHUTDOWN
, &slot
->flags
);
1634 mmc_remove_host(slot
->mmc
);
1636 if (gpio_is_valid(slot
->detect_pin
)) {
1637 int pin
= slot
->detect_pin
;
1639 free_irq(gpio_to_irq(pin
), slot
);
1640 del_timer_sync(&slot
->detect_timer
);
1643 if (gpio_is_valid(slot
->wp_pin
))
1644 gpio_free(slot
->wp_pin
);
1646 slot
->host
->slot
[id
] = NULL
;
1647 mmc_free_host(slot
->mmc
);
1650 #ifdef CONFIG_MMC_ATMELMCI_DMA
1651 static bool filter(struct dma_chan
*chan
, void *slave
)
1653 struct mci_dma_data
*sl
= slave
;
1655 if (sl
&& find_slave_dev(sl
) == chan
->device
->dev
) {
1656 chan
->private = slave_data_ptr(sl
);
1663 static void atmci_configure_dma(struct atmel_mci
*host
)
1665 struct mci_platform_data
*pdata
;
1670 pdata
= host
->pdev
->dev
.platform_data
;
1672 if (pdata
&& find_slave_dev(pdata
->dma_slave
)) {
1673 dma_cap_mask_t mask
;
1675 setup_dma_addr(pdata
->dma_slave
,
1676 host
->mapbase
+ MCI_TDR
,
1677 host
->mapbase
+ MCI_RDR
);
1679 /* Try to grab a DMA channel */
1681 dma_cap_set(DMA_SLAVE
, mask
);
1683 dma_request_channel(mask
, filter
, pdata
->dma_slave
);
1685 if (!host
->dma
.chan
)
1686 dev_notice(&host
->pdev
->dev
, "DMA not available, using PIO\n");
1688 dev_info(&host
->pdev
->dev
,
1689 "Using %s for DMA transfers\n",
1690 dma_chan_name(host
->dma
.chan
));
1693 static void atmci_configure_dma(struct atmel_mci
*host
) {}
1696 static int __init
atmci_probe(struct platform_device
*pdev
)
1698 struct mci_platform_data
*pdata
;
1699 struct atmel_mci
*host
;
1700 struct resource
*regs
;
1701 unsigned int nr_slots
;
1705 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1708 pdata
= pdev
->dev
.platform_data
;
1711 irq
= platform_get_irq(pdev
, 0);
1715 host
= kzalloc(sizeof(struct atmel_mci
), GFP_KERNEL
);
1720 spin_lock_init(&host
->lock
);
1721 INIT_LIST_HEAD(&host
->queue
);
1723 host
->mck
= clk_get(&pdev
->dev
, "mci_clk");
1724 if (IS_ERR(host
->mck
)) {
1725 ret
= PTR_ERR(host
->mck
);
1730 host
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1734 clk_enable(host
->mck
);
1735 mci_writel(host
, CR
, MCI_CR_SWRST
);
1736 host
->bus_hz
= clk_get_rate(host
->mck
);
1737 clk_disable(host
->mck
);
1739 host
->mapbase
= regs
->start
;
1741 tasklet_init(&host
->tasklet
, atmci_tasklet_func
, (unsigned long)host
);
1743 ret
= request_irq(irq
, atmci_interrupt
, 0, dev_name(&pdev
->dev
), host
);
1745 goto err_request_irq
;
1747 atmci_configure_dma(host
);
1749 platform_set_drvdata(pdev
, host
);
1751 /* We need at least one slot to succeed */
1754 if (pdata
->slot
[0].bus_width
) {
1755 ret
= atmci_init_slot(host
, &pdata
->slot
[0],
1756 0, MCI_SDCSEL_SLOT_A
);
1760 if (pdata
->slot
[1].bus_width
) {
1761 ret
= atmci_init_slot(host
, &pdata
->slot
[1],
1762 1, MCI_SDCSEL_SLOT_B
);
1768 dev_err(&pdev
->dev
, "init failed: no slot defined\n");
1772 dev_info(&pdev
->dev
,
1773 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1774 host
->mapbase
, irq
, nr_slots
);
1779 #ifdef CONFIG_MMC_ATMELMCI_DMA
1781 dma_release_channel(host
->dma
.chan
);
1783 free_irq(irq
, host
);
1785 iounmap(host
->regs
);
1793 static int __exit
atmci_remove(struct platform_device
*pdev
)
1795 struct atmel_mci
*host
= platform_get_drvdata(pdev
);
1798 platform_set_drvdata(pdev
, NULL
);
1800 for (i
= 0; i
< ATMEL_MCI_MAX_NR_SLOTS
; i
++) {
1802 atmci_cleanup_slot(host
->slot
[i
], i
);
1805 clk_enable(host
->mck
);
1806 mci_writel(host
, IDR
, ~0UL);
1807 mci_writel(host
, CR
, MCI_CR_MCIDIS
);
1808 mci_readl(host
, SR
);
1809 clk_disable(host
->mck
);
1811 #ifdef CONFIG_MMC_ATMELMCI_DMA
1813 dma_release_channel(host
->dma
.chan
);
1816 free_irq(platform_get_irq(pdev
, 0), host
);
1817 iounmap(host
->regs
);
1825 static struct platform_driver atmci_driver
= {
1826 .remove
= __exit_p(atmci_remove
),
1828 .name
= "atmel_mci",
1832 static int __init
atmci_init(void)
1834 return platform_driver_probe(&atmci_driver
, atmci_probe
);
1837 static void __exit
atmci_exit(void)
1839 platform_driver_unregister(&atmci_driver
);
1842 late_initcall(atmci_init
); /* try to load after dma driver when built-in */
1843 module_exit(atmci_exit
);
1845 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1846 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1847 MODULE_LICENSE("GPL v2");