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[PATCH] bcm43xx: add functions bcm43xx_dma_read/write, bcm43xx_dma_tx_suspend/resume.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / bcm43xx / bcm43xx_dma.c
blobfbe19b922aa71770e61dcfa4bfadf8bda8945776
1 /*
2
3 Broadcom BCM43xx wireless driver
4
5 DMA ringbuffer and descriptor allocation/management
6
7 Copyright (c) 2005 Michael Buesch <mbuesch@freenet.de>
8
9 Some code in this file is derived from the b44.c driver
10 Copyright (C) 2002 David S. Miller
11 Copyright (C) Pekka Pietikainen
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
27
28 */
29
30 #include "bcm43xx.h"
31 #include "bcm43xx_dma.h"
32 #include "bcm43xx_main.h"
33 #include "bcm43xx_debugfs.h"
34 #include "bcm43xx_power.h"
35 #include "bcm43xx_xmit.h"
36
37 #include <linux/dmapool.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/skbuff.h>
41 #include <asm/semaphore.h>
42
43
44 static inline int free_slots(struct bcm43xx_dmaring *ring)
45 {
46 return (ring->nr_slots - ring->used_slots);
47 }
48
49 static inline int next_slot(struct bcm43xx_dmaring *ring, int slot)
50 {
51 assert(slot >= -1 && slot <= ring->nr_slots - 1);
52 if (slot == ring->nr_slots - 1)
53 return 0;
54 return slot + 1;
55 }
56
57 static inline int prev_slot(struct bcm43xx_dmaring *ring, int slot)
58 {
59 assert(slot >= 0 && slot <= ring->nr_slots - 1);
60 if (slot == 0)
61 return ring->nr_slots - 1;
62 return slot - 1;
63 }
64
65 /* Request a slot for usage. */
66 static inline
67 int request_slot(struct bcm43xx_dmaring *ring)
68 {
69 int slot;
70
71 assert(ring->tx);
72 assert(!ring->suspended);
73 assert(free_slots(ring) != 0);
74
75 slot = next_slot(ring, ring->current_slot);
76 ring->current_slot = slot;
77 ring->used_slots++;
78
79 /* Check the number of available slots and suspend TX,
80 * if we are running low on free slots.
81 */
82 if (unlikely(free_slots(ring) < ring->suspend_mark)) {
83 netif_stop_queue(ring->bcm->net_dev);
84 ring->suspended = 1;
85 }
86 #ifdef CONFIG_BCM43XX_DEBUG
87 if (ring->used_slots > ring->max_used_slots)
88 ring->max_used_slots = ring->used_slots;
89 #endif /* CONFIG_BCM43XX_DEBUG*/
90
91 return slot;
92 }
93
94 /* Return a slot to the free slots. */
95 static inline
96 void return_slot(struct bcm43xx_dmaring *ring, int slot)
97 {
98 assert(ring->tx);
99
100 ring->used_slots--;
101
102 /* Check if TX is suspended and check if we have
103 * enough free slots to resume it again.
104 */
105 if (unlikely(ring->suspended)) {
106 if (free_slots(ring) >= ring->resume_mark) {
107 ring->suspended = 0;
108 netif_wake_queue(ring->bcm->net_dev);
109 }
110 }
111 }
112
113 static inline
114 dma_addr_t map_descbuffer(struct bcm43xx_dmaring *ring,
115 unsigned char *buf,
116 size_t len,
117 int tx)
118 {
119 dma_addr_t dmaaddr;
120
121 if (tx) {
122 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
123 buf, len,
124 DMA_TO_DEVICE);
125 } else {
126 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
127 buf, len,
128 DMA_FROM_DEVICE);
129 }
130
131 return dmaaddr;
132 }
133
134 static inline
135 void unmap_descbuffer(struct bcm43xx_dmaring *ring,
136 dma_addr_t addr,
137 size_t len,
138 int tx)
139 {
140 if (tx) {
141 dma_unmap_single(&ring->bcm->pci_dev->dev,
142 addr, len,
143 DMA_TO_DEVICE);
144 } else {
145 dma_unmap_single(&ring->bcm->pci_dev->dev,
146 addr, len,
147 DMA_FROM_DEVICE);
148 }
149 }
150
151 static inline
152 void sync_descbuffer_for_cpu(struct bcm43xx_dmaring *ring,
153 dma_addr_t addr,
154 size_t len)
155 {
156 assert(!ring->tx);
157
158 dma_sync_single_for_cpu(&ring->bcm->pci_dev->dev,
159 addr, len, DMA_FROM_DEVICE);
160 }
161
162 static inline
163 void sync_descbuffer_for_device(struct bcm43xx_dmaring *ring,
164 dma_addr_t addr,
165 size_t len)
166 {
167 assert(!ring->tx);
168
169 dma_sync_single_for_device(&ring->bcm->pci_dev->dev,
170 addr, len, DMA_FROM_DEVICE);
171 }
172
173 /* Unmap and free a descriptor buffer. */
174 static inline
175 void free_descriptor_buffer(struct bcm43xx_dmaring *ring,
176 struct bcm43xx_dmadesc *desc,
177 struct bcm43xx_dmadesc_meta *meta,
178 int irq_context)
179 {
180 assert(meta->skb);
181 if (irq_context)
182 dev_kfree_skb_irq(meta->skb);
183 else
184 dev_kfree_skb(meta->skb);
185 meta->skb = NULL;
186 }
187
188 static int alloc_ringmemory(struct bcm43xx_dmaring *ring)
189 {
190 struct device *dev = &(ring->bcm->pci_dev->dev);
191
192 ring->vbase = dma_alloc_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
193 &(ring->dmabase), GFP_KERNEL);
194 if (!ring->vbase) {
195 printk(KERN_ERR PFX "DMA ringmemory allocation failed\n");
196 return -ENOMEM;
197 }
198 if (ring->dmabase + BCM43xx_DMA_RINGMEMSIZE > BCM43xx_DMA_BUSADDRMAX) {
199 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RINGMEMORY >1G "
200 "(0x%08x, len: %lu)\n",
201 ring->dmabase, BCM43xx_DMA_RINGMEMSIZE);
202 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
203 ring->vbase, ring->dmabase);
204 return -ENOMEM;
205 }
206 assert(!(ring->dmabase & 0x000003FF));
207 memset(ring->vbase, 0, BCM43xx_DMA_RINGMEMSIZE);
208
209 return 0;
210 }
211
212 static void free_ringmemory(struct bcm43xx_dmaring *ring)
213 {
214 struct device *dev = &(ring->bcm->pci_dev->dev);
215
216 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
217 ring->vbase, ring->dmabase);
218 }
219
220 /* Reset the RX DMA channel */
221 int bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm,
222 u16 mmio_base)
223 {
224 int i;
225 u32 value;
226
227 bcm43xx_write32(bcm,
228 mmio_base + BCM43xx_DMA_RX_CONTROL,
229 0x00000000);
230 for (i = 0; i < 1000; i++) {
231 value = bcm43xx_read32(bcm,
232 mmio_base + BCM43xx_DMA_RX_STATUS);
233 value &= BCM43xx_DMA_RXSTAT_STAT_MASK;
234 if (value == BCM43xx_DMA_RXSTAT_STAT_DISABLED) {
235 i = -1;
236 break;
237 }
238 udelay(10);
239 }
240 if (i != -1) {
241 printk(KERN_ERR PFX "Error: Wait on DMA RX status timed out.\n");
242 return -ENODEV;
243 }
244
245 return 0;
246 }
247
248 /* Reset the RX DMA channel */
249 int bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm,
250 u16 mmio_base)
251 {
252 int i;
253 u32 value;
254
255 for (i = 0; i < 1000; i++) {
256 value = bcm43xx_read32(bcm,
257 mmio_base + BCM43xx_DMA_TX_STATUS);
258 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
259 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED ||
260 value == BCM43xx_DMA_TXSTAT_STAT_IDLEWAIT ||
261 value == BCM43xx_DMA_TXSTAT_STAT_STOPPED)
262 break;
263 udelay(10);
264 }
265 bcm43xx_write32(bcm,
266 mmio_base + BCM43xx_DMA_TX_CONTROL,
267 0x00000000);
268 for (i = 0; i < 1000; i++) {
269 value = bcm43xx_read32(bcm,
270 mmio_base + BCM43xx_DMA_TX_STATUS);
271 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
272 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED) {
273 i = -1;
274 break;
275 }
276 udelay(10);
277 }
278 if (i != -1) {
279 printk(KERN_ERR PFX "Error: Wait on DMA TX status timed out.\n");
280 return -ENODEV;
281 }
282 /* ensure the reset is completed. */
283 udelay(300);
284
285 return 0;
286 }
287
288 static int setup_rx_descbuffer(struct bcm43xx_dmaring *ring,
289 struct bcm43xx_dmadesc *desc,
290 struct bcm43xx_dmadesc_meta *meta,
291 gfp_t gfp_flags)
292 {
293 struct bcm43xx_rxhdr *rxhdr;
294 dma_addr_t dmaaddr;
295 u32 desc_addr;
296 u32 desc_ctl;
297 const int slot = (int)(desc - ring->vbase);
298 struct sk_buff *skb;
299
300 assert(slot >= 0 && slot < ring->nr_slots);
301 assert(!ring->tx);
302
303 skb = __dev_alloc_skb(ring->rx_buffersize, gfp_flags);
304 if (unlikely(!skb))
305 return -ENOMEM;
306 dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
307 if (unlikely(dmaaddr + ring->rx_buffersize > BCM43xx_DMA_BUSADDRMAX)) {
308 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
309 dev_kfree_skb_any(skb);
310 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RX SKB >1G "
311 "(0x%08x, len: %u)\n",
312 dmaaddr, ring->rx_buffersize);
313 return -ENOMEM;
314 }
315 meta->skb = skb;
316 meta->dmaaddr = dmaaddr;
317 skb->dev = ring->bcm->net_dev;
318 desc_addr = (u32)(dmaaddr + ring->memoffset);
319 desc_ctl = (BCM43xx_DMADTOR_BYTECNT_MASK &
320 (u32)(ring->rx_buffersize - ring->frameoffset));
321 if (slot == ring->nr_slots - 1)
322 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
323 set_desc_addr(desc, desc_addr);
324 set_desc_ctl(desc, desc_ctl);
325
326 rxhdr = (struct bcm43xx_rxhdr *)(skb->data);
327 rxhdr->frame_length = 0;
328 rxhdr->flags1 = 0;
329
330 return 0;
331 }
332
333 /* Allocate the initial descbuffers.
334 * This is used for an RX ring only.
335 */
336 static int alloc_initial_descbuffers(struct bcm43xx_dmaring *ring)
337 {
338 int i, err = -ENOMEM;
339 struct bcm43xx_dmadesc *desc;
340 struct bcm43xx_dmadesc_meta *meta;
341
342 for (i = 0; i < ring->nr_slots; i++) {
343 desc = ring->vbase + i;
344 meta = ring->meta + i;
345
346 err = setup_rx_descbuffer(ring, desc, meta, GFP_KERNEL);
347 if (err)
348 goto err_unwind;
349 }
350 ring->used_slots = ring->nr_slots;
351 err = 0;
352 out:
353 return err;
354
355 err_unwind:
356 for (i--; i >= 0; i--) {
357 desc = ring->vbase + i;
358 meta = ring->meta + i;
359
360 unmap_descbuffer(ring, meta->dmaaddr, ring->rx_buffersize, 0);
361 dev_kfree_skb(meta->skb);
362 }
363 goto out;
364 }
365
366 /* Do initial setup of the DMA controller.
367 * Reset the controller, write the ring busaddress
368 * and switch the "enable" bit on.
369 */
370 static int dmacontroller_setup(struct bcm43xx_dmaring *ring)
371 {
372 int err = 0;
373 u32 value;
374
375 if (ring->tx) {
376 /* Set Transmit Control register to "transmit enable" */
377 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
378 BCM43xx_DMA_TXCTRL_ENABLE);
379 /* Set Transmit Descriptor ring address. */
380 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING,
381 ring->dmabase + ring->memoffset);
382 } else {
383 err = alloc_initial_descbuffers(ring);
384 if (err)
385 goto out;
386 /* Set Receive Control "receive enable" and frame offset */
387 value = (ring->frameoffset << BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT);
388 value |= BCM43xx_DMA_RXCTRL_ENABLE;
389 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_CONTROL, value);
390 /* Set Receive Descriptor ring address. */
391 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING,
392 ring->dmabase + ring->memoffset);
393 /* Init the descriptor pointer. */
394 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX, 200);
395 }
396
397 out:
398 return err;
399 }
400
401 /* Shutdown the DMA controller. */
402 static void dmacontroller_cleanup(struct bcm43xx_dmaring *ring)
403 {
404 if (ring->tx) {
405 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base);
406 /* Zero out Transmit Descriptor ring address. */
407 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING, 0);
408 } else {
409 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base);
410 /* Zero out Receive Descriptor ring address. */
411 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING, 0);
412 }
413 }
414
415 static void free_all_descbuffers(struct bcm43xx_dmaring *ring)
416 {
417 struct bcm43xx_dmadesc *desc;
418 struct bcm43xx_dmadesc_meta *meta;
419 int i;
420
421 if (!ring->used_slots)
422 return;
423 for (i = 0; i < ring->nr_slots; i++) {
424 desc = ring->vbase + i;
425 meta = ring->meta + i;
426
427 if (!meta->skb) {
428 assert(ring->tx);
429 continue;
430 }
431 if (ring->tx) {
432 unmap_descbuffer(ring, meta->dmaaddr,
433 meta->skb->len, 1);
434 } else {
435 unmap_descbuffer(ring, meta->dmaaddr,
436 ring->rx_buffersize, 0);
437 }
438 free_descriptor_buffer(ring, desc, meta, 0);
439 }
440 }
441
442 /* Main initialization function. */
443 static
444 struct bcm43xx_dmaring * bcm43xx_setup_dmaring(struct bcm43xx_private *bcm,
445 u16 dma_controller_base,
446 int nr_descriptor_slots,
447 int tx)
448 {
449 struct bcm43xx_dmaring *ring;
450 int err;
451
452 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
453 if (!ring)
454 goto out;
455
456 ring->meta = kzalloc(sizeof(*ring->meta) * nr_descriptor_slots,
457 GFP_KERNEL);
458 if (!ring->meta)
459 goto err_kfree_ring;
460
461 ring->memoffset = BCM43xx_DMA_DMABUSADDROFFSET;
462 #ifdef CONFIG_BCM947XX
463 if (bcm->pci_dev->bus->number == 0)
464 ring->memoffset = 0;
465 #endif
466
467 ring->bcm = bcm;
468 ring->nr_slots = nr_descriptor_slots;
469 ring->suspend_mark = ring->nr_slots * BCM43xx_TXSUSPEND_PERCENT / 100;
470 ring->resume_mark = ring->nr_slots * BCM43xx_TXRESUME_PERCENT / 100;
471 assert(ring->suspend_mark < ring->resume_mark);
472 ring->mmio_base = dma_controller_base;
473 if (tx) {
474 ring->tx = 1;
475 ring->current_slot = -1;
476 } else {
477 switch (dma_controller_base) {
478 case BCM43xx_MMIO_DMA1_BASE:
479 ring->rx_buffersize = BCM43xx_DMA1_RXBUFFERSIZE;
480 ring->frameoffset = BCM43xx_DMA1_RX_FRAMEOFFSET;
481 break;
482 case BCM43xx_MMIO_DMA4_BASE:
483 ring->rx_buffersize = BCM43xx_DMA4_RXBUFFERSIZE;
484 ring->frameoffset = BCM43xx_DMA4_RX_FRAMEOFFSET;
485 break;
486 default:
487 assert(0);
488 }
489 }
490
491 err = alloc_ringmemory(ring);
492 if (err)
493 goto err_kfree_meta;
494 err = dmacontroller_setup(ring);
495 if (err)
496 goto err_free_ringmemory;
497
498 out:
499 return ring;
500
501 err_free_ringmemory:
502 free_ringmemory(ring);
503 err_kfree_meta:
504 kfree(ring->meta);
505 err_kfree_ring:
506 kfree(ring);
507 ring = NULL;
508 goto out;
509 }
510
511 /* Main cleanup function. */
512 static void bcm43xx_destroy_dmaring(struct bcm43xx_dmaring *ring)
513 {
514 if (!ring)
515 return;
516
517 dprintk(KERN_INFO PFX "DMA 0x%04x (%s) max used slots: %d/%d\n",
518 ring->mmio_base,
519 (ring->tx) ? "TX" : "RX",
520 ring->max_used_slots, ring->nr_slots);
521 /* Device IRQs are disabled prior entering this function,
522 * so no need to take care of concurrency with rx handler stuff.
523 */
524 dmacontroller_cleanup(ring);
525 free_all_descbuffers(ring);
526 free_ringmemory(ring);
527
528 kfree(ring->meta);
529 kfree(ring);
530 }
531
532 void bcm43xx_dma_free(struct bcm43xx_private *bcm)
533 {
534 struct bcm43xx_dma *dma = bcm->current_core->dma;
535
536 bcm43xx_destroy_dmaring(dma->rx_ring1);
537 dma->rx_ring1 = NULL;
538 bcm43xx_destroy_dmaring(dma->rx_ring0);
539 dma->rx_ring0 = NULL;
540 bcm43xx_destroy_dmaring(dma->tx_ring3);
541 dma->tx_ring3 = NULL;
542 bcm43xx_destroy_dmaring(dma->tx_ring2);
543 dma->tx_ring2 = NULL;
544 bcm43xx_destroy_dmaring(dma->tx_ring1);
545 dma->tx_ring1 = NULL;
546 bcm43xx_destroy_dmaring(dma->tx_ring0);
547 dma->tx_ring0 = NULL;
548 }
549
550 int bcm43xx_dma_init(struct bcm43xx_private *bcm)
551 {
552 struct bcm43xx_dma *dma = bcm->current_core->dma;
553 struct bcm43xx_dmaring *ring;
554 int err = -ENOMEM;
555
556 /* setup TX DMA channels. */
557 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
558 BCM43xx_TXRING_SLOTS, 1);
559 if (!ring)
560 goto out;
561 dma->tx_ring0 = ring;
562
563 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA2_BASE,
564 BCM43xx_TXRING_SLOTS, 1);
565 if (!ring)
566 goto err_destroy_tx0;
567 dma->tx_ring1 = ring;
568
569 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA3_BASE,
570 BCM43xx_TXRING_SLOTS, 1);
571 if (!ring)
572 goto err_destroy_tx1;
573 dma->tx_ring2 = ring;
574
575 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
576 BCM43xx_TXRING_SLOTS, 1);
577 if (!ring)
578 goto err_destroy_tx2;
579 dma->tx_ring3 = ring;
580
581 /* setup RX DMA channels. */
582 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
583 BCM43xx_RXRING_SLOTS, 0);
584 if (!ring)
585 goto err_destroy_tx3;
586 dma->rx_ring0 = ring;
587
588 if (bcm->current_core->rev < 5) {
589 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
590 BCM43xx_RXRING_SLOTS, 0);
591 if (!ring)
592 goto err_destroy_rx0;
593 dma->rx_ring1 = ring;
594 }
595
596 dprintk(KERN_INFO PFX "DMA initialized\n");
597 err = 0;
598 out:
599 return err;
600
601 err_destroy_rx0:
602 bcm43xx_destroy_dmaring(dma->rx_ring0);
603 dma->rx_ring0 = NULL;
604 err_destroy_tx3:
605 bcm43xx_destroy_dmaring(dma->tx_ring3);
606 dma->tx_ring3 = NULL;
607 err_destroy_tx2:
608 bcm43xx_destroy_dmaring(dma->tx_ring2);
609 dma->tx_ring2 = NULL;
610 err_destroy_tx1:
611 bcm43xx_destroy_dmaring(dma->tx_ring1);
612 dma->tx_ring1 = NULL;
613 err_destroy_tx0:
614 bcm43xx_destroy_dmaring(dma->tx_ring0);
615 dma->tx_ring0 = NULL;
616 goto out;
617 }
618
619 /* Generate a cookie for the TX header. */
620 static u16 generate_cookie(struct bcm43xx_dmaring *ring,
621 int slot)
622 {
623 u16 cookie = 0x0000;
624
625 /* Use the upper 4 bits of the cookie as
626 * DMA controller ID and store the slot number
627 * in the lower 12 bits
628 */
629 switch (ring->mmio_base) {
630 default:
631 assert(0);
632 case BCM43xx_MMIO_DMA1_BASE:
633 break;
634 case BCM43xx_MMIO_DMA2_BASE:
635 cookie = 0x1000;
636 break;
637 case BCM43xx_MMIO_DMA3_BASE:
638 cookie = 0x2000;
639 break;
640 case BCM43xx_MMIO_DMA4_BASE:
641 cookie = 0x3000;
642 break;
643 }
644 assert(((u16)slot & 0xF000) == 0x0000);
645 cookie |= (u16)slot;
646
647 return cookie;
648 }
649
650 /* Inspect a cookie and find out to which controller/slot it belongs. */
651 static
652 struct bcm43xx_dmaring * parse_cookie(struct bcm43xx_private *bcm,
653 u16 cookie, int *slot)
654 {
655 struct bcm43xx_dma *dma = bcm->current_core->dma;
656 struct bcm43xx_dmaring *ring = NULL;
657
658 switch (cookie & 0xF000) {
659 case 0x0000:
660 ring = dma->tx_ring0;
661 break;
662 case 0x1000:
663 ring = dma->tx_ring1;
664 break;
665 case 0x2000:
666 ring = dma->tx_ring2;
667 break;
668 case 0x3000:
669 ring = dma->tx_ring3;
670 break;
671 default:
672 assert(0);
673 }
674 *slot = (cookie & 0x0FFF);
675 assert(*slot >= 0 && *slot < ring->nr_slots);
676
677 return ring;
678 }
679
680 static void dmacontroller_poke_tx(struct bcm43xx_dmaring *ring,
681 int slot)
682 {
683 /* Everything is ready to start. Buffers are DMA mapped and
684 * associated with slots.
685 * "slot" is the last slot of the new frame we want to transmit.
686 * Close your seat belts now, please.
687 */
688 wmb();
689 slot = next_slot(ring, slot);
690 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_INDEX,
691 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
692 }
693
694 static int dma_tx_fragment(struct bcm43xx_dmaring *ring,
695 struct sk_buff *skb,
696 u8 cur_frag)
697 {
698 int slot;
699 struct bcm43xx_dmadesc *desc;
700 struct bcm43xx_dmadesc_meta *meta;
701 u32 desc_ctl;
702 u32 desc_addr;
703
704 assert(skb_shinfo(skb)->nr_frags == 0);
705
706 slot = request_slot(ring);
707 desc = ring->vbase + slot;
708 meta = ring->meta + slot;
709
710 /* Add a device specific TX header. */
711 assert(skb_headroom(skb) >= sizeof(struct bcm43xx_txhdr));
712 /* Reserve enough headroom for the device tx header. */
713 __skb_push(skb, sizeof(struct bcm43xx_txhdr));
714 /* Now calculate and add the tx header.
715 * The tx header includes the PLCP header.
716 */
717 bcm43xx_generate_txhdr(ring->bcm,
718 (struct bcm43xx_txhdr *)skb->data,
719 skb->data + sizeof(struct bcm43xx_txhdr),
720 skb->len - sizeof(struct bcm43xx_txhdr),
721 (cur_frag == 0),
722 generate_cookie(ring, slot));
723
724 meta->skb = skb;
725 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
726 if (unlikely(meta->dmaaddr + skb->len > BCM43xx_DMA_BUSADDRMAX)) {
727 return_slot(ring, slot);
728 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA TX SKB >1G "
729 "(0x%08x, len: %u)\n",
730 meta->dmaaddr, skb->len);
731 return -ENOMEM;
732 }
733
734 desc_addr = (u32)(meta->dmaaddr + ring->memoffset);
735 desc_ctl = BCM43xx_DMADTOR_FRAMESTART | BCM43xx_DMADTOR_FRAMEEND;
736 desc_ctl |= BCM43xx_DMADTOR_COMPIRQ;
737 desc_ctl |= (BCM43xx_DMADTOR_BYTECNT_MASK &
738 (u32)(meta->skb->len - ring->frameoffset));
739 if (slot == ring->nr_slots - 1)
740 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
741
742 set_desc_ctl(desc, desc_ctl);
743 set_desc_addr(desc, desc_addr);
744 /* Now transfer the whole frame. */
745 dmacontroller_poke_tx(ring, slot);
746
747 return 0;
748 }
749
750 int bcm43xx_dma_tx(struct bcm43xx_private *bcm,
751 struct ieee80211_txb *txb)
752 {
753 /* We just received a packet from the kernel network subsystem.
754 * Add headers and DMA map the memory. Poke
755 * the device to send the stuff.
756 * Note that this is called from atomic context.
757 */
758 struct bcm43xx_dmaring *ring = bcm->current_core->dma->tx_ring1;
759 u8 i;
760 struct sk_buff *skb;
761
762 assert(ring->tx);
763 if (unlikely(free_slots(ring) < txb->nr_frags)) {
764 /* The queue should be stopped,
765 * if we are low on free slots.
766 * If this ever triggers, we have to lower the suspend_mark.
767 */
768 dprintkl(KERN_ERR PFX "Out of DMA descriptor slots!\n");
769 return -ENOMEM;
770 }
771
772 for (i = 0; i < txb->nr_frags; i++) {
773 skb = txb->fragments[i];
774 /* Take skb from ieee80211_txb_free */
775 txb->fragments[i] = NULL;
776 dma_tx_fragment(ring, skb, i);
777 //TODO: handle failure of dma_tx_fragment
778 }
779 ieee80211_txb_free(txb);
780
781 return 0;
782 }
783
784 void bcm43xx_dma_handle_xmitstatus(struct bcm43xx_private *bcm,
785 struct bcm43xx_xmitstatus *status)
786 {
787 struct bcm43xx_dmaring *ring;
788 struct bcm43xx_dmadesc *desc;
789 struct bcm43xx_dmadesc_meta *meta;
790 int is_last_fragment;
791 int slot;
792
793 ring = parse_cookie(bcm, status->cookie, &slot);
794 assert(ring);
795 assert(ring->tx);
796 assert(get_desc_ctl(ring->vbase + slot) & BCM43xx_DMADTOR_FRAMESTART);
797 while (1) {
798 assert(slot >= 0 && slot < ring->nr_slots);
799 desc = ring->vbase + slot;
800 meta = ring->meta + slot;
801
802 is_last_fragment = !!(get_desc_ctl(desc) & BCM43xx_DMADTOR_FRAMEEND);
803 unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len, 1);
804 free_descriptor_buffer(ring, desc, meta, 1);
805 /* Everything belonging to the slot is unmapped
806 * and freed, so we can return it.
807 */
808 return_slot(ring, slot);
809
810 if (is_last_fragment)
811 break;
812 slot = next_slot(ring, slot);
813 }
814 bcm->stats.last_tx = jiffies;
815 }
816
817 static void dma_rx(struct bcm43xx_dmaring *ring,
818 int *slot)
819 {
820 struct bcm43xx_dmadesc *desc;
821 struct bcm43xx_dmadesc_meta *meta;
822 struct bcm43xx_rxhdr *rxhdr;
823 struct sk_buff *skb;
824 u16 len;
825 int err;
826 dma_addr_t dmaaddr;
827
828 desc = ring->vbase + *slot;
829 meta = ring->meta + *slot;
830
831 sync_descbuffer_for_cpu(ring, meta->dmaaddr, ring->rx_buffersize);
832 skb = meta->skb;
833
834 if (ring->mmio_base == BCM43xx_MMIO_DMA4_BASE) {
835 /* We received an xmit status. */
836 struct bcm43xx_hwxmitstatus *hw = (struct bcm43xx_hwxmitstatus *)skb->data;
837 struct bcm43xx_xmitstatus stat;
838
839 stat.cookie = le16_to_cpu(hw->cookie);
840 stat.flags = hw->flags;
841 stat.cnt1 = hw->cnt1;
842 stat.cnt2 = hw->cnt2;
843 stat.seq = le16_to_cpu(hw->seq);
844 stat.unknown = le16_to_cpu(hw->unknown);
845
846 bcm43xx_debugfs_log_txstat(ring->bcm, &stat);
847 bcm43xx_dma_handle_xmitstatus(ring->bcm, &stat);
848 /* recycle the descriptor buffer. */
849 sync_descbuffer_for_device(ring, meta->dmaaddr, ring->rx_buffersize);
850
851 return;
852 }
853 rxhdr = (struct bcm43xx_rxhdr *)skb->data;
854 len = le16_to_cpu(rxhdr->frame_length);
855 if (len == 0) {
856 int i = 0;
857
858 do {
859 udelay(2);
860 barrier();
861 len = le16_to_cpu(rxhdr->frame_length);
862 } while (len == 0 && i++ < 5);
863 if (unlikely(len == 0)) {
864 /* recycle the descriptor buffer. */
865 sync_descbuffer_for_device(ring, meta->dmaaddr,
866 ring->rx_buffersize);
867 goto drop;
868 }
869 }
870 if (unlikely(len > ring->rx_buffersize)) {
871 /* The data did not fit into one descriptor buffer
872 * and is split over multiple buffers.
873 * This should never happen, as we try to allocate buffers
874 * big enough. So simply ignore this packet.
875 */
876 int cnt = 0;
877 s32 tmp = len;
878
879 while (1) {
880 desc = ring->vbase + *slot;
881 meta = ring->meta + *slot;
882 /* recycle the descriptor buffer. */
883 sync_descbuffer_for_device(ring, meta->dmaaddr,
884 ring->rx_buffersize);
885 *slot = next_slot(ring, *slot);
886 cnt++;
887 tmp -= ring->rx_buffersize;
888 if (tmp <= 0)
889 break;
890 }
891 printkl(KERN_ERR PFX "DMA RX buffer too small "
892 "(len: %u, buffer: %u, nr-dropped: %d)\n",
893 len, ring->rx_buffersize, cnt);
894 goto drop;
895 }
896 len -= IEEE80211_FCS_LEN;
897
898 dmaaddr = meta->dmaaddr;
899 err = setup_rx_descbuffer(ring, desc, meta, GFP_ATOMIC);
900 if (unlikely(err)) {
901 dprintkl(KERN_ERR PFX "DMA RX: setup_rx_descbuffer() failed\n");
902 sync_descbuffer_for_device(ring, dmaaddr,
903 ring->rx_buffersize);
904 goto drop;
905 }
906
907 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
908 skb_put(skb, len + ring->frameoffset);
909 skb_pull(skb, ring->frameoffset);
910
911 err = bcm43xx_rx(ring->bcm, skb, rxhdr);
912 if (err) {
913 dev_kfree_skb_irq(skb);
914 goto drop;
915 }
916
917 drop:
918 return;
919 }
920
921 void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
922 {
923 u32 status;
924 u16 descptr;
925 int slot, current_slot;
926 #ifdef CONFIG_BCM43XX_DEBUG
927 int used_slots = 0;
928 #endif
929
930 assert(!ring->tx);
931 status = bcm43xx_dma_read(ring, BCM43xx_DMA_RX_STATUS);
932 descptr = (status & BCM43xx_DMA_RXSTAT_DPTR_MASK);
933 current_slot = descptr / sizeof(struct bcm43xx_dmadesc);
934 assert(current_slot >= 0 && current_slot < ring->nr_slots);
935
936 slot = ring->current_slot;
937 for ( ; slot != current_slot; slot = next_slot(ring, slot)) {
938 dma_rx(ring, &slot);
939 #ifdef CONFIG_BCM43XX_DEBUG
940 if (++used_slots > ring->max_used_slots)
941 ring->max_used_slots = used_slots;
942 #endif
943 }
944 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX,
945 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
946 ring->current_slot = slot;
947 }
948
949 void bcm43xx_dma_tx_suspend(struct bcm43xx_dmaring *ring)
950 {
951 assert(ring->tx);
952 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, 1);
953 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
954 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
955 | BCM43xx_DMA_TXCTRL_SUSPEND);
956 }
957
958 void bcm43xx_dma_tx_resume(struct bcm43xx_dmaring *ring)
959 {
960 assert(ring->tx);
961 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
962 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
963 & ~BCM43xx_DMA_TXCTRL_SUSPEND);
964 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, -1);
965 }
966
967 /* vim: set ts=8 sw=8 sts=8: */
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree