ssb: Add Gigabit Ethernet driver
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / ssb / main.c
blob49d7bbb9bea7448312d5d842eb095d0aabd221db
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
11 #include "ssb_private.h"
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/cs.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue);
33 /* List if running buses */
34 static LIST_HEAD(buses);
35 /* Software ID counter */
36 static unsigned int next_busnumber;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex);
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot = 1;
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
56 struct ssb_bus *bus;
58 ssb_buses_lock();
59 list_for_each_entry(bus, &buses, list) {
60 if (bus->bustype == SSB_BUSTYPE_PCI &&
61 bus->host_pci == pdev)
62 goto found;
64 bus = NULL;
65 found:
66 ssb_buses_unlock();
68 return bus;
70 #endif /* CONFIG_SSB_PCIHOST */
72 int ssb_for_each_bus_call(unsigned long data,
73 int (*func)(struct ssb_bus *bus, unsigned long data))
75 struct ssb_bus *bus;
76 int res;
78 ssb_buses_lock();
79 list_for_each_entry(bus, &buses, list) {
80 res = func(bus, data);
81 if (res >= 0) {
82 ssb_buses_unlock();
83 return res;
86 ssb_buses_unlock();
88 return -ENODEV;
91 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
93 if (dev)
94 get_device(dev->dev);
95 return dev;
98 static void ssb_device_put(struct ssb_device *dev)
100 if (dev)
101 put_device(dev->dev);
104 static int ssb_bus_resume(struct ssb_bus *bus)
106 int err;
108 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
109 err = ssb_pcmcia_init(bus);
110 if (err) {
111 /* No need to disable XTAL, as we don't have one on PCMCIA. */
112 return err;
114 ssb_chipco_resume(&bus->chipco);
116 return 0;
119 static int ssb_device_resume(struct device *dev)
121 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
122 struct ssb_driver *ssb_drv;
123 struct ssb_bus *bus;
124 int err = 0;
126 bus = ssb_dev->bus;
127 if (bus->suspend_cnt == bus->nr_devices) {
128 err = ssb_bus_resume(bus);
129 if (err)
130 return err;
132 bus->suspend_cnt--;
133 if (dev->driver) {
134 ssb_drv = drv_to_ssb_drv(dev->driver);
135 if (ssb_drv && ssb_drv->resume)
136 err = ssb_drv->resume(ssb_dev);
137 if (err)
138 goto out;
140 out:
141 return err;
144 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
146 ssb_chipco_suspend(&bus->chipco, state);
147 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
149 /* Reset HW state information in memory, so that HW is
150 * completely reinitialized on resume. */
151 bus->mapped_device = NULL;
152 #ifdef CONFIG_SSB_DRIVER_PCICORE
153 bus->pcicore.setup_done = 0;
154 #endif
155 #ifdef CONFIG_SSB_DEBUG
156 bus->powered_up = 0;
157 #endif
160 static int ssb_device_suspend(struct device *dev, pm_message_t state)
162 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
163 struct ssb_driver *ssb_drv;
164 struct ssb_bus *bus;
165 int err = 0;
167 if (dev->driver) {
168 ssb_drv = drv_to_ssb_drv(dev->driver);
169 if (ssb_drv && ssb_drv->suspend)
170 err = ssb_drv->suspend(ssb_dev, state);
171 if (err)
172 goto out;
175 bus = ssb_dev->bus;
176 bus->suspend_cnt++;
177 if (bus->suspend_cnt == bus->nr_devices) {
178 /* All devices suspended. Shutdown the bus. */
179 ssb_bus_suspend(bus, state);
182 out:
183 return err;
186 #ifdef CONFIG_SSB_PCIHOST
187 int ssb_devices_freeze(struct ssb_bus *bus)
189 struct ssb_device *dev;
190 struct ssb_driver *drv;
191 int err = 0;
192 int i;
193 pm_message_t state = PMSG_FREEZE;
195 /* First check that we are capable to freeze all devices. */
196 for (i = 0; i < bus->nr_devices; i++) {
197 dev = &(bus->devices[i]);
198 if (!dev->dev ||
199 !dev->dev->driver ||
200 !device_is_registered(dev->dev))
201 continue;
202 drv = drv_to_ssb_drv(dev->dev->driver);
203 if (!drv)
204 continue;
205 if (!drv->suspend) {
206 /* Nope, can't suspend this one. */
207 return -EOPNOTSUPP;
210 /* Now suspend all devices */
211 for (i = 0; i < bus->nr_devices; i++) {
212 dev = &(bus->devices[i]);
213 if (!dev->dev ||
214 !dev->dev->driver ||
215 !device_is_registered(dev->dev))
216 continue;
217 drv = drv_to_ssb_drv(dev->dev->driver);
218 if (!drv)
219 continue;
220 err = drv->suspend(dev, state);
221 if (err) {
222 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
223 dev->dev->bus_id);
224 goto err_unwind;
228 return 0;
229 err_unwind:
230 for (i--; i >= 0; i--) {
231 dev = &(bus->devices[i]);
232 if (!dev->dev ||
233 !dev->dev->driver ||
234 !device_is_registered(dev->dev))
235 continue;
236 drv = drv_to_ssb_drv(dev->dev->driver);
237 if (!drv)
238 continue;
239 if (drv->resume)
240 drv->resume(dev);
242 return err;
245 int ssb_devices_thaw(struct ssb_bus *bus)
247 struct ssb_device *dev;
248 struct ssb_driver *drv;
249 int err;
250 int i;
252 for (i = 0; i < bus->nr_devices; i++) {
253 dev = &(bus->devices[i]);
254 if (!dev->dev ||
255 !dev->dev->driver ||
256 !device_is_registered(dev->dev))
257 continue;
258 drv = drv_to_ssb_drv(dev->dev->driver);
259 if (!drv)
260 continue;
261 if (SSB_WARN_ON(!drv->resume))
262 continue;
263 err = drv->resume(dev);
264 if (err) {
265 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
266 dev->dev->bus_id);
270 return 0;
272 #endif /* CONFIG_SSB_PCIHOST */
274 static void ssb_device_shutdown(struct device *dev)
276 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
277 struct ssb_driver *ssb_drv;
279 if (!dev->driver)
280 return;
281 ssb_drv = drv_to_ssb_drv(dev->driver);
282 if (ssb_drv && ssb_drv->shutdown)
283 ssb_drv->shutdown(ssb_dev);
286 static int ssb_device_remove(struct device *dev)
288 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
289 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
291 if (ssb_drv && ssb_drv->remove)
292 ssb_drv->remove(ssb_dev);
293 ssb_device_put(ssb_dev);
295 return 0;
298 static int ssb_device_probe(struct device *dev)
300 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
301 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
302 int err = 0;
304 ssb_device_get(ssb_dev);
305 if (ssb_drv && ssb_drv->probe)
306 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
307 if (err)
308 ssb_device_put(ssb_dev);
310 return err;
313 static int ssb_match_devid(const struct ssb_device_id *tabid,
314 const struct ssb_device_id *devid)
316 if ((tabid->vendor != devid->vendor) &&
317 tabid->vendor != SSB_ANY_VENDOR)
318 return 0;
319 if ((tabid->coreid != devid->coreid) &&
320 tabid->coreid != SSB_ANY_ID)
321 return 0;
322 if ((tabid->revision != devid->revision) &&
323 tabid->revision != SSB_ANY_REV)
324 return 0;
325 return 1;
328 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
330 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
331 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
332 const struct ssb_device_id *id;
334 for (id = ssb_drv->id_table;
335 id->vendor || id->coreid || id->revision;
336 id++) {
337 if (ssb_match_devid(id, &ssb_dev->id))
338 return 1; /* found */
341 return 0;
344 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
346 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
348 if (!dev)
349 return -ENODEV;
351 return add_uevent_var(env,
352 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
353 ssb_dev->id.vendor, ssb_dev->id.coreid,
354 ssb_dev->id.revision);
357 static struct bus_type ssb_bustype = {
358 .name = "ssb",
359 .match = ssb_bus_match,
360 .probe = ssb_device_probe,
361 .remove = ssb_device_remove,
362 .shutdown = ssb_device_shutdown,
363 .suspend = ssb_device_suspend,
364 .resume = ssb_device_resume,
365 .uevent = ssb_device_uevent,
368 static void ssb_buses_lock(void)
370 /* See the comment at the ssb_is_early_boot definition */
371 if (!ssb_is_early_boot)
372 mutex_lock(&buses_mutex);
375 static void ssb_buses_unlock(void)
377 /* See the comment at the ssb_is_early_boot definition */
378 if (!ssb_is_early_boot)
379 mutex_unlock(&buses_mutex);
382 static void ssb_devices_unregister(struct ssb_bus *bus)
384 struct ssb_device *sdev;
385 int i;
387 for (i = bus->nr_devices - 1; i >= 0; i--) {
388 sdev = &(bus->devices[i]);
389 if (sdev->dev)
390 device_unregister(sdev->dev);
394 void ssb_bus_unregister(struct ssb_bus *bus)
396 ssb_buses_lock();
397 ssb_devices_unregister(bus);
398 list_del(&bus->list);
399 ssb_buses_unlock();
401 /* ssb_pcmcia_exit(bus); */
402 ssb_pci_exit(bus);
403 ssb_iounmap(bus);
405 EXPORT_SYMBOL(ssb_bus_unregister);
407 static void ssb_release_dev(struct device *dev)
409 struct __ssb_dev_wrapper *devwrap;
411 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
412 kfree(devwrap);
415 static int ssb_devices_register(struct ssb_bus *bus)
417 struct ssb_device *sdev;
418 struct device *dev;
419 struct __ssb_dev_wrapper *devwrap;
420 int i, err = 0;
421 int dev_idx = 0;
423 for (i = 0; i < bus->nr_devices; i++) {
424 sdev = &(bus->devices[i]);
426 /* We don't register SSB-system devices to the kernel,
427 * as the drivers for them are built into SSB. */
428 switch (sdev->id.coreid) {
429 case SSB_DEV_CHIPCOMMON:
430 case SSB_DEV_PCI:
431 case SSB_DEV_PCIE:
432 case SSB_DEV_PCMCIA:
433 case SSB_DEV_MIPS:
434 case SSB_DEV_MIPS_3302:
435 case SSB_DEV_EXTIF:
436 continue;
439 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
440 if (!devwrap) {
441 ssb_printk(KERN_ERR PFX
442 "Could not allocate device\n");
443 err = -ENOMEM;
444 goto error;
446 dev = &devwrap->dev;
447 devwrap->sdev = sdev;
449 dev->release = ssb_release_dev;
450 dev->bus = &ssb_bustype;
451 snprintf(dev->bus_id, sizeof(dev->bus_id),
452 "ssb%u:%d", bus->busnumber, dev_idx);
454 switch (bus->bustype) {
455 case SSB_BUSTYPE_PCI:
456 #ifdef CONFIG_SSB_PCIHOST
457 sdev->irq = bus->host_pci->irq;
458 dev->parent = &bus->host_pci->dev;
459 #endif
460 break;
461 case SSB_BUSTYPE_PCMCIA:
462 #ifdef CONFIG_SSB_PCMCIAHOST
463 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
464 dev->parent = &bus->host_pcmcia->dev;
465 #endif
466 break;
467 case SSB_BUSTYPE_SSB:
468 break;
471 sdev->dev = dev;
472 err = device_register(dev);
473 if (err) {
474 ssb_printk(KERN_ERR PFX
475 "Could not register %s\n",
476 dev->bus_id);
477 /* Set dev to NULL to not unregister
478 * dev on error unwinding. */
479 sdev->dev = NULL;
480 kfree(devwrap);
481 goto error;
483 dev_idx++;
486 return 0;
487 error:
488 /* Unwind the already registered devices. */
489 ssb_devices_unregister(bus);
490 return err;
493 /* Needs ssb_buses_lock() */
494 static int ssb_attach_queued_buses(void)
496 struct ssb_bus *bus, *n;
497 int err = 0;
498 int drop_them_all = 0;
500 list_for_each_entry_safe(bus, n, &attach_queue, list) {
501 if (drop_them_all) {
502 list_del(&bus->list);
503 continue;
505 /* Can't init the PCIcore in ssb_bus_register(), as that
506 * is too early in boot for embedded systems
507 * (no udelay() available). So do it here in attach stage.
509 err = ssb_bus_powerup(bus, 0);
510 if (err)
511 goto error;
512 ssb_pcicore_init(&bus->pcicore);
513 ssb_bus_may_powerdown(bus);
515 err = ssb_devices_register(bus);
516 error:
517 if (err) {
518 drop_them_all = 1;
519 list_del(&bus->list);
520 continue;
522 list_move_tail(&bus->list, &buses);
525 return err;
528 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
530 struct ssb_bus *bus = dev->bus;
532 offset += dev->core_index * SSB_CORE_SIZE;
533 return readb(bus->mmio + offset);
536 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
538 struct ssb_bus *bus = dev->bus;
540 offset += dev->core_index * SSB_CORE_SIZE;
541 return readw(bus->mmio + offset);
544 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
546 struct ssb_bus *bus = dev->bus;
548 offset += dev->core_index * SSB_CORE_SIZE;
549 return readl(bus->mmio + offset);
552 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
554 struct ssb_bus *bus = dev->bus;
556 offset += dev->core_index * SSB_CORE_SIZE;
557 writeb(value, bus->mmio + offset);
560 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
562 struct ssb_bus *bus = dev->bus;
564 offset += dev->core_index * SSB_CORE_SIZE;
565 writew(value, bus->mmio + offset);
568 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
570 struct ssb_bus *bus = dev->bus;
572 offset += dev->core_index * SSB_CORE_SIZE;
573 writel(value, bus->mmio + offset);
576 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
577 static const struct ssb_bus_ops ssb_ssb_ops = {
578 .read8 = ssb_ssb_read8,
579 .read16 = ssb_ssb_read16,
580 .read32 = ssb_ssb_read32,
581 .write8 = ssb_ssb_write8,
582 .write16 = ssb_ssb_write16,
583 .write32 = ssb_ssb_write32,
586 static int ssb_fetch_invariants(struct ssb_bus *bus,
587 ssb_invariants_func_t get_invariants)
589 struct ssb_init_invariants iv;
590 int err;
592 memset(&iv, 0, sizeof(iv));
593 err = get_invariants(bus, &iv);
594 if (err)
595 goto out;
596 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
597 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
598 bus->has_cardbus_slot = iv.has_cardbus_slot;
599 out:
600 return err;
603 static int ssb_bus_register(struct ssb_bus *bus,
604 ssb_invariants_func_t get_invariants,
605 unsigned long baseaddr)
607 int err;
609 spin_lock_init(&bus->bar_lock);
610 INIT_LIST_HEAD(&bus->list);
611 #ifdef CONFIG_SSB_EMBEDDED
612 spin_lock_init(&bus->gpio_lock);
613 #endif
615 /* Powerup the bus */
616 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
617 if (err)
618 goto out;
619 ssb_buses_lock();
620 bus->busnumber = next_busnumber;
621 /* Scan for devices (cores) */
622 err = ssb_bus_scan(bus, baseaddr);
623 if (err)
624 goto err_disable_xtal;
626 /* Init PCI-host device (if any) */
627 err = ssb_pci_init(bus);
628 if (err)
629 goto err_unmap;
630 /* Init PCMCIA-host device (if any) */
631 err = ssb_pcmcia_init(bus);
632 if (err)
633 goto err_pci_exit;
635 /* Initialize basic system devices (if available) */
636 err = ssb_bus_powerup(bus, 0);
637 if (err)
638 goto err_pcmcia_exit;
639 ssb_chipcommon_init(&bus->chipco);
640 ssb_mipscore_init(&bus->mipscore);
641 err = ssb_fetch_invariants(bus, get_invariants);
642 if (err) {
643 ssb_bus_may_powerdown(bus);
644 goto err_pcmcia_exit;
646 ssb_bus_may_powerdown(bus);
648 /* Queue it for attach.
649 * See the comment at the ssb_is_early_boot definition. */
650 list_add_tail(&bus->list, &attach_queue);
651 if (!ssb_is_early_boot) {
652 /* This is not early boot, so we must attach the bus now */
653 err = ssb_attach_queued_buses();
654 if (err)
655 goto err_dequeue;
657 next_busnumber++;
658 ssb_buses_unlock();
660 out:
661 return err;
663 err_dequeue:
664 list_del(&bus->list);
665 err_pcmcia_exit:
666 /* ssb_pcmcia_exit(bus); */
667 err_pci_exit:
668 ssb_pci_exit(bus);
669 err_unmap:
670 ssb_iounmap(bus);
671 err_disable_xtal:
672 ssb_buses_unlock();
673 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
674 return err;
677 #ifdef CONFIG_SSB_PCIHOST
678 int ssb_bus_pcibus_register(struct ssb_bus *bus,
679 struct pci_dev *host_pci)
681 int err;
683 bus->bustype = SSB_BUSTYPE_PCI;
684 bus->host_pci = host_pci;
685 bus->ops = &ssb_pci_ops;
687 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
688 if (!err) {
689 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
690 "PCI device %s\n", host_pci->dev.bus_id);
693 return err;
695 EXPORT_SYMBOL(ssb_bus_pcibus_register);
696 #endif /* CONFIG_SSB_PCIHOST */
698 #ifdef CONFIG_SSB_PCMCIAHOST
699 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
700 struct pcmcia_device *pcmcia_dev,
701 unsigned long baseaddr)
703 int err;
705 bus->bustype = SSB_BUSTYPE_PCMCIA;
706 bus->host_pcmcia = pcmcia_dev;
707 bus->ops = &ssb_pcmcia_ops;
709 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
710 if (!err) {
711 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
712 "PCMCIA device %s\n", pcmcia_dev->devname);
715 return err;
717 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
718 #endif /* CONFIG_SSB_PCMCIAHOST */
720 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
721 unsigned long baseaddr,
722 ssb_invariants_func_t get_invariants)
724 int err;
726 bus->bustype = SSB_BUSTYPE_SSB;
727 bus->ops = &ssb_ssb_ops;
729 err = ssb_bus_register(bus, get_invariants, baseaddr);
730 if (!err) {
731 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
732 "address 0x%08lX\n", baseaddr);
735 return err;
738 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
740 drv->drv.name = drv->name;
741 drv->drv.bus = &ssb_bustype;
742 drv->drv.owner = owner;
744 return driver_register(&drv->drv);
746 EXPORT_SYMBOL(__ssb_driver_register);
748 void ssb_driver_unregister(struct ssb_driver *drv)
750 driver_unregister(&drv->drv);
752 EXPORT_SYMBOL(ssb_driver_unregister);
754 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
756 struct ssb_bus *bus = dev->bus;
757 struct ssb_device *ent;
758 int i;
760 for (i = 0; i < bus->nr_devices; i++) {
761 ent = &(bus->devices[i]);
762 if (ent->id.vendor != dev->id.vendor)
763 continue;
764 if (ent->id.coreid != dev->id.coreid)
765 continue;
767 ent->devtypedata = data;
770 EXPORT_SYMBOL(ssb_set_devtypedata);
772 static u32 clkfactor_f6_resolve(u32 v)
774 /* map the magic values */
775 switch (v) {
776 case SSB_CHIPCO_CLK_F6_2:
777 return 2;
778 case SSB_CHIPCO_CLK_F6_3:
779 return 3;
780 case SSB_CHIPCO_CLK_F6_4:
781 return 4;
782 case SSB_CHIPCO_CLK_F6_5:
783 return 5;
784 case SSB_CHIPCO_CLK_F6_6:
785 return 6;
786 case SSB_CHIPCO_CLK_F6_7:
787 return 7;
789 return 0;
792 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
793 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
795 u32 n1, n2, clock, m1, m2, m3, mc;
797 n1 = (n & SSB_CHIPCO_CLK_N1);
798 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
800 switch (plltype) {
801 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
802 if (m & SSB_CHIPCO_CLK_T6_MMASK)
803 return SSB_CHIPCO_CLK_T6_M0;
804 return SSB_CHIPCO_CLK_T6_M1;
805 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
806 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
807 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
808 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
809 n1 = clkfactor_f6_resolve(n1);
810 n2 += SSB_CHIPCO_CLK_F5_BIAS;
811 break;
812 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
813 n1 += SSB_CHIPCO_CLK_T2_BIAS;
814 n2 += SSB_CHIPCO_CLK_T2_BIAS;
815 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
816 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
817 break;
818 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
819 return 100000000;
820 default:
821 SSB_WARN_ON(1);
824 switch (plltype) {
825 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
826 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
827 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
828 break;
829 default:
830 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
832 if (!clock)
833 return 0;
835 m1 = (m & SSB_CHIPCO_CLK_M1);
836 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
837 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
838 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
840 switch (plltype) {
841 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
842 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
843 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
844 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
845 m1 = clkfactor_f6_resolve(m1);
846 if ((plltype == SSB_PLLTYPE_1) ||
847 (plltype == SSB_PLLTYPE_3))
848 m2 += SSB_CHIPCO_CLK_F5_BIAS;
849 else
850 m2 = clkfactor_f6_resolve(m2);
851 m3 = clkfactor_f6_resolve(m3);
853 switch (mc) {
854 case SSB_CHIPCO_CLK_MC_BYPASS:
855 return clock;
856 case SSB_CHIPCO_CLK_MC_M1:
857 return (clock / m1);
858 case SSB_CHIPCO_CLK_MC_M1M2:
859 return (clock / (m1 * m2));
860 case SSB_CHIPCO_CLK_MC_M1M2M3:
861 return (clock / (m1 * m2 * m3));
862 case SSB_CHIPCO_CLK_MC_M1M3:
863 return (clock / (m1 * m3));
865 return 0;
866 case SSB_PLLTYPE_2:
867 m1 += SSB_CHIPCO_CLK_T2_BIAS;
868 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
869 m3 += SSB_CHIPCO_CLK_T2_BIAS;
870 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
871 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
872 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
874 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
875 clock /= m1;
876 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
877 clock /= m2;
878 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
879 clock /= m3;
880 return clock;
881 default:
882 SSB_WARN_ON(1);
884 return 0;
887 /* Get the current speed the backplane is running at */
888 u32 ssb_clockspeed(struct ssb_bus *bus)
890 u32 rate;
891 u32 plltype;
892 u32 clkctl_n, clkctl_m;
894 if (ssb_extif_available(&bus->extif))
895 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
896 &clkctl_n, &clkctl_m);
897 else if (bus->chipco.dev)
898 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
899 &clkctl_n, &clkctl_m);
900 else
901 return 0;
903 if (bus->chip_id == 0x5365) {
904 rate = 100000000;
905 } else {
906 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
907 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
908 rate /= 2;
911 return rate;
913 EXPORT_SYMBOL(ssb_clockspeed);
915 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
917 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
919 /* The REJECT bit changed position in TMSLOW between
920 * Backplane revisions. */
921 switch (rev) {
922 case SSB_IDLOW_SSBREV_22:
923 return SSB_TMSLOW_REJECT_22;
924 case SSB_IDLOW_SSBREV_23:
925 return SSB_TMSLOW_REJECT_23;
926 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
927 case SSB_IDLOW_SSBREV_25: /* same here */
928 case SSB_IDLOW_SSBREV_26: /* same here */
929 case SSB_IDLOW_SSBREV_27: /* same here */
930 return SSB_TMSLOW_REJECT_23; /* this is a guess */
931 default:
932 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
933 WARN_ON(1);
935 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
938 int ssb_device_is_enabled(struct ssb_device *dev)
940 u32 val;
941 u32 reject;
943 reject = ssb_tmslow_reject_bitmask(dev);
944 val = ssb_read32(dev, SSB_TMSLOW);
945 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
947 return (val == SSB_TMSLOW_CLOCK);
949 EXPORT_SYMBOL(ssb_device_is_enabled);
951 static void ssb_flush_tmslow(struct ssb_device *dev)
953 /* Make _really_ sure the device has finished the TMSLOW
954 * register write transaction, as we risk running into
955 * a machine check exception otherwise.
956 * Do this by reading the register back to commit the
957 * PCI write and delay an additional usec for the device
958 * to react to the change. */
959 ssb_read32(dev, SSB_TMSLOW);
960 udelay(1);
963 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
965 u32 val;
967 ssb_device_disable(dev, core_specific_flags);
968 ssb_write32(dev, SSB_TMSLOW,
969 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
970 SSB_TMSLOW_FGC | core_specific_flags);
971 ssb_flush_tmslow(dev);
973 /* Clear SERR if set. This is a hw bug workaround. */
974 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
975 ssb_write32(dev, SSB_TMSHIGH, 0);
977 val = ssb_read32(dev, SSB_IMSTATE);
978 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
979 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
980 ssb_write32(dev, SSB_IMSTATE, val);
983 ssb_write32(dev, SSB_TMSLOW,
984 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
985 core_specific_flags);
986 ssb_flush_tmslow(dev);
988 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
989 core_specific_flags);
990 ssb_flush_tmslow(dev);
992 EXPORT_SYMBOL(ssb_device_enable);
994 /* Wait for a bit in a register to get set or unset.
995 * timeout is in units of ten-microseconds */
996 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
997 int timeout, int set)
999 int i;
1000 u32 val;
1002 for (i = 0; i < timeout; i++) {
1003 val = ssb_read32(dev, reg);
1004 if (set) {
1005 if (val & bitmask)
1006 return 0;
1007 } else {
1008 if (!(val & bitmask))
1009 return 0;
1011 udelay(10);
1013 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1014 "register %04X to %s.\n",
1015 bitmask, reg, (set ? "set" : "clear"));
1017 return -ETIMEDOUT;
1020 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1022 u32 reject;
1024 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1025 return;
1027 reject = ssb_tmslow_reject_bitmask(dev);
1028 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1029 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1030 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1031 ssb_write32(dev, SSB_TMSLOW,
1032 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1033 reject | SSB_TMSLOW_RESET |
1034 core_specific_flags);
1035 ssb_flush_tmslow(dev);
1037 ssb_write32(dev, SSB_TMSLOW,
1038 reject | SSB_TMSLOW_RESET |
1039 core_specific_flags);
1040 ssb_flush_tmslow(dev);
1042 EXPORT_SYMBOL(ssb_device_disable);
1044 u32 ssb_dma_translation(struct ssb_device *dev)
1046 switch (dev->bus->bustype) {
1047 case SSB_BUSTYPE_SSB:
1048 return 0;
1049 case SSB_BUSTYPE_PCI:
1050 case SSB_BUSTYPE_PCMCIA:
1051 return SSB_PCI_DMA;
1053 return 0;
1055 EXPORT_SYMBOL(ssb_dma_translation);
1057 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1059 struct device *dev = ssb_dev->dev;
1061 #ifdef CONFIG_SSB_PCIHOST
1062 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1063 !dma_supported(dev, mask))
1064 return -EIO;
1065 #endif
1066 dev->coherent_dma_mask = mask;
1067 dev->dma_mask = &dev->coherent_dma_mask;
1069 return 0;
1071 EXPORT_SYMBOL(ssb_dma_set_mask);
1073 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1075 struct ssb_chipcommon *cc;
1076 int err = 0;
1078 /* On buses where more than one core may be working
1079 * at a time, we must not powerdown stuff if there are
1080 * still cores that may want to run. */
1081 if (bus->bustype == SSB_BUSTYPE_SSB)
1082 goto out;
1084 cc = &bus->chipco;
1085 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1086 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1087 if (err)
1088 goto error;
1089 out:
1090 #ifdef CONFIG_SSB_DEBUG
1091 bus->powered_up = 0;
1092 #endif
1093 return err;
1094 error:
1095 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1096 goto out;
1098 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1100 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1102 struct ssb_chipcommon *cc;
1103 int err;
1104 enum ssb_clkmode mode;
1106 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1107 if (err)
1108 goto error;
1109 cc = &bus->chipco;
1110 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1111 ssb_chipco_set_clockmode(cc, mode);
1113 #ifdef CONFIG_SSB_DEBUG
1114 bus->powered_up = 1;
1115 #endif
1116 return 0;
1117 error:
1118 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1119 return err;
1121 EXPORT_SYMBOL(ssb_bus_powerup);
1123 u32 ssb_admatch_base(u32 adm)
1125 u32 base = 0;
1127 switch (adm & SSB_ADM_TYPE) {
1128 case SSB_ADM_TYPE0:
1129 base = (adm & SSB_ADM_BASE0);
1130 break;
1131 case SSB_ADM_TYPE1:
1132 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1133 base = (adm & SSB_ADM_BASE1);
1134 break;
1135 case SSB_ADM_TYPE2:
1136 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1137 base = (adm & SSB_ADM_BASE2);
1138 break;
1139 default:
1140 SSB_WARN_ON(1);
1143 return base;
1145 EXPORT_SYMBOL(ssb_admatch_base);
1147 u32 ssb_admatch_size(u32 adm)
1149 u32 size = 0;
1151 switch (adm & SSB_ADM_TYPE) {
1152 case SSB_ADM_TYPE0:
1153 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1154 break;
1155 case SSB_ADM_TYPE1:
1156 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1157 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1158 break;
1159 case SSB_ADM_TYPE2:
1160 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1161 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1162 break;
1163 default:
1164 SSB_WARN_ON(1);
1166 size = (1 << (size + 1));
1168 return size;
1170 EXPORT_SYMBOL(ssb_admatch_size);
1172 static int __init ssb_modinit(void)
1174 int err;
1176 /* See the comment at the ssb_is_early_boot definition */
1177 ssb_is_early_boot = 0;
1178 err = bus_register(&ssb_bustype);
1179 if (err)
1180 return err;
1182 /* Maybe we already registered some buses at early boot.
1183 * Check for this and attach them
1185 ssb_buses_lock();
1186 err = ssb_attach_queued_buses();
1187 ssb_buses_unlock();
1188 if (err)
1189 bus_unregister(&ssb_bustype);
1191 err = b43_pci_ssb_bridge_init();
1192 if (err) {
1193 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1194 "initialization failed\n");
1195 /* don't fail SSB init because of this */
1196 err = 0;
1198 err = ssb_gige_init();
1199 if (err) {
1200 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1201 "driver initialization failed\n");
1202 /* don't fail SSB init because of this */
1203 err = 0;
1206 return err;
1208 /* ssb must be initialized after PCI but before the ssb drivers.
1209 * That means we must use some initcall between subsys_initcall
1210 * and device_initcall. */
1211 fs_initcall(ssb_modinit);
1213 static void __exit ssb_modexit(void)
1215 ssb_gige_exit();
1216 b43_pci_ssb_bridge_exit();
1217 bus_unregister(&ssb_bustype);
1219 module_exit(ssb_modexit)